International Roadmap for Devices and Systems

International Roadmap for Devices and Systems

INTERNATIONAL ROADMAP FOR DEVICES AND SYSTEMS 2020 EDITION BEYOND CMOS THE IRDS IS DEVISED AND INTENDED FOR TECHNOLOGY ASSESSMENT ONLY AND IS WITHOUT REGARD TO ANY COMMERCIAL CONSIDERATIONS PERTAINING TO INDIVIDUAL PRODUCTS OR EQUIPMENT. ii © 2020 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other works. THE INTERNATIONAL ROADMAP FOR DEVICES AND SYSTEMS: 2020 COPYRIGHT © 2020 IEEE. ALL RIGHTS RESERVED. iii Table of Contents Acknowledgments .............................................................................................................................. vi 1. Introduction .................................................................................................................................. 1 1.1. Scope of Beyond-CMOS Focus Team .............................................................................................. 1 1.2. Difficult Challenges ............................................................................................................................ 2 1.3. Nano-information Processing Taxonomy........................................................................................... 4 2. Emerging Memory Devices ........................................................................................................... 4 2.1. Memory Taxonomy ............................................................................................................................ 5 2.2. Emerging Memory Devices ................................................................................................................ 6 2.3. Memory Selector Device .................................................................................................................. 17 2.4. Storage Class Memory .................................................................................................................... 20 3. Emerging Logic and Alternative Information Processing Devices ............................................... 27 3.1. Taxonomy ........................................................................................................................................ 27 3.2. Devices for CMOS Extension .......................................................................................................... 28 3.3. Beyond-CMOS Devices: Charge-Based .......................................................................................... 32 3.4. Beyond-CMOS Devices: Alternative Information Processing .......................................................... 36 4. Emerging Device-Architecture Interaction ................................................................................... 41 4.1. Introduction ...................................................................................................................................... 41 4.2. Analog Computing ........................................................................................................................... 43 4.3. Probabilistic Circuits ......................................................................................................................... 57 4.4. Reversible Computing...................................................................................................................... 59 4.5. Device-Architecture Interaction: Conclusions/Recommendations ................................................... 64 5. Beyond CMOS Devices for More-Than-Moore Applications ....................................................... 64 5.1. Emerging Devices for Security Applications .................................................................................... 64 6. Emerging Materials Integration ................................................................................................... 68 6.1. Introduction and Scope .................................................................................................................... 68 6.2. Challenges ....................................................................................................................................... 69 6.3. Technology Requirements and Potential Solutions ......................................................................... 70 6.4. Emerging/Disruptive Concepts and Technologies ........................................................................... 73 6.5. Conclusions and Recommendations ............................................................................................... 74 7. Assessment ................................................................................................................................ 74 7.1. Introduction ...................................................................................................................................... 74 7.2. NRI Beyond-CMOS Benchmarking ................................................................................................. 75 7.3. Archive of ITRS ERD Survey-Based Assessment ........................................................................... 77 8. Summary ................................................................................................................................ 80 9. Endnotes/References .................................................................................................................. 81 THE INTERNATIONAL ROADMAP FOR DEVICES AND SYSTEMS: 2020 COPYRIGHT © 2020 IEEE. ALL RIGHTS RESERVED. iv List of Figures Figure BC1.1 Relationship of More Moore, Beyond CMOS, and Novel Computing Paradigms and Applications (Courtesy of Japan beyond-CMOS group) .................................... 1 Figure BC2.1 Taxonomy of Emerging Memory Devices ................................................................. 6 Figure BC2.2. Taxonomy of Memory Select Devices .................................................................... 17 Figure BC2.3 Comparison of Performance of Different Memory Technologies ............................ 23 Figure BC3.1 Taxonomy of Options for Emerging Logic Devices ................................................ 27 Figure BC4.1. Conventional vs. Alternative Computing Paradigms .............................................. 42 Figure BC4.2 A Resistive Memory Crossbar = Solver is Illustrated ..................................... 45 Figure BC4.3 A Spiking CNN for Gesture Recognition with Local Learning ................................. 47 Figure BC4.4 One Generalized Instantiation of a Photonic MVM unit, with Wavelength Multiplexed Inputs and Outputs and a Coupler-based Tunable Array. Reproduced from931. ............................................................................................... 54 Figure BC4.5 Energy Dissipation per Stage vs. Frequency in an Adiabatic CMOS Shift Register .................................................................................................................. 61 Figure BC4.6 Energy dissipation of RQFP and irreversible AQFP 1-b full adders ....................... 62 Figure EMI1 Emerging Material Integration Promotes the Advancement of Existing Technologies .......................................................................................................... 69 Figure EMI2 An Example of the Role of Machine Learning in the Multiscale Simulation ............ 74 Figure BC7.1 (a) Energy versus Delay of a 32-bit ALU for a Variety of Charge- and Spin- based Devices; (b) Energy versus Delay per Memory Association Operation Using Cellular Neural Network (CNN) for a Variety of Charge- and Spin-based Devices1156 .............................................................................................................. 76 Figure BC7.2 (a) Survey of Emerging Memory Devices and (b) Survey of Emerging Logic Devices in 2014 ERD Emerging Logic Workshop (Albuquerque, NM) ................... 78 Figure BC7.3 Comparison of Emerging Memory Devices Based on 2013 Critical Review .......... 78 Figure BC7.4 Comparison of Emerging Logic Devices Based on 2013 ITRS ERD Critical Review: (a) CMOS Extension Devices; (b) Charge-based Beyond-CMOS Devices; (c) Non-charge-based Beyond-CMOS Devices ....................................... 79 THE INTERNATIONAL ROADMAP FOR DEVICES AND SYSTEMS: 2020 COPYRIGHT © 2020 IEEE. ALL RIGHTS RESERVED. v List of Tables Table BC1.1 Beyond CMOS Difficult Challenges .......................................................................... 3 Table BC2.1 Emerging Research Memory Devices—Demonstrated and Projected Parameters ............................................................................................................... 5 Table BC2.2 Experimental Demonstrations of Vertical Transistors in Memory Arrays ............... 18 Table BC2.3 Benchmark Select Device Parameters ................................................................... 18 Table BC2.4a Experimentally Demonstrated Two-terminal Memory Select Devices .................... 20 Table BC2.4b Experimentally Demonstrated Self-selecting Memory Devices (self-rectifying) ..... 20 Table BC2.5 Target Device and System Specifications for SCM ................................................ 22 Table BC2.6 Potential of Current Prototypical and Emerging Research Memory Candidates for SCM Applications .............................................................................................

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