<p>Release 14.4 - xst P.49d (nt64)</p><p>Copyright (c) 1995-2012 Xilinx, Inc. All rights reserved.</p><p>--> Parameter TMPDIR set to xst/projnav.tmp</p><p>Total REAL time to Xst completion: 0.00 secs</p><p>Total CPU time to Xst completion: 0.27 secs</p><p>--> Parameter xsthdpdir set to xst</p><p>Total REAL time to Xst completion: 0.00 secs</p><p>Total CPU time to Xst completion: 0.28 secs</p><p>--> </p><p>Reading constraint file C:/Users/admin/Desktop/map/masbit/mas_cw.xcf.</p><p>XCF parsing done.</p><p>Reading design: mas_cw.prj</p><p>TABLE OF CONTENTS</p><p>1) Synthesis Options Summary</p><p>2) HDL Parsing</p><p>3) HDL Elaboration</p><p>4) HDL Synthesis</p><p>4.1) HDL Synthesis Report 5) Advanced HDL Synthesis</p><p>5.1) Advanced HDL Synthesis Report</p><p>6) Low Level Synthesis</p><p>7) Partition Report</p><p>8) Design Summary</p><p>8.1) Primitive and Black Box Usage</p><p>8.2) Device utilization summary</p><p>8.3) Partition Resource Summary</p><p>8.4) Timing Report</p><p>8.4.1) Clock Information</p><p>8.4.2) Asynchronous Control Signals Information</p><p>8.4.3) Timing Summary</p><p>8.4.4) Timing Details</p><p>8.4.5) Cross Clock Domains Report</p><p>======</p><p>* Synthesis Options Summary *</p><p>======</p><p>---- Source Parameters</p><p>Input File Name : "mas_cw.prj"</p><p>Synthesis Constraint File : "C:/Users/admin/Desktop/map/masbit/mas_cw.xcf"</p><p>Ignore Synthesis Constraint File : NO ---- Target Parameters</p><p>Output File Name : "mas_cw"</p><p>Output Format : NGC</p><p>Target Device : xc7vx485t-2-ffg1761</p><p>---- Source Options</p><p>Top Module Name : mas_cw</p><p>Automatic FSM Extraction : YES</p><p>FSM Encoding Algorithm : Auto</p><p>Safe Implementation : No</p><p>FSM Style : LUT</p><p>RAM Extraction : Yes</p><p>RAM Style : Auto</p><p>ROM Extraction : Yes</p><p>Shift Register Extraction : YES</p><p>ROM Style : Auto</p><p>Resource Sharing : YES</p><p>Asynchronous To Synchronous : NO</p><p>Shift Register Minimum Size : 2</p><p>Use DSP Block : Auto</p><p>Automatic Register Balancing : No</p><p>---- Target Options</p><p>LUT Combining : Auto</p><p>Reduce Control Sets : Auto Add IO Buffers : YES</p><p>Global Maximum Fanout : 100000</p><p>Add Generic Clock Buffer(BUFG) : 32</p><p>Register Duplication : YES</p><p>Optimize Instantiated Primitives : NO</p><p>Use Clock Enable : Auto</p><p>Use Synchronous Set : Auto</p><p>Use Synchronous Reset : Auto</p><p>Pack IO Registers into IOBs : Auto</p><p>Equivalent register Removal : YES</p><p>---- General Options</p><p>Optimization Goal : Speed</p><p>Optimization Effort : 1</p><p>Power Reduction : NO</p><p>Keep Hierarchy : No</p><p>Netlist Hierarchy : As_Optimized</p><p>RTL Output : Yes</p><p>Global Optimization : AllClockNets</p><p>Read Cores : NO</p><p>Write Timing Constraints : NO</p><p>Cross Clock Analysis : NO</p><p>Hierarchy Separator : /</p><p>Bus Delimiter : ()</p><p>Case Specifier : Maintain Slice Utilization Ratio : 100</p><p>BRAM Utilization Ratio : 100</p><p>DSP48 Utilization Ratio : 100</p><p>Auto BRAM Packing : NO</p><p>Slice Utilization Ratio Delta : 5</p><p>======</p><p>======</p><p>* HDL Parsing *</p><p>======</p><p>Parsing VHDL file "C:\Users\admin\Desktop\map\masbit\mas.vhd" into library work</p><p>Parsing entity <addsb_11_0_12cafd628eabec2e>.</p><p>Parsing architecture <addsb_11_0_12cafd628eabec2e_a> of entity <addsb_11_0_12cafd628eabec2e>.</p><p>Parsing entity <addsb_11_0_16ed126b9432f966>.</p><p>Parsing architecture <addsb_11_0_16ed126b9432f966_a> of entity <addsb_11_0_16ed126b9432f966>.</p><p>Parsing entity <addsb_11_0_1e0050c132159f46>.</p><p>Parsing architecture <addsb_11_0_1e0050c132159f46_a> of entity <addsb_11_0_1e0050c132159f46>.</p><p>Parsing entity <addsb_11_0_20f59c924e684f65>.</p><p>Parsing architecture <addsb_11_0_20f59c924e684f65_a> of entity <addsb_11_0_20f59c924e684f65>.</p><p>Parsing entity <addsb_11_0_2184da4f73658baf>.</p><p>Parsing architecture <addsb_11_0_2184da4f73658baf_a> of entity <addsb_11_0_2184da4f73658baf>.</p><p>Parsing entity <addsb_11_0_4c11e627a14cfcc4>.</p><p>Parsing architecture <addsb_11_0_4c11e627a14cfcc4_a> of entity <addsb_11_0_4c11e627a14cfcc4>. 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Parsing entity <addsb_11_0_af6b5da6dbbc120b>.</p><p>Parsing architecture <addsb_11_0_af6b5da6dbbc120b_a> of entity <addsb_11_0_af6b5da6dbbc120b>.</p><p>Parsing entity <addsb_11_0_b8b6601a380b9153>.</p><p>Parsing architecture <addsb_11_0_b8b6601a380b9153_a> of entity <addsb_11_0_b8b6601a380b9153>.</p><p>Parsing entity <addsb_11_0_ba616ce80205da8e>.</p><p>Parsing architecture <addsb_11_0_ba616ce80205da8e_a> of entity <addsb_11_0_ba616ce80205da8e>.</p><p>Parsing entity <addsb_11_0_d233efc3f69384da>.</p><p>Parsing architecture <addsb_11_0_d233efc3f69384da_a> of entity <addsb_11_0_d233efc3f69384da>.</p><p>Parsing entity <addsb_11_0_e8c1ba21b313f251>.</p><p>Parsing architecture <addsb_11_0_e8c1ba21b313f251_a> of entity <addsb_11_0_e8c1ba21b313f251>.</p><p>Parsing entity <addsb_11_0_f49d9cea35751c72>.</p><p>Parsing architecture <addsb_11_0_f49d9cea35751c72_a> of entity <addsb_11_0_f49d9cea35751c72>.</p><p>Parsing entity <bmg_72_0de05196f3843ae4>.</p><p>Parsing architecture <bmg_72_0de05196f3843ae4_a> of entity <bmg_72_0de05196f3843ae4>.</p><p>Parsing entity <bmg_72_890d12da6c3a372e>.</p><p>Parsing architecture <bmg_72_890d12da6c3a372e_a> of entity <bmg_72_890d12da6c3a372e>.</p><p>Parsing entity <cmlt_11_2_00940c83ede01534>.</p><p>Parsing architecture <cmlt_11_2_00940c83ede01534_a> of entity <cmlt_11_2_00940c83ede01534>.</p><p>Parsing entity <cmlt_11_2_029410d730aef3c6>.</p><p>Parsing architecture <cmlt_11_2_029410d730aef3c6_a> of entity <cmlt_11_2_029410d730aef3c6>.</p><p>Parsing entity <cmlt_11_2_049d91e8686bd2db>.</p><p>Parsing architecture <cmlt_11_2_049d91e8686bd2db_a> of entity <cmlt_11_2_049d91e8686bd2db>.</p><p>Parsing entity <cmlt_11_2_077728a89cbfeb6d>.</p><p>Parsing architecture <cmlt_11_2_077728a89cbfeb6d_a> of entity <cmlt_11_2_077728a89cbfeb6d>.</p><p>Parsing entity <cmlt_11_2_0a78d26987d5e79b>. Parsing architecture <cmlt_11_2_0a78d26987d5e79b_a> of entity <cmlt_11_2_0a78d26987d5e79b>.</p><p>Parsing entity <cmlt_11_2_1029404049440265>.</p><p>Parsing architecture <cmlt_11_2_1029404049440265_a> of entity <cmlt_11_2_1029404049440265>.</p><p>Parsing entity <cmlt_11_2_1322aa4468f252d0>.</p><p>Parsing architecture <cmlt_11_2_1322aa4468f252d0_a> of entity <cmlt_11_2_1322aa4468f252d0>.</p><p>Parsing entity <cmlt_11_2_13cb1fe83f6719af>.</p><p>Parsing architecture <cmlt_11_2_13cb1fe83f6719af_a> of entity <cmlt_11_2_13cb1fe83f6719af>.</p><p>Parsing entity <cmlt_11_2_14cba680b6143225>.</p><p>Parsing architecture <cmlt_11_2_14cba680b6143225_a> of entity <cmlt_11_2_14cba680b6143225>.</p><p>Parsing entity <cmlt_11_2_16833ca38057a335>.</p><p>Parsing architecture <cmlt_11_2_16833ca38057a335_a> of entity <cmlt_11_2_16833ca38057a335>.</p><p>Parsing entity <cmlt_11_2_2650ef2e23192fd1>.</p><p>Parsing architecture <cmlt_11_2_2650ef2e23192fd1_a> of entity <cmlt_11_2_2650ef2e23192fd1>.</p><p>Parsing entity <cmlt_11_2_287cfc82d0a194a1>.</p><p>Parsing architecture <cmlt_11_2_287cfc82d0a194a1_a> of entity <cmlt_11_2_287cfc82d0a194a1>.</p><p>Parsing entity <cmlt_11_2_30f8ec8dfd7f8ed2>.</p><p>Parsing architecture <cmlt_11_2_30f8ec8dfd7f8ed2_a> of entity <cmlt_11_2_30f8ec8dfd7f8ed2>.</p><p>Parsing entity <cmlt_11_2_33d444a49cc98bbc>.</p><p>Parsing architecture <cmlt_11_2_33d444a49cc98bbc_a> of entity <cmlt_11_2_33d444a49cc98bbc>.</p><p>Parsing entity <cmlt_11_2_35f296ece0a9a6e7>.</p><p>Parsing architecture <cmlt_11_2_35f296ece0a9a6e7_a> of entity <cmlt_11_2_35f296ece0a9a6e7>.</p><p>Parsing entity <cmlt_11_2_3e26ad3f166f5a05>.</p><p>Parsing architecture <cmlt_11_2_3e26ad3f166f5a05_a> of entity <cmlt_11_2_3e26ad3f166f5a05>.</p><p>Parsing entity <cmlt_11_2_3e63237a5cd93bb8>.</p><p>Parsing architecture <cmlt_11_2_3e63237a5cd93bb8_a> of entity <cmlt_11_2_3e63237a5cd93bb8>. Parsing entity <cmlt_11_2_3ec88f51016c09d9>.</p><p>Parsing architecture <cmlt_11_2_3ec88f51016c09d9_a> of entity <cmlt_11_2_3ec88f51016c09d9>.</p><p>Parsing entity <cmlt_11_2_459de2f2aaf2af91>.</p><p>Parsing architecture <cmlt_11_2_459de2f2aaf2af91_a> of entity <cmlt_11_2_459de2f2aaf2af91>.</p><p>Parsing entity <cmlt_11_2_4af8ac614edb0db0>.</p><p>Parsing architecture <cmlt_11_2_4af8ac614edb0db0_a> of entity <cmlt_11_2_4af8ac614edb0db0>.</p><p>Parsing entity <cmlt_11_2_4d19018b3c39239e>.</p><p>Parsing architecture <cmlt_11_2_4d19018b3c39239e_a> of entity <cmlt_11_2_4d19018b3c39239e>.</p><p>Parsing entity <cmlt_11_2_4dcdcdfd0b028d3b>.</p><p>Parsing architecture <cmlt_11_2_4dcdcdfd0b028d3b_a> of entity <cmlt_11_2_4dcdcdfd0b028d3b>.</p><p>Parsing entity <cmlt_11_2_5b85ee661d59a06a>.</p><p>Parsing architecture <cmlt_11_2_5b85ee661d59a06a_a> of entity <cmlt_11_2_5b85ee661d59a06a>.</p><p>Parsing entity <cmlt_11_2_60529fe33e9807f6>.</p><p>Parsing architecture <cmlt_11_2_60529fe33e9807f6_a> of entity <cmlt_11_2_60529fe33e9807f6>.</p><p>Parsing entity <cmlt_11_2_66d7ec4f1062986c>.</p><p>Parsing architecture <cmlt_11_2_66d7ec4f1062986c_a> of entity <cmlt_11_2_66d7ec4f1062986c>.</p><p>Parsing entity <cmlt_11_2_6e7b989066784718>.</p><p>Parsing architecture <cmlt_11_2_6e7b989066784718_a> of entity <cmlt_11_2_6e7b989066784718>.</p><p>Parsing entity <cmlt_11_2_8153107f81f163c5>.</p><p>Parsing architecture <cmlt_11_2_8153107f81f163c5_a> of entity <cmlt_11_2_8153107f81f163c5>.</p><p>Parsing entity <cmlt_11_2_855fc87d891b1c0f>.</p><p>Parsing architecture <cmlt_11_2_855fc87d891b1c0f_a> of entity <cmlt_11_2_855fc87d891b1c0f>.</p><p>Parsing entity <cmlt_11_2_85f2ddc5a9b50dfe>.</p><p>Parsing architecture <cmlt_11_2_85f2ddc5a9b50dfe_a> of entity <cmlt_11_2_85f2ddc5a9b50dfe>.</p><p>Parsing entity <cmlt_11_2_8772ad679ba8df4b>. Parsing architecture <cmlt_11_2_8772ad679ba8df4b_a> of entity <cmlt_11_2_8772ad679ba8df4b>.</p><p>Parsing entity <cmlt_11_2_884930e4bebbd5b6>.</p><p>Parsing architecture <cmlt_11_2_884930e4bebbd5b6_a> of entity <cmlt_11_2_884930e4bebbd5b6>.</p><p>Parsing entity <cmlt_11_2_8f687fd98108bd9e>.</p><p>Parsing architecture <cmlt_11_2_8f687fd98108bd9e_a> of entity <cmlt_11_2_8f687fd98108bd9e>.</p><p>Parsing entity <cmlt_11_2_92b3a38bd336f036>.</p><p>Parsing architecture <cmlt_11_2_92b3a38bd336f036_a> of entity <cmlt_11_2_92b3a38bd336f036>.</p><p>Parsing entity <cmlt_11_2_992d02a5d9cbaf76>.</p><p>Parsing architecture <cmlt_11_2_992d02a5d9cbaf76_a> of entity <cmlt_11_2_992d02a5d9cbaf76>.</p><p>Parsing entity <cmlt_11_2_99587795c33c8b08>.</p><p>Parsing architecture <cmlt_11_2_99587795c33c8b08_a> of entity <cmlt_11_2_99587795c33c8b08>.</p><p>Parsing entity <cmlt_11_2_996fdd58b0411a2b>.</p><p>Parsing architecture <cmlt_11_2_996fdd58b0411a2b_a> of entity <cmlt_11_2_996fdd58b0411a2b>.</p><p>Parsing entity <cmlt_11_2_9f263efbda8fb0e9>.</p><p>Parsing architecture <cmlt_11_2_9f263efbda8fb0e9_a> of entity <cmlt_11_2_9f263efbda8fb0e9>.</p><p>Parsing entity <cmlt_11_2_a910f6a2fda8130a>.</p><p>Parsing architecture <cmlt_11_2_a910f6a2fda8130a_a> of entity <cmlt_11_2_a910f6a2fda8130a>.</p><p>Parsing entity <cmlt_11_2_ad64fb3a34f13a2e>.</p><p>Parsing architecture <cmlt_11_2_ad64fb3a34f13a2e_a> of entity <cmlt_11_2_ad64fb3a34f13a2e>.</p><p>Parsing entity <cmlt_11_2_afed6c2e98e9db95>.</p><p>Parsing architecture <cmlt_11_2_afed6c2e98e9db95_a> of entity <cmlt_11_2_afed6c2e98e9db95>.</p><p>Parsing entity <cmlt_11_2_b15d6089faabfeb6>.</p><p>Parsing architecture <cmlt_11_2_b15d6089faabfeb6_a> of entity <cmlt_11_2_b15d6089faabfeb6>.</p><p>Parsing entity <cmlt_11_2_b8f0ba24732880a2>.</p><p>Parsing architecture <cmlt_11_2_b8f0ba24732880a2_a> of entity <cmlt_11_2_b8f0ba24732880a2>. Parsing entity <cmlt_11_2_c1042e6cbf52704f>.</p><p>Parsing architecture <cmlt_11_2_c1042e6cbf52704f_a> of entity <cmlt_11_2_c1042e6cbf52704f>.</p><p>Parsing entity <cmlt_11_2_c1a452200a369f05>.</p><p>Parsing architecture <cmlt_11_2_c1a452200a369f05_a> of entity <cmlt_11_2_c1a452200a369f05>.</p><p>Parsing entity <cmlt_11_2_c473908a1008a362>.</p><p>Parsing architecture <cmlt_11_2_c473908a1008a362_a> of entity <cmlt_11_2_c473908a1008a362>.</p><p>Parsing entity <cmlt_11_2_ce4fb6f0c1404e84>.</p><p>Parsing architecture <cmlt_11_2_ce4fb6f0c1404e84_a> of entity <cmlt_11_2_ce4fb6f0c1404e84>.</p><p>Parsing entity <cmlt_11_2_df1f89bf2e1d9b34>.</p><p>Parsing architecture <cmlt_11_2_df1f89bf2e1d9b34_a> of entity <cmlt_11_2_df1f89bf2e1d9b34>.</p><p>Parsing entity <cmlt_11_2_e39bf5f892b9d2bb>.</p><p>Parsing architecture <cmlt_11_2_e39bf5f892b9d2bb_a> of entity <cmlt_11_2_e39bf5f892b9d2bb>.</p><p>Parsing entity <cmlt_11_2_e660458fe81f5d55>.</p><p>Parsing architecture <cmlt_11_2_e660458fe81f5d55_a> of entity <cmlt_11_2_e660458fe81f5d55>.</p><p>Parsing entity <cmlt_11_2_e9ca31a3eb8f57dd>.</p><p>Parsing architecture <cmlt_11_2_e9ca31a3eb8f57dd_a> of entity <cmlt_11_2_e9ca31a3eb8f57dd>.</p><p>Parsing entity <cmlt_11_2_ec86768b7e117459>.</p><p>Parsing architecture <cmlt_11_2_ec86768b7e117459_a> of entity <cmlt_11_2_ec86768b7e117459>.</p><p>Parsing entity <cmlt_11_2_efa413f2be52c767>.</p><p>Parsing architecture <cmlt_11_2_efa413f2be52c767_a> of entity <cmlt_11_2_efa413f2be52c767>.</p><p>Parsing entity <cntr_11_0_761b5b8e2cd8f1c2>.</p><p>Parsing architecture <cntr_11_0_761b5b8e2cd8f1c2_a> of entity <cntr_11_0_761b5b8e2cd8f1c2>.</p><p>Parsing entity <mult_11_2_0d9df47653e8136c>.</p><p>Parsing architecture <mult_11_2_0d9df47653e8136c_a> of entity <mult_11_2_0d9df47653e8136c>.</p><p>Parsing entity <mult_11_2_0e1566528d2aabad>. Parsing architecture <mult_11_2_0e1566528d2aabad_a> of entity <mult_11_2_0e1566528d2aabad>.</p><p>Parsing entity <mult_11_2_1cb5ed593dd6a805>.</p><p>Parsing architecture <mult_11_2_1cb5ed593dd6a805_a> of entity <mult_11_2_1cb5ed593dd6a805>.</p><p>Parsing entity <mult_11_2_3e45894281c05d4b>.</p><p>Parsing architecture <mult_11_2_3e45894281c05d4b_a> of entity <mult_11_2_3e45894281c05d4b>.</p><p>Parsing entity <mult_11_2_46d1845c61547cd1>.</p><p>Parsing architecture <mult_11_2_46d1845c61547cd1_a> of entity <mult_11_2_46d1845c61547cd1>.</p><p>Parsing entity <mult_11_2_65354ed2a4562c5c>.</p><p>Parsing architecture <mult_11_2_65354ed2a4562c5c_a> of entity <mult_11_2_65354ed2a4562c5c>.</p><p>Parsing entity <mult_11_2_6d75902f305ef739>.</p><p>Parsing architecture <mult_11_2_6d75902f305ef739_a> of entity <mult_11_2_6d75902f305ef739>.</p><p>Parsing entity <mult_11_2_8a7e2cb341e8d802>.</p><p>Parsing architecture <mult_11_2_8a7e2cb341e8d802_a> of entity <mult_11_2_8a7e2cb341e8d802>.</p><p>Parsing entity <mult_11_2_920f82b2d5199557>.</p><p>Parsing architecture <mult_11_2_920f82b2d5199557_a> of entity <mult_11_2_920f82b2d5199557>.</p><p>Parsing entity <mult_11_2_9565c340740bf724>.</p><p>Parsing architecture <mult_11_2_9565c340740bf724_a> of entity <mult_11_2_9565c340740bf724>.</p><p>Parsing entity <mult_11_2_b540eb527c25496d>.</p><p>Parsing architecture <mult_11_2_b540eb527c25496d_a> of entity <mult_11_2_b540eb527c25496d>.</p><p>Parsing package <conv_pkg>.</p><p>Parsing package body <conv_pkg>.</p><p>Parsing entity <srl17e>.</p><p>Parsing architecture <structural> of entity <srl17e>.</p><p>Parsing entity <synth_reg>.</p><p>Parsing architecture <structural> of entity <synth_reg>. Parsing entity <synth_reg_reg>.</p><p>Parsing architecture <behav> of entity <synth_reg_reg>.</p><p>Parsing entity <single_reg_w_init>.</p><p>Parsing architecture <structural> of entity <single_reg_w_init>.</p><p>Parsing entity <synth_reg_w_init>.</p><p>Parsing architecture <structural> of entity <synth_reg_w_init>.</p><p>Parsing entity <xladdsub_mas>.</p><p>Parsing architecture <behavior> of entity <xladdsub_mas>.</p><p>Parsing entity <xlpassthrough>.</p><p>Parsing architecture <passthrough_arch> of entity <xlpassthrough>.</p><p>Parsing entity <xldelay>.</p><p>Parsing architecture <behavior> of entity <xldelay>.</p><p>Parsing entity <xlcmult_mas>.</p><p>Parsing architecture <behavior> of entity <xlcmult_mas>.</p><p>Parsing entity <constant_90e92453e2>.</p><p>Parsing architecture <behavior> of entity <constant_90e92453e2>.</p><p>Parsing entity <constant_91c58b6168>.</p><p>Parsing architecture <behavior> of entity <constant_91c58b6168>.</p><p>Parsing entity <constant_6477e14542>.</p><p>Parsing architecture <behavior> of entity <constant_6477e14542>.</p><p>Parsing entity <xlcounter_free_mas>.</p><p>Parsing architecture <behavior> of entity <xlcounter_free_mas>.</p><p>Parsing entity <mux_a54904b290>.</p><p>Parsing architecture <behavior> of entity <mux_a54904b290>.</p><p>Parsing entity <relational_4dc68fcdd6>. Parsing architecture <behavior> of entity <relational_4dc68fcdd6>.</p><p>Parsing entity <concat_32afb77cd2>.</p><p>Parsing architecture <behavior> of entity <concat_32afb77cd2>.</p><p>Parsing entity <constant_91ef1678ca>.</p><p>Parsing architecture <behavior> of entity <constant_91ef1678ca>.</p><p>Parsing entity <constant_63e9e12f7a>.</p><p>Parsing architecture <behavior> of entity <constant_63e9e12f7a>.</p><p>Parsing entity <mux_5c289d345d>.</p><p>Parsing architecture <behavior> of entity <mux_5c289d345d>.</p><p>Parsing entity <relational_6edcd2cfc1>.</p><p>Parsing architecture <behavior> of entity <relational_6edcd2cfc1>.</p><p>Parsing entity <relational_450a547f18>.</p><p>Parsing architecture <behavior> of entity <relational_450a547f18>.</p><p>Parsing entity <xlsprom_mas>.</p><p>Parsing architecture <behavior> of entity <xlsprom_mas>.</p><p>Parsing entity <xlmult_mas>.</p><p>Parsing architecture <behavior> of entity <xlmult_mas>.</p><p>Parsing entity <cmult_e23c3c3f98>.</p><p>Parsing architecture <behavior> of entity <cmult_e23c3c3f98>.</p><p>Parsing entity <cmult_70d8a731d2>.</p><p>Parsing architecture <behavior> of entity <cmult_70d8a731d2>.</p><p>Parsing entity <constant_c4c603edf2>.</p><p>Parsing architecture <behavior> of entity <constant_c4c603edf2>.</p><p>Parsing entity <xldivider_generator_3918c6b6df573559c53db2a570dd8e4f>.</p><p>Parsing architecture <behavior> of entity <xldivider_generator_3918c6b6df573559c53db2a570dd8e4f>. Parsing entity <xldivider_generator_f2d0cf82922d53ccd3173f64934f0d65>.</p><p>Parsing architecture <behavior> of entity <xldivider_generator_f2d0cf82922d53ccd3173f64934f0d65>.</p><p>Parsing entity <mux_738df95838>.</p><p>Parsing architecture <behavior> of entity <mux_738df95838>.</p><p>Parsing entity <relational_4957bd21f5>.</p><p>Parsing architecture <behavior> of entity <relational_4957bd21f5>.</p><p>Parsing entity <relational_0f57cbe796>.</p><p>Parsing architecture <behavior> of entity <relational_0f57cbe796>.</p><p>Parsing entity <constant_f9a3204d5a>.</p><p>Parsing architecture <behavior> of entity <constant_f9a3204d5a>.</p><p>Parsing entity <mux_965e6eda19>.</p><p>Parsing architecture <behavior> of entity <mux_965e6eda19>.</p><p>Parsing entity <relational_52aa69b739>.</p><p>Parsing architecture <behavior> of entity <relational_52aa69b739>.</p><p>Parsing entity <relational_59c2e9e070>.</p><p>Parsing architecture <behavior> of entity <relational_59c2e9e070>.</p><p>Parsing entity <constant_dd0e52e409>.</p><p>Parsing architecture <behavior> of entity <constant_dd0e52e409>.</p><p>Parsing entity <constant_566137e191>.</p><p>Parsing architecture <behavior> of entity <constant_566137e191>.</p><p>Parsing entity <mux_f1cd62c228>.</p><p>Parsing architecture <behavior> of entity <mux_f1cd62c228>.</p><p>Parsing entity <relational_291b500f4c>.</p><p>Parsing architecture <behavior> of entity <relational_291b500f4c>.</p><p>Parsing entity <relational_68289a436b>. Parsing architecture <behavior> of entity <relational_68289a436b>.</p><p>Parsing entity <mux_fc2fc9a5bf>.</p><p>Parsing architecture <behavior> of entity <mux_fc2fc9a5bf>.</p><p>Parsing entity <relational_f98abae2fa>.</p><p>Parsing architecture <behavior> of entity <relational_f98abae2fa>.</p><p>Parsing entity <relational_4fa5c6b5c8>.</p><p>Parsing architecture <behavior> of entity <relational_4fa5c6b5c8>.</p><p>Parsing entity <constant_21eca29972>.</p><p>Parsing architecture <behavior> of entity <constant_21eca29972>.</p><p>Parsing entity <constant_72d79bf72e>.</p><p>Parsing architecture <behavior> of entity <constant_72d79bf72e>.</p><p>Parsing entity <constant_7688a429c7>.</p><p>Parsing architecture <behavior> of entity <constant_7688a429c7>.</p><p>Parsing entity <mux_8c9b1f5d1f>.</p><p>Parsing architecture <behavior> of entity <mux_8c9b1f5d1f>.</p><p>Parsing entity <relational_f57db9ac43>.</p><p>Parsing architecture <behavior> of entity <relational_f57db9ac43>.</p><p>Parsing entity <constant_8df3c2619f>.</p><p>Parsing architecture <behavior> of entity <constant_8df3c2619f>.</p><p>Parsing entity <constant_7686630003>.</p><p>Parsing architecture <behavior> of entity <constant_7686630003>.</p><p>Parsing entity <constant_9d1192475b>.</p><p>Parsing architecture <behavior> of entity <constant_9d1192475b>.</p><p>Parsing entity <constant_f38f6294db>.</p><p>Parsing architecture <behavior> of entity <constant_f38f6294db>. Parsing entity <constant_be580fdd18>.</p><p>Parsing architecture <behavior> of entity <constant_be580fdd18>.</p><p>Parsing entity <mux_199bd0a2d9>.</p><p>Parsing architecture <behavior> of entity <mux_199bd0a2d9>.</p><p>Parsing entity <relational_7413a0ab90>.</p><p>Parsing architecture <behavior> of entity <relational_7413a0ab90>.</p><p>Parsing entity <integrator_entity_19b945c14b>.</p><p>Parsing architecture <structural> of entity <integrator_entity_19b945c14b>.</p><p>Parsing entity <speed_controller_entity_f4d6cf852b>.</p><p>Parsing architecture <structural> of entity <speed_controller_entity_f4d6cf852b>.</p><p>Parsing entity <flux_control_unit1_entity_3b150af683>.</p><p>Parsing architecture <structural> of entity <flux_control_unit1_entity_3b150af683>.</p><p>Parsing entity <inverter_model_entity_7e832adb6f>.</p><p>Parsing architecture <structural> of entity <inverter_model_entity_7e832adb6f>.</p><p>Parsing entity <accumulator_entity_a1fac56952>.</p><p>Parsing architecture <structural> of entity <accumulator_entity_a1fac56952>.</p><p>Parsing entity <subsystem_entity_9a652c066b>.</p><p>Parsing architecture <structural> of entity <subsystem_entity_9a652c066b>.</p><p>Parsing entity <sin_cos_entity_a4ff007f0d>.</p><p>Parsing architecture <structural> of entity <sin_cos_entity_a4ff007f0d>.</p><p>Parsing entity <x3_phase_to_dq_transform_entity_9ef544f709>.</p><p>Parsing architecture <structural> of entity <x3_phase_to_dq_transform_entity_9ef544f709>.</p><p>Parsing entity <js_b_entity_eb065e8729>.</p><p>Parsing architecture <structural> of entity <js_b_entity_eb065e8729>.</p><p>Parsing entity <r2s_1_entity_5d0e7066ab>. Parsing architecture <structural> of entity <r2s_1_entity_5d0e7066ab>.</p><p>Parsing entity <r2s_1_2_entity_76d16c6b2f>.</p><p>Parsing architecture <structural> of entity <r2s_1_2_entity_76d16c6b2f>.</p><p>Parsing entity <mechanical_model_entity_cc1bd59c80>.</p><p>Parsing architecture <structural> of entity <mechanical_model_entity_cc1bd59c80>.</p><p>Parsing entity <accumulator_entity_3a7e22bc7b>.</p><p>Parsing architecture <structural> of entity <accumulator_entity_3a7e22bc7b>.</p><p>Parsing entity <subsystem_entity_07085a3aad>.</p><p>Parsing architecture <structural> of entity <subsystem_entity_07085a3aad>.</p><p>Parsing entity <sin_cos_entity_3dd27a9558>.</p><p>Parsing architecture <structural> of entity <sin_cos_entity_3dd27a9558>.</p><p>Parsing entity <dq_to_3_phase_transform1_entity_c00e970a06>.</p><p>Parsing architecture <structural> of entity <dq_to_3_phase_transform1_entity_c00e970a06>.</p><p>Parsing entity <r2s_1_entity_94e95b8547>.</p><p>Parsing architecture <structural> of entity <r2s_1_entity_94e95b8547>.</p><p>Parsing entity <r2s_1_1_entity_3d9d92b448>.</p><p>Parsing architecture <structural> of entity <r2s_1_1_entity_3d9d92b448>.</p><p>Parsing entity <t1s_1_entity_28a5b8b673>.</p><p>Parsing architecture <structural> of entity <t1s_1_entity_28a5b8b673>.</p><p>Parsing entity <electrical_model_entity_f1790a14d7>.</p><p>Parsing architecture <structural> of entity <electrical_model_entity_f1790a14d7>.</p><p>Parsing entity <integrator_entity_ed1326b263>.</p><p>Parsing architecture <structural> of entity <integrator_entity_ed1326b263>.</p><p>Parsing entity <linear_induction_machine_model_without_the_end_effect_entity_e87e9be879>.</p><p>Parsing architecture <structural> of entity <linear_induction_machine_model_without_the_end_effect_entity_e87e9be879>. Parsing entity <\hysteresis_based_stator_current__regulator_entity_eae9ebeb7b\>.</p><p>Parsing architecture <structural> of entity <\hysteresis_based_stator_current__regulator_entity_eae9ebeb7b\>.</p><p>Parsing entity <accumulator_entity_164759ecd4>.</p><p>Parsing architecture <structural> of entity <accumulator_entity_164759ecd4>.</p><p>Parsing entity <subsystem_entity_4673c3f4d3>.</p><p>Parsing architecture <structural> of entity <subsystem_entity_4673c3f4d3>.</p><p>Parsing entity <sin_cos_entity_8eaaf8b6cd>.</p><p>Parsing architecture <structural> of entity <sin_cos_entity_8eaaf8b6cd>.</p><p>Parsing entity <dq_to_3_phase_transform1_entity_cb7e5b1e3b>.</p><p>Parsing architecture <structural> of entity <dq_to_3_phase_transform1_entity_cb7e5b1e3b>.</p><p>Parsing entity <rotor_flux_oriented_control_structure_entity_d176305a68>.</p><p>Parsing architecture <structural> of entity <rotor_flux_oriented_control_structure_entity_d176305a68>.</p><p>Parsing entity <integrator_entity_5161c4fa54>.</p><p>Parsing architecture <structural> of entity <integrator_entity_5161c4fa54>.</p><p>Parsing entity <speed_controller_entity_f6ad1f2505>.</p><p>Parsing architecture <structural> of entity <speed_controller_entity_f6ad1f2505>.</p><p>Parsing entity <speed_control_unit_entity_6003cc59fe>.</p><p>Parsing architecture <structural> of entity <speed_control_unit_entity_6003cc59fe>.</p><p>Parsing entity <reference_torque_entity_0a4273da32>.</p><p>Parsing architecture <structural> of entity <reference_torque_entity_0a4273da32>.</p><p>Parsing entity <mas>.</p><p>Parsing architecture <structural> of entity <mas>.</p><p>Parsing VHDL file "C:\Users\admin\Desktop\map\masbit\mas_cw.vhd" into library work</p><p>Parsing entity <xlclockdriver>. Parsing architecture <behavior> of entity <xlclockdriver>.</p><p>Parsing entity <default_clock_driver_mas>.</p><p>Parsing architecture <structural> of entity <default_clock_driver_mas>.</p><p>Parsing entity <mas_cw>.</p><p>Parsing architecture <structural> of entity <mas_cw>.</p><p>======</p><p>* HDL Elaboration *</p><p>======</p><p>Elaborating entity <mas_cw> (architecture <structural>) from library <work>.</p><p>Elaborating entity <default_clock_driver_mas> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xlclockdriver> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <synth_reg_w_init> (architecture <structural>) with generics from library <work>.</p><p>Elaborating entity <single_reg_w_init> (architecture <structural>) with generics from library <work>.</p><p>WARNING:HDLCompiler:89 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 311101: <fdre> remains a black-box since it has no binding entity.</p><p>Elaborating entity <mas> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>. WARNING:HDLCompiler:1127 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 312731: Assignment to internal_core_ce ignored, since the identifier is never used</p><p>WARNING:HDLCompiler:1127 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 312733: Assignment to nd ignored, since the identifier is never used</p><p>Elaborating entity <cmlt_11_2_6e7b989066784718> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_ad64fb3a34f13a2e> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_60529fe33e9807f6> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_ce4fb6f0c1404e84> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_4af8ac614edb0db0> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_1029404049440265> (architecture <>) from library <work>. Elaborating entity <flux_control_unit1_entity_3b150af683> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_1e0050c132159f46> (architecture <addsb_11_0_1e0050c132159f46_a>) from library <work>.</p><p>Elaborating entity <constant_90e92453e2> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <constant_91c58b6168> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <constant_6477e14542> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <xlcounter_free_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cntr_11_0_761b5b8e2cd8f1c2> (architecture <>) from library <work>.</p><p>Elaborating entity <mux_a54904b290> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <relational_4dc68fcdd6> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <speed_controller_entity_f4d6cf852b> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>. Elaborating entity <addsb_11_0_af6b5da6dbbc120b> (architecture <addsb_11_0_af6b5da6dbbc120b_a>) from library <work>.</p><p>Elaborating entity <integrator_entity_19b945c14b> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_7b6b6d1b3efcd120> (architecture <addsb_11_0_7b6b6d1b3efcd120_a>) from library <work>.</p><p>Elaborating entity <xlpassthrough> (architecture <passthrough_arch>) with generics from library <work>.</p><p>Elaborating entity <xldelay> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <synth_reg> (architecture <structural>) with generics from library <work>.</p><p>Elaborating entity <srl17e> (architecture <structural>) with generics from library <work>.</p><p>WARNING:HDLCompiler:89 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 310876: <fde> remains a black-box since it has no binding entity.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_85f2ddc5a9b50dfe> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>. Elaborating entity <cmlt_11_2_00940c83ede01534> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_c1a452200a369f05> (architecture <>) from library <work>.</p><p>Elaborating entity <inverter_model_entity_7e832adb6f> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_78cf8cbd27fbc6a3> (architecture <addsb_11_0_78cf8cbd27fbc6a3_a>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_7d01a5b4a6e889d5> (architecture <addsb_11_0_7d01a5b4a6e889d5_a>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_92b3a38bd336f036> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_1322aa4468f252d0> (architecture <>) from library <work>. Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_4dcdcdfd0b028d3b> (architecture <>) from library <work>.</p><p>Elaborating entity <linear_induction_machine_model_without_the_end_effect_entity_e87e9be879> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_a910f6a2fda8130a> (architecture <>) from library <work>.</p><p>Elaborating entity <dq_to_3_phase_transform1_entity_c00e970a06> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_9f0b008074cbd983> (architecture <addsb_11_0_9f0b008074cbd983_a>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_656d04967a49ee54> (architecture <addsb_11_0_656d04967a49ee54_a>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>. Elaborating entity <addsb_11_0_f49d9cea35751c72> (architecture <addsb_11_0_f49d9cea35751c72_a>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_0a78d26987d5e79b> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_99587795c33c8b08> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_afed6c2e98e9db95> (architecture <>) from library <work>.</p><p>Elaborating entity <xlmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>WARNING:HDLCompiler:1127 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 313933: Assignment to internal_core_ce ignored, since the identifier is never used</p><p>WARNING:HDLCompiler:1127 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 313935: Assignment to nd ignored, since the identifier is never used</p><p>Elaborating entity <mult_11_2_1cb5ed593dd6a805> (architecture <>) from library <work>.</p><p>Elaborating entity <sin_cos_entity_3dd27a9558> (architecture <structural>) from library <work>.</p><p>Elaborating entity <accumulator_entity_3a7e22bc7b> (architecture <structural>) from library <work>. Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_872d3722f6aa5986> (architecture <addsb_11_0_872d3722f6aa5986_a>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_52eec8816b3d07d3> (architecture <addsb_11_0_52eec8816b3d07d3_a>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_2184da4f73658baf> (architecture <addsb_11_0_2184da4f73658baf_a>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_d233efc3f69384da> (architecture <addsb_11_0_d233efc3f69384da_a>) from library <work>.</p><p>Elaborating entity <concat_32afb77cd2> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <constant_63e9e12f7a> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <constant_91ef1678ca> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <xldelay> (architecture <behavior>) with generics from library <work>. Elaborating entity <synth_reg> (architecture <structural>) with generics from library <work>.</p><p>Elaborating entity <srl17e> (architecture <structural>) with generics from library <work>.</p><p>Elaborating entity <mux_965e6eda19> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <relational_52aa69b739> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <relational_59c2e9e070> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <subsystem_entity_07085a3aad> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_14cba680b6143225> (architecture <>) from library <work>.</p><p>Elaborating entity <xlsprom_mas> (architecture <behavior>) with generics from library <work>.</p><p>WARNING:HDLCompiler:1127 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 313621: Assignment to sinit ignored, since the identifier is never used</p><p>Elaborating entity <bmg_72_890d12da6c3a372e> (architecture <>) from library <work>.</p><p>Elaborating entity <xlsprom_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <bmg_72_0de05196f3843ae4> (architecture <>) from library <work>. Elaborating entity <electrical_model_entity_f1790a14d7> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_12cafd628eabec2e> (architecture <addsb_11_0_12cafd628eabec2e_a>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_77b30ee23c108b1c> (architecture <addsb_11_0_77b30ee23c108b1c_a>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>. Elaborating entity <addsb_11_0_b8b6601a380b9153> (architecture <addsb_11_0_b8b6601a380b9153_a>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_16ed126b9432f966> (architecture <addsb_11_0_16ed126b9432f966_a>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_9384899f97c5907f> (architecture <addsb_11_0_9384899f97c5907f_a>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_3e26ad3f166f5a05> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_855fc87d891b1c0f> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_33d444a49cc98bbc> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>. Elaborating entity <cmlt_11_2_287cfc82d0a194a1> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_c473908a1008a362> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_8f687fd98108bd9e> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_049d91e8686bd2db> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_077728a89cbfeb6d> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_b15d6089faabfeb6> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>. Elaborating entity <cmlt_11_2_e660458fe81f5d55> (architecture <>) from library <work>.</p><p>Elaborating entity <xlmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <mult_11_2_46d1845c61547cd1> (architecture <>) from library <work>.</p><p>Elaborating entity <xlmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <mult_11_2_9565c340740bf724> (architecture <>) from library <work>.</p><p>Elaborating entity <xlmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <mult_11_2_0e1566528d2aabad> (architecture <>) from library <work>.</p><p>Elaborating entity <xlmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <mult_11_2_b540eb527c25496d> (architecture <>) from library <work>.</p><p>Elaborating entity <xlmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <mult_11_2_65354ed2a4562c5c> (architecture <>) from library <work>.</p><p>Elaborating entity <xlmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <mult_11_2_920f82b2d5199557> (architecture <>) from library <work>. Elaborating entity <xlmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <mult_11_2_8a7e2cb341e8d802> (architecture <>) from library <work>.</p><p>Elaborating entity <r2s_1_1_entity_3d9d92b448> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_30f8ec8dfd7f8ed2> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_e9ca31a3eb8f57dd> (architecture <>) from library <work>.</p><p>Elaborating entity <xldelay> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <synth_reg> (architecture <structural>) with generics from library <work>.</p><p>Elaborating entity <srl17e> (architecture <structural>) with generics from library <work>.</p><p>Elaborating entity <r2s_1_entity_94e95b8547> (architecture <structural>) from library <work>. Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_e8c1ba21b313f251> (architecture <addsb_11_0_e8c1ba21b313f251_a>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_996fdd58b0411a2b> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_ec86768b7e117459> (architecture <>) from library <work>.</p><p>Elaborating entity <xldelay> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <synth_reg> (architecture <structural>) with generics from library <work>.</p><p>Elaborating entity <srl17e> (architecture <structural>) with generics from library <work>.</p><p>Elaborating entity <t1s_1_entity_28a5b8b673> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_5b85ee661d59a06a> (architecture <>) from library <work>. Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_efa413f2be52c767> (architecture <>) from library <work>.</p><p>Elaborating entity <xldelay> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <synth_reg> (architecture <structural>) with generics from library <work>.</p><p>Elaborating entity <srl17e> (architecture <structural>) with generics from library <work>.</p><p>Elaborating entity <integrator_entity_ed1326b263> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_7baf43f5d46f2efd> (architecture <addsb_11_0_7baf43f5d46f2efd_a>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_8153107f81f163c5> (architecture <>) from library <work>.</p><p>Elaborating entity <mechanical_model_entity_cc1bd59c80> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>. Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_9f263efbda8fb0e9> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_13cb1fe83f6719af> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_049d91e8686bd2db> (architecture <>) from library <work>.</p><p>WARNING:HDLCompiler:758 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 2953: Replacing existing netlist cmlt_11_2_049d91e8686bd2db()</p><p>Elaborating entity <constant_f9a3204d5a> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <js_b_entity_eb065e8729> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>. Elaborating entity <addsb_11_0_4c11e627a14cfcc4> (architecture <addsb_11_0_4c11e627a14cfcc4_a>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_884930e4bebbd5b6> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_35f296ece0a9a6e7> (architecture <>) from library <work>.</p><p>Elaborating entity <xldelay> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <synth_reg> (architecture <structural>) with generics from library <work>.</p><p>Elaborating entity <srl17e> (architecture <structural>) with generics from library <work>.</p><p>Elaborating entity <r2s_1_2_entity_76d16c6b2f> (architecture <structural>) from library <work>.</p><p>Elaborating entity <cmult_e23c3c3f98> (architecture <behavior>) from library <work>.</p><p>WARNING:HDLCompiler:1127 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 314081: Assignment to op_mem_71_20_back ignored, since the identifier is never used</p><p>WARNING:HDLCompiler:634 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 314072: Net <op_mem_71_20_front_din[63]> does not have a driver.</p><p>Elaborating entity <cmult_70d8a731d2> (architecture <behavior>) from library <work>. WARNING:HDLCompiler:1127 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 314127: Assignment to op_mem_71_20_back ignored, since the identifier is never used</p><p>WARNING:HDLCompiler:634 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 314120: Net <op_mem_71_20_front_din[63]> does not have a driver.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_66d7ec4f1062986c> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_1029404049440265> (architecture <>) from library <work>.</p><p>WARNING:HDLCompiler:758 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 3232: Replacing existing netlist cmlt_11_2_1029404049440265()</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_3ec88f51016c09d9> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_8772ad679ba8df4b> (architecture <>) from library <work>.</p><p>Elaborating entity <constant_c4c603edf2> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <xldivider_generator_3918c6b6df573559c53db2a570dd8e4f> (architecture <behavior>) from library <work>. WARNING:HDLCompiler:89 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 314182: <dvd_4_0_1cc2b7efae0f1659> remains a black-box since it has no binding entity.</p><p>Elaborating entity <xldivider_generator_f2d0cf82922d53ccd3173f64934f0d65> (architecture <behavior>) from library <work>.</p><p>WARNING:HDLCompiler:89 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" Line 314236: <dvd_4_0_1cc2b7efae0f1659> remains a black-box since it has no binding entity.</p><p>Elaborating entity <mux_738df95838> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <relational_4957bd21f5> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <relational_0f57cbe796> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <r2s_1_entity_5d0e7066ab> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_5ee0d098007a1b66> (architecture <addsb_11_0_5ee0d098007a1b66_a>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_e39bf5f892b9d2bb> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>. Elaborating entity <cmlt_11_2_2650ef2e23192fd1> (architecture <>) from library <work>.</p><p>Elaborating entity <x3_phase_to_dq_transform_entity_9ef544f709> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_b8f0ba24732880a2> (architecture <>) from library <work>.</p><p>Elaborating entity <xlmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <mult_11_2_0d9df47653e8136c> (architecture <>) from library <work>.</p><p>Elaborating entity <sin_cos_entity_a4ff007f0d> (architecture <structural>) from library <work>.</p><p>Elaborating entity <accumulator_entity_a1fac56952> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>. Elaborating entity <addsb_11_0_20f59c924e684f65> (architecture <addsb_11_0_20f59c924e684f65_a>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <mux_5c289d345d> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <relational_6edcd2cfc1> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <relational_450a547f18> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <subsystem_entity_9a652c066b> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_4d19018b3c39239e> (architecture <>) from library <work>.</p><p>Elaborating entity <reference_torque_entity_0a4273da32> (architecture <structural>) from library <work>.</p><p>Elaborating entity <constant_8df3c2619f> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <constant_7686630003> (architecture <behavior>) from library <work>. Elaborating entity <constant_9d1192475b> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <constant_f38f6294db> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <constant_be580fdd18> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <mux_199bd0a2d9> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <relational_7413a0ab90> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <rotor_flux_oriented_control_structure_entity_d176305a68> (architecture <structural>) from library <work>.</p><p>Elaborating entity <dq_to_3_phase_transform1_entity_cb7e5b1e3b> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <addsb_11_0_97454a187aa26b59> (architecture <addsb_11_0_97454a187aa26b59_a>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>. Elaborating entity <cmlt_11_2_16833ca38057a335> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_df1f89bf2e1d9b34> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_029410d730aef3c6> (architecture <>) from library <work>.</p><p>Elaborating entity <xlmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <mult_11_2_6d75902f305ef739> (architecture <>) from library <work>.</p><p>Elaborating entity <xlmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <mult_11_2_3e45894281c05d4b> (architecture <>) from library <work>.</p><p>Elaborating entity <sin_cos_entity_8eaaf8b6cd> (architecture <structural>) from library <work>.</p><p>Elaborating entity <accumulator_entity_164759ecd4> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>. Elaborating entity <addsb_11_0_ba616ce80205da8e> (architecture <addsb_11_0_ba616ce80205da8e_a>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <mux_fc2fc9a5bf> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <relational_f98abae2fa> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <relational_4fa5c6b5c8> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <subsystem_entity_4673c3f4d3> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_459de2f2aaf2af91> (architecture <>) from library <work>.</p><p>Elaborating entity <\hysteresis_based_stator_current__regulator_entity_eae9ebeb7b\> (architecture <structural>) from library <work>.</p><p>Elaborating entity <constant_dd0e52e409> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <constant_566137e191> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <mux_f1cd62c228> (architecture <behavior>) from library <work>. Elaborating entity <relational_291b500f4c> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <relational_68289a436b> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <speed_control_unit_entity_6003cc59fe> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <constant_21eca29972> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <constant_72d79bf72e> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <constant_7688a429c7> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <mux_8c9b1f5d1f> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <relational_f57db9ac43> (architecture <behavior>) from library <work>.</p><p>Elaborating entity <speed_controller_entity_f6ad1f2505> (architecture <structural>) from library <work>.</p><p>Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <integrator_entity_5161c4fa54> (architecture <structural>) from library <work>. Elaborating entity <xladdsub_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_992d02a5d9cbaf76> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_3e63237a5cd93bb8> (architecture <>) from library <work>.</p><p>Elaborating entity <xlcmult_mas> (architecture <behavior>) with generics from library <work>.</p><p>Elaborating entity <cmlt_11_2_c1042e6cbf52704f> (architecture <>) from library <work>.</p><p>======</p><p>* HDL Synthesis *</p><p>======</p><p>Synthesizing Unit <mas_cw>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas_cw.vhd".</p><p>Set property "syn_black_box = true" for instance <persistentdff_inst>.</p><p>Set property "syn_noprune = true" for instance <persistentdff_inst>.</p><p>Set property "optimize_primitives = false" for instance <persistentdff_inst>.</p><p>Set property "dont_touch = true" for instance <persistentdff_inst>. Set property "MAX_FANOUT = REDUCE" for signal <ce_1_sg_x32>.</p><p>Set property "syn_keep = true" for signal <persistentdff_inst_q>.</p><p>Set property "KEEP = TRUE" for signal <persistentdff_inst_q>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "preserve_signal". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <mas_cw> synthesized.</p><p>Synthesizing Unit <default_clock_driver_mas>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas_cw.vhd".</p><p>Set property "syn_noprune = true".</p><p>Set property "optimize_primitives = false".</p><p>Set property "dont_touch = true".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas_cw.vhd" line 378: Output port <clr> of the instance <xlclockdriver> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas_cw.vhd" line 378: Output port <ce_logic> of the instance <xlclockdriver> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <default_clock_driver_mas> synthesized.</p><p>Synthesizing Unit <xlclockdriver>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas_cw.vhd". period = 1</p><p> log_2_period = 1</p><p> pipeline_regs = 5</p><p> use_bufg = 0</p><p>Set property "MAX_FANOUT = REDUCE" for signal <ce_vec>.</p><p>Set property "MAX_FANOUT = REDUCE" for signal <ce_vec_logic>.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlclockdriver> synthesized.</p><p>Synthesizing Unit <synth_reg_w_init>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 1</p><p> init_index = 0</p><p> init_value = "0000"</p><p> latency = 1</p><p>Summary:</p><p> no macro.</p><p>Unit <synth_reg_w_init> synthesized.</p><p>Synthesizing Unit <single_reg_w_init>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 1</p><p> init_index = 0 init_value = "0000"</p><p>Set property "syn_black_box = true" for instance <fd_prim_array[0].bit_is_0.fdre_comp>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Summary:</p><p> no macro.</p><p>Unit <single_reg_w_init> synthesized.</p><p>Synthesizing Unit <mas>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>Summary:</p><p> no macro.</p><p>Unit <mas> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_1>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_6e7b989066784718"</p><p> a_width = 26</p><p> a_bin_pt = 12</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 14</p><p> p_bin_pt = 1 p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 26</p><p> c_b_width = 64</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 90</p><p>Set property "syn_black_box = true" for instance <comp48.core_instance48>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_1> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_2>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_ad64fb3a34f13a2e"</p><p> a_width = 28</p><p> a_bin_pt = 10</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 14 p_bin_pt = 6</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 28</p><p> c_b_width = 64</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 92</p><p>Set property "syn_black_box = true" for instance <comp49.core_instance49>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_2> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_3>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_60529fe33e9807f6"</p><p> a_width = 47</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 14 p_bin_pt = 6</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 47</p><p> c_b_width = 64</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 111</p><p>Set property "syn_black_box = true" for instance <comp50.core_instance50>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_3> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_4>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_ce4fb6f0c1404e84"</p><p> a_width = 28</p><p> a_bin_pt = 20</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 14 p_bin_pt = 10</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 28</p><p> c_b_width = 64</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 92</p><p>Set property "syn_black_box = true" for instance <comp51.core_instance51>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_4> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_5>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_4af8ac614edb0db0"</p><p> a_width = 48</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 14 p_bin_pt = 1</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 48</p><p> c_b_width = 64</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 112</p><p>Set property "syn_black_box = true" for instance <comp52.core_instance52>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_5> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_6>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_1029404049440265"</p><p> a_width = 32</p><p> a_bin_pt = 16</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 14 p_bin_pt = 1</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 32</p><p> c_b_width = 64</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 96</p><p>Set property "syn_black_box = true" for instance <comp13.core_instance13>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_6> synthesized.</p><p>Synthesizing Unit <flux_control_unit1_entity_3b150af683>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 315349: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <flux_control_unit1_entity_3b150af683> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_1>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd". core_name0 = "addsb_11_0_1e0050c132159f46" a_width = 16 a_bin_pt = 12 a_arith = 2 c_in_width = 16 c_in_bin_pt = 4 c_in_arith = 1 c_out_width = 16 c_out_bin_pt = 4 c_out_arith = 1 b_width = 28 b_bin_pt = 20 b_arith = 2 s_width = 36 s_bin_pt = 32 s_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 full_s_width = 29 full_s_arith = 2 mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 29</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_1> synthesized.</p><p>Synthesizing Unit <constant_90e92453e2>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd". WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_90e92453e2> synthesized.</p><p>Synthesizing Unit <constant_91c58b6168>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_91c58b6168> synthesized.</p><p>Synthesizing Unit <constant_6477e14542>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_6477e14542> synthesized.</p><p>Synthesizing Unit <xlcounter_free_mas>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cntr_11_0_761b5b8e2cd8f1c2"</p><p> op_width = 24</p><p> op_arith = 1</p><p>Set property "syn_black_box = true" for instance <comp0.core_instance0>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <up> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <load> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <din> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcounter_free_mas> synthesized.</p><p>Synthesizing Unit <mux_a54904b290>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd". WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> inferred 1 Multiplexer(s).</p><p>Unit <mux_a54904b290> synthesized.</p><p>Synthesizing Unit <relational_4dc68fcdd6>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 24-bit comparator greater for signal <result_18_3_rel> created at line 313344</p><p>Summary:</p><p> inferred 1 Comparator(s).</p><p>Unit <relational_4dc68fcdd6> synthesized.</p><p>Synthesizing Unit <speed_controller_entity_f4d6cf852b>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 315206: Output port <c_out> of the instance <addsub1> is unconnected or connected to loadless signal.</p><p>Summary: no macro.</p><p>Unit <speed_controller_entity_f4d6cf852b> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_2>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_af6b5da6dbbc120b"</p><p> a_width = 32</p><p> a_bin_pt = 18</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 24</p><p> b_bin_pt = 12</p><p> b_arith = 2</p><p> s_width = 32</p><p> s_bin_pt = 16</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1 en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 33</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 33</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary: no macro.</p><p>Unit <xladdsub_mas_2> synthesized.</p><p>Synthesizing Unit <integrator_entity_19b945c14b>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 315083: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <integrator_entity_19b945c14b> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_3>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_7b6b6d1b3efcd120"</p><p> a_width = 40</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 24</p><p> b_bin_pt = 12 b_arith = 2</p><p> s_width = 24</p><p> s_bin_pt = 12</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 45</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 45</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_3> synthesized.</p><p>Synthesizing Unit <xlpassthrough>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> din_width = 24</p><p> dout_width = 24</p><p>Summary:</p><p> no macro.</p><p>Unit <xlpassthrough> synthesized.</p><p>Synthesizing Unit <xldelay_1>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 24</p><p> latency = 1</p><p> reg_retiming = 0</p><p> reset = 0 WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xldelay_1> synthesized.</p><p>Synthesizing Unit <synth_reg_1>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 24</p><p> latency = 1</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <synth_reg_1> synthesized.</p><p>Synthesizing Unit <srl17e_1>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 24</p><p> latency = 1</p><p>Set property "syn_black_box = true" for instance <reg_array[0].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[1].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored. Set property "syn_black_box = true" for instance <reg_array[2].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[3].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[4].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[5].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[6].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[7].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[8].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[9].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[10].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[11].fde_used.u2>. WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[12].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[13].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[14].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[15].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[16].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[17].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[18].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[19].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[20].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored. Set property "syn_black_box = true" for instance <reg_array[21].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[22].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[23].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Summary:</p><p> no macro.</p><p>Unit <srl17e_1> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_7>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_85f2ddc5a9b50dfe"</p><p> a_width = 36</p><p> a_bin_pt = 16</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 40</p><p> p_bin_pt = 32</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 36</p><p> c_b_width = 36</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 72</p><p>Set property "syn_black_box = true" for instance <comp0.core_instance0>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_7> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_8>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_00940c83ede01534"</p><p> a_width = 36</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 4</p><p> b_arith = 2</p><p> p_width = 36</p><p> p_bin_pt = 16</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 36</p><p> c_b_width = 24</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 60</p><p>Set property "syn_black_box = true" for instance <comp1.core_instance1>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_8> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_9>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_c1a452200a369f05"</p><p> a_width = 36</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 4</p><p> b_arith = 2</p><p> p_width = 32</p><p> p_bin_pt = 18</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 36</p><p> c_b_width = 20</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 56</p><p>Set property "syn_black_box = true" for instance <comp2.core_instance2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_9> synthesized.</p><p>Synthesizing Unit <inverter_model_entity_7e832adb6f>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 315501: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 315533: Output port <c_out> of the instance <addsub1> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 315565: Output port <c_out> of the instance <addsub2> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 315597: Output port <c_out> of the instance <addsub3> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 315629: Output port <c_out> of the instance <addsub4> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 315661: Output port <c_out> of the instance <addsub5> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro. Unit <inverter_model_entity_7e832adb6f> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_4>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_78cf8cbd27fbc6a3"</p><p> a_width = 20</p><p> a_bin_pt = 5</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 20</p><p> b_bin_pt = 5</p><p> b_arith = 2</p><p> s_width = 20</p><p> s_bin_pt = 5</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1 en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 21</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 21</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro. Unit <xladdsub_mas_4> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_5>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_7d01a5b4a6e889d5"</p><p> a_width = 18</p><p> a_bin_pt = 5</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 18</p><p> b_bin_pt = 5</p><p> b_arith = 2</p><p> s_width = 20</p><p> s_bin_pt = 5</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1 en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 19</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 19</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro. Unit <xladdsub_mas_5> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_10>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_92b3a38bd336f036"</p><p> a_width = 8</p><p> a_bin_pt = 4</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 5</p><p> b_arith = 2</p><p> p_width = 18</p><p> p_bin_pt = 5</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0 c_a_width = 8</p><p> c_b_width = 18</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 26</p><p>Set property "syn_black_box = true" for instance <comp3.core_instance3>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary: no macro.</p><p>Unit <xlcmult_mas_10> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_11>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_1322aa4468f252d0"</p><p> a_width = 20</p><p> a_bin_pt = 5</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 14</p><p> b_arith = 2</p><p> p_width = 20</p><p> p_bin_pt = 5</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1 extra_registers = 0</p><p> c_a_width = 20</p><p> c_b_width = 18</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 38</p><p>Set property "syn_black_box = true" for instance <comp4.core_instance4>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_11> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_12>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_4dcdcdfd0b028d3b"</p><p> a_width = 18</p><p> a_bin_pt = 5</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 14</p><p> b_arith = 2</p><p> p_width = 20</p><p> p_bin_pt = 5</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1 overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 18</p><p> c_b_width = 18</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 36</p><p>Set property "syn_black_box = true" for instance <comp5.core_instance5>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_12> synthesized.</p><p>Synthesizing Unit <linear_induction_machine_model_without_the_end_effect_entity_e87e9be879>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>Summary:</p><p> no macro.</p><p>Unit <linear_induction_machine_model_without_the_end_effect_entity_e87e9be879> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_13>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_a910f6a2fda8130a"</p><p> a_width = 22</p><p> a_bin_pt = 5</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 14</p><p> p_bin_pt = 6</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 22</p><p> c_b_width = 64</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 86</p><p>Set property "syn_black_box = true" for instance <comp40.core_instance40>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_13> synthesized.</p><p>Synthesizing Unit <dq_to_3_phase_transform1_entity_c00e970a06>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 318294: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 318326: Output port <c_out> of the instance <addsub1> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 318358: Output port <c_out> of the instance <addsub2> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 318390: Output port <c_out> of the instance <addsub3> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <dq_to_3_phase_transform1_entity_c00e970a06> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_6>. Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_9f0b008074cbd983"</p><p> a_width = 47</p><p> a_bin_pt = 28</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 47</p><p> b_bin_pt = 28</p><p> b_arith = 2</p><p> s_width = 26</p><p> s_bin_pt = 12</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 48 full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 48</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_6> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_7>. Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_656d04967a49ee54"</p><p> a_width = 47</p><p> a_bin_pt = 28</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 47</p><p> b_bin_pt = 28</p><p> b_arith = 2</p><p> s_width = 26</p><p> s_bin_pt = 12</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 48 full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 48</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_7> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_8>. Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_f49d9cea35751c72"</p><p> a_width = 26</p><p> a_bin_pt = 12</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 26</p><p> b_bin_pt = 12</p><p> b_arith = 2</p><p> s_width = 26</p><p> s_bin_pt = 12</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 27 full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 27</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_8> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_14>. Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_0a78d26987d5e79b"</p><p> a_width = 26</p><p> a_bin_pt = 12</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 12</p><p> b_arith = 2</p><p> p_width = 26</p><p> p_bin_pt = 12</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 26</p><p> c_b_width = 16</p><p> c_a_type = 0 c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 42</p><p>Set property "syn_black_box = true" for instance <comp20.core_instance20>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_14> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_15>. Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_99587795c33c8b08"</p><p> a_width = 26</p><p> a_bin_pt = 12</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 8</p><p> b_arith = 2</p><p> p_width = 26</p><p> p_bin_pt = 12</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 26</p><p> c_b_width = 12</p><p> c_a_type = 0 c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 38</p><p>Set property "syn_black_box = true" for instance <comp21.core_instance21>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_15> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_16>. Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_afed6c2e98e9db95"</p><p> a_width = 26</p><p> a_bin_pt = 12</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 4</p><p> b_arith = 2</p><p> p_width = 26</p><p> p_bin_pt = 12</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 26</p><p> c_b_width = 8</p><p> c_a_type = 0 c_b_type = 0</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 34</p><p>Set property "syn_black_box = true" for instance <comp22.core_instance22>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_16> synthesized.</p><p>Synthesizing Unit <xlmult_mas_1>. Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "mult_11_2_1cb5ed593dd6a805"</p><p> a_width = 22</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> b_width = 64</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 47</p><p> p_bin_pt = 28</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 22</p><p> c_b_width = 64</p><p> c_type = 0</p><p> c_a_type = 0 c_b_type = 0</p><p> c_pipelined = 1</p><p> c_baat = 22</p><p> multsign = 2</p><p> c_output_width = 86</p><p>Set property "syn_black_box = true" for instance <comp1.core_instance1>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlmult_mas_1> synthesized.</p><p>Synthesizing Unit <sin_cos_entity_3dd27a9558>. Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>Summary:</p><p> no macro.</p><p>Unit <sin_cos_entity_3dd27a9558> synthesized.</p><p>Synthesizing Unit <accumulator_entity_3a7e22bc7b>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 317863: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 317895: Output port <c_out> of the instance <addsub1> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 317927: Output port <c_out> of the instance <addsub2> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 317959: Output port <c_out> of the instance <addsub3> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <accumulator_entity_3a7e22bc7b> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_9>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_872d3722f6aa5986"</p><p> a_width = 36</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> c_in_width = 16 c_in_bin_pt = 4 c_in_arith = 1 c_out_width = 16 c_out_bin_pt = 4 c_out_arith = 1 b_width = 13 b_bin_pt = 8 b_arith = 2 s_width = 24 s_bin_pt = 18 s_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 full_s_width = 38 full_s_arith = 2 mode = 1 extra_registers = 0 latency = 0 quantization = 1 overflow = 1 c_latency = 0</p><p> c_output_width = 38</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_9> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_10>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_52eec8816b3d07d3"</p><p> a_width = 36</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> c_in_width = 16 c_in_bin_pt = 4 c_in_arith = 1 c_out_width = 16 c_out_bin_pt = 4 c_out_arith = 1 b_width = 13 b_bin_pt = 8 b_arith = 2 s_width = 24 s_bin_pt = 18 s_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 full_s_width = 38 full_s_arith = 2 mode = 1 extra_registers = 0 latency = 0 quantization = 1 overflow = 1 c_latency = 0</p><p> c_output_width = 38</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_10> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_11>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_2184da4f73658baf"</p><p> a_width = 32</p><p> a_bin_pt = 16</p><p> a_arith = 2</p><p> c_in_width = 16 c_in_bin_pt = 4 c_in_arith = 1 c_out_width = 16 c_out_bin_pt = 4 c_out_arith = 1 b_width = 32 b_bin_pt = 16 b_arith = 2 s_width = 36 s_bin_pt = 32 s_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 full_s_width = 33 full_s_arith = 2 mode = 1 extra_registers = 0 latency = 0 quantization = 1 overflow = 1 c_latency = 0</p><p> c_output_width = 33</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_11> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_12>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_d233efc3f69384da"</p><p> a_width = 36</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> c_in_width = 16 c_in_bin_pt = 4 c_in_arith = 1 c_out_width = 16 c_out_bin_pt = 4 c_out_arith = 1 b_width = 24 b_bin_pt = 18 b_arith = 2 s_width = 36 s_bin_pt = 32 s_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 full_s_width = 39 full_s_arith = 2 mode = 1 extra_registers = 0 latency = 0 quantization = 1 overflow = 1 c_latency = 0</p><p> c_output_width = 39</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_12> synthesized.</p><p>Synthesizing Unit <concat_32afb77cd2>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary: no macro.</p><p>Unit <concat_32afb77cd2> synthesized.</p><p>Synthesizing Unit <constant_63e9e12f7a>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_63e9e12f7a> synthesized.</p><p>Synthesizing Unit <constant_91ef1678ca>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_91ef1678ca> synthesized.</p><p>Synthesizing Unit <xldelay_2>. Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 32</p><p> latency = 1</p><p> reg_retiming = 0</p><p> reset = 0</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xldelay_2> synthesized.</p><p>Synthesizing Unit <synth_reg_2>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 32</p><p> latency = 1</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <synth_reg_2> synthesized.</p><p>Synthesizing Unit <srl17e_2>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 32</p><p> latency = 1 Set property "syn_black_box = true" for instance <reg_array[0].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[1].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[2].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[3].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[4].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[5].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[6].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[7].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[8].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[9].fde_used.u2>. WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[10].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[11].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[12].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[13].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[14].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[15].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[16].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[17].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[18].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored. Set property "syn_black_box = true" for instance <reg_array[19].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[20].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[21].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[22].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[23].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[24].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[25].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[26].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[27].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[28].fde_used.u2>. WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[29].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[30].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[31].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Summary:</p><p> no macro.</p><p>Unit <srl17e_2> synthesized.</p><p>Synthesizing Unit <mux_965e6eda19>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 38-bit 3-to-1 multiplexer for signal <unregy_join_6_1> created at line 314432.</p><p>Summary:</p><p> inferred 1 Multiplexer(s).</p><p>Unit <mux_965e6eda19> synthesized. Synthesizing Unit <relational_52aa69b739>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 37-bit comparator greater for signal <result_18_3_rel> created at line 314472</p><p>Summary:</p><p> inferred 1 Comparator(s).</p><p>Unit <relational_52aa69b739> synthesized.</p><p>Synthesizing Unit <relational_59c2e9e070>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 36-bit comparator greater for signal <result_16_3_rel> created at line 314501</p><p>Summary:</p><p> inferred 1 Comparator(s).</p><p>Unit <relational_59c2e9e070> synthesized.</p><p>Synthesizing Unit <subsystem_entity_07085a3aad>. Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>Summary:</p><p> no macro.</p><p>Unit <subsystem_entity_07085a3aad> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_17>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_14cba680b6143225"</p><p> a_width = 24</p><p> a_bin_pt = 18</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 10</p><p> b_arith = 2</p><p> p_width = 10</p><p> p_bin_pt = 0</p><p> p_arith = 1</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2 quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 24</p><p> c_b_width = 22</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 46</p><p>Set property "syn_black_box = true" for instance <comp19.core_instance19>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_17> synthesized.</p><p>Synthesizing Unit <xlsprom_mas_1>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "bmg_72_890d12da6c3a372e"</p><p> c_width = 64</p><p> c_address_width = 10</p><p> latency = 1</p><p>Set property "syn_black_box = true" for instance <comp0.core_instance0>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlsprom_mas_1> synthesized.</p><p>Synthesizing Unit <xlsprom_mas_2>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "bmg_72_0de05196f3843ae4"</p><p> c_width = 64</p><p> c_address_width = 10 latency = 1</p><p>Set property "syn_black_box = true" for instance <comp1.core_instance1>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlsprom_mas_2> synthesized.</p><p>Synthesizing Unit <electrical_model_entity_f1790a14d7>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 319213: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 319245: Output port <c_out> of the instance <addsub1> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 319277: Output port <c_out> of the instance <addsub10> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 319309: Output port <c_out> of the instance <addsub11> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 319341: Output port <c_out> of the instance <addsub2> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 319373: Output port <c_out> of the instance <addsub3> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 319405: Output port <c_out> of the instance <addsub4> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 319437: Output port <c_out> of the instance <addsub5> is unconnected or connected to loadless signal. INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 319469: Output port <c_out> of the instance <addsub6> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 319501: Output port <c_out> of the instance <addsub7> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 319533: Output port <c_out> of the instance <addsub8> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 319565: Output port <c_out> of the instance <addsub9> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <electrical_model_entity_f1790a14d7> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_13>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_12cafd628eabec2e"</p><p> a_width = 40</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 36</p><p> b_bin_pt = 32 b_arith = 2</p><p> s_width = 40</p><p> s_bin_pt = 32</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 41</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 41</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_13> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_14>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_12cafd628eabec2e"</p><p> a_width = 36</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 40</p><p> b_bin_pt = 32 b_arith = 2</p><p> s_width = 40</p><p> s_bin_pt = 32</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 41</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 41</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_14> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_15>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_77b30ee23c108b1c"</p><p> a_width = 22</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 20</p><p> b_bin_pt = 8 b_arith = 2</p><p> s_width = 22</p><p> s_bin_pt = 8</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 23</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 23</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_15> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_16>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_9f0b008074cbd983"</p><p> a_width = 47</p><p> a_bin_pt = 28</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 47</p><p> b_bin_pt = 28 b_arith = 2</p><p> s_width = 20</p><p> s_bin_pt = 8</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 48</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 48</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_16> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_17>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_9f0b008074cbd983"</p><p> a_width = 47</p><p> a_bin_pt = 28</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 47</p><p> b_bin_pt = 28 b_arith = 2</p><p> s_width = 28</p><p> s_bin_pt = 16</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 48</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 48</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_17> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_18>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_656d04967a49ee54"</p><p> a_width = 47</p><p> a_bin_pt = 28</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 47</p><p> b_bin_pt = 28 b_arith = 2</p><p> s_width = 20</p><p> s_bin_pt = 8</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 48</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 48</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_18> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_19>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_2184da4f73658baf"</p><p> a_width = 28</p><p> a_bin_pt = 24</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 24</p><p> b_bin_pt = 16 b_arith = 2</p><p> s_width = 28</p><p> s_bin_pt = 24</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 33</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 33</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_19> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_20>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_af6b5da6dbbc120b"</p><p> a_width = 28</p><p> a_bin_pt = 24</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 24</p><p> b_bin_pt = 16 b_arith = 2</p><p> s_width = 28</p><p> s_bin_pt = 24</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 33</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 33</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_20> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_21>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_b8b6601a380b9153"</p><p> a_width = 22</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 26</p><p> b_bin_pt = 16 b_arith = 2</p><p> s_width = 22</p><p> s_bin_pt = 8</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 31</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 31</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_21> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_22>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_16ed126b9432f966"</p><p> a_width = 22</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 20</p><p> b_bin_pt = 8 b_arith = 2</p><p> s_width = 22</p><p> s_bin_pt = 8</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 23</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 23</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_22> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_23>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_9384899f97c5907f"</p><p> a_width = 22</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 36</p><p> b_bin_pt = 18 b_arith = 2</p><p> s_width = 22</p><p> s_bin_pt = 8</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 37</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 37</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_23> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_18>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_3e26ad3f166f5a05"</p><p> a_width = 28</p><p> a_bin_pt = 20</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 16</p><p> b_arith = 2</p><p> p_width = 26</p><p> p_bin_pt = 16</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0 rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 28</p><p> c_b_width = 24</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 52</p><p>Set property "syn_black_box = true" for instance <comp29.core_instance29>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_18> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_19>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_855fc87d891b1c0f"</p><p> a_width = 22</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 24</p><p> b_arith = 2</p><p> p_width = 40</p><p> p_bin_pt = 32</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 22</p><p> c_b_width = 32</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 54</p><p>Set property "syn_black_box = true" for instance <comp30.core_instance30>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_19> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_20>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_33d444a49cc98bbc"</p><p> a_width = 22</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 16</p><p> b_arith = 2</p><p> p_width = 28</p><p> p_bin_pt = 8</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 22</p><p> c_b_width = 24</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 46</p><p>Set property "syn_black_box = true" for instance <comp31.core_instance31>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_20> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_21>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_287cfc82d0a194a1"</p><p> a_width = 20</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 16</p><p> b_arith = 2</p><p> p_width = 22</p><p> p_bin_pt = 5</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 20</p><p> c_b_width = 24</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 44</p><p>Set property "syn_black_box = true" for instance <comp32.core_instance32>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_21> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_22>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_c473908a1008a362"</p><p> a_width = 28</p><p> a_bin_pt = 16</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 16</p><p> b_arith = 2</p><p> p_width = 28</p><p> p_bin_pt = 10</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 28</p><p> c_b_width = 24</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 52</p><p>Set property "syn_black_box = true" for instance <comp33.core_instance33>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_22> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_23>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_8f687fd98108bd9e"</p><p> a_width = 36</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 16</p><p> b_arith = 2</p><p> p_width = 36</p><p> p_bin_pt = 18</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 36</p><p> c_b_width = 24</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 60</p><p>Set property "syn_black_box = true" for instance <comp34.core_instance34>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_23> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_24>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_049d91e8686bd2db"</p><p> a_width = 22</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 24</p><p> b_arith = 2</p><p> p_width = 28</p><p> p_bin_pt = 24</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 22</p><p> c_b_width = 32</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 54</p><p>Set property "syn_black_box = true" for instance <comp18.core_instance18>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_24> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_25>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_077728a89cbfeb6d"</p><p> a_width = 47</p><p> a_bin_pt = 28</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 16</p><p> b_arith = 2</p><p> p_width = 24</p><p> p_bin_pt = 16</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 47</p><p> c_b_width = 20</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 67</p><p>Set property "syn_black_box = true" for instance <comp36.core_instance36>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_25> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_26>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_b15d6089faabfeb6"</p><p> a_width = 36</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 16</p><p> b_arith = 2</p><p> p_width = 36</p><p> p_bin_pt = 32</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 36</p><p> c_b_width = 22</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 58</p><p>Set property "syn_black_box = true" for instance <comp37.core_instance37>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_26> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_27>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_e660458fe81f5d55"</p><p> a_width = 28</p><p> a_bin_pt = 20</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 16</p><p> b_arith = 2</p><p> p_width = 36</p><p> p_bin_pt = 32</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 28</p><p> c_b_width = 22</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 50</p><p>Set property "syn_black_box = true" for instance <comp38.core_instance38>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_27> synthesized.</p><p>Synthesizing Unit <xlmult_mas_2>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "mult_11_2_46d1845c61547cd1"</p><p> a_width = 28</p><p> a_bin_pt = 20</p><p> a_arith = 2</p><p> b_width = 22</p><p> b_bin_pt = 8</p><p> b_arith = 2</p><p> p_width = 47</p><p> p_bin_pt = 28</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 28</p><p> c_b_width = 22</p><p> c_type = 0</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_pipelined = 1</p><p> c_baat = 28</p><p> multsign = 2</p><p> c_output_width = 50</p><p>Set property "syn_black_box = true" for instance <comp2.core_instance2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlmult_mas_2> synthesized.</p><p>Synthesizing Unit <xlmult_mas_3>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "mult_11_2_9565c340740bf724"</p><p> a_width = 22</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> b_width = 36</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 47</p><p> p_bin_pt = 28</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 22</p><p> c_b_width = 36</p><p> c_type = 0</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_pipelined = 1</p><p> c_baat = 22</p><p> multsign = 2</p><p> c_output_width = 58</p><p>Set property "syn_black_box = true" for instance <comp3.core_instance3>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlmult_mas_3> synthesized.</p><p>Synthesizing Unit <xlmult_mas_4>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "mult_11_2_0e1566528d2aabad"</p><p> a_width = 36</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> b_width = 22</p><p> b_bin_pt = 8</p><p> b_arith = 2</p><p> p_width = 47</p><p> p_bin_pt = 28</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 36</p><p> c_b_width = 22</p><p> c_type = 0</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_pipelined = 1</p><p> c_baat = 36</p><p> multsign = 2</p><p> c_output_width = 58</p><p>Set property "syn_black_box = true" for instance <comp4.core_instance4>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlmult_mas_4> synthesized.</p><p>Synthesizing Unit <xlmult_mas_5>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "mult_11_2_b540eb527c25496d"</p><p> a_width = 20</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> b_width = 40</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 47</p><p> p_bin_pt = 28</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 20</p><p> c_b_width = 40</p><p> c_type = 0</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_pipelined = 1</p><p> c_baat = 20</p><p> multsign = 2</p><p> c_output_width = 60</p><p>Set property "syn_black_box = true" for instance <comp5.core_instance5>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlmult_mas_5> synthesized.</p><p>Synthesizing Unit <xlmult_mas_6>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "mult_11_2_65354ed2a4562c5c"</p><p> a_width = 24</p><p> a_bin_pt = 12</p><p> a_arith = 2</p><p> b_width = 40</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 47</p><p> p_bin_pt = 28</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 24</p><p> c_b_width = 40</p><p> c_type = 0</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_pipelined = 1</p><p> c_baat = 24</p><p> multsign = 2</p><p> c_output_width = 64</p><p>Set property "syn_black_box = true" for instance <comp6.core_instance6>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlmult_mas_6> synthesized.</p><p>Synthesizing Unit <xlmult_mas_7>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "mult_11_2_920f82b2d5199557"</p><p> a_width = 36</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> b_width = 32</p><p> b_bin_pt = 16</p><p> b_arith = 2</p><p> p_width = 47</p><p> p_bin_pt = 28</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 36</p><p> c_b_width = 32</p><p> c_type = 0</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_pipelined = 1</p><p> c_baat = 36</p><p> multsign = 2</p><p> c_output_width = 68</p><p>Set property "syn_black_box = true" for instance <comp7.core_instance7>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlmult_mas_7> synthesized.</p><p>Synthesizing Unit <xlmult_mas_8>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "mult_11_2_8a7e2cb341e8d802"</p><p> a_width = 32</p><p> a_bin_pt = 16</p><p> a_arith = 2</p><p> b_width = 28</p><p> b_bin_pt = 20</p><p> b_arith = 2</p><p> p_width = 47</p><p> p_bin_pt = 28</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 32</p><p> c_b_width = 28</p><p> c_type = 0</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_pipelined = 1</p><p> c_baat = 32</p><p> multsign = 2</p><p> c_output_width = 60</p><p>Set property "syn_black_box = true" for instance <comp8.core_instance8>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlmult_mas_8> synthesized.</p><p>Synthesizing Unit <r2s_1_1_entity_3d9d92b448>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 318863: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <r2s_1_1_entity_3d9d92b448> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_24>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_2184da4f73658baf"</p><p> a_width = 28</p><p> a_bin_pt = 24 a_arith = 2 c_in_width = 16 c_in_bin_pt = 4 c_in_arith = 1 c_out_width = 16 c_out_bin_pt = 4 c_out_arith = 1 b_width = 20 b_bin_pt = 12 b_arith = 2 s_width = 18 s_bin_pt = 10 s_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 full_s_width = 33 full_s_arith = 2 mode = 1 extra_registers = 0 latency = 0 quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 33</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_24> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_28>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_30f8ec8dfd7f8ed2"</p><p> a_width = 18</p><p> a_bin_pt = 10 a_arith = 2 b_width = 4 b_bin_pt = 32 b_arith = 2 p_width = 36 p_bin_pt = 32 p_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 multsign = 2 quantization = 1 overflow = 1 extra_registers = 0 c_a_width = 18 c_b_width = 36 c_a_type = 0 c_b_type = 1 c_type = 0 const_bin_pt = 1 zero_const = 0 c_output_width = 54</p><p>Set property "syn_black_box = true" for instance <comp25.core_instance25>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_28> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_29>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_e9ca31a3eb8f57dd"</p><p> a_width = 36</p><p> a_bin_pt = 32 a_arith = 2 b_width = 4 b_bin_pt = 8 b_arith = 2 p_width = 20 p_bin_pt = 12 p_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 multsign = 2 quantization = 1 overflow = 1 extra_registers = 0 c_a_width = 36 c_b_width = 22 c_a_type = 0 c_b_type = 0 c_type = 0 const_bin_pt = 1 zero_const = 0 c_output_width = 58</p><p>Set property "syn_black_box = true" for instance <comp26.core_instance26>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_29> synthesized.</p><p>Synthesizing Unit <xldelay_3>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 36</p><p> latency = 1</p><p> reg_retiming = 0 reset = 0</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xldelay_3> synthesized.</p><p>Synthesizing Unit <synth_reg_3>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 36</p><p> latency = 1</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <synth_reg_3> synthesized.</p><p>Synthesizing Unit <srl17e_3>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 36</p><p> latency = 1</p><p>Set property "syn_black_box = true" for instance <reg_array[0].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[1].fde_used.u2>. WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[2].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[3].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[4].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[5].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[6].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[7].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[8].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[9].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[10].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored. Set property "syn_black_box = true" for instance <reg_array[11].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[12].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[13].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[14].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[15].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[16].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[17].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[18].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[19].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[20].fde_used.u2>. WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[21].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[22].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[23].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[24].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[25].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[26].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[27].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[28].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[29].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored. Set property "syn_black_box = true" for instance <reg_array[30].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[31].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[32].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[33].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[34].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[35].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Summary:</p><p> no macro.</p><p>Unit <srl17e_3> synthesized.</p><p>Synthesizing Unit <r2s_1_entity_94e95b8547>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 318716: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro. Unit <r2s_1_entity_94e95b8547> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_25>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_e8c1ba21b313f251"</p><p> a_width = 28</p><p> a_bin_pt = 24</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 22</p><p> b_bin_pt = 8</p><p> b_arith = 2</p><p> s_width = 22</p><p> s_bin_pt = 8</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1 en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 39</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 39</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro. Unit <xladdsub_mas_25> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_30>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_996fdd58b0411a2b"</p><p> a_width = 22</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 28</p><p> p_bin_pt = 20</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0 c_a_width = 22</p><p> c_b_width = 36</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 58</p><p>Set property "syn_black_box = true" for instance <comp23.core_instance23>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary: no macro.</p><p>Unit <xlcmult_mas_30> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_31>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_ec86768b7e117459"</p><p> a_width = 28</p><p> a_bin_pt = 20</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 12</p><p> b_arith = 2</p><p> p_width = 22</p><p> p_bin_pt = 8</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1 extra_registers = 0</p><p> c_a_width = 28</p><p> c_b_width = 26</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 54</p><p>Set property "syn_black_box = true" for instance <comp24.core_instance24>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_31> synthesized.</p><p>Synthesizing Unit <xldelay_4>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 28</p><p> latency = 1</p><p> reg_retiming = 0</p><p> reset = 0</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xldelay_4> synthesized.</p><p>Synthesizing Unit <synth_reg_4>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 28</p><p> latency = 1</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <synth_reg_4> synthesized. Synthesizing Unit <srl17e_4>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 28</p><p> latency = 1</p><p>Set property "syn_black_box = true" for instance <reg_array[0].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[1].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[2].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[3].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[4].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[5].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[6].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[7].fde_used.u2>. WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[8].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[9].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[10].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[11].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[12].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[13].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[14].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[15].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[16].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored. Set property "syn_black_box = true" for instance <reg_array[17].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[18].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[19].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[20].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[21].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[22].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[23].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[24].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[25].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[26].fde_used.u2>. WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[27].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Summary:</p><p> no macro.</p><p>Unit <srl17e_4> synthesized.</p><p>Synthesizing Unit <t1s_1_entity_28a5b8b673>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 319010: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <t1s_1_entity_28a5b8b673> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_26>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_2184da4f73658baf"</p><p> a_width = 28</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1 c_out_width = 16 c_out_bin_pt = 4 c_out_arith = 1 b_width = 28 b_bin_pt = 4 b_arith = 2 s_width = 28 s_bin_pt = 4 s_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 full_s_width = 33 full_s_arith = 2 mode = 1 extra_registers = 0 latency = 0 quantization = 1 overflow = 1 c_latency = 0 c_output_width = 33 c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_26> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_32>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_5b85ee661d59a06a"</p><p> a_width = 28</p><p> a_bin_pt = 4</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 24</p><p> b_arith = 2 p_width = 22</p><p> p_bin_pt = 8</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 28</p><p> c_b_width = 30</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 58</p><p>Set property "syn_black_box = true" for instance <comp27.core_instance27>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored. WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_32> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_33>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_efa413f2be52c767"</p><p> a_width = 22</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 16 b_arith = 2</p><p> p_width = 28</p><p> p_bin_pt = 4</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 22</p><p> c_b_width = 28</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 50</p><p>Set property "syn_black_box = true" for instance <comp28.core_instance28>. WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_33> synthesized.</p><p>Synthesizing Unit <xldelay_5>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 22</p><p> latency = 1</p><p> reg_retiming = 0</p><p> reset = 0 WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xldelay_5> synthesized.</p><p>Synthesizing Unit <synth_reg_5>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 22</p><p> latency = 1</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <synth_reg_5> synthesized.</p><p>Synthesizing Unit <srl17e_5>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 22</p><p> latency = 1</p><p>Set property "syn_black_box = true" for instance <reg_array[0].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[1].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored. Set property "syn_black_box = true" for instance <reg_array[2].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[3].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[4].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[5].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[6].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[7].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[8].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[9].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[10].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[11].fde_used.u2>. WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[12].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[13].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[14].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[15].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[16].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[17].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[18].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[19].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[20].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored. Set property "syn_black_box = true" for instance <reg_array[21].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Summary:</p><p> no macro.</p><p>Unit <srl17e_5> synthesized.</p><p>Synthesizing Unit <integrator_entity_ed1326b263>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 320515: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <integrator_entity_ed1326b263> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_27>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_7baf43f5d46f2efd"</p><p> a_width = 36</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16 c_out_bin_pt = 4 c_out_arith = 1 b_width = 32 b_bin_pt = 16 b_arith = 2 s_width = 32 s_bin_pt = 16 s_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 full_s_width = 49 full_s_arith = 2 mode = 1 extra_registers = 0 latency = 0 quantization = 1 overflow = 1 c_latency = 0 c_output_width = 49 c_has_c_in = 0 c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_27> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_34>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_8153107f81f163c5"</p><p> a_width = 20</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 36 p_bin_pt = 32</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 20</p><p> c_b_width = 36</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 56</p><p>Set property "syn_black_box = true" for instance <comp39.core_instance39>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_34> synthesized.</p><p>Synthesizing Unit <mechanical_model_entity_cc1bd59c80>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 317591: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 317623: Output port <c_out> of the instance <addsub1> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 317655: Output port <c_out> of the instance <addsub2> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <mechanical_model_entity_cc1bd59c80> synthesized. Synthesizing Unit <xladdsub_mas_28>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_77b30ee23c108b1c"</p><p> a_width = 22</p><p> a_bin_pt = 5</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 21</p><p> b_bin_pt = 4</p><p> b_arith = 2</p><p> s_width = 24</p><p> s_bin_pt = 8</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0 en_arith = 1</p><p> full_s_width = 23</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 23</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_28> synthesized. Synthesizing Unit <xladdsub_mas_29>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_12cafd628eabec2e"</p><p> a_width = 32</p><p> a_bin_pt = 24</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 36</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> s_width = 32</p><p> s_bin_pt = 24</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0 en_arith = 1</p><p> full_s_width = 41</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 41</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_29> synthesized. Synthesizing Unit <xladdsub_mas_30>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_af6b5da6dbbc120b"</p><p> a_width = 32</p><p> a_bin_pt = 16</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 24</p><p> b_bin_pt = 12</p><p> b_arith = 2</p><p> s_width = 20</p><p> s_bin_pt = 8</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0 en_arith = 1</p><p> full_s_width = 33</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 33</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_30> synthesized. Synthesizing Unit <xlcmult_mas_35>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_9f263efbda8fb0e9"</p><p> a_width = 47</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 16</p><p> b_arith = 2</p><p> p_width = 24</p><p> p_bin_pt = 12</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 47 c_b_width = 22</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 69</p><p>Set property "syn_black_box = true" for instance <comp16.core_instance16>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro. Unit <xlcmult_mas_35> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_36>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_13cb1fe83f6719af"</p><p> a_width = 22</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 16</p><p> b_arith = 2</p><p> p_width = 24</p><p> p_bin_pt = 16</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0 c_a_width = 22</p><p> c_b_width = 20</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 42</p><p>Set property "syn_black_box = true" for instance <comp17.core_instance17>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary: no macro.</p><p>Unit <xlcmult_mas_36> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_37>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_049d91e8686bd2db"</p><p> a_width = 22</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 24</p><p> b_arith = 2</p><p> p_width = 20</p><p> p_bin_pt = 12</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1 extra_registers = 0</p><p> c_a_width = 22</p><p> c_b_width = 32</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 54</p><p>Set property "syn_black_box = true" for instance <comp18.core_instance18>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_37> synthesized.</p><p>Synthesizing Unit <constant_f9a3204d5a>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_f9a3204d5a> synthesized.</p><p>Synthesizing Unit <js_b_entity_eb065e8729>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 316791: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <js_b_entity_eb065e8729> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_31>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_4c11e627a14cfcc4" a_width = 24 a_bin_pt = 8 a_arith = 2 c_in_width = 16 c_in_bin_pt = 4 c_in_arith = 1 c_out_width = 16 c_out_bin_pt = 4 c_out_arith = 1 b_width = 40 b_bin_pt = 8 b_arith = 2 s_width = 64 s_bin_pt = 32 s_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 full_s_width = 41 full_s_arith = 2 mode = 1 extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 41</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_31> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_38>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_884930e4bebbd5b6" a_width = 64 a_bin_pt = 32 a_arith = 2 b_width = 4 b_bin_pt = 32 b_arith = 2 p_width = 47 p_bin_pt = 32 p_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 multsign = 2 quantization = 1 overflow = 1 extra_registers = 0 c_a_width = 64 c_b_width = 47 c_a_type = 0 c_b_type = 1 c_type = 0 const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 111</p><p>Set property "syn_black_box = true" for instance <comp8.core_instance8>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_38> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_39>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_35f296ece0a9a6e7" a_width = 47 a_bin_pt = 32 a_arith = 2 b_width = 4 b_bin_pt = 32 b_arith = 2 p_width = 40 p_bin_pt = 8 p_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 multsign = 2 quantization = 1 overflow = 1 extra_registers = 0 c_a_width = 47 c_b_width = 64 c_a_type = 0 c_b_type = 0 c_type = 0 const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 111</p><p>Set property "syn_black_box = true" for instance <comp9.core_instance9>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_39> synthesized.</p><p>Synthesizing Unit <xldelay_6>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 47 latency = 1</p><p> reg_retiming = 0</p><p> reset = 0</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xldelay_6> synthesized.</p><p>Synthesizing Unit <synth_reg_6>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 47</p><p> latency = 1</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <synth_reg_6> synthesized.</p><p>Synthesizing Unit <srl17e_6>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> width = 47</p><p> latency = 1</p><p>Set property "syn_black_box = true" for instance <reg_array[0].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored. Set property "syn_black_box = true" for instance <reg_array[1].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[2].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[3].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[4].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[5].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[6].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[7].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[8].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[9].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[10].fde_used.u2>. WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[11].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[12].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[13].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[14].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[15].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[16].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[17].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[18].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[19].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored. Set property "syn_black_box = true" for instance <reg_array[20].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[21].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[22].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[23].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[24].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[25].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[26].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[27].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[28].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[29].fde_used.u2>. WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[30].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[31].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[32].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[33].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[34].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[35].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[36].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[37].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[38].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored. Set property "syn_black_box = true" for instance <reg_array[39].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[40].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[41].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[42].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[43].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[44].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[45].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Set property "syn_black_box = true" for instance <reg_array[46].fde_used.u2>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>Summary:</p><p> no macro.</p><p>Unit <srl17e_6> synthesized. Synthesizing Unit <r2s_1_2_entity_76d16c6b2f>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>Summary:</p><p> no macro.</p><p>Unit <r2s_1_2_entity_76d16c6b2f> synthesized.</p><p>Synthesizing Unit <cmult_e23c3c3f98>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:653 - Signal <op_mem_71_20_front_din> is used but never assigned. This sourceless signal will be automatically connected to value GND.</p><p>Found 83x33-bit multiplier for signal <n0015[115:0]> created at line 314093.</p><p>Summary:</p><p> inferred 1 Multiplier(s).</p><p>Unit <cmult_e23c3c3f98> synthesized.</p><p>Synthesizing Unit <cmult_70d8a731d2>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:653 - Signal <op_mem_71_20_front_din> is used but never assigned. This sourceless signal will be automatically connected to value GND.</p><p>Summary:</p><p> no macro.</p><p>Unit <cmult_70d8a731d2> synthesized. Synthesizing Unit <xlcmult_mas_40>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_66d7ec4f1062986c"</p><p> a_width = 24</p><p> a_bin_pt = 16</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 64</p><p> p_bin_pt = 32</p><p> p_arith = 1</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 24</p><p> c_b_width = 64 c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 88</p><p>Set property "syn_black_box = true" for instance <comp12.core_instance12>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_40> synthesized. Synthesizing Unit <xlcmult_mas_41>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_1029404049440265"</p><p> a_width = 32</p><p> a_bin_pt = 24</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 64</p><p> p_bin_pt = 32</p><p> p_arith = 1</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 32 c_b_width = 64</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 96</p><p>Set property "syn_black_box = true" for instance <comp13.core_instance13>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro. Unit <xlcmult_mas_41> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_42>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_3ec88f51016c09d9"</p><p> a_width = 24</p><p> a_bin_pt = 16</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 64</p><p> p_bin_pt = 32</p><p> p_arith = 1</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0 c_a_width = 24</p><p> c_b_width = 64</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 88</p><p>Set property "syn_black_box = true" for instance <comp14.core_instance14>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary: no macro.</p><p>Unit <xlcmult_mas_42> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_43>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_8772ad679ba8df4b"</p><p> a_width = 32</p><p> a_bin_pt = 24</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 64</p><p> p_bin_pt = 32</p><p> p_arith = 1</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1 extra_registers = 0</p><p> c_a_width = 32</p><p> c_b_width = 64</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 96</p><p>Set property "syn_black_box = true" for instance <comp15.core_instance15>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_43> synthesized.</p><p>Synthesizing Unit <constant_c4c603edf2>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_c4c603edf2> synthesized.</p><p>Synthesizing Unit <xldivider_generator_3918c6b6df573559c53db2a570dd8e4f>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 314205: Output port <m_axis_dout_tvalid> of the instance <dvd_4_0_1cc2b7efae0f1659_instance> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <xldivider_generator_3918c6b6df573559c53db2a570dd8e4f> synthesized. Synthesizing Unit <xldivider_generator_f2d0cf82922d53ccd3173f64934f0d65>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 314259: Output port <m_axis_dout_tvalid> of the instance <dvd_4_0_1cc2b7efae0f1659_instance> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <xldivider_generator_f2d0cf82922d53ccd3173f64934f0d65> synthesized.</p><p>Synthesizing Unit <mux_738df95838>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 64-bit 4-to-1 multiplexer for signal <unregy_join_6_1> created at line 314307.</p><p>Summary:</p><p> inferred 1 Multiplexer(s).</p><p>Unit <mux_738df95838> synthesized.</p><p>Synthesizing Unit <relational_4957bd21f5>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 64-bit comparator greater for signal <result_18_3_rel> created at line 314347</p><p>Summary:</p><p> inferred 1 Comparator(s).</p><p>Unit <relational_4957bd21f5> synthesized.</p><p>Synthesizing Unit <relational_0f57cbe796>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 64-bit comparator greater for signal <result_18_3_rel> created at line 314376</p><p>Summary:</p><p> inferred 1 Comparator(s).</p><p>Unit <relational_0f57cbe796> synthesized.</p><p>Synthesizing Unit <r2s_1_entity_5d0e7066ab>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 316938: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>Summary: no macro.</p><p>Unit <r2s_1_entity_5d0e7066ab> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_32>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_5ee0d098007a1b66"</p><p> a_width = 20</p><p> a_bin_pt = 12</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 40</p><p> b_bin_pt = 8</p><p> b_arith = 2</p><p> s_width = 64</p><p> s_bin_pt = 32</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1 en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 45</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 45</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary: no macro.</p><p>Unit <xladdsub_mas_32> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_44>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_e39bf5f892b9d2bb"</p><p> a_width = 64</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 36</p><p> p_bin_pt = 32</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1 extra_registers = 0</p><p> c_a_width = 64</p><p> c_b_width = 64</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 128</p><p>Set property "syn_black_box = true" for instance <comp10.core_instance10>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_44> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_45>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_2650ef2e23192fd1"</p><p> a_width = 36</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 40</p><p> p_bin_pt = 8</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1 overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 36</p><p> c_b_width = 64</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 100</p><p>Set property "syn_black_box = true" for instance <comp11.core_instance11>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_45> synthesized.</p><p>Synthesizing Unit <x3_phase_to_dq_transform_entity_9ef544f709>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 316469: Output port <c_out> of the instance <addsub1> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 316501: Output port <c_out> of the instance <addsub2> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 316533: Output port <c_out> of the instance <addsub3> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <x3_phase_to_dq_transform_entity_9ef544f709> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_33>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_78cf8cbd27fbc6a3"</p><p> a_width = 20</p><p> a_bin_pt = 5</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4 c_in_arith = 1 c_out_width = 16 c_out_bin_pt = 4 c_out_arith = 1 b_width = 20 b_bin_pt = 5 b_arith = 2 s_width = 22 s_bin_pt = 8 s_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 full_s_width = 21 full_s_arith = 2 mode = 1 extra_registers = 0 latency = 0 quantization = 1 overflow = 1 c_latency = 0 c_output_width = 21</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_33> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_34>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_656d04967a49ee54"</p><p> a_width = 47</p><p> a_bin_pt = 28</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4 c_in_arith = 1 c_out_width = 16 c_out_bin_pt = 4 c_out_arith = 1 b_width = 47 b_bin_pt = 28 b_arith = 2 s_width = 22 s_bin_pt = 8 s_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 full_s_width = 48 full_s_arith = 2 mode = 1 extra_registers = 0 latency = 0 quantization = 1 overflow = 1 c_latency = 0 c_output_width = 48</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_34> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_35>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_9f0b008074cbd983"</p><p> a_width = 47</p><p> a_bin_pt = 28</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4 c_in_arith = 1 c_out_width = 16 c_out_bin_pt = 4 c_out_arith = 1 b_width = 47 b_bin_pt = 28 b_arith = 2 s_width = 22 s_bin_pt = 8 s_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 full_s_width = 48 full_s_arith = 2 mode = 1 extra_registers = 0 latency = 0 quantization = 1 overflow = 1 c_latency = 0 c_output_width = 48</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_35> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_46>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_b8f0ba24732880a2"</p><p> a_width = 22</p><p> a_bin_pt = 8</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 12 b_arith = 2</p><p> p_width = 22</p><p> p_bin_pt = 8</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 22</p><p> c_b_width = 16</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 38</p><p>Set property "syn_black_box = true" for instance <comp7.core_instance7>. WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_46> synthesized.</p><p>Synthesizing Unit <xlmult_mas_9>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "mult_11_2_0d9df47653e8136c"</p><p> a_width = 20</p><p> a_bin_pt = 5</p><p> a_arith = 2</p><p> b_width = 64 b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 47</p><p> p_bin_pt = 28</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 20</p><p> c_b_width = 64</p><p> c_type = 0</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_pipelined = 1</p><p> c_baat = 20</p><p> multsign = 2</p><p> c_output_width = 84</p><p>Set property "syn_black_box = true" for instance <comp0.core_instance0>. WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlmult_mas_9> synthesized.</p><p>Synthesizing Unit <sin_cos_entity_a4ff007f0d>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>Summary:</p><p> no macro.</p><p>Unit <sin_cos_entity_a4ff007f0d> synthesized.</p><p>Synthesizing Unit <accumulator_entity_a1fac56952>. Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 316040: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 316072: Output port <c_out> of the instance <addsub1> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 316104: Output port <c_out> of the instance <addsub2> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 316136: Output port <c_out> of the instance <addsub3> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <accumulator_entity_a1fac56952> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_36>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_20f59c924e684f65"</p><p> a_width = 26</p><p> a_bin_pt = 20</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 13 b_bin_pt = 8</p><p> b_arith = 2</p><p> s_width = 32</p><p> s_bin_pt = 26</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 27</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 27</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_36> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_37>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_f49d9cea35751c72"</p><p> a_width = 26</p><p> a_bin_pt = 20</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 13 b_bin_pt = 8</p><p> b_arith = 2</p><p> s_width = 32</p><p> s_bin_pt = 26</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 27</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 27</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_37> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_38>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_d233efc3f69384da"</p><p> a_width = 36</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 32 b_bin_pt = 26</p><p> b_arith = 2</p><p> s_width = 26</p><p> s_bin_pt = 20</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 39</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 39</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_38> synthesized.</p><p>Synthesizing Unit <mux_5c289d345d>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 32-bit 3-to-1 multiplexer for signal <unregy_join_6_1> created at line 313445.</p><p>Summary:</p><p> inferred 1 Multiplexer(s).</p><p>Unit <mux_5c289d345d> synthesized.</p><p>Synthesizing Unit <relational_6edcd2cfc1>. Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 26-bit comparator greater for signal <result_18_3_rel> created at line 313482</p><p>Summary:</p><p> inferred 1 Comparator(s).</p><p>Unit <relational_6edcd2cfc1> synthesized.</p><p>Synthesizing Unit <relational_450a547f18>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 26-bit comparator greater for signal <result_16_3_rel> created at line 313511</p><p>Summary:</p><p> inferred 1 Comparator(s).</p><p>Unit <relational_450a547f18> synthesized.</p><p>Synthesizing Unit <subsystem_entity_9a652c066b>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd". Summary:</p><p> no macro.</p><p>Unit <subsystem_entity_9a652c066b> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_47>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_4d19018b3c39239e"</p><p> a_width = 32</p><p> a_bin_pt = 26</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 10</p><p> b_arith = 2</p><p> p_width = 10</p><p> p_bin_pt = 0</p><p> p_arith = 1</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1 overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 32</p><p> c_b_width = 22</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 54</p><p>Set property "syn_black_box = true" for instance <comp6.core_instance6>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_47> synthesized.</p><p>Synthesizing Unit <reference_torque_entity_0a4273da32>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>Summary:</p><p> no macro.</p><p>Unit <reference_torque_entity_0a4273da32> synthesized.</p><p>Synthesizing Unit <constant_8df3c2619f>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_8df3c2619f> synthesized.</p><p>Synthesizing Unit <constant_7686630003>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd". WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_7686630003> synthesized.</p><p>Synthesizing Unit <constant_9d1192475b>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_9d1192475b> synthesized.</p><p>Synthesizing Unit <constant_f38f6294db>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_f38f6294db> synthesized.</p><p>Synthesizing Unit <constant_be580fdd18>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_be580fdd18> synthesized.</p><p>Synthesizing Unit <mux_199bd0a2d9>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 21-bit 4-to-1 multiplexer for signal <unregy_join_6_1> created at line 315008.</p><p>Summary: inferred 1 Multiplexer(s).</p><p>Unit <mux_199bd0a2d9> synthesized.</p><p>Synthesizing Unit <relational_7413a0ab90>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 25-bit comparator greater for signal <result_18_3_rel> created at line 315049</p><p>Summary:</p><p> inferred 1 Comparator(s).</p><p>Unit <relational_7413a0ab90> synthesized.</p><p>Synthesizing Unit <rotor_flux_oriented_control_structure_entity_d176305a68>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>Summary:</p><p> no macro.</p><p>Unit <rotor_flux_oriented_control_structure_entity_d176305a68> synthesized.</p><p>Synthesizing Unit <dq_to_3_phase_transform1_entity_cb7e5b1e3b>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 321463: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal. INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 321495: Output port <c_out> of the instance <addsub1> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 321527: Output port <c_out> of the instance <addsub2> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 321559: Output port <c_out> of the instance <addsub3> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <dq_to_3_phase_transform1_entity_cb7e5b1e3b> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_39>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_9f0b008074cbd983"</p><p> a_width = 47</p><p> a_bin_pt = 28</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 47</p><p> b_bin_pt = 28</p><p> b_arith = 2</p><p> s_width = 24 s_bin_pt = 10</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 48</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 48</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_39> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_40>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_656d04967a49ee54"</p><p> a_width = 47</p><p> a_bin_pt = 28</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 47</p><p> b_bin_pt = 28</p><p> b_arith = 2</p><p> s_width = 24 s_bin_pt = 10</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 48</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 48</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_40> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_41>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_97454a187aa26b59"</p><p> a_width = 24</p><p> a_bin_pt = 10</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 24</p><p> b_bin_pt = 10</p><p> b_arith = 2</p><p> s_width = 24 s_bin_pt = 10</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 25</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 25</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_41> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_48>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_16833ca38057a335"</p><p> a_width = 24</p><p> a_bin_pt = 10</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 8</p><p> b_arith = 2</p><p> p_width = 24</p><p> p_bin_pt = 10</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1 en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 24</p><p> c_b_width = 12</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 36</p><p>Set property "syn_black_box = true" for instance <comp42.core_instance42>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_48> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_49>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_df1f89bf2e1d9b34"</p><p> a_width = 24</p><p> a_bin_pt = 10</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 4</p><p> b_arith = 2</p><p> p_width = 24</p><p> p_bin_pt = 10</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1 en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 24</p><p> c_b_width = 8</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 32</p><p>Set property "syn_black_box = true" for instance <comp43.core_instance43>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_49> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_50>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_029410d730aef3c6"</p><p> a_width = 24</p><p> a_bin_pt = 10</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 8</p><p> b_arith = 2</p><p> p_width = 24</p><p> p_bin_pt = 10</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1 en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 24</p><p> c_b_width = 12</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 36</p><p>Set property "syn_black_box = true" for instance <comp44.core_instance44>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_50> synthesized.</p><p>Synthesizing Unit <xlmult_mas_10>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "mult_11_2_6d75902f305ef739"</p><p> a_width = 32</p><p> a_bin_pt = 16</p><p> a_arith = 2</p><p> b_width = 64</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 47</p><p> p_bin_pt = 28</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1 en_bin_pt = 0</p><p> en_arith = 1</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 32</p><p> c_b_width = 64</p><p> c_type = 0</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_pipelined = 1</p><p> c_baat = 32</p><p> multsign = 2</p><p> c_output_width = 96</p><p>Set property "syn_black_box = true" for instance <comp9.core_instance9>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlmult_mas_10> synthesized.</p><p>Synthesizing Unit <xlmult_mas_11>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "mult_11_2_3e45894281c05d4b"</p><p> a_width = 48</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> b_width = 64</p><p> b_bin_pt = 32</p><p> b_arith = 2</p><p> p_width = 47</p><p> p_bin_pt = 28</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1 en_bin_pt = 0</p><p> en_arith = 1</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 48</p><p> c_b_width = 64</p><p> c_type = 0</p><p> c_a_type = 0</p><p> c_b_type = 0</p><p> c_pipelined = 1</p><p> c_baat = 48</p><p> multsign = 2</p><p> c_output_width = 112</p><p>Set property "syn_black_box = true" for instance <comp10.core_instance10>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlmult_mas_11> synthesized.</p><p>Synthesizing Unit <sin_cos_entity_8eaaf8b6cd>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>Summary:</p><p> no macro.</p><p>Unit <sin_cos_entity_8eaaf8b6cd> synthesized.</p><p>Synthesizing Unit <accumulator_entity_164759ecd4>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 321032: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 321064: Output port <c_out> of the instance <addsub1> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 321096: Output port <c_out> of the instance <addsub2> is unconnected or connected to loadless signal.</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 321128: Output port <c_out> of the instance <addsub3> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro. Unit <accumulator_entity_164759ecd4> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_42>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_b8b6601a380b9153"</p><p> a_width = 30</p><p> a_bin_pt = 24</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 13</p><p> b_bin_pt = 8</p><p> b_arith = 2</p><p> s_width = 24</p><p> s_bin_pt = 18</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1 en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 31</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 31</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro. Unit <xladdsub_mas_42> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_43>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_ba616ce80205da8e"</p><p> a_width = 30</p><p> a_bin_pt = 24</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 13</p><p> b_bin_pt = 8</p><p> b_arith = 2</p><p> s_width = 24</p><p> s_bin_pt = 18</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1 en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 31</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 31</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro. Unit <xladdsub_mas_43> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_44>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_d233efc3f69384da"</p><p> a_width = 36</p><p> a_bin_pt = 32</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 24</p><p> b_bin_pt = 18</p><p> b_arith = 2</p><p> s_width = 30</p><p> s_bin_pt = 24</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1 en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 39</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 39</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro. Unit <xladdsub_mas_44> synthesized.</p><p>Synthesizing Unit <mux_fc2fc9a5bf>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 30-bit 3-to-1 multiplexer for signal <unregy_join_6_1> created at line 314678.</p><p>Summary:</p><p> inferred 1 Multiplexer(s).</p><p>Unit <mux_fc2fc9a5bf> synthesized.</p><p>Synthesizing Unit <relational_f98abae2fa>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 30-bit comparator greater for signal <result_18_3_rel> created at line 314716</p><p>Summary:</p><p> inferred 1 Comparator(s).</p><p>Unit <relational_f98abae2fa> synthesized. Synthesizing Unit <relational_4fa5c6b5c8>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 30-bit comparator greater for signal <result_16_3_rel> created at line 314745</p><p>Summary:</p><p> inferred 1 Comparator(s).</p><p>Unit <relational_4fa5c6b5c8> synthesized.</p><p>Synthesizing Unit <subsystem_entity_4673c3f4d3>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>Summary:</p><p> no macro.</p><p>Unit <subsystem_entity_4673c3f4d3> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_51>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_459de2f2aaf2af91"</p><p> a_width = 24</p><p> a_bin_pt = 18</p><p> a_arith = 2 b_width = 4 b_bin_pt = 7 b_arith = 2 p_width = 10 p_bin_pt = 0 p_arith = 1 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 multsign = 2 quantization = 1 overflow = 1 extra_registers = 0 c_a_width = 24 c_b_width = 18 c_a_type = 0 c_b_type = 1 c_type = 0 const_bin_pt = 1 zero_const = 0 c_output_width = 42 Set property "syn_black_box = true" for instance <comp41.core_instance41>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_51> synthesized.</p><p>Synthesizing Unit <\hysteresis_based_stator_current__regulator_entity_eae9ebeb7b\>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>Summary:</p><p> no macro.</p><p>Unit <\hysteresis_based_stator_current__regulator_entity_eae9ebeb7b\> synthesized. Synthesizing Unit <constant_dd0e52e409>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_dd0e52e409> synthesized.</p><p>Synthesizing Unit <constant_566137e191>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_566137e191> synthesized.</p><p>Synthesizing Unit <mux_f1cd62c228>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 8-bit 3-to-1 multiplexer for signal <unregy_join_6_1> created at line 314575.</p><p>Summary:</p><p> inferred 1 Multiplexer(s).</p><p>Unit <mux_f1cd62c228> synthesized.</p><p>Synthesizing Unit <relational_291b500f4c>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 26-bit comparator lessequal for signal <n0003> created at line 314612</p><p>Summary:</p><p> inferred 1 Comparator(s).</p><p>Unit <relational_291b500f4c> synthesized.</p><p>Synthesizing Unit <relational_68289a436b>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 26-bit comparator greater for signal <result_16_3_rel> created at line 314641</p><p>Summary:</p><p> inferred 1 Comparator(s).</p><p>Unit <relational_68289a436b> synthesized.</p><p>Synthesizing Unit <speed_control_unit_entity_6003cc59fe>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 322217: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <speed_control_unit_entity_6003cc59fe> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_45>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_656d04967a49ee54"</p><p> a_width = 12</p><p> a_bin_pt = 4</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16 c_out_bin_pt = 4 c_out_arith = 1 b_width = 47 b_bin_pt = 32 b_arith = 2 s_width = 26 s_bin_pt = 18 s_arith = 2 rst_width = 1 rst_bin_pt = 0 rst_arith = 1 en_width = 1 en_bin_pt = 0 en_arith = 1 full_s_width = 48 full_s_arith = 2 mode = 1 extra_registers = 0 latency = 0 quantization = 1 overflow = 1 c_latency = 0 c_output_width = 48 c_has_c_in = 0 c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_45> synthesized.</p><p>Synthesizing Unit <constant_21eca29972>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_21eca29972> synthesized. Synthesizing Unit <constant_72d79bf72e>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_72d79bf72e> synthesized.</p><p>Synthesizing Unit <constant_7688a429c7>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <constant_7688a429c7> synthesized.</p><p>Synthesizing Unit <mux_8c9b1f5d1f>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> inferred 1 Multiplexer(s).</p><p>Unit <mux_8c9b1f5d1f> synthesized.</p><p>Synthesizing Unit <relational_f57db9ac43>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Found 24-bit comparator greater for signal <result_18_3_rel> created at line 314874</p><p>Summary:</p><p> inferred 1 Comparator(s).</p><p>Unit <relational_f57db9ac43> synthesized.</p><p>Synthesizing Unit <speed_controller_entity_f6ad1f2505>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 322074: Output port <c_out> of the instance <addsub1> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro. Unit <speed_controller_entity_f6ad1f2505> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_46>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_9f0b008074cbd983"</p><p> a_width = 34</p><p> a_bin_pt = 18</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 47</p><p> b_bin_pt = 30</p><p> b_arith = 2</p><p> s_width = 48</p><p> s_bin_pt = 32</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1 en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 48</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 48</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro. Unit <xladdsub_mas_46> synthesized.</p><p>Synthesizing Unit <integrator_entity_5161c4fa54>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p>INFO:Xst:3210 - "C:\Users\admin\Desktop\map\masbit\mas.vhd" line 321961: Output port <c_out> of the instance <addsub> is unconnected or connected to loadless signal.</p><p>Summary:</p><p> no macro.</p><p>Unit <integrator_entity_5161c4fa54> synthesized.</p><p>Synthesizing Unit <xladdsub_mas_47>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "addsb_11_0_9f0b008074cbd983"</p><p> a_width = 47</p><p> a_bin_pt = 30</p><p> a_arith = 2</p><p> c_in_width = 16</p><p> c_in_bin_pt = 4</p><p> c_in_arith = 1</p><p> c_out_width = 16</p><p> c_out_bin_pt = 4</p><p> c_out_arith = 1</p><p> b_width = 47</p><p> b_bin_pt = 30</p><p> b_arith = 2 s_width = 47</p><p> s_bin_pt = 30</p><p> s_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> full_s_width = 48</p><p> full_s_arith = 2</p><p> mode = 1</p><p> extra_registers = 0</p><p> latency = 0</p><p> quantization = 1</p><p> overflow = 1</p><p> c_latency = 0</p><p> c_output_width = 48</p><p> c_has_c_in = 0</p><p> c_has_c_out = 0</p><p>WARNING:Xst:647 - Input <c_in> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xladdsub_mas_47> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_52>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_992d02a5d9cbaf76"</p><p> a_width = 36</p><p> a_bin_pt = 18</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 24</p><p> b_arith = 2</p><p> p_width = 47</p><p> p_bin_pt = 30</p><p> p_arith = 2</p><p> rst_width = 1</p><p> rst_bin_pt = 0 rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 36</p><p> c_b_width = 30</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 66</p><p>Set property "syn_black_box = true" for instance <comp45.core_instance45>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_52> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_53>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_3e63237a5cd93bb8"</p><p> a_width = 26</p><p> a_bin_pt = 18</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 8</p><p> b_arith = 2</p><p> p_width = 36</p><p> p_bin_pt = 18</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 26</p><p> c_b_width = 20</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 46</p><p>Set property "syn_black_box = true" for instance <comp46.core_instance46>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_53> synthesized.</p><p>Synthesizing Unit <xlcmult_mas_54>.</p><p>Related source file is "C:\Users\admin\Desktop\map\masbit\mas.vhd".</p><p> core_name0 = "cmlt_11_2_c1042e6cbf52704f"</p><p> a_width = 26</p><p> a_bin_pt = 18</p><p> a_arith = 2</p><p> b_width = 4</p><p> b_bin_pt = 2</p><p> b_arith = 2</p><p> p_width = 34</p><p> p_bin_pt = 18</p><p> p_arith = 2</p><p> rst_width = 1 rst_bin_pt = 0</p><p> rst_arith = 1</p><p> en_width = 1</p><p> en_bin_pt = 0</p><p> en_arith = 1</p><p> multsign = 2</p><p> quantization = 1</p><p> overflow = 1</p><p> extra_registers = 0</p><p> c_a_width = 26</p><p> c_b_width = 9</p><p> c_a_type = 0</p><p> c_b_type = 1</p><p> c_type = 0</p><p> const_bin_pt = 1</p><p> zero_const = 0</p><p> c_output_width = 35</p><p>Set property "syn_black_box = true" for instance <comp47.core_instance47>.</p><p>WARNING:Xst:37 - Detected unknown constraint/property "fpga_dont_touch". This constraint/property is not supported by the current software release and will be ignored.</p><p>WARNING:Xst:647 - Input <rst> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <en> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved. WARNING:Xst:647 - Input <clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_ce> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clr> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>WARNING:Xst:647 - Input <core_clk> is never used. This port will be preserved and left unconnected if it belongs to a top-level block or it belongs to a sub-block and the hierarchy of this sub-block is preserved.</p><p>Summary:</p><p> no macro.</p><p>Unit <xlcmult_mas_54> synthesized.</p><p>======</p><p>HDL Synthesis Report</p><p>Macro Statistics</p><p># Multipliers : 2</p><p>83x33-bit multiplier : 2</p><p># Comparators : 18</p><p>24-bit comparator greater : 2</p><p>25-bit comparator greater : 2</p><p>26-bit comparator greater : 5</p><p>26-bit comparator lessequal : 3</p><p>30-bit comparator greater : 2</p><p>36-bit comparator greater : 1 37-bit comparator greater : 1</p><p>64-bit comparator greater : 2</p><p># Multiplexers : 10</p><p>10-bit 2-to-1 multiplexer : 1</p><p>16-bit 2-to-1 multiplexer : 1</p><p>21-bit 4-to-1 multiplexer : 1</p><p>30-bit 3-to-1 multiplexer : 1</p><p>32-bit 3-to-1 multiplexer : 1</p><p>38-bit 3-to-1 multiplexer : 1</p><p>64-bit 4-to-1 multiplexer : 1</p><p>8-bit 3-to-1 multiplexer : 3</p><p>======</p><p>======</p><p>* Advanced HDL Synthesis *</p><p>======</p><p>======</p><p>Advanced HDL Synthesis Report</p><p>Macro Statistics</p><p># Multipliers : 2</p><p>83x33-bit multiplier : 2 # Registers : 471</p><p>Flip-Flops : 471</p><p># Comparators : 18</p><p>24-bit comparator greater : 2</p><p>25-bit comparator greater : 2</p><p>26-bit comparator greater : 5</p><p>26-bit comparator lessequal : 3</p><p>30-bit comparator greater : 2</p><p>36-bit comparator greater : 1</p><p>37-bit comparator greater : 1</p><p>64-bit comparator greater : 2</p><p># Multiplexers : 10</p><p>10-bit 2-to-1 multiplexer : 1</p><p>16-bit 2-to-1 multiplexer : 1</p><p>21-bit 4-to-1 multiplexer : 1</p><p>30-bit 3-to-1 multiplexer : 1</p><p>32-bit 3-to-1 multiplexer : 1</p><p>38-bit 3-to-1 multiplexer : 1</p><p>64-bit 4-to-1 multiplexer : 1</p><p>8-bit 3-to-1 multiplexer : 3</p><p>======</p><p>======* Low Level Synthesis *</p><p>======</p><p>WARNING:Xst:1989 - Unit <r2s_1_2_entity_76d16c6b2f>: instances <constant1>, <constant2> of unit <constant_c4c603edf2> are equivalent, second instance is removed</p><p>WARNING:Xst:1989 - Unit <accumulator_entity_a1fac56952>: instances <constant1>, <constant2> of unit <constant_63e9e12f7a> are equivalent, second instance is removed</p><p>WARNING:Xst:1989 - Unit <accumulator_entity_a1fac56952>: instances <constant1>, <constant5> of unit <constant_63e9e12f7a> are equivalent, second instance is removed</p><p>WARNING:Xst:1989 - Unit <accumulator_entity_3a7e22bc7b>: instances <constant1>, <constant2> of unit <constant_63e9e12f7a> are equivalent, second instance is removed</p><p>WARNING:Xst:1989 - Unit <accumulator_entity_3a7e22bc7b>: instances <constant1>, <constant5> of unit <constant_63e9e12f7a> are equivalent, second instance is removed</p><p>WARNING:Xst:1989 - Unit <accumulator_entity_164759ecd4>: instances <constant1>, <constant2> of unit <constant_63e9e12f7a> are equivalent, second instance is removed</p><p>WARNING:Xst:1989 - Unit <accumulator_entity_164759ecd4>: instances <constant1>, <constant5> of unit <constant_63e9e12f7a> are equivalent, second instance is removed</p><p>WARNING:Xst:1989 - Unit <\hysteresis_based_stator_current__regulator_entity_eae9ebeb7b\>: instances <constant10>, <constant2> of unit <constant_dd0e52e409> are equivalent, second instance is removed</p><p>WARNING:Xst:1989 - Unit <\hysteresis_based_stator_current__regulator_entity_eae9ebeb7b\>: instances <constant10>, <constant6> of unit <constant_dd0e52e409> are equivalent, second instance is removed</p><p>WARNING:Xst:1989 - Unit <\hysteresis_based_stator_current__regulator_entity_eae9ebeb7b\>: instances <constant11>, <constant3> of unit <constant_566137e191> are equivalent, second instance is removed</p><p>WARNING:Xst:1989 - Unit <\hysteresis_based_stator_current__regulator_entity_eae9ebeb7b\>: instances <constant11>, <constant7> of unit <constant_566137e191> are equivalent, second instance is removed</p><p>WARNING:Xst:2677 - Node <cmult7/Mmult_n0015[115:0]_submult_13> of sequential type is unconnected in block <r2s_1_2_entity_76d16c6b2f>.</p><p>WARNING:Xst:2677 - Node <cmult1/Mmult_n0015[115:0]_submult_13> of sequential type is unconnected in block <r2s_1_2_entity_76d16c6b2f>. Optimizing unit <mas_cw> ...</p><p>Optimizing unit <mas> ...</p><p>Optimizing unit <srl17e_1> ...</p><p>Optimizing unit <inverter_model_entity_7e832adb6f> ...</p><p>Optimizing unit <mechanical_model_entity_cc1bd59c80> ...</p><p>Optimizing unit <srl17e_6> ...</p><p>Optimizing unit <srl17e_3> ...</p><p>Optimizing unit <x3_phase_to_dq_transform_entity_9ef544f709> ...</p><p>Optimizing unit <srl17e_2> ...</p><p>Optimizing unit <dq_to_3_phase_transform1_entity_c00e970a06> ...</p><p>Optimizing unit <electrical_model_entity_f1790a14d7> ...</p><p>Optimizing unit <srl17e_4> ... Optimizing unit <srl17e_5> ...</p><p>Optimizing unit <dq_to_3_phase_transform1_entity_cb7e5b1e3b> ...</p><p>Optimizing unit <flux_control_unit1_entity_3b150af683> ...</p><p>Optimizing unit <r2s_1_2_entity_76d16c6b2f> ...</p><p>Optimizing unit <accumulator_entity_a1fac56952> ...</p><p>Optimizing unit <accumulator_entity_3a7e22bc7b> ...</p><p>Optimizing unit <reference_torque_entity_0a4273da32> ...</p><p>Optimizing unit <accumulator_entity_164759ecd4> ...</p><p>Optimizing unit <\hysteresis_based_stator_current__regulator_entity_eae9ebeb7b\> ...</p><p>Optimizing unit <speed_control_unit_entity_6003cc59fe> ...</p><p>WARNING:Xst:1710 - FF/Latch <default_clock_driver_mas_x0/xlclockdriver_1/clr_reg/latency_gt_0.fd_array[1].reg_comp/fd_prim_arr ay[0].bit_is_0.fdre_comp> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[5].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process. WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[4].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[3].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[2].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[1].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[0].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <default_clock_driver_mas_x0/xlclockdriver_1/clr_reg/latency_gt_0.fd_array[1].reg_comp/fd_prim_arr ay[0].bit_is_0.fdre_comp> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[5].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[4].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[3].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[2].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[1].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[0].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <default_clock_driver_mas_x0/xlclockdriver_1/clr_reg/latency_gt_0.fd_array[1].reg_comp/fd_prim_arr ay[0].bit_is_0.fdre_comp> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[5].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[4].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process. WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[3].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[2].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[1].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[0].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>Mapping all equations...</p><p>WARNING:Xst:1710 - FF/Latch <default_clock_driver_mas_x0/xlclockdriver_1/clr_reg/latency_gt_0.fd_array[1].reg_comp/fd_prim_arr ay[0].bit_is_0.fdre_comp> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[5].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[4].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process. WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[3].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[2].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[1].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[0].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <default_clock_driver_mas_x0/xlclockdriver_1/clr_reg/latency_gt_0.fd_array[1].reg_comp/fd_prim_arr ay[0].bit_is_0.fdre_comp> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[5].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[4].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[3].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[2].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[1].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1895 - Due to other FF/Latch trimming, FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[0].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <flux(13)> driven by black box <cmlt_11_2_ce4fb6f0c1404e84>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <flux(12)> driven by black box <cmlt_11_2_ce4fb6f0c1404e84>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <flux(11)> driven by black box <cmlt_11_2_ce4fb6f0c1404e84>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <flux(10)> driven by black box <cmlt_11_2_ce4fb6f0c1404e84>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <flux(9)> driven by black box <cmlt_11_2_ce4fb6f0c1404e84>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <flux(8)> driven by black box <cmlt_11_2_ce4fb6f0c1404e84>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <flux(7)> driven by black box <cmlt_11_2_ce4fb6f0c1404e84>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <flux(6)> driven by black box <cmlt_11_2_ce4fb6f0c1404e84>. Possible simulation mismatch. WARNING:Xst:2036 - Inserting OBUF on port <flux(5)> driven by black box <cmlt_11_2_ce4fb6f0c1404e84>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <flux(4)> driven by black box <cmlt_11_2_ce4fb6f0c1404e84>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <flux(3)> driven by black box <cmlt_11_2_ce4fb6f0c1404e84>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <flux(2)> driven by black box <cmlt_11_2_ce4fb6f0c1404e84>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <flux(1)> driven by black box <cmlt_11_2_ce4fb6f0c1404e84>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <flux(0)> driven by black box <cmlt_11_2_ce4fb6f0c1404e84>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ia(13)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ia(12)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ia(11)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ia(10)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ia(9)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ia(8)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ia(7)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ia(6)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ia(5)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ia(4)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch. WARNING:Xst:2036 - Inserting OBUF on port <ia(3)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ia(2)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ia(1)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ia(0)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ib(13)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ib(12)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ib(11)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ib(10)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ib(9)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ib(8)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ib(7)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ib(6)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ib(5)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ib(4)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ib(3)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ib(2)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch. WARNING:Xst:2036 - Inserting OBUF on port <ib(1)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ib(0)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ic(13)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ic(12)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ic(11)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ic(10)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ic(9)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ic(8)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ic(7)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ic(6)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ic(5)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ic(4)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ic(3)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ic(2)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ic(1)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <ic(0)> driven by black box <cmlt_11_2_6e7b989066784718>. Possible simulation mismatch. WARNING:Xst:2036 - Inserting OBUF on port <id_ref(13)> driven by black box <cmlt_11_2_1029404049440265>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <id_ref(12)> driven by black box <cmlt_11_2_1029404049440265>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <id_ref(11)> driven by black box <cmlt_11_2_1029404049440265>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <id_ref(10)> driven by black box <cmlt_11_2_1029404049440265>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <id_ref(9)> driven by black box <cmlt_11_2_1029404049440265>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <id_ref(8)> driven by black box <cmlt_11_2_1029404049440265>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <id_ref(7)> driven by black box <cmlt_11_2_1029404049440265>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <id_ref(6)> driven by black box <cmlt_11_2_1029404049440265>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <id_ref(5)> driven by black box <cmlt_11_2_1029404049440265>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <id_ref(4)> driven by black box <cmlt_11_2_1029404049440265>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <id_ref(3)> driven by black box <cmlt_11_2_1029404049440265>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <id_ref(2)> driven by black box <cmlt_11_2_1029404049440265>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <id_ref(1)> driven by black box <cmlt_11_2_1029404049440265>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <id_ref(0)> driven by black box <cmlt_11_2_1029404049440265>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <iq_ref(13)> driven by black box <cmlt_11_2_4af8ac614edb0db0>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <iq_ref(12)> driven by black box <cmlt_11_2_4af8ac614edb0db0>. Possible simulation mismatch. WARNING:Xst:2036 - Inserting OBUF on port <iq_ref(11)> driven by black box <cmlt_11_2_4af8ac614edb0db0>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <iq_ref(10)> driven by black box <cmlt_11_2_4af8ac614edb0db0>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <iq_ref(9)> driven by black box <cmlt_11_2_4af8ac614edb0db0>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <iq_ref(8)> driven by black box <cmlt_11_2_4af8ac614edb0db0>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <iq_ref(7)> driven by black box <cmlt_11_2_4af8ac614edb0db0>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <iq_ref(6)> driven by black box <cmlt_11_2_4af8ac614edb0db0>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <iq_ref(5)> driven by black box <cmlt_11_2_4af8ac614edb0db0>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <iq_ref(4)> driven by black box <cmlt_11_2_4af8ac614edb0db0>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <iq_ref(3)> driven by black box <cmlt_11_2_4af8ac614edb0db0>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <iq_ref(2)> driven by black box <cmlt_11_2_4af8ac614edb0db0>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <iq_ref(1)> driven by black box <cmlt_11_2_4af8ac614edb0db0>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <iq_ref(0)> driven by black box <cmlt_11_2_4af8ac614edb0db0>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <normal(13)> driven by black box <cmlt_11_2_ad64fb3a34f13a2e>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <normal(12)> driven by black box <cmlt_11_2_ad64fb3a34f13a2e>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <normal(11)> driven by black box <cmlt_11_2_ad64fb3a34f13a2e>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <normal(10)> driven by black box <cmlt_11_2_ad64fb3a34f13a2e>. Possible simulation mismatch. WARNING:Xst:2036 - Inserting OBUF on port <normal(9)> driven by black box <cmlt_11_2_ad64fb3a34f13a2e>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <normal(8)> driven by black box <cmlt_11_2_ad64fb3a34f13a2e>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <normal(7)> driven by black box <cmlt_11_2_ad64fb3a34f13a2e>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <normal(6)> driven by black box <cmlt_11_2_ad64fb3a34f13a2e>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <normal(5)> driven by black box <cmlt_11_2_ad64fb3a34f13a2e>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <normal(4)> driven by black box <cmlt_11_2_ad64fb3a34f13a2e>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <normal(3)> driven by black box <cmlt_11_2_ad64fb3a34f13a2e>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <normal(2)> driven by black box <cmlt_11_2_ad64fb3a34f13a2e>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <normal(1)> driven by black box <cmlt_11_2_ad64fb3a34f13a2e>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <normal(0)> driven by black box <cmlt_11_2_ad64fb3a34f13a2e>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <speed(13)> driven by black box <cmlt_11_2_60529fe33e9807f6>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <speed(12)> driven by black box <cmlt_11_2_60529fe33e9807f6>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <speed(11)> driven by black box <cmlt_11_2_60529fe33e9807f6>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <speed(10)> driven by black box <cmlt_11_2_60529fe33e9807f6>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <speed(9)> driven by black box <cmlt_11_2_60529fe33e9807f6>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <speed(8)> driven by black box <cmlt_11_2_60529fe33e9807f6>. Possible simulation mismatch. WARNING:Xst:2036 - Inserting OBUF on port <speed(7)> driven by black box <cmlt_11_2_60529fe33e9807f6>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <speed(6)> driven by black box <cmlt_11_2_60529fe33e9807f6>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <speed(5)> driven by black box <cmlt_11_2_60529fe33e9807f6>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <speed(4)> driven by black box <cmlt_11_2_60529fe33e9807f6>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <speed(3)> driven by black box <cmlt_11_2_60529fe33e9807f6>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <speed(2)> driven by black box <cmlt_11_2_60529fe33e9807f6>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <speed(1)> driven by black box <cmlt_11_2_60529fe33e9807f6>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <speed(0)> driven by black box <cmlt_11_2_60529fe33e9807f6>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <thrust(13)> driven by black box <cmlt_11_2_a910f6a2fda8130a>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <thrust(12)> driven by black box <cmlt_11_2_a910f6a2fda8130a>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <thrust(11)> driven by black box <cmlt_11_2_a910f6a2fda8130a>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <thrust(10)> driven by black box <cmlt_11_2_a910f6a2fda8130a>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <thrust(9)> driven by black box <cmlt_11_2_a910f6a2fda8130a>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <thrust(8)> driven by black box <cmlt_11_2_a910f6a2fda8130a>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <thrust(7)> driven by black box <cmlt_11_2_a910f6a2fda8130a>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <thrust(6)> driven by black box <cmlt_11_2_a910f6a2fda8130a>. Possible simulation mismatch. WARNING:Xst:2036 - Inserting OBUF on port <thrust(5)> driven by black box <cmlt_11_2_a910f6a2fda8130a>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <thrust(4)> driven by black box <cmlt_11_2_a910f6a2fda8130a>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <thrust(3)> driven by black box <cmlt_11_2_a910f6a2fda8130a>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <thrust(2)> driven by black box <cmlt_11_2_a910f6a2fda8130a>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <thrust(1)> driven by black box <cmlt_11_2_a910f6a2fda8130a>. Possible simulation mismatch.</p><p>WARNING:Xst:2036 - Inserting OBUF on port <thrust(0)> driven by black box <cmlt_11_2_a910f6a2fda8130a>. Possible simulation mismatch.</p><p>WARNING:Xst:1710 - FF/Latch <default_clock_driver_mas_x0/xlclockdriver_1/clr_reg/latency_gt_0.fd_array[1].reg_comp/fd_prim_arr ay[0].bit_is_0.fdre_comp> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[5].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[4].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[3].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[2].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[1].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[0].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>Annotating constraints using XCF file 'C:/Users/admin/Desktop/map/masbit/mas_cw.xcf'</p><p>XCF parsing done.</p><p>WARNING:Xst:2173 - Found black boxes on which forward tracing can not be performed on edge 'clk':</p><p> persistentdff_inst mas_x0/flux_control_unit1_3b150af683/counter/comp0.core_instance0 mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/mechanical_model_c c1bd59c80/r2s_1_2_76d16c6b2f/divide3/dvd_4_0_1cc2b7efae0f1659_instance mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/mechanical_model_c c1bd59c80/r2s_1_2_76d16c6b2f/divide2/dvd_4_0_1cc2b7efae0f1659_instance mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/mechanical_model_c c1bd59c80/r2s_1_2_76d16c6b2f/divide1/dvd_4_0_1cc2b7efae0f1659_instance mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/mechanical_model_c c1bd59c80/r2s_1_2_76d16c6b2f/divide4/dvd_4_0_1cc2b7efae0f1659_instance mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/subsystem_9a652c066b/rom_cos/comp0.core_instance0 mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/subsystem_9a652c066b/rom_sin/comp1.core_instance1 mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_trans form1_c00e970a06/sin_cos_3dd27a9558/subsystem_07085a3aad/rom_sin/comp1.core_instance1 mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_trans form1_c00e970a06/sin_cos_3dd27a9558/subsystem_07085a3aad/rom_cos/comp0.core_instance0 mas_x0/reference_torque_0a4273da32/counter1/comp0.core_instance0 mas_x0/reference_torque_0a4273da32/counter/comp0.core_instance0 mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3b/ sin_cos_8eaaf8b6cd/subsystem_4673c3f4d3/rom_sin/comp1.core_instance1 mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3b/ sin_cos_8eaaf8b6cd/subsystem_4673c3f4d3/rom_cos/comp0.core_instance0 mas_x0/speed_control_unit_6003cc59fe/counter/comp0.core_instance0</p><p>WARNING:Xst:2174 - These might be cores which have not been read</p><p>Building and optimizing final netlist ...</p><p>Found area constraint ratio of 100 (+ 5) on block mas_cw, actual ratio is 0.</p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[28].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[28].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[28].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[29].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[29].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[29].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[5].fde_used.u2> in Unit <mas_cw> is equivalent to the following 5 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[4].fde_used.u2> <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[3].fde_used.u2></p><p><mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[2].fde_used.u2> <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[1].fde_used.u2> <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[0].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[0].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[0].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[0].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[1].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[1].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[1].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[2].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[2].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[2].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[3].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[3].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[3].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[4].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[4].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[4].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[5].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[5].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[5].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[6].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[6].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[6].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[7].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[7].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[7].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[8].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[8].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[8].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[9].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[9].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[9].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[10].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[10].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[10].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[11].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[11].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[11].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[12].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[12].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[12].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[13].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[13].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[13].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[14].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[14].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[14].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[20].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[20].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[20].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[15].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[15].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[15].fde_used.u2> INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[21].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[21].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[21].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[16].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[16].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[16].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[22].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[22].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[22].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[17].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[17].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[17].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[23].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[23].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[23].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[18].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[18].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[18].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[24].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[24].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[24].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[19].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[19].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[19].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[30].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[30].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[30].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[25].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[25].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[25].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[31].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[31].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[31].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[26].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[26].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[26].fde_used.u2> </p><p>INFO:Xst:2260 - The FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[27].fde_used.u2> in Unit <mas_cw> is equivalent to the following 2 FFs/Latches : <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/dq_to_3_phase_tra nsform1_c00e970a06/sin_cos_3dd27a9558/accumulator_3a7e22bc7b/delay/srl_delay.synth_reg_srl_in st/partial_one.last_srl17e/reg_array[27].fde_used.u2> <mas_x0/rotor_flux_oriented_control_structure_d176305a68/dq_to_3_phase_transform1_cb7e5b1e3 b/sin_cos_8eaaf8b6cd/accumulator_164759ecd4/delay/srl_delay.synth_reg_srl_inst/partial_one.last_sr l17e/reg_array[27].fde_used.u2> </p><p>WARNING:Xst:1710 - FF/Latch <default_clock_driver_mas_x0/xlclockdriver_1/clr_reg/latency_gt_0.fd_array[1].reg_comp/fd_prim_arr ay[0].bit_is_0.fdre_comp> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[5].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[4].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process. WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[3].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[2].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[1].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[0].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <default_clock_driver_mas_x0/xlclockdriver_1/clr_reg/latency_gt_0.fd_array[1].reg_comp/fd_prim_arr ay[0].bit_is_0.fdre_comp> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[5].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[4].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[3].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[2].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[1].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[0].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <default_clock_driver_mas_x0/xlclockdriver_1/clr_reg/latency_gt_0.fd_array[1].reg_comp/fd_prim_arr ay[0].bit_is_0.fdre_comp> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[5].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[4].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[3].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process. WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[2].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[1].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[0].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>Final Macro Processing ...</p><p>======</p><p>Final Register Report</p><p>Macro Statistics</p><p># Registers : 471</p><p>Flip-Flops : 471</p><p>======</p><p>WARNING:Xst:1710 - FF/Latch <default_clock_driver_mas_x0/xlclockdriver_1/clr_reg/latency_gt_0.fd_array[1].reg_comp/fd_prim_arr ay[0].bit_is_0.fdre_comp> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[5].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[4].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[3].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[2].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[1].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[0].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <default_clock_driver_mas_x0/xlclockdriver_1/clr_reg/latency_gt_0.fd_array[1].reg_comp/fd_prim_arr ay[0].bit_is_0.fdre_comp> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[5].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process. WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[4].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[3].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[2].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[1].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>WARNING:Xst:1710 - FF/Latch <mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay1/srl_delay.synth_reg_srl_inst/ partial_one.last_srl17e/reg_array[0].fde_used.u2> (without init value) has a constant value of 0 in block <mas_cw>. This FF/Latch will be trimmed during the optimization process.</p><p>======</p><p>* Partition Report *</p><p>======</p><p>Partition Implementation Status</p><p>------No Partitions were found in this design.</p><p>------</p><p>======</p><p>* Design Summary *</p><p>======</p><p>Top Level Output File Name : mas_cw.ngc</p><p>Primitive and Black Box Usage:</p><p>------</p><p># BELS : 595</p><p># GND : 1</p><p># INV : 2</p><p># LUT1 : 4</p><p># LUT2 : 57</p><p># LUT3 : 2</p><p># LUT4 : 151</p><p># LUT5 : 124</p><p># LUT6 : 36</p><p># MUXCY : 167</p><p># VCC : 1</p><p># XORCY : 50</p><p># FlipFlops/Latches : 471 # FDE : 470</p><p># FDRE : 1</p><p># Clock Buffers : 1</p><p># BUFGP : 1</p><p># IO Buffers : 126</p><p># OBUF : 126</p><p># DSPs : 14</p><p># DSP48E1 : 14</p><p># Others : 167</p><p># addsb_11_0_12cafd628eabec2e : 3</p><p># addsb_11_0_16ed126b9432f966 : 1</p><p># addsb_11_0_1e0050c132159f46 : 1</p><p># addsb_11_0_20f59c924e684f65 : 1</p><p># addsb_11_0_2184da4f73658baf : 7</p><p># addsb_11_0_4c11e627a14cfcc4 : 1</p><p># addsb_11_0_52eec8816b3d07d3 : 1</p><p># addsb_11_0_5ee0d098007a1b66 : 1</p><p># addsb_11_0_656d04967a49ee54 : 5</p><p># addsb_11_0_77b30ee23c108b1c : 2</p><p># addsb_11_0_78cf8cbd27fbc6a3 : 4</p><p># addsb_11_0_7b6b6d1b3efcd120 : 1</p><p># addsb_11_0_7baf43f5d46f2efd : 1</p><p># addsb_11_0_7d01a5b4a6e889d5 : 3</p><p># addsb_11_0_872d3722f6aa5986 : 1</p><p># addsb_11_0_9384899f97c5907f : 1 # addsb_11_0_97454a187aa26b59 : 2</p><p># addsb_11_0_9f0b008074cbd983 : 8</p><p># addsb_11_0_af6b5da6dbbc120b : 3</p><p># addsb_11_0_b8b6601a380b9153 : 2</p><p># addsb_11_0_ba616ce80205da8e : 1</p><p># addsb_11_0_d233efc3f69384da : 3</p><p># addsb_11_0_e8c1ba21b313f251 : 1</p><p># addsb_11_0_f49d9cea35751c72 : 3</p><p># bmg_72_0de05196f3843ae4 : 3</p><p># bmg_72_890d12da6c3a372e : 3</p><p># cmlt_11_2_00940c83ede01534 : 1</p><p># cmlt_11_2_029410d730aef3c6 : 1</p><p># cmlt_11_2_049d91e8686bd2db : 3</p><p># cmlt_11_2_077728a89cbfeb6d : 2</p><p># cmlt_11_2_0a78d26987d5e79b : 1</p><p># cmlt_11_2_1029404049440265 : 3</p><p># cmlt_11_2_1322aa4468f252d0 : 3</p><p># cmlt_11_2_13cb1fe83f6719af : 1</p><p># cmlt_11_2_14cba680b6143225 : 1</p><p># cmlt_11_2_16833ca38057a335 : 1</p><p># cmlt_11_2_2650ef2e23192fd1 : 1</p><p># cmlt_11_2_287cfc82d0a194a1 : 1</p><p># cmlt_11_2_30f8ec8dfd7f8ed2 : 1</p><p># cmlt_11_2_33d444a49cc98bbc : 2</p><p># cmlt_11_2_35f296ece0a9a6e7 : 1 # cmlt_11_2_3e26ad3f166f5a05 : 1</p><p># cmlt_11_2_3e63237a5cd93bb8 : 1</p><p># cmlt_11_2_3ec88f51016c09d9 : 2</p><p># cmlt_11_2_459de2f2aaf2af91 : 1</p><p># cmlt_11_2_4af8ac614edb0db0 : 1</p><p># cmlt_11_2_4d19018b3c39239e : 1</p><p># cmlt_11_2_4dcdcdfd0b028d3b : 3</p><p># cmlt_11_2_5b85ee661d59a06a : 2</p><p># cmlt_11_2_60529fe33e9807f6 : 1</p><p># cmlt_11_2_66d7ec4f1062986c : 2</p><p># cmlt_11_2_6e7b989066784718 : 3</p><p># cmlt_11_2_8153107f81f163c5 : 1</p><p># cmlt_11_2_855fc87d891b1c0f : 2</p><p># cmlt_11_2_85f2ddc5a9b50dfe : 1</p><p># cmlt_11_2_8772ad679ba8df4b : 2</p><p># cmlt_11_2_884930e4bebbd5b6 : 1</p><p># cmlt_11_2_8f687fd98108bd9e : 1</p><p># cmlt_11_2_92b3a38bd336f036 : 3</p><p># cmlt_11_2_992d02a5d9cbaf76 : 1</p><p># cmlt_11_2_99587795c33c8b08 : 1</p><p># cmlt_11_2_996fdd58b0411a2b : 1</p><p># cmlt_11_2_9f263efbda8fb0e9 : 1</p><p># cmlt_11_2_a910f6a2fda8130a : 1</p><p># cmlt_11_2_ad64fb3a34f13a2e : 1</p><p># cmlt_11_2_afed6c2e98e9db95 : 1 # cmlt_11_2_b15d6089faabfeb6 : 1</p><p># cmlt_11_2_b8f0ba24732880a2 : 1</p><p># cmlt_11_2_c1042e6cbf52704f : 1</p><p># cmlt_11_2_c1a452200a369f05 : 1</p><p># cmlt_11_2_c473908a1008a362 : 1</p><p># cmlt_11_2_ce4fb6f0c1404e84 : 1</p><p># cmlt_11_2_df1f89bf2e1d9b34 : 1</p><p># cmlt_11_2_e39bf5f892b9d2bb : 1</p><p># cmlt_11_2_e660458fe81f5d55 : 1</p><p># cmlt_11_2_e9ca31a3eb8f57dd : 1</p><p># cmlt_11_2_ec86768b7e117459 : 1</p><p># cmlt_11_2_efa413f2be52c767 : 2</p><p># cntr_11_0_761b5b8e2cd8f1c2 : 4</p><p># dvd_4_0_1cc2b7efae0f1659 : 4</p><p># mult_11_2_0d9df47653e8136c : 2</p><p># mult_11_2_0e1566528d2aabad : 1</p><p># mult_11_2_1cb5ed593dd6a805 : 6</p><p># mult_11_2_3e45894281c05d4b : 2</p><p># mult_11_2_46d1845c61547cd1 : 2</p><p># mult_11_2_65354ed2a4562c5c : 2</p><p># mult_11_2_6d75902f305ef739 : 2</p><p># mult_11_2_8a7e2cb341e8d802 : 1</p><p># mult_11_2_920f82b2d5199557 : 1</p><p># mult_11_2_9565c340740bf724 : 1</p><p># mult_11_2_b540eb527c25496d : 2 # TIMESPEC : 1</p><p># xlpersistentdff : 1</p><p>Device utilization summary:</p><p>------</p><p>Selected Device : 7vx485tffg1761-2 </p><p>Slice Logic Utilization: </p><p>Number of Slice Registers: 471 out of 607200 0% </p><p>Number of Slice LUTs: 376 out of 303600 0% </p><p>Number used as Logic: 376 out of 303600 0% </p><p>Slice Logic Distribution: </p><p>Number of LUT Flip Flop pairs used: 752</p><p>Number with an unused Flip Flop: 281 out of 752 37% </p><p>Number with an unused LUT: 376 out of 752 50% </p><p>Number of fully used LUT-FF pairs: 95 out of 752 12% </p><p>Number of unique control sets: 2</p><p>IO Utilization: </p><p>Number of IOs: 128</p><p>Number of bonded IOBs: 127 out of 700 18% Specific Feature Utilization:</p><p>Number of BUFG/BUFGCTRLs: 1 out of 32 3% </p><p>Number of DSP48E1s: 14 out of 2800 0% </p><p>------</p><p>Partition Resource Summary:</p><p>------</p><p>No Partitions were found in this design.</p><p>------</p><p>======</p><p>Timing Report</p><p>NOTE: THESE TIMING NUMBERS ARE ONLY A SYNTHESIS ESTIMATE.</p><p>FOR ACCURATE TIMING INFORMATION PLEASE REFER TO THE TRACE REPORT</p><p>GENERATED AFTER PLACE-and-ROUTE.</p><p>Clock Information:</p><p>------</p><p>------+------+------+</p><p>Clock Signal | Clock buffer(FF name) | Load |</p><p>------+------+------+ clk | BUFGP | 471 |</p><p>------+------+------+</p><p>Asynchronous Control Signals Information:</p><p>------</p><p>No asynchronous control signals found in this design</p><p>Timing Summary:</p><p>------</p><p>Speed Grade: -2</p><p>Minimum period: 0.587ns (Maximum Frequency: 1703.433MHz)</p><p>Minimum input arrival time before clock: 2.411ns</p><p>Maximum output required time after clock: 0.587ns</p><p>Maximum combinational path delay: 8.475ns</p><p>======</p><p>Timing constraint: TS_clk_80753db4 = PERIOD TIMEGRP "clk_80753db4" 100 nS HIGH 50 nS</p><p>Clock period: 0.587ns (frequency: 1703.432MHz)</p><p>Total number of paths / destination ports: 96 / 96</p><p>Number of failed paths / ports: 0 (0.00%) / 0 (0.00%)</p><p>------</p><p>Slack: 99.413ns</p><p>Source: mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/integrator_ed1326b2 63/delay/srl_delay.synth_reg_srl_inst/partial_one.last_srl17e/reg_array[0].fde_used.u2 (FF) Destination: mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[0].fde_used.u2 (FF)</p><p>Data Path Delay: 0.587ns (Levels of Logic = 0)</p><p>Source Clock: clk rising at 0.000ns</p><p>Destination Clock: clk rising at 100.000ns</p><p>Data Path: mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/integrator_ed1326b2 63/delay/srl_delay.synth_reg_srl_inst/partial_one.last_srl17e/reg_array[0].fde_used.u2 (FF) to mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[0].fde_used.u2 (FF)</p><p>Gate Net</p><p>Cell:in->out fanout Delay Delay Logical Name (Net Name)</p><p>------</p><p>FDE:C->Q 3 0.236 0.351 mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/integrator_ed1326b2 63/delay/srl_delay.synth_reg_srl_inst/partial_one.last_srl17e/reg_array[0].fde_used.u2 (mas_x0/delay_q_net_x19(0))</p><p>FDE:D -0.000 mas_x0/linear_induction_machine_model_without_the_end_effect_e87e9be879/x3_phase_to_dq_tra nsform_9ef544f709/sin_cos_a4ff007f0d/accumulator_a1fac56952/delay/srl_delay.synth_reg_srl_inst/p artial_one.last_srl17e/reg_array[0].fde_used.u2</p><p>------</p><p>Total 0.587ns (0.236ns logic, 0.351ns route)</p><p>(40.2% logic, 59.8% route)</p><p>======Cross Clock Domains Report:</p><p>------</p><p>Clock to Setup on destination clock clk</p><p>------+------+------+------+------+</p><p>| Src:Rise| Src:Fall| Src:Rise| Src:Fall|</p><p>Source Clock |Dest:Rise|Dest:Rise|Dest:Fall|Dest:Fall|</p><p>------+------+------+------+------+ clk | 0.587| | | |</p><p>------+------+------+------+------+</p><p>======</p><p>Total REAL time to Xst completion: 17.00 secs</p><p>Total CPU time to Xst completion: 17.03 secs</p><p>--> </p><p>Total memory usage is 494396 kilobytes</p><p>Number of errors : 0 ( 0 filtered)</p><p>Number of warnings : 1435 ( 0 filtered)</p><p>Number of infos : 93 ( 0 filtered) </p>