A LOW-DISTORTION CLASS-AB AUDIO AMPLIFIER WITH HIGH POWER EFFICIENCY BY CHAITANYA MOHAN, B.Tech A thesis submitted to the Graduate School in partial fulfillment of the requirements for the degree Master of Sciences, Engineering Specialization in: Electrical Engineering New Mexico State University Las Cruces, New Mexico March 2011 \A Low-Distortion Class-AB Audio Amplifier with High Power Efficiency," a the- sis prepared by Chaitanya Mohan in partial fulfillment of the requirements for the degree, Master of Sciences has been approved and accepted by the following: Linda Lacey Dean of the Graduate School Dr. Paul M. Furth Chair of the Examining Committee Date Committee in charge: Dr. Paul M. Furth Dr. Jaime Ramirez-Angulo Dr. Jeffrey Beasley ii DEDICATION Dedicated to my father Chandolu Rama Mohan Rao, mother Chandolu Hemalatha, sister Srujana Mohan Rao. iii ACKNOWLEDGMENTS First I would like to thank my parents Chandolu Rama Mohan Rao and Chandolu Hemalatha, sister Srujana Mohan Rao and brother-in-law DeepakNadh Tammana for supporting me at every level of my life. They are the reason behind my success at every corner in the journey of life. Srujana has been more of a friend, guide and advisor than a sister. Dr. Paul M. Furth, the coach of VLSI V6 team is man behind the success of this thesis. I can proudly say, the knowledge I acquired from him in Electronics is more than what I have earned in my entire bachelors. The approach towards every problem and level of analyzing things before hand is what I would like to get from him. I would also like to thank Dr. Jaime Ramirez-Angulo for imparting knowl- edge on analog concepts. A special note of thanks to my childhood friend Hareesh Gottipati (Nani), Vidhul Dev and Arka who are more than just friends. I still remember the fights we had on every other day on almost every topic. The topics included more of politics, movies, places and almost every current situation, but the discussion never involved studies. Swetha Peri is one other person in my life who is more than a friend. She had the patience to hear everything and take any situation casually with a calm iv mind. I would like to thank Swetha for being such a great friend and who always supported my every decision. A thanks is just not enough for Harish Valapala. I cannot forget the help that I got from him, every time when I was supposed to meet the deadline. I would also like to thank Alex from math department for giving an op- portunity to work as a math tutor in the final semester. He has been very humble during my defense and allowed me to work based on my availability, which was very helpful Finally I would like to thank all my friends and roommates: Sravan (Buggi), Varun (Jaffa), Lalith (Makku bro), Venu, Madhusudhan Nagireddy (Madhu), Suresh (Debri), Nikhilesh (Hadavidi) and especially the V6 group Punith (the buss), Rajesh, Ramesh, Venkat and Harish. v VITA December 17, 1986 Born in Hyderabad, India. Education 2004 - 2008 B.Tech. Electronics and Communication Engineering, Jawaharlal Nehru Technological University, India 2009 - 2010 Teaching Assistant, New Mexico State University,USA Since 2008 M.S in Electrical Engineering, New Mexico State University, USA Awards and Achievments 2008 - 2011 In-State Tuition, NMSU,USA. March - 2011 Third place in Graduate Research and Arts Symposium, NMSU, USA. Field of Study Major Field: Electrical Engineering (Analog Microelectronics/VLSI Design) vi ABSTRACT A LOW-DISTORTION CLASS-AB AUDIO AMPLIFIER WITH HIGH POWER EFFICIENCY BY CHAITANYA MOHAN, B.Tech Master of Sciences, Engineering Specialization in Electrical Engineering New Mexico State University Las Cruces, New Mexico, 2011 Dr. Paul M. Furth, Chair Place: Thomas & Brown Room-207 Date: 03/17/2011 Time: 2:00 PM A low-distortion three-stage Class-AB audio amplifier is designed to drive a 16-Ω headphone speaker. High power efficiency in the design was achieved by using fully-differential internal stages with local common-mode feedback networks and replica biasing of the output stage. The threshold voltage of NMOS transistors were made comparable to PMOS transistors by biasing the p-substrate in order to achieve high linearity. The stability of the amplifier is achieved using multiple compensation techniques. The audio amplifier is designed to drive widely varying capacitive loads from 10 pF to 5 nF. The peak power delivered to the load is vii 93.8mW. The quiescent power of the amplifier is 1.43mW. The output signal swing is 2.45Vpp for ±1.5V supply. The THD of the amplifier is measured as - 79dB. The design has been implemented in a 0.5µm CMOS process and occupies 0.35 mm2 of area. viii TABLE OF CONTENTS LIST OF TABLES xii LIST OF FIGURES xiii 1 INTRODUCTION 1 2 BASE FOR AUDIO AMPLIFIERS 4 2.1 Audio Amplifier Specifications . .4 2.1.1 Headphone Speaker Load . .5 2.1.2 Total Harmonic Distortion in an Amplifier . .5 2.1.3 Power Efficiency of an Amplifier . .6 2.2 Output Stage Classification . .7 2.2.1 Class-A Amplifiers . .7 2.2.2 Class-D Amplifier . .9 2.2.3 Class-AB Amplifier . .9 2.3 Multi-Stage Amplifiers . 11 2.3.1 Pseudo Class-AB Amplifier . 11 2.3.2 True Class-AB Amplifier . 13 2.4 Common-Mode Feedback Network . 14 2.5 Compensation . 15 2.5.1 Miller Compensation . 16 ix 2.5.2 Reverse-Nested Miller Compensation . 17 2.6 Three-Stage Class-AB Amplifier from [1] . 18 2.6.1 Design from [1] . 18 2.6.2 Experimental Results from [1] . 19 2.7 Replica Biasing . 20 3 DESIGN OF THE THREE-STAGE CLASS-AB AUDIO AMPLI- FIER 23 3.1 Architecture and Key Aspects of the Audio Amplifier . 23 3.2 Transistor Level Three-Stage Design . 25 3.3 Bias circuit . 25 3.4 Input-Stage . 29 3.5 Second-Stage . 30 3.5.1 PMOS differential amplifier . 31 3.5.2 NMOS differential amplifier . 32 3.6 Output-Stage . 33 3.7 Compensation used in the Design . 35 3.8 Small-Signal Models . 36 3.9 Pole-Zero Analysis . 40 4 SIMULATION RESULTS 43 4.1 DC analysis . 44 4.2 AC analysis . 44 4.3 Transient analysis . 48 4.4 THD analysis . 51 5 HARDWARE TESTING 54 x 5.1 Layout . 54 5.2 Experimental Setup . 54 5.3 DC Measurements . 56 5.4 Transient Measurements . 57 5.5 THD Measurements . 58 6 DISCUSSION AND CONCLUSION 69 APPENDICES 74 A. HARDWARE TEST PROCEDURE 75 B. POLE/ZERO ANALYSIS USING MAPLE 85 C. MATLAB CODE TO PLOT WAVEFORMS 88 REFERENCES 95 xi LIST OF TABLES 2.1 Comparison of measured results . 20 3.1 Transistor Dimensions . 26 3.2 Poles and Zeros . 42 4.1 Design Parameters . 43 4.2 AC Simulation Results . 46 4.3 Transient Simulation Results . 52 5.1 Hardware Measurements . 68 6.1 Summary of Hardware Test Results . 69 6.2 Comparison of results with state-of-the-art ([1]) . 70 6.3 Simulation vs Hardware (LIQ) . 71 6.4 Simulation vs Hardware (LTHD) . 72 6.5 Simulation vs Hardware (MIQ) . 72 6.6 Simulation vs Hardware (HCL) . 73 xii LIST OF FIGURES 2.1 Schematic of a Class-A amplifier . .7 2.2 Basic design of a Class-D amplifier . .9 2.3 Schematic of a Class-AB amplifier . 10 2.4 Schematic of a three-stage pseudo class-AB amplifier . 12 2.5 Schematic of a three-stage true class-AB amplifier . 13 2.6 Schematic of a fully-differential amplifier with common-mode feed- back network . 15 2.7 Architecture of Miller compensation for two-stage amplifier . 16 2.8 Architecture of Reverse-Nested Miller compensation for three-stage amplifier . 17 2.9 Architecture of the three-stage class-AB amplifier of [1] . 19 2.10 (a) Schematic of two-stage pseudo class-AB amplifier (b) Replica bias circuit to control quiescent at the output stage . 21 3.1 Architecture of the proposed three-stage class-AB amplifier . 24 3.2 Schematic of the three-stage class-AB audio amplifier . 27 3.3 Schematic of the bias circuit . 28 3.4 Schematic of the first-stage . 30 3.5 Schematic of the second-stage PMOS differential amplifier . 31 3.6 Schematic of the second-stage NMOS differential amplifier . 32 3.7 Schematic of the output-stage . 34 xiii 3.8 (a) Left-half of the input-stage (b) small-signal model for left half. 36 3.9 (a) Right-half of the input-stage (b) small-signal model for right-half. 37 3.10 (a) PMOS differential amplifier (b) small-signal model PMOS dif- ferential amplifier. 38 3.11 (a) NMOS differential amplifier (b) small-signal model NMOS dif- ferential amplifier. 39 3.12 (a) Schematic of output-stage (b) small-signal model for output-stage 40 3.13 Small-signal model of the designed three-stage class-AB audio am- plifier . 41 4.1 Schematic of the DC test-bench . 44 4.2 DC-analysis output . 45 4.3 Schematic of the AC test-bench . 46 4.4 AC output of LIQ circuit . 47 4.5 AC output of LTHD circuit . 47 4.6 AC output of MIQ design . 48 4.7 AC output of HCL circuit . 49 4.8 Schematic of the Transient test-bench . 49 4.9 Transient output of LIQ circuit . 50 4.10 Transient output of LTHD circuit . 50 4.11 Transient output of MIQ circuit . 51 4.12 Transient output of HCL circuit . 52 4.13 Schematic for THD measurement .