& ETCHING Electroplating May 2015 PLATING 22 Through-Holes with Different Geometry: A Novel and High-Productivity Process ENEPIG: 44 The Plating Process May 2015 • The PCB Magazine 1 13th ANNUAL MEPTEC MEMS TECHNOLOGY SYMPOSIUM Enabling the Internet of Things: Foundations of MEMS Process, Design, Packaging & Test MEMS based products are key en- ablers in the Internet of Things (IoT) Wednesday, May 20, 2015 revolution. The availability of large numbers of reliable and cost-effec- Holiday Inn San Jose Airport • San Jose, California tive MEMS sensors and actuators KEYNOTE SPEAKER has driven an explosion in the num- DIAMOND SPONSOR ber of IoT applications to reach the Creating a Trillion Sensors Based Future market. The Internet of Things is Dr. Janusz Bryzek pushing MEMS technology to new Chair, TSensors Summits levels of performance and bringing forth new requirements. Sensors are one of the eight exponential technologies enabling growth of goods and services faster than This event will showcase advances growth of demand for them. Exponential technologies enable Exponen- in core technologies that form the tial Organizations (ExO), which demonstrate sales growth to a billion SILVER SPONSOR foundation of the creation of MEMS- dollars in one to three years. New Exponential organizations are expected based products. Experts from the to replace 40% of Fortune 500 companies in the coming decade, in a field will present the latest innova- similar mode to Kodak replacement by Instagram in 2012. Presented will tions in MEMS fabrication processes, an amazing showcase of available sensor based products. packaging, assembly, & test. Insight will be provided as to new technolo- EXHIBITING COMPANIES TO DATE gies, materials and software that will fuel the creation of new devices cou- pled with traditional MEMS technol- ogies to address new markets and new requirements for the Internet of Things. We explore how the four foundations of MEMS technologies are expanding to include such excit- ing new techniques as 3D printing, flexible electronics and novel mate- rials. We hope you will join us to learn from experts about practical, com- mercial and significant technology advances in MEMS Test, Design, Pro- cess and Packaging, each driving key MEMS enabled products. Come hear about the technologies that form the “Sensory System” at the heart of the Internet of Things – it’s not just about the network! Symposium Committee ASSOCIATION SPONSORS SUPPORTING SPONSOR •Gene Burk, IMT •Sean Cahill, Maxim Integrated •MaryAnn Maher, SoftMEMS •Ramesh Ramadoss, Microprobe REGISTER ONLINE TODAY AT MEPTEC.ORG May Featured Content PLATING & ETCHING This month, features from Michael Carano (RBP Chemical Technology), a team from Dow Chemicals Company, and George Milad (Uyemura) share their perspectives on plating and etching issues. 8 Optimization of Acid Copper 22 Electroplating Through-Holes Electrodeposition Processes for with Different Geometry: High-Throwing Power DC Plating A Novel and High-Productivity by Michael Carano Process by Elie Najjar, Leon Barstad, Jayaraju Nagarajan, Marc Lin, Maria Rzeznik and Mark Lefebvre 44 ENEPIG: The Plating Process by George Milad 4 The PCB Magazine • May 2015 C MAY 2015 ONT VOLUME 5 NUMBER 5 THE DEFINITIVE E INTERACTIVE MAGAZINE NTS DEDICATED TO THE GLOBAL PCB INDUSTRY thepcbmagazine.com INTERVIEWS VIDEO INTERVIEWS 50 NEW Multi-Part Interview! 20 ENIG & ENEPIG IPC Standards Update A Conversation (and Day) with Joe Fjelstad 54 The Importance of Harmonized Standards that Benefit All Pete Starkey Interviews Amphenol’s Sean Keating 60 Five Keys for Success in PCB Manufacturing COLUMNS 56 Best Practices 101: Part 7 by Steve Williams NEWS HIGHLIGHTS 42 Market 52 Supplier/New Product 64 Quick-Turn Circuit Board Shops by Karl Dietz 62 Mil/Aero007 70 Top Ten PCB007 Highlights EXTRAS 72 Events Calendar 73 Advertisers Index & Masthead 6 The PCB Magazine • May 2015 FEATURE Optimization of Acid Copper Electrodeposition Processes for High-Throwing Power DC Plating by Michael Carano quantify the capability of a fabricator to prof- RBP CHEMICAL TECHNOLOGY itably produce traditional boards. The ability to image conductor lines, and perhaps even more important, the insulating airspace be- Introduction tween them, is considered a key characteristic. Perhaps one of the three most fundamen- With surface mount components, a dramatic tal aspects of printed circuit fabrication is the decrease in plated via hole diameter require- metallization and electroplating of through- ments occurred, and as a result, via holes have hole vias and blind via interconnections. Ide- become simple vertical interconnections. Now, ally, one should also include fine-line imaging under competition from laser drilling, both of increasingly smaller feature sizes and via for- drill bit and machine technology have driven mation, whether by mechanical or laser meth- mechanical holes capability much smaller. ods. Indeed, the foundation of technology In the most recent release of the IPC Tech- roadmaps should, at the very least, encompass nology Roadmap, PTH and blind via diameters a discussion of line widths and spaces, PTH and aspect ratios have been defined as to the and blind via aspect ratios, and a metric that technology sector where the boards are used. In defines acceptability of plating uniformity and order to provide a list of key attributes (layer throwing power. These same parameters have counts, board thickness, number and diam- been used for nearly four decades to quickly eters of vias, etc.) for the PCB, emulators are 8 The PCB Magazine • May 2015 FEATURE OPTIMIZation OF ACID COPPER ELECTRODEPOSITION PROCESSES continues employed. Emulators (synthetic) are representa- For purposes of this paper, throwing power tions of a category of product, combining the at- is defined as the minimum electroplated thick- tributes common to the type to avoid concerns ness in the center of the PTH, divided by the about disclosure of specific company-proprietary thickness on the PTH surface (excluding copper designs. Technologists from around the world were asked to provide their respective view of the PCB technology required for the emulator. This exercise is critical in developing and un- derstanding roadmaps. As an example, Table 1 below lists the minimum mechanical via hole sizes for the various emulators. Table 2 depicts the maximum aspect ratio of mechanically drilled plated through-holes for the respective emulators. The Challenge It is quite clear from the two tables that there are rather high-aspect ratio vias that must be plated. It is understood that it is desirable to achieve as close to 100% throwing power as possible. At a minimum, market surveys have shown that for reliability, productivity, and performance purposes, a minimum of 80-85% throwing power is required. Further, process engineers desire to minimize plating on the conductor traces in order to minimize under- Figure 1: Throwing power: 1.0 mil minimum hole cut and circuit width destruction due to final thickness and 1.3 mil surface thickness. Throwing etching. power is 1.0/1.3 mil, or 77%. Table 1: Minimum hole diameter for mechanically drilled vias (mm, rounded to whole number). (Source: IPC Technology Roadmap, 2015) 10 The PCB Magazine • May 2015 FEATURE OPTIMIZation OF ACID COPPER ELECTRODEPOSITION PROCESSES continues foil). Figure 1 illustrates the definition of throw- K = Solution resistance ing power. d = Hole diameter While in Figure 1 the throwing power L = Length of hole is 77%, one would prefer throwing power of 100%. Electroplating of high-aspect ratio It is important to keep this in mind when through-holes becomes increasingly more dif- designing plating processes for high-aspect ratio ficult as via diameters decrease and board thick- circuit boards. As circuit boards become more nesses increase. Figure 1 depicts a condition complex in their designs, more attention must aptly named “dog-boning” for its thinness in be paid to plating cell design, plating chemistry, the center of the via. anodes and plating racks, electrical connections The following equation illustrates a model and solution agitation. This paper will also pres- that provides insight into the difficulty factor ent various techniques on improving and en- encountered when aspect ratios increase. It is hancing throwing power for high-aspect ratio not as simple as it looks. As the model illustrates, plated through-holes, with a focus on direct board thickness has a much greater influence current (DC) plating. on degree of difficulty than does via diameter. Essentially, board thickness directly influences Acid Copper Electroplating: ohmic resistance through the via. Resistance is Theoretical Aspects inversely proportional to plating propagation. In order to enhance plating uniformity (defined not only as plating thickness across the PCB surface but in the via as well), en- gineers should understand that there are several factors that influence plating unifor- mity. The Fishbone diagram below details in concise fashion those parameters that influ- Where: ence throwing power, plating distribution E = Voltage drop down hole (energy lost) and overall quality of the finished printed cir- J = Cathode current density cuit board. Table 2: Aspect ratio, mechanically drilled hole via (max ratio). May 2015 • The PCB Magazine 11 FEATURE OPTIMIZATION OF ACID COPPER ELECTRODEPOSITION PROCESSES continues Figure 2: These factors and their influence on plating distribution will be presented throughout this paper. Acid Copper Electroplating for
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