UNIVERSITY OF CINCINNATI DATE: 7th March, 2002 I, Prashant R. Bhadri , hereby submit this as part of the requirements for the degree of: Master of Science in: Electrical Engineering It is entitled: Implementation of a Silicon Control Chip for Si/SiC Hybrid Optically Activated High Power Switching Device Approved by: Dr Fred Beyette Jr. Dr Harold W Carter Dr Marc Cahay Implementation of a Silicon Control Chip for a Si/SiC Hybrid Optically Activated High Power Switching Device A thesis submitted to the Division of Graduate Studies and Research of the University of Cincinnati in partial fulfillment of the requirements for the degree of MASTER OF SCIENCE in the Department of Electrical & Computer Engineering and Computer Science of the College of Engineering March 2002 By Prashant R. Bhadri B.S., (ECE), Birla Institute of Technology, Ranchi, India, 1999 Thesis Advisor and Committee Chair: Dr. Fred R. Beyette Jr. IMPLEMENTATION OF SILICON CONTROL CHIP FOR A SI/SIC HYBRID OPTICALLY ACTIVATED HIGH POWER SWITCHING DEVICE Prashant R. Bhadri ABSTRACT In avionic systems, data integrity and high data rates are necessary for stable flight control. Unfortunately, conventional electronic control systems are susceptible to electromagnetic interference (EMI) that can reduce the clarity of flight control signals. Fly-by-Light systems that use optical signals to actuate the flight control surfaces of an aircraft have been suggested as a solution to the EMI problem in avionic systems. Fly- by-Light in avionic systems reduces electromagnetic interference hence improving the clarity of the control signals. Fly-by-Light technology development involves creation of building blocks like computers, fiber optic sensors and interfaces, fiber actuator loops, an integrated system etc. The development of this technology exploits fiber optic sensor and control technology. This thesis demonstrates a hybrid approach that combines a smart silicon photoreceiver module with a SiC power transistor. The resulting device uses a 5mW optical control signal to produce a 150A current that is suitable for driving an electric motor. This is the first attempt to integrate silicon carbide devices with a smart silicon chip. The first part of the thesis deals with the various high power technologies that are in use today. Different approaches are discussed and emphasis is stressed on the silicon/silicon i carbide hybrid design. Briefly discussed is the use of silicon carbide for optical switching application. Second part of the thesis involves the design, simulation and analysis of the silicon smart chip. Individual components of the smart silicon are characterized and results shown. Finally, we report the performance evaluation of this smart silicon realized in a 1.5 micron CMOS process using MOSIS1 foundry service. 1 MOSIS http://www.mosis.org ii iii ACKNOWLEDGEMENTS I wish to express my heartfelt gratitude to Dr. Fred Beyette Jr. for his guidance and for providing me funds to work on this project. I feel happy and was gifted to be blessed with his guidance, which was based on thorough knowledge. Deep appreciation goes to Dr. Harold Carter for his assistance with the various aspects of the project. It certainly had been a great opportunity to meet, truly remarkable teacher Dr. Marc Cahay whose doors were always open to me to discuss the issues related to the project and I thank him for accommodating me in his busy schedule whenever he could. It is of paramount importance to convey my gratitude to my parents whose ultimate ambition was to see their children reach the pinnacle of education. This journey wouldn’t have been possible if not for them and my wonderful brother Prasad Bhadri, who I always praised for his teaching ability, had been a great teacher in my learning work and am thankful to him for his time. I am profoundly thankful to my colleagues their mentoring, in and out of the laboratory which helped in a very big way in this project. They were always there for me, especially in those moments where I needed his guidance the most. Working with them at Photonics Systems Development Laboratory (PSDL) has been a great pleasure for me. Thanks are also due to my colleagues Jianjing Tang, Sunil Konanki, Prosenjit Mal and Deepti Sukumaran for their help with the circuit design issues. In particular I like to thank Aniruddha Puntambekar and Sukirti Gupta from the MEMS lab for helping me out with the packaging and layout issues. I also would like to thank Shekar iv Menon, Avinash Joshi, Nitish Mathur, Nitin Auluck and Shilpa Trisal for their encouragement and support. I would also like to acknowledge Chris Isbell, Rob Montjoy and Roger Kirschner for helping me during various phases during my research. v TABLE OF CONTENTS LIST OF FIGURES ...................................................................ix LIST OF TABLES.....................................................................xii 1. INTRODUCTION ................................................................ 1 1.1 Motivation and Research ..............................................................................1 1.2 Device Approach ...........................................................................................2 1.2.1 Silicon Carbide Single Transistor .....................................................2 1.3.2 Silicon Carbide Darlington Configuration .....................................4 1.3.3 Silicon/Silicon Carbide Hybrid ........................................................6 1.3 General Research Objectives .......................................................................7 1.4 Expected Contributions to the Research ...................................................8 1.5 Overview of the Thesis..................................................................................8 2. BACKGROUND AND RELATED RESEARCH...............10 2.1 Characteristics of Smart Silicon................................................................. 10 2.2. Components of Smart Silicon ................................................................... 10 2.2.1 Photodiode Structure ...................................................................... 11 2.2.2 Photoreceiver Circuit ..................................................................... 12 2.2.3 Current Source/Sink Circuit.......................................................... 12 2.2.4 Bipolar Junction Transistor ........................................................... 12 2.2.5 Failure Detection Circuits .............................................................. 13 2.3 Technology used for Fabrication .............................................................. 14 2.4 Related Research ......................................................................................... 16 2.4.1 CMOS Technology………………………………………... 16 2.4.2 Bipolar and BiCMOS Technology................................................ 19 2.4.3 High Voltage CMOS Technology................................................. 22 2.5 Summary........................................................................................................ 22 vi 3. SIMULATED SILICON DEVICE STRUCTURE........ 25 3.1 PHOTODETECTORS.................................................... 25 3.1.1 Technology Overview.............................................................................. 25 3.1.2 Selected Devices........................................................................................ 26 3.1.2.1 P-diffusion to N-well Photodetector..................................................... 28 ................................................................................................................................................... ................................................................................................................................................... ................................................................................................................................................... 3.2 PHOTORECEIVER ....................................................... 31 3.2.1 Technology Overview............................................................................. 31 3.2.2 Selected Approach................................................................................... 32 3.3. CURRENT SOURCES AND SINK CIRCUITS........... 38 3.3.1. Technology Overview.................................................................................. 38 3.3.2 Selected Devices .......................................................................................... 40 3.3.2.1 Basic Current Sink........................................................................ 40 3.3.2.2 Basic Current Source .................................................................. 41 3.3.2.3. Cascode Current Source............................................................... 42 3.3.3 Simulations of the Current Source......................................................... 44 3.4 BIPOLAR JUNCTION TRANSISTOR ...................... 47 3.4.1. Technology Overview............................................................................... 47 3.4.2 Device Analysis.......................................................................................... 48 3.5.3 Simulations of the Bipolar Junction Transistor ................................... 50 3.5 DETECTION CIRCUITS ............................................. 53 3.5.1 Override Circuit............................................................................................ 53 3.5.1.1 Circuit Analysis ................................................................................