Accelerating XML Processing with Intel® SSE4.2 to Improve Business Solutions White Paper The Intel® XML Software Suite enables solution makers to easily Intel® XML Software Suite deliver faster XML processing with a standards-based solution that outperforms leading open-source implementations, for better results in a diverse range of enterprise solutions. It also simplifies the continued improvement of XML-based solutions through enhanced feature support for upcoming generations of Intel® architecture-based servers. Support for Intel® Streaming SIMD Extensions 4.2 (Intel® SSE4.2) instructions built into the Intel XML Software Suite allows applications to immediately deliver performance improvements of as much as 20 percent or more. White Paper: Intel® XML Software Suite Table of Contents Prepare Solutions to Win on Next-Generation Hardware with Intel SSE4.2 ����������������������������������������4 Build Solution Profitability with Intel® XML Software Suite ������������������������������������������������������������������������5 Improve the Quality of Both Java* and C/C++ Solutions ��������������������������������������������������������������������������������6 Accelerate XML Parsing Without Building Anything New . 8 Implement Pre-Optimized Components for Faster XML Schema Validation ����������������������������������������9 Conclusion . 11 Additional Resources . 11 2 White Paper: Intel® XML Software Suite As IT organizations of all sizes struggle to accomplish more with less, many are turning to new types of solutions in areas such as Service-Oriented Architecture (SOA), Software as a Service (SaaS), Web 2.0, and enterprise applications. These novel approaches can help organizations improve return on investment while increasing agility. Because this is new ground for many companies, they look to external expertise to show them the way, which provides a dramatic opportunity for solution providers. Extensible Markup Language (XML) has become the industry standard for the machine-to-machine communication that underlies these innovative solution approaches. To make the most of this opportunity for itself and its customers, Intel is delivering technologies that increase the performance of XML solutions while also making it faster and less expensive to bring them to market. The Intel XML Software Suite provides highly optimized building blocks for XML-based solutions that let solution providers focus on Build a Better XML Solution product innovation instead of reinventing the plumbing that underlies The Intel® XML Software Suite streamlines the development of it. This comprehensive suite of high-performance C++ and Java* standards-based XML solutions while improving their quality: software-based runtime libraries for Linux* and Windows* operating • Takes automatic advantage of new Intel® CoreTM i7 systems is engineered to automatically take advantage of new processor features, such as Intel® SSE4.2 Intel® CoreTM i7 processor features, such as Intel SSE4.2. This latest enhancement to Intel’s instruction set architecture builds on previous • Immediately adds as much as 20 percent or more performance improvements without having to recode advances to deliver superior performance and energy efficiency for the application 32-bit and 64-bit applications. • Decreases code maintenance, relative to internally In addition to taking advantage of Intel SSE4.2 instructions, developed components innovative architecture within the Intel XML Software Suite delivers • Improves total cost of ownership for both solution excellent results even on legacy systems that do not support this providers and IT new instruction set architecture. The Intel XML Software Suite has significantly better performance and scalability than many open-source projects, while maintaining compliance with industry specifications. The performance white paper available at http://softwarecommunity.intel.com/isn/downloads/software products/pdfs/XSSPerformancePaper.pdf demonstrates speedups of 2x or more relative to open-source implementations, available from the Intel XML Software Suite on previous server architectures. 3 White Paper: Intel® XML Software Suite Prepare Solutions to Win on Next-Generation (16 bytes or eight words of two bytes each) that are packed into the Hardware with Intel SSE4.2 same 128-bit XMM registers on which SSE operates. Unlike other Intel SSE 4.2 is a set of seven new instructions supported by the SSE instructions, however, they can leverage parallelism in a second Intel Core i7 processors that power the next generation of server dimension, by performing multiple search or compare operations on and desktop systems. It includes four instructions that use SIMD each character, yielding up to 256 operations in a single instruction. techniques to accelerate string and text processing, which provide This is the source of the greatest potential for speedup, and it enables significant performance benefits in XML processing. a reduction in the number of instructions required. Intel SSE4.2 requires no new operating system support to save and In addition to exploiting parallelism in two dimensions, these restore the register state beyond what is required by SSE. Moreover, instructions are functionally rich. One input provides the input string, Intel SSE4.2 is fully compatible with software written for previous another provides the reference string against which the input string generations of microprocessors with Intel® 64 and IA-32 architectures. is compared, and an immediate operand specifies parameters that Existing software continues to run correctly without modification control the instruction’s operation. The input strings may be either on microprocessors that incorporate Intel SSE4.2, as well as in the fixed length or null terminated; the variants of the instructions for presence of existing and new applications that incorporate the new those two cases are shown in Table 1. The results of comparison instruction set. Intel SSE4.2 advances software processing of string operations can be either an index of the first or last match, or a mask and text data several ways: of which characters or strings matched. Variants of the instructions are provided that enable developers to select between these two • Generalized 16-byte granularity processing, without 16-byte output data forms, as shown in Table 1. alignment restrictions in terms of memory operations The control parameters specify the operation, as shown in Table 2. • Flexibility in handling explicit-length and null-terminated strings, The equal each operation, which performs a string match (that is, using 8/16-bit character sets a comparison of corresponding characters) is the most intuitively recognizable. The acceleration advantage of these instructions comes • Streamlined looping control using flag updates from doing multiple operations in parallel: equal any compares each • Rich, built-in lexical processing primitives suitable for a wide range of input string character against a set of characters, ranges compares situations, from string search and tokenization to case conversions each input string character against a set of character ranges, and These new instructions include advanced packed-string comparison equal ordered compares a set of substrings against the (shortened) functionality. Like other SSE instructions, they can take advantage reference string. of data-level parallelism by operating on multiple characters at once Output Data Return an Index Return a Mask PCMPESTRI — Packed Compare Explicit Length PCMPESTRM — Packed Compare Explicit Length Strings; Strings; Return an Index. This instruction performs a Compare Explicit Return a Mask. This instruction performs a packed comparison packed comparison of data from two string fragments Input Data Input Length Strings of string data with explicit lengths, generating a mask and with explicit lengths, generating an index and storing the storing the result in XMM0. result in ECX. PCMPISTRI — Packed Compare Implicit Length PCMPISTRM — Packed Compare Implicit Length Strings; Compare Implicit Strings; Return an Index. This instruction performs a Return a Mask. This instruction performs a packed comparison Length Strings packed comparison of string data with implicit lengths, of string data with implicit lengths, generating a mask and generating an index and storing the result in ECX. storing the result in XMM0. Table 1. Intel® SSE4.2 string and text handling instructions. 4 White Paper: Intel® XML Software Suite Operation Mode Comparison For each character in the input string, compare against all characters in the reference string. Evaluate per-character comparisons to true if there is any exact match. Equal any: find characters from a set The instruction result is either an index (first or last) of a match when using the pcmpXstri instruction, or a mask indicating whether each character in the input string matched when using pcmpXstrm. For each character in the input string, compare against all ranges in the reference string. Ranges are speci- fied as a <lower bound, upper bound> pair, in even and odd slots of the reference string. Ranges: find characters from ranges Evaluate per-character comparisons to true if (lower bound ≤ character ≤ upper bound) for any range. The instruction result is either an index (first or last) of a match when using the pcmpXstri instruction, or a mask indicating whether each character in the input string matched when using pcmpXstrm. For each character in the input string, compare against corresponding characters