Design Space Exploration of heterogeneous SoC Platforms for a Data-Dominant Application Universitat Aut`onomade Barcelona ETSE Engineering Superior Technical School PhD in Computer Science (Computer Engineering) Antoni Portero Trujillo Director: Prof. Jordi Carrabina Bordoll Advisor: Prof. Francky Catthoor 08193 Bellaterra, Spain June 22, 2009 " Wir lassen nie vom Suchen ab, und doch, am Ende allen unseren Suchens , sind wir amb ausgangspunkt zuruck¨ und werden diesen Ort zum ersten Mal erfassen... T.S. Eliot ...fur¨ Myrna Minkoff, Marla Singer, Judith Olofernes und Tofupax(2005/02/06) ..." 2 Acknowledgments Thanks to my academic Director Dr. Jordi Carrabina, for giving me the oppor- tunity to write this thesis and join the Microelectronics and Electronics Systems Department MiSE at the University Aut`onomade Barcelona. Thanks a lot to Guillermo Talavera for investing in me his last two years and giving a push to my thesis work. Thanks to Joaquim Saiz, Dr. Llu´ısRibas, and J.A. Velasco, because I cannot thank them enough for the opportunities and protect me and stay with me in the hard moments. Thanks for the teaching people who I worked for during these long years, Raul Aragon`es,Mercedes Rullan, Jordi Aguil´o,Elena Valderrama and all the professors and teachers of the MiSE Department. I also want to thank the excellent Depart- ment staff for their support, Toni Guerra, and all the other people that is not here anymore but they're in my mind, Montse,... Thanks to all my colleagues at work, Oscar Navas, Ramon Pla, Marius, Aitor, Borja, Marc for their support and criti- cism, part of this work is theirs. Thanks to the CEPHIS team, David Castell, Eloi Ramon, Ramon, Enric, Marc, Jorge Luis, Pablo, Jordi, Victor, Andreu, Miquel, and Cesar. Many thanks to Dr. Francky Catthoor for the guidance and for sharing his expert knowledge and helping me to take decisions of this thesis. I also want to thank the people I met at IMEC, Nacho, Pol, Yang ("Punk")...etc. Thanks to my sister Dolores for encouraging me to finish this thesis, her constant support throughput these years; she's always believed in me. I could not have reached this without her. Thanks to my dad and mum. I hope you will be proud of me, I am proud of you. Thanks to my brother Pedro, his wife Ana and my nieces Patricia and Aida. Thanks to the family that I met in Brussels, Fran, Asis, Joanma, Pierre (and his wife I hope) and all the people who were in the Samaritaine. I miss you a lot. Thanks to the people that I met at Luton University, UK, Don Dent and Richard. Thanks for all proofreading help that Ramon Carrabina offered while I was writing this thesis. Thank you to my Adventures' colleagues, Clemente, Rodrigo, David, Jose, Dani ...and my current flat mates David, Miki and Pedro. Thank you to all the girls who took part of my hearth during these long years, Agata, Ana, Sonia, Vanina, Leatitia, Juliet, Janet, Julia...and so forth, so long... And to all the people that I have convinced to develop their final career projects with me. In the chapter, there is an introduction to the system under study. State-of-the-art is presented, where existing different platforms that can implement the compressor are 3 explained. Hence, it makes clear that till now there is not a comparative of a complex IP where the different platforms hardware trade-offs could be observed. We have made an overall description of our model and different platforms. We explained the work-flow scheme and C++ model where there is an explanation about the MPEG functionality, sensor model and memory access. We have also explained the platform controller that is the responsible to get the pixels from L2 in macro-blocks size to L1. Furthermore, it is responsible to decide what type of frame is going to be compressed. We give details that we have made an accurate calibrated exploration and target comparison. Finally, we explain the platform independent transformation that we have achieved to the code. In the chapter, there is an introduction to the system under study. State-of-the-art is presented, where existing different platforms that can implement the compressor are explained. Hence, it makes clear that till now there is not a comparative of a complex IP where the different platforms hardware trade-offs could be observed. We have made an overall description of our model and different platforms. We explained the work-flow scheme and C++ model where there is an explanation about the MPEG functionality, sensor model and memory access. We have also explained the platform controller that is the responsible to get the pixels from L2 in macro-blocks size to L1. Furthermore, it is responsible to decide what type of frame is going to be compressed. We give details that we have made an accurate calibrated exploration and target comparison. Finally, we explain the platform independent transformation that we have achieved to the code. In the chapter, there is an introduction to the system under study. State-of-the-art is presented, where existing different platforms that can implement the compressor are explained. Hence, it makes clear that till now there is not a comparative of a complex IP where the different platforms hardware trade-offs could be observed. We have made an overall description of our model and different platforms. We explained the work-flow scheme and C++ model where there is an explanation about the MPEG functionality, sensor model and memory access. We have also explained the platform controller that is the responsible to get the pixels from L2 in macro-blocks size to L1. Furthermore, it is responsible to decide what type of frame is going to be compressed. We give details that we have made an accurate calibrated exploration and target comparison. Finally, we explain the platform independent transformation that we have achieved to the code. In the chapter, there is an introduction to the system under study. State-of-the-art is presented, where existing different platforms that can implement the compressor are explained. Hence, it makes clear that till now there is not a comparative of a complex IP where the different platforms hardware trade-offs could be observed. We have made an overall description of our model and different platforms. We explained the work-flow scheme and C++ model where there is an explanation about the MPEG functionality, sensor model and memory access. We have also explained the platform controller that is the responsible to get the pixels from L2 in macro-blocks size to L1. Furthermore, it is responsible to decide what type of frame is going to be compressed. We give details that we have made an accurate calibrated exploration and target comparison. Finally, we explain the platform independent transformation that we have achieved to the code. 4 Contents 1 Electronics Spectrum of Solutions: Architectures and Languages 13 1.1 Electronic Systems Design........................... 14 1.2 Architecture Platform and Network Platform................ 17 1.3 Taxonomy of Architecture Platforms for Multimedia............ 17 1.4 MPSoC Platform................................ 18 1.4.1 Platform Definition.......................... 18 1.4.2 Communication within Process Elements (PE) tiles......... 19 1.4.3 Segmented Buses............................ 19 1.4.4 Network on Chip (NoC)........................ 20 1.4.5 IP block or core............................ 20 1.5 Custom and Configurable Processor Platform................ 21 1.5.1 Mono Core and Multi Core: WLP, ILP and TLP.......... 22 1.5.2 Advantages and disadvantages of Multi Core............ 23 1.5.3 Homogeneous and Heterogeneous Processor Platform........ 24 1.6 Architectural Options............................. 24 1.6.1 General-Purpose Processor Platform................. 25 1.6.2 Generic Digital Signal Processors................... 27 1.6.3 Media Processors............................ 30 1.6.4 Video Signal Processors........................ 30 1.6.5 Co-Processors.............................. 31 1.7 Domain Specific Integrated Processors.................... 32 1.7.1 Instruction Set Processor Platforms................. 33 1.8 Custom Hardware Architectures....................... 36 1.8.1 Application Specific Integrated Circuit - ASIC platform...... 36 1.8.2 Field Programmable Gate Array - FPGA platform......... 36 1.9 Introduction to Languages for Architecture Description.......... 39 1.9.1 High Level Specification Languages.................. 41 1.10 Thesis contributions and table of contents.................. 44 1.11 Summary.................................... 46 2 The Video Compression Framework 47 2.1 The Human Visual System . 47 2.2 Video Quality . 48 2.2.1 Objective Quality Measurement . 50 2.2.2 The MPEG VIDEO Compression Standard . 51 2.2.2.1 MPEG-1 video History . 51 5 Contents 2.2.2.2 Introduction to MPEG-2 standard . 52 2.2.2.3 Main characteristics . 52 2.2.2.4 Video coding scheme . 53 2.2.2.5 MPEG-2 Audio encoding . 56 2.2.3 Introduction to MPEG-3 . 56 2.2.4 Introduction to MPEG-4 . 56 2.2.5 Introduction to MPEG-7 . 57 2.2.6 MPEG-21 Multimedia Framework.................. 58 2.3 MPEG-A: Multimedia Application Formats................. 59 2.4 MPEG Encoder and Decoder . 60 2.5 MPEG Data Stream . 62 2.5.1 I Video Object Picture format . 63 2.5.2 P Video Object Picture format . 63 2.5.3 B Video Object Picture format . 63 2.6 Discrete Cosinus Transform (DCT) Behaviour . 65 2.6.1 Reconstruction of Missing Compressed Data: DCT coefficients . 66 2.6.1.1 Fast One-Dimensional DCT Techniques . 67 2.6.1.2 Two-Dimensional DCT algorithms . 67 2.6.1.3 Three-Dimensional DCT algorithms............ 68 2.6.2 Defining an Invariant Measure of Error . 68 2.6.3 Adding Human Visual Factors . 70 2.7 Entropy Coding .