Lead Free Temperature Profiling‐ How to do it! Bob Willis Electronics Academy Webinar Presenter
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The Electronics Academy Webinar Series takes an in‐depth look at the issues affecting PCB/SMT assembly and the challenges of achieving Zero Defect Manufacture. Understand the common causes of solder joint failure and learn how to identify and rectify process defects – improving quality and reducing costs with Bob Willis and the VE Team
Learn expert tips to identify quality issues Understand the common causes of process failures A convenient and quick way to update your skills
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Bob Willis
Bob Willis has been involved with the introduction and implementation of lead-free process technology for the last seven years. He received A SOLDERTEC/Tin Technology Global Lead-Free Award for his contribution to the industry, helping implementation of the technology. Bob has been a monthly contributor to Global SMT magazine for the last six years. He was responsible for co-ordination and introduction of the First series of hands-on lead-free training workshops in Europe for Cookson Electronics during 1999-2001. These events were run in France, Italy and the UK and involved lead-free theory, hands-on paste printing, reflow, wave and hand soldering exercises. Each non commercial event provided the first opportunity for engineers to get first hand experience in the use of lead-free production processes and money raised from the events was presented to local charity. More recently he co-ordinated the SMART Group Lead-Free Hands On Experience at Nepcon Electronics 2003. This gave the opportunity for over 150 engineers to process four different PCB solder finishes, with two different lead-free pastes through convection and vapour phase reflow. He also organised Lead-Free Experience 2, 3 + 4 in 2004-2006.
He has also run training workshops with research groups like ITTF, SINTEF, NPL & IVF in Europe. Bob has organised and run three lead- free production lines at international exhibitions Productronica, Hanover Fair and Nepcon Electronics in Germany and England to provide an insight to the practical use of lead-free soldering on BGA Ball Grid Array, CSP Chip Scale Package, 0210 chip and through hole intrusive reflow connectors. This resulted in many technical papers being published in Germany, USA and the United Kingdom. Bob also defined the process and assisted with the set-up and running of the first Simultaneous Double Sided Lead-Free Reflow process using tin/silver/copper for reflow of through hole and surface mount products. Bob also had the pleasure of contributing a small section to the first Lead-Free Soldering text book “Environment - Friendly Electronics: Lead-Free Technology” written by Jennie Hwang in 2001. The section provided examples of the type of lead-free defects companies may experience in production. Further illustrations of lead-free joints have been featured in here most recent publication “Implementing Lead-Free Electronics” 2005. He has helped produce booklets on x-ray inspection and lead-free defects with DAGE Industries, Balver Zinn and SMART Group
Mr Willis led the SMART Group Lead-Free Mission to Japan and with this team produced a report and organised several conference Find out more at: presentations on their findings. The mission was supported by the DTI and visited many companies in Japan as well as presenting a seminar Bobwillis.co.uk in Tokyo at the British Embassy to over 60 technologists and senior managers of many of Japans leading producers. Bob was responsible for the Lead-Free Assembly & Soldering "CookBook" CD-ROM concept in 1999, the world’s first interactive training resource. He implemented the concept and produced the interactive CD in partnership with the National Physical Laboratory (NPL), drawing on the many resources available in the industry including valuable work from NPL and the DTI. This incorporated many interviews with leading engineers involved with lead-free research and process introduction; the CD-ROM is now in its 3rd edition. Bob Willis currently operates a training and consultancy business based in England. Bob is a member of the SMART Technical Committee. Although a specialist for companies implementing Surface Mount Technology Mr Willis provides training and consultancy in most areas of electronic manufacture. He has worked with the GEC Technical Directorate as Surface Mount Co-Coordinator for both the Marconi and GEC group of companies and prior to that he was Senior Process Control Engineer with Marconi Communication Systems, where he had worked since his apprenticeship. Following his time with GEC he became Technical Director of an electronics contract manufacturing company where he formed a successfultraining and consultancy division.
As a process engineer, he was involved in all aspects of electronic production and assembly involved in setting up production processes and evaluating materials; this also involved obtaining company approval on a wide range of Marconi's processes and products including printed circuit board manufacture. During the period with Marconi, experience was gained in methods and equipment for environmental testing of components, printed boards and assemblies with an interest developed in many areas of defect analysis. Over the last 15 years he has been involved in all aspects of surface mounted assembly, both at production and quality level and during that time has been involved in training staff and other engineers in many aspects of modern production.
Over the past few years Mr. Willis has travelled in the United States, Japan, China, New Zealand, Australia and the Far East looking at areas of electronics and lecturing on electronic assembly. Mr. Willis was presented with the Paul Eisler award by the IMF (Institute of Metal Finishing) for the best technical paper during their technical programmes. He has conducted SMT Training programs for Texas Instruments and is currently course leader for Reflow and Wave Soldering Workshops in the United Kingdom. Mr Willis is an IEE Registered Trainer and has been responsible for training courses run by the PCIF originally one of Europe's largest printed circuit associations. Bob has conducted workshops with all the major organisations and exhibition organisers World Wide and is known for being an entertaining presenter and the only presenter to use unique process video clips during his workshops to demonstrate each point made. Bob has written two book which are free to download on line, Design & Assembly with Pin In Hole Intrusive Reflow & Package On Package Design, Assembly and Inspection
Mr. Willis was Chairman of the SMART Group, European Surface Mount Trade Association from 1990-94 and has been elected Honorary Find out more at: Life President and currently holds the position of SMART Group Technical Director, he also works on BSI Standards Working Parties. He is Bobwillis.co.uk a Fellow of the Institute Circuit Technology, an NVQ Assessor, Member of the Institute of Quality Assurance and Society of Environmental Test Engineers. Bob Willis currently writes regular features for AMT Ireland, Asian Electronics Engineer and Circuits Assembly the US magazine. He also is responsible for writing each of the SMART Group Charity Technology reports, which are sold in Europe and America by the SMTA to raise money for worthy causes. Bob ran the SMART Group PPM Monitoring Project in the United Kingdom supported by the Department of Trade and Industry. He was coordinator of the LEADOUT Project for SMART Group. LEADOUT was one of the largest EU funded projects, currently he is coordinatingEuropean projects TestPEP, uBGA and ChipCheck
In September 2015 Bob voted the Best Speaker at SMTA International Conference in Chicago
What component type causes you most problems?
BGA Fine pitch 27% QFP 20%
Through hole 19%
QFN/LGA 18% Chip components 16% Bob Willis webinar 2017 survey Which process contributes most to your defect levels?
Selective Wave soldering soldering Paste 18% 11% printing 21%
Placement 15% Reflow soldering 35% Bob Willis webinar 2017 survey
Reflow Soldering
140-160oC
100oC Reflow Soldering
235-240oC
225oC
180-185oC
Reflow Soldering
Base Material Component Lead Copper Brass Alloy Steel Alloy 42
Solderable Plating Intermetalic layer
OSP, Tin, Nickel/Gold, Silver, Lead-Free Solder
Copper Lead-Free Reflow Soldering J Lead Reflow video
Gull Wing Lead video
Lead-Free Ball Grid Array Reflow
BGA Reflow video Sn/Ag/Cu LGA/QFN Reflow Simulations
Video shows reflow of LGA devices using a video simulator. The system can simulate a profile of convection reflow system and allow engineers to monitor the process directly on a printed board assembly
Pin In Hole/Intrusive Reflow Simulation
The board is assembled then placed in the x-ray system with reflow simulator which allows engineers to reflow and examine the complete process TMV Package on Package Assembly
The ball terminations sit directly on the exposed solder balls on the bottom package with either paste of flux from the dipping process. After reflow the connections will look like a column of solder, however head in pillow has been found by the author.
Download Bob’s Guide to Package On Package Assembly at www.packageonpackagebook.com
Process of Reflow Soldering
Solvent Evaporation Flux Activation Temperature Stabilisation Solder Reflow Joint Formation Cooling Phase Reflow Soldering System
BW Reflow Deluxe 7
Reflow Solder Profile
Zone Number: 1 2 3 4 5678 Top Set points: 110 120 120 120 145 190 245 260 Bottom Set points: 110 120 120 120 145 190 245 260 Conveyor Speed 75 Statistics Values: TC-1 TC-2 TC-3 TC-4 TC-5 TC-6 TC-7 Max Rising Slope 1.7 1.5 1.9 1.7 1.5 1.5 1.6 Soak Time 100-120C 68.7 68.3 65.5 71 69.8 68.8 66.1 Reflow Time /179C 57.9 60.6 61.2 57.6 53.8 60.3 56.3 Peak Temp 209.7 210.6 218.7 212.9 208.6 215.2 213.2 Temperature Profiling Examples
Temperature Profiling Examples Temperature Profiling Probe Position
BGA 361
Temperature Profiling for Reflow
BGA 361 Vapour Phase Reflow Soldering
VPS Fluid Options:
215oC 230oC 235oC 240oC
Cooling Coils
Heater Coils
Lead-Free Reflow Soldering Profiles
Convection Profile
VPS Profile
To run the profiles download PowerPoint player http://www.globfx.com/downloads/swfpoint/ Original Vapour Phase Systems
One of my old batch systems used in GEC and Texas Instruments in 1990s
Solder Voids In Reflow Solder Joints
Reflow solder joints are being viewed in x-ray allowing us to see the voids as they move in the bulk of the solder joint. The void is air or gas trapped in the solder, depending on the time the solder is in a liquid state may allow this to escape. In the case of via in pad or underfill the voids may not escape at all. Videos from Cores Japan Void Reduction with Vacuum
Voids under QFN Packages
There are many reasons why you may see voids under these types of component. The boards were soldered in vapour phase with and without vacuum. The sample on the left soldered without vacuum shows a higher level of voids, on the right virtually no voids
It is not to say that the example with voids is unacceptable but it’s a good example of void reduction. Regardless of paste, profile and good stencil design and no vias its not always possible to eliminate all voids under large terminations Component Lifting During Reflow
Main factors for lifting: Speed of wetting Design rules used Volume of paste Nitrogen level
Non Paste Coalescence/Grapping
0201 chip component with lead-free solder paste that has not fully reflowed in air. This is a common fault on small paste deposits when people return to a traditional soak profile. Some solder pastes are far more tolerant that others; the resulting solder joint is sound but the balls have not fully reflowed into the bulk of the solder joint.
This type of issue has been seen during 2003, 2004 on 0201 chip terminations and on 01005 chips in convection reflow but never in vapour phase soldering due to the inert atmosphere during the soldering stages of the process. Basically the small solder paste deposit is exposed to a long period at elevated temperature during a lead-free profile which reduces the performance of the flux in the paste. It is seen more with profiles that have a long pre-heat like a traditional profile. A profile which does not have long dwell prior to reflow is less affected. Many paste suppliers have recommended the straight ramp profile but in the real world many users have not been able to achieve this with lead-free on existing ovens. In most cases the actual joint is satisfactory and only the outer surface shows this effect; however, most people would not accept this type of process defect Reflow Temperature Profiles
Example reflow profiles from different convection ovens
BGA & Solder Paste Reflow
Example of BGA reflow with lead-free paste in air. The video shows evidence of head in pillow formation with open joints. These connections could be intermittent if not detected in manufacture, the video was specifically created by us for a solder material supplier conference in the US X-Ray Inspection of POP
Open circuit joints on packages produced with dip paste. Assembly trials conducted in the UK by the author and x- ray inspection conducted at ITRI with DAGE x-ray system
What is a Thermocouple?
Two different materials are welded together to form a junction/bead. The two wire are insulated from each other to stop intermittent contact and false readings. The two wires are then covered with an outer cover. 1-60 micro volts can be produced between the wires which is converted to a temperature reading. Example Thermocouple
Temperature Profiling Probes Soldered Probes Aluminium Foil Kapton Tape Epoxy Adhesive Contact Probes
Visit NPL Defect Database Live http://defectsdatabase.npl.co.uk Temperature Profiling Standard
IPC-7530A Guidelines for Temperature Profiling for Mass Soldering Processes Reflow and Wave
Temperature Profiling for Reflow & Rework Flexi Rigid Board Design
Multilayer Design Temperature Profiling Probes
Care need to be taken that the thermocouple bead is in the solder joint and not on the surface. If the wires are twisted and touching this will also give false random readings during measurement
Temperature Profiling Probes
When printed boards are to be assembled in a pallet the pallet may have a significant effect on the temperature profile. Make sure the design of the pallet is optimised and the position of the thermocouple beads is taken into consideration on the pallet Temperature Profiling Flexible
Assembly Pallet for Flexible Circuit
Thermal relief areas on the base of pallet to improve delta T during reflow. Also consider drain holes under the flex if using vapour phase for lead-free reflow Lead-Free Reflow Inspection
Intrusive Reflow Bottom Intrusive Reflow Top
Sn/Ag/Cu Alloy
Lead-Free Reflow Inspection
Intrusive Reflow Top Intrusive Reflow Bottom Do you have any questions ?
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Process Defect Guides produced for SMART Group