16 V Rail-to-Rail a Buffer AD8560

FEATURES BLOCK DIAGRAM Single-Supply Operation: 4.5 V to 16 V Dual-Supply Capability from ؎2.25 V to ؎8 V Input Capability Beyond the Rails V+ Rail-to-Rail Output Swing Continuous Output Current: 35 mA IN A 1 10 OUT A Peak Output Current: 250 mA Offset Voltage: 10 mV Max IN B 2 9 OUT B Slew Rate: 8 V/␮s IN C 3 Stable with 1 ␮F Loads 8 OUT C

Supply Current IN D 4 7 OUT D APPLICATIONS IN E 56OUT E LCD Reference Drivers Portable Electronics Communications Equipment GND

16-Lead LFCSP GENERAL DESCRIPTION (CP Suffix) The AD8560 is a low cost, five-channel, single-supply buffer amplifier with rail-to-rail input and output capability. The AD8560

is optimized for LCD monitor applications. 16 V+ 15 NC 14 NC 13 GND These LCD buffers have high slew rates, a 35 mA continuous IN A 1 PIN 1 12 OUT A INDICATOR output drive, and high capacitive load drive capability. They have IN B 2 11 OUT B AD8560 wide supply range and offset voltages below 10 mV. IN C 3 10 OUT C TOP VIEW The AD8560 is specified over the –40°C to +85°C temperature IN D 4 9 OUT D range. They are available on tape and reel in a 16-lead LFCSP. NC 6 NC 7 IN E 5 OUT E 8

NC = NO CONNECT

REV. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. No license is granted by implication or otherwise One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. under any patent or patent rights of Analog Devices. Trademarks and Tel: 781/329-4700 www.analog.com registered trademarks are the property of their respective companies. Fax: 781/326-8703 © Analog Devices, Inc., 2002 AD8560–SPECIFICATIONS

ELECTRICAL CHARACTERISTICS (4.5 V ≤ VS ≤ 16 V, VCM = VS/2, TA = 25C, unless otherwise noted.) Parameter Symbol Conditions Min Typ Max Unit INPUT CHARACTERISTICS Offset Voltage VOS 210mV Offset Voltage Drift ∆VOS/∆T –40°C ≤ TA ≤ +85°C5µV/°C Input Bias Current IB 80 600 nA –40°C ≤ TA ≤ +85°C 800 nA Input Voltage Range –0.5 VS + 0.5 V ZIN 400 kΩ Input Capacitance CIN 1pF OUTPUT CHARACTERISTICS Output Voltage High VOH IL = 100 µAVS – 0.005 V VS = 16 V, IL = 5 mA 15.85 15.95 V –40°C ≤ TA ≤ +85°C 15.75 V VS = 4.5 V, IL = 5 mA 4.2 4.38 V –40°C ≤ TA ≤ +85°C 4.1 V Output Voltage Low VOL IL = 100 µA5mV VS = 16 V, IL = 5 mA 42 150 mV –40°C ≤ TA ≤ +85°C 250 mV VS = 4.5 V, IL = 5 mA 95 300 mV –40°C ≤ TA ≤ +85°C 400 mV Continuous Output Current IOUT 35 mA Peak Output Current IPK VS = 16 V 250 mA TRANSFER CHARACTERISTICS AVCL RL = 2 kΩ 0.995 0.9985 1.005 V/V –40°C ≤ TA ≤ +85°C 0.995 0.9980 1.005 V/V Gain Linearity NL RL = 2 kΩ, VO = 0.5 to (VS – 0.5 V) 0.01 % POWER SUPPLY Supply Voltage VS 4.5 16 V Power Supply Rejection Ratio PSRR VS = 4 V to 17 V –40°C ≤ TA ≤ +85°C7090dB Supply Current/Amplifier ISY VO = VS/2, No Load 780 1,000 µA –40°C ≤ TA ≤ +85°C 1,200 µA DYNAMIC PERFORMANCE Slew Rate SR RL = 10 kΩ, CL = 200 pF 4.5 8 V/µs Bandwidth BW –3 dB, RL = 10 kΩ, CL = 10 pF 8 MHz Phase Margin Øo RL = 10 kΩ, CL = 10 pF 65 Degrees Channel Separation 75 dB NOISE PERFORMANCE Voltage Noise Density en f = 1 kHz 27 nV/√Hz en f = 10 kHz 25 nV/√Hz Current Noise Density in f = 10 kHz 0.8 pA/√Hz Specifications subject to change without notice.

–2– REV. 0 AD8560

ABSOLUTE MAXIMUM RATINGS* 1 2 Package Type JA JC JB Unit Supply Voltage (VS) ...... 18 V ° Input Voltage ...... –0.5 V to VS + 0.5 V 16-Lead LFCSP (CP) 35 13 C/W Differential Input Voltage ...... VS NOTES ° ° 1 Storage Temperature Range ...... –65 C to +150 C θJA is specified for worst-case conditions, i.e., θJA is specified for device soldered Operating Temperature Range ...... –40°C to +85°C onto a circuit board for surface-mount packages. 2⌿ Junction Temperature Range ...... –65°C to +150°C JB is applied for calculating the junction temperature by reference to the board temperature. Lead Temperature Range (Soldering, 60 sec) ...... 300°C ESD Tolerance (HBM) ...... 1.5 kV ESD Tolerance (CDM) ...... 1 kV *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.

ORDERING GUIDE

Temperature Package Package Model Range Description Option AD8560ACP –40°C to +85°C 16-Lead LFCSP CP-16

Available in reels only.

CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily WARNING! accumulate on the human body and test equipment and can discharge without detection. Although the AD8560 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are ESD SENSITIVE DEVICE recommended to avoid performance degradation or loss of functionality.

REV. 0 –3– AD8560–Typical Performance Characteristics

100 0 T = 25C V = V /2 90 A CM S 4.5V < V < 16V S 50 80 VS = 16V 70 100

60 150 50 VS = 4.5V 200 40 ANTITY – 30 QU 250 INPUT BIAS CURRENT – nA 20 300 10

0 350 12 9 6 3 0 36912 40 +25 +85 INPUT OFFSET VOLTAGE – mV TEMPERATURE – C TPC 1. Input Offset Voltage Distribution TPC 4. Input Bias Current vs. Temperature

300 5

4.5V < VS < 16V 4 250 3

2 200 1 VS = 4.5V 150 0 VS = 16V 1

ANTITY – Amplifiers 100 2 QU

INPUT OFFSET CURRENT – nA 3 50 4

0 5 0 10 20 30 40 50 60 70 80 90 100 40 +25 +85 TCVOS – V/C TEMPERATURE – C TPC 2. Input Offset Voltage Drift Distribution TPC 5. Input Offset Current vs. Temperature

0 15.96 4.46 ILOAD = 5mA VCM = VS/2 15.95 4.45 V = 16V 0.25 S 15.94 4.44

15.93 4.43 0.50 15.92 4.42 VS = 16V 0.75 15.91 4.41

15.90 4.40 1.00 15.89 V = 4.5V 4.39 OUTPUT VOLTAGE – V S VS = 4.5V

INPUT OFFSET VOLTAGE – mV 15.88 4.38 1.25 15.87 4.37

1.50 15.86 4.36 40 +25 +85 40 +25 +85 TEMPERATURE – C TEMPERATURE – C TPC 3. Input Offset Voltage vs. Temperature TPC 6. Output Voltage Swing vs. Temperature

–4– REV. 0 AD8560

150 0.85 ILOAD = 5mA 135 VCM = VS/2 0.80 120 VS = 16V 105 0.75 90 VS = 4.5V 75 0.70

60 0.65 45

OUTPUT VOLTAGE – mV VS = 16V 30 VS = 4.5V 0.60 SUPPLY CURRENT/AMPLIFIER – mA 15

0 0.55 40 +25 +85 40 +25 +85 TEMPERATURE – C TEMPERATURE – C TPC 7. Output Voltage Swing vs. Temperature TPC 10. Supply Current/Amplifier vs. Temperature

0.9999 8 RL = 10k 4.5V < VS < 16V CL = 200pF VOUT = 0.5V TO 15V 7 VS = 16V

R = 2k L 6 s VS = 4.5V

5 0.9997 4 GAIN ERROR – V/V SLEW RATE – V/ 3

2 RL = 600 0.9995 1 40 +25 +85 40 +25 +85 TEMPERATURE – C TEMPERATURE – C TPC 8. Voltage Gain vs. Temperature TPC 11. Slew Rate vs. Temperature

1k 1.1 T = 25C TA = 25C A 1.0 AV = 1 VO = VS /2 0.9 100 0.8 VS = 4.5V 0.7

0.6 10 VS = 16V 0.5

0.4 OUTPUT VOLTAGE – mV OUTPUT VOLTAGE 1 0.3 SUPPLY CURRENT/AMPLIFIER – mA SUPPLY 0.2

0.1 0.1 0.0010.01 0.1 1 10 100 0182 4681012 14 16 LOAD CURRENT – mA SUPPLY VOLTAGE – V TPC 9. Output Voltage to Supply Rail vs. Load Current TPC 12. Supply Current/Amplifier vs. Supply Voltage

REV. 0 –5– AD8560

10 18

5 1k 16 0 10k TA = 25 C 14 VS = 16V 5 AV = 1 12 R = 10k TA = 25C L < 1% 10 VS = 8V VIN = 50mV rms 10 15 CL = 40pF 560 AV = 1 8 GAIN – dB 20 150 6 25 OUTPUT SWING – Vp-p OUTPUT SWING – 4 30

35 2

40 0 100k1M 10M 100M 10 100 1k 10k 100k 1M 10M FREQUENCY – Hz FREQUENCY – Hz TPC 13. Frequency Response vs. Resistive Loading TPC 16. Closed-Loop Output Swing vs. Frequency

25 160 TA = 25C T = 25C 20 VS = 8V 140 A V = 16V VIN = 50mV rms S 15 RL = 10k 120 AV = 1 10 100

5 80 50pF +PSRR 0 60

GAIN – dB 5 40 PSRR 10 20 1040pF 100pF 15 0 540pF REJECTION – dB SUPPLY POWER 20 20

25 40 100k1M 10M 100M 1001k 10k 100k 1M 10M FREQUENCY – Hz FREQUENCY – Hz TPC 14. Frequency Response vs. Capacitive Loading TPC 17. Power Supply Rejection Ratio vs. Frequency

500 160 T = 25C 450 140 A VS = 4.5V 400 120

350 100 +PSRR VS = 4.5V 300 80

250 60 PSRR

200 40 IMPEDANCE – IMPEDANCE 150 20

100 0 POWER SUPPLY REJECTION – dB SUPPLY POWER

50 VS = 16V 20

0 40 1001k 10k 100k 1M 10M 1001k 10k 100k 1M 10M FREQUENCY – Hz FREQUENCY – Hz TPC 15. Closed-Loop vs. Frequency TPC 18. Power Supply Rejection Ratio vs. Frequency

–6– REV. 0 AD8560

1,000 100 TA = 25C TA = 25C 4.5V VS 16V 90 VS = 4.5V

Hz VCM = 2.25V

80 VIN = 100mV p-p AV = 1 100 70 RL = 10k 60

50

40

VERSHOOT – % VERSHOOT NOISE DENSITY – nV/ OS 10 O +OS 30

LTAG E 20 VO 10

1 0 10100 1k 10k 10100 1k FREQUENCY – Hz LOAD CAPACITANCE – pF TPC 19. Voltage Noise Density vs. Frequency TPC 22. Small Signal Overshoot vs. Load Capacitance

20 15 T = 25C TA = 25C A 0 4.5V < VS < 16V VS = 8V 10 V R = 10k 20 L

40 5 60 OVERSHOOT SETTLING TO 0.1%

80 0

100 5 120

CHANNEL SEPARATION – dB CHANNEL SEPARATION UNDERSHOOT SETTLING TO 0.1% 140 OUTPUT SWING FROM 0V TO TO 0V OUTPUT SWING FROM 10 160

180 15 100 1k 10k 100k 1M 10M 100M 02.00.5 1.0 1.5 FREQUENCY – Hz SETTLING TIME – s TPC 20. Channel Separation vs. Frequency TPC 23. Settling Time vs. Step Size

100 0 TA = 25 C TA = 25C 90 V = 16V S 0 VS = 16V V = 8V A = 1 80 CM V V = 100mV p-p IN RL = 10k A = 1 0 70 V CL = 300pF RL = 10k 60 0

50 0 GE – 2V/DIV 40 LTA VERSHOOT – % VERSHOOT 0 O OS 30 VO +OS 0 20

10 0

0 0 10100 1k 000 000000 LOAD CAPACITANCE – pF TIME – 2s/DIV TPC 21. Small Signal Overshoot vs. Load Capacitance TPC 24. Large Signal Transient Response

REV. 0 –7– AD8560

0 0 TA = 25 C TA = 25C V = 4.5V 0 S 0 VS = 4.5V AV = 1 AV = 1 RL = 10k R = 10k 0 0 L CL = 300pF CL = 100pF

0 0

0 0 GE – 1V/DIV GE – 50mV/DIV LTA 0 0 LTA VO VO 0 0

0 0

0 0 000 000000 000 000000 TIME – 2s/DIV TIME – 1s/DIV TPC 25. Large Signal Transient Response TPC 27. Small Signal Transient Response

0 0 T = 25C A T = 25C V = 16V A 0 S 0 V = 16V A = 1 S V A = 1 V RL = 10k 0 0 RL = 10k CL = 100pF

0 0

0 0 GE – 3V/DIV GE – 50mV/DIV

0 LTA LTA 0 VO VO 0 0

0 0

0 0 000 000000 000 000000 TIME – 1s/DIV TIME – 40s/DIV TPC 26. Small Signal Transient Response TPC 28. No Phase Reversal

–8– REV. 0 AD8560

APPLICATIONS Short Circuit Output Conditions Theory of Operation The buffer family does not have internal short circuit protection These buffers are designed to drive large capacitive loads in LCD circuitry. As a precautionary measure, do not short the output applications. Each has a high output current drive and rail-to- directly to the positive power supply or to the ground. rail input/output operation and can be powered from a single 16 It is not recommended to operate the AD8560 with more than V supply. They are also intended for other applications where low 35 mA of continuous output current. The output current can be distortion and high output current drive are needed. limited by placing a series resistor at the output of the amplifier Input Overvoltage Protection whose value can be derived using the following equation: As with any semiconductor device, whenever the input exceeds ≥ VS either supply voltage, attention needs to be paid to the input RX overvoltage characteristics. As an overvoltage occurs, the amplifier 35mA could be damaged depending on the voltage level and the magnitude For a 5 V single-supply operation, RX should have a minimum of the fault current. When the input voltage exceeds either supply value of 143 Ω. by more than 0.6 V, internal pin junctions will allow current to flow from the input to the supplies. Recommended Land Pattern for the AD8560 Figure 2 is a recommended land pattern for the AD8560 PCB This input current is not inherently damaging to the device as design. The recommended thermal pad size for the PCB design long as it is limited to 5 mA or less. If a condition exists using matches the dimensions of the exposed pad on the bottom of the buffers where the input exceeds the supply by more than 0.6 V, the package. The solder mask design for improved thermal pad a series external resistor should be added. The size of the resistor contact to the exposed pad and reliability uses a stencil pattern can be calculated by using the maximum overvoltage divided by for approximately 85% solder coverage. A minimum clearance 5 mA. This resistance should be placed in series with the input of 0.25 mm is maintained on the PCB between the outer edges exposed to an overvoltage. of the thermal pad and the inner edges of the pattern for the Output Phase Reversal land to avoid shorting. For better thermal performance, thermal The buffer family is immune to phase reversal. Although the device’s vias should also be used. Since the AD8560 is relatively a low output will not change phase, large currents due to input overvoltage power part, just soldering the exposed package pad to the PCB could damage the device. In applications where the possibility exists thermal pad should provide sufficient electrical performance. of an input voltage exceeding the supply voltage, overvoltage protec- SYMM C tion should be used as described in the previous section. L 0.28 0.75 TYP 16 PL Total Harmonic Distortion (THD+N) The buffer family features low total harmonic distortion. The total harmonic distortion plus noise for the buffer over the entire 0.9 supply range is below 0.08%. When the device is powered from a 16 V supply, the THD + N stays below 0.03%. Figure 1 shows 0.4 the AD8560’s THD + N versus the frequency performance. 2.1 1.95 0.65 SYMM CL

10

0.05

0.1 1 0.875

0.20 0.25

THD + N – % 0.1 VS = 2.5V SOLDER MASK

VS = 8V BOARD METALLIZATION Figure 2. 16-Lead 4 x 4 Land Pattern 0.01 20100 1k 10k 30k FREQUENCY – Hz Figure 1. THD + N vs. Frequency

REV. 0 –9– AD8560

OUTLINE DIMENSIONS

16-Lead Lead Frame Chip Scale Package [LFCSP] 4 mm 4 mm Body (CP-16) Dimensions shown in millimeters

4.0 0.60 MAX BSC SQ 0.60 MAX PIN 1 INDICATOR 13 16 PIN 1 0.65 BSC 12 1 INDICATOR TOP 3.75 BOTTOM VIEW BSC SQ VIEW 0.75 2.25 9 4 0.60 8 5 2.10 SQ 0.50 1.95 1.95 BSC 0.80 MAX 12 MAX 0.65 NOM 0.05 MAX 1.00 0.02 NOM 0.90 0.35 0.80 0.28 0.20 REF COPLANARITY SEATING 0.25 0.08 PLANE COMPLIANT TO JEDEC STANDARDS MO-220-VGGC

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