Standard SRAM Products Outline

Renesas Standard SRAM Product Outline

September 22, 2021

Standard Products Department 2 Standard Products Business Division, IoT & Infrastructure Business Unit, Renesas Electronics Corporation

SRAM-2021-E-0922-1

SRAM Asynchronous Low Power SRAM Volatile memory Static SRAM Random Fast SRAM RAM Access Random Memory  Memory contents are lost Access Synchronous PBSRAM Pipeline Burst SRAM Memory after power off. DRAM SRAM ZBT type (NoBL, NtRAM)  Possible to construct a non-volatile Dynamic Zero Bus Turnaround SRAM memory with use of batteries. Random Access DDR (Double Data Rate) SRAM Memory QDR (Quad Data Rate) SRAM

Mask ROM Programmable ROM Non-volatile memory EPROM Erasable Programmable ROM

 Memory contents are maintained ROM EEPROM Serial EEPROM even after power off. Read Electrically Erasable  Limited number of write cycles Only Programmable ROM for electrically rewritable products Memory Flash Memory

 “One-Renesas” provides optimum memory solutions to various application fields. Types of Memory Products Offered by  (5V, 3V) 256Kb, 1Mb, 4Mb Covered by Asynchronous Low Power SRAM  (3V) 2Mb, 8Mb, 16Mb, 32Mb, 64Mb This  Material (5V, 3.3V) 4Mb Asynchronous Fast SRAM  (5V), 16Kb, 64Kb  (5V, 3.3V) 256Kb, 1Mb  (3.3V) 4Mb  Pipeline Burst / Flow-through 1Mb, 2Mb (x32), 4Mb, 9Mb (x18, x36) Synchronous SRAM  Zero Bus Turnaround (ZBT) 4Mb, 9Mb, 18Mb (x18,x36)  Multi-port Memory Specialty Memory  FIFO MRAM  Q-SPI (up to 108MHz): 4Mb, 8Mb, 16Mb

 Serial I/F: I2C / SPI, 1.8 ~ 5.5V EEPROM 2Kb, 4Kb, 8Kb, 16Kb, 32Kb, 64Kb, 128Kb, 256Kb, 512Kb

 High Reliability  Industrial  Excellent soft error immunity without embedded ECC  Factory automation, computerized numerical control,  Latch-up free memory cell structure programable logic controller, vending machine, ticket gate, automated teller machine, etc.  Stable supply and long-term support  Communication  Covered by PLP: Product Longevity Program  Router, switch, base station, etc.

 Wide line-up to support all applications  Social infrastructure  Memory density: Lineup from 256Kb to 64Mb  Elevator system, transportation system, railway system, traffic  Supply voltage: 3V / 5V (continued support of 5V parts) signal system, smart grid devices, etc.  Package: Varied package lineup  Office automation  Multi-function printer, etc.

 Consumer  Gaming machine, musical instrument, calculator, etc.

 Car accessories (non-driveline devices)  ETC, digital tachometer, etc.

 Medical / Healthcare  Medical electronic devices

© 2021 Renesas Electronics Corporation. All rights reserved. Page 4 Renesas SRAM Product Roadmap  Wide variety of low power SRAM product lineup 256Kb~64Mb  New product: 0.11um 32Mb / 64Mb LP-SRAM now in Mass Production

MP New product As of September 2021 SRAM type Density, Voltage ~2020 2021 2022 2023 2024 2025~ 256Kb 5V/3V, 1Mb 5V/3V, Pag 0.15um Advanced LPSRAM 2Mb 3V, 4Mb 5V e 5 4Mb 3V, 8Mb 3V, 0.11um Advanced LPSRAM 16Mb 3V,32Mb 3V(16Mbx2) Asynchronous Low Power 16Mb 3V 0.13um (ECC embedded) SRAM 32Mb 3V 0.11um Advanced LPSRAM MP NOW 64Mb 3V 0.15um 0.11um Advanced LPSRAM MP NOW Asynchronous 4Mb 3V/5V Fast SRAM 0.18um CMOS (without ECC)

 Not only die shrink but also achieves smaller active & standby current  Enables longer battery life in battery backup application

0.15um process product 0.11um process product

Product model name R1LV3216R series RMLV3216A series 32Mb Access time tAA 55ns 55ns Operational current Icc1 55mA (Max.) 35mA (Max.) 48-TSOP(I) 48-FBGA ℃ ℃ 4uA (Typ.)@25 0.6uA (Typ.)@25 Isb1 (typ.) Standby current ISB1 ℃ ℃ 52-uTSOP 80uA (Max.)@85 24uA (Max.)@85 reduction by 85% Data retention voltage VDR 2.0V 1.5V Product model name R1WV6416R series RMWV6416A series 64Mb Access time tAA 55ns 55ns (MCP:32Mb x2) Operational current Icc1 60mA (Max.) 38mA (Max.) 48-TSOP(I) Isb1 (typ.) 48-FBGA 8uA (Typ.)@25℃ 1.2uA (Typ.)@25℃ Standby current ISB1 ℃ ℃ reduction by 85% 52-uTSOP 160uA (Max.)@85 46uA (Max.)@85 Data retention voltage VDR 2.0V 1.5V

Regular power supply Vcc Switch Mechanism Microprocessor Supervisory IC VCC VCC IN VBK VOUT VBAT VBAT SRAM Backup CS# VCC Battery CEIN CEOUT MCU VSS RESET VCC

CS# *SRAM Chip Select RD# OE# WR# WE#

Address Bus

VSS Data (I/O) Bus VSS

Non-volatile RAM by battery backup  Low Standby Current = Longer battery life  Low Soft Error Rate = High Reliability on data retention

 Not a permanent hard failure and can be corrected by rewriting from the system (MCU) side.

 Until the early '90s, the main cause was α (alpha) rays generated from radioisotopes contained in trace amounts in semiconductor packaging materials. (Fig.1)

 But now, "Terrestrial Cosmic Rays" are being recognized as a dominant cause of soft errors. (Fig.2)

500km Primary cosmic ray from the galaxy Mold compound Ionosphere Nuclear reaction with Mainly due to natural radioisotope Alpha particle atmospheric molecules in the filler material (silica grains). 50km Stratosphere大気との核反応 Dielectric layer 20km Troposphere Gate Sea level Secondary cosmic ray Metal wiring 磁気 (mainly neutron) 北極 The Earth Soft Error N diffusion Isolation P well Earth’s Magnetic field

Fig.1 alpha-particle induced soft error Fig.2 cosmic ray (neutron) induced soft error

Soft Error Countermeasures ? YES NO In Production

Supplier Process 256Kb 1Mb 2Mb 4Mb 8Mb 16Mb 32Mb 64Mb Remarks 0.13um CMOS Market Introduction in 2003 ✔ ECC embedded (16Mb only) Renesas 0.15um Market Introduction in 2004 ✔ ✔ ✔ ✔ (5V) Changes to 0.11um Advanced LP-SRAM Advanced (first with 16Mb) 0.11um Market Introduction in 2013 ✔ (3V) ✔ ✔ ✔ ✔ Advanced (first with 4Mb) 90nm CMOS EOL ✔ ✔ ✔ ✔ ✔ ✔ ✔ 90nm CMOS (Note) Competitor A Non-ECC LP-SRAM 65nm CMOS ✔ ✔ ✔ ✔ ✔ (Note) ECC embedded 65nm CMOS CMOS ✔ ✔ ✔ ✔ ✔ ✔ No 32Mb+ product (Note) Competitor B Non-ECC LP-SRAM CMOS ✔ ✔ (Note) ECC embedded No 16Mb+ product

Note： Renesas recognition based on public information and sales information. ECC: Error Correction Code, or Error Checking and Correction It is not the official announcement of each competitor company.

ECC Countermeasure Soft error rate Product Family By what? Differentiator embedded? against soft error? (Measured)

R1LV1616H series Single FIT/Mb: excellent soft (0.13um 16Mb CMOS Embedded ECC < 5.5 FIT/Mb YES YES error immunity in practical use LPSRAM)

Advanced LPSRAM Soft-error immune series Outstanding soft error immunity process & device < 0.1 FIT/Mb (256Kb to 64Mb NO YES over ECC-embedded products technology LPSRAMs)

 0.13um CMOS process Data Read Data input from I/O Memory Array  Full CMOS (6T memory cell) （） Data: 128bit Parity: 10bit （128+10 bit）  45ns access time Parity check  Low standby current: ECC circuitry （Syndrome generation）（16bit） Single error correction 0.5uA Typ. / 8uA Max. （128+10 bit） Work area  High reliability : （） Error correction Data sorting Low soft error rate Data: 128bit 128bit by embedded ECC together with （）（128bit） External I/O “Alternate ECC Architecture” （） Parity generation Data:16bit （128+10 bit） Measures against multi-cell errors: Different word addresses are assigned to Write to Memory Array physically adjacent memory cells. Also known as “Bit interleaving ” Fig. A: ECC architecture Fig. B: Internal flow in Write

ECC: Error Check and Correction Syndrome: A bit-string (vector) indicating which bit is upset

 Exclusive technology achieves both high-performance and high-reliability without any technical trade-off

 Excellent soft error immunity without embedded ECC

 Latch-up free memory cell structure

WORD Vcc Vcc 2nd stacked structure : Soft error free: separate physical capacitor Stores larger amount of TFT ON OFF ( PMOS) (not parasitic capacitance) charge

node node # “H” “L” access 1st stacked structure: Latch-up free: ( NMOS) p-type TFT No parasitic PNPN- (thin film transistor) structure in the substrate capacitor OFF ON driver ( NMOS) Infrastructure: Low standby current: NMOS formed Optimized leak current in Si substrate of transistors BIT GND GND BIT#

Memory cell circuit 3D image of the memory cell

1Mb/2M/4Mb 8 8

1Mb/4Mb 0.5 14.1 1Mb 32pin 4Mb 0.5 11.76 20 13.4 1.27 1.27 20.75 20.95 x8 Config. x8 / x16 2Mb/4Mb 4Mb/8Mb /16Mb Config.

/8Mb 11.76 44pin /32Mb 0.8 /64Mb (0.11um) 16Mb 18.41 (0.13um) 8Mb /16Mb 8Mb 8.5 8.5 48pin /32Mb /16Mb 9.5 (48ball) /64Mb 12.00 /32Mb 0.5 7.5 8.0 20.00 /64Mb

Renesas provides 6 kinds of common packages, which 10.49 52pin are upward compatible, making it easy to expand 0.4 density without changing printed circuit board 10.79

Wafer Bit Package Packing Access Operating Operating PLP Density Catalog Part Name Orderable Part Name Process Config. (pinout) Type Time Voltage Temperature period R1LP5256ESA-5SI#B1 TSOP-I (28) Tray 55ns 4.5V to 5.5V -40 to 85 °C Mar. 2031 R1LP5256ESA-5SI 0.15um R1LP5256ESA-5SI#S1 TSOP-I (28) Tape & Reel 55ns 4.5V to 5.5V -40 to 85 °C Mar. 2031 256Kbit 32K x 8 Advanced R1LP5256ESP-5SI#B1 SOP (28) Magazine 55ns 4.5V to 5.5V -40 to 85 °C Mar. 2031 R1LP5256ESP-5SI R1LP5256ESP-5SI#S1 SOP (28) Tape & Reel 55ns 4.5V to 5.5V -40 to 85 °C Mar. 2031 R1LV5256ESA-5SI#B1 TSOP-I (28) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 R1LV5256ESA-5SI 0.15um R1LV5256ESA-5SI#S1 TSOP-I (28) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 256Kbit 32K x 8 Advanced R1LV5256ESP-5SI#B1 SOP (28) Magazine 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 R1LV5256ESP-5SI R1LV5256ESP-5SI#S1 SOP (28) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031

(Note) Containers called “magazine”, “tube”, or “stick” are all referred to as "Magazine" here.

Wafer Bit Package Packing Access Operating Operating PLP Density Catalog Part Name Orderable Part Name Process Config. (pinout) Type Time Voltage Temperature period R1LP0108ESA-5SI#B1 sTSOP (32) Tray 55ns 4.5V to 5.5V -40 to 85 °C Mar. 2031 R1LP0108ESA-5SI R1LP0108ESA-5SI#S1 sTSOP (32) Tape & Reel 55ns 4.5V to 5.5V -40 to 85 °C Mar. 2031

0.15um R1LP0108ESF-5SI#B1 TSOP-I (32) Tray 55ns 4.5V to 5.5V -40 to 85 °C Mar. 2031 1Mbit 128K x 8 R1LP0108ESF-5SI Advanced R1LP0108ESF-5SI#S1 TSOP-I (32) Tape & Reel 55ns 4.5V to 5.5V -40 to 85 °C Mar. 2031 R1LP0108ESN-5SI#B1 SOP (32) Magazine 55ns 4.5V to 5.5V -40 to 85 °C Mar. 2031 R1LP0108ESN-5SI R1LP0108ESN-5SI#S1 SOP (32) Tape & Reel 55ns 4.5V to 5.5V -40 to 85 °C Mar. 2031 R1LV0108ESA-5SI#B1 sTSOP (32) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 R1LV0108ESA-5SI R1LV0108ESA-5SI#S1 sTSOP (32) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031

0.15um R1LV0108ESF-5SI#B1 TSOP-I (32) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 1Mbit 128K x 8 R1LV0108ESF-5SI Advanced R1LV0108ESF-5SI#S1 TSOP-I (32) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 R1LV0108ESN-5SI#B1 SOP (32) Magazine 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 R1LV0108ESN-5SI R1LV0108ESN-5SI#S1 SOP (32) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 R1LV0208BSA-5SI#B1 sTSOP (32) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 256K x 8 R1LV0208BSA-5SI 0.15um R1LV0208BSA-5SI#S1 sTSOP (32) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 Advanced 2Mbit R1LV0216BSB-5SI#B1 TSOP-II (44) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 128K x16 R1LV0216BSB-5SI R1LV0216BSB-5SI#S1 TSOP-II (44) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031

Wafer Bit Package Packing Access Operating Operating PLP Density Catalog Part Name Orderable Part Name Process Config. (pinout) Type Time Voltage Temperature period R1LP0408DSB-5SI#B1 TSOP-II (32) Tray 55ns 4.5V to 5.5V -40 to 85 °C Mar. 2031 R1LP0408DSB-5SI 0.15um R1LP0408DSB-5SI#S1 TSOP-II (32) Tape & Reel 55ns 4.5V to 5.5V -40 to 85 °C Mar. 2031 4Mbit 512K x 8 Advanced R1LP0408DSP-5SI#B1 SOP (32) Magazine 55ns 4.5V to 5.5V -40 to 85 °C Mar. 2031 R1LP0408DSP-5SI R1LP0408DSP-5SI#S1 SOP (32) Tape & Reel 55ns 4.5V to 5.5V -40 to 85 °C Mar. 2031 RMLV0408EGSA-4S2#AA1 sTSOP (32) Tray 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 RMLV0408EGSA-4S2 RMLV0408EGSA-4S2#KA1 sTSOP (32) Tape & Reel 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 RMLV0408EGSB-4S2#AA1 TSOP-II (32) Tray 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 512K x 8 RMLV0408EGSB-4S2 RMLV0408EGSB-4S2#HA1 TSOP-II (32) Tape & Reel 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 RMLV0408EGSP-4S2#CA1 SOP (32) Magazine 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 RMLV0408EGSP-4S2 0.11um RMLV0408EGSP-4S2#HA1 SOP (32) Tape & Reel 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 4Mbit Advanced RMLV0414EGSB-4S2#AA1 TSOP-II (44) Tray 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 RMLV0414EGSB-4S2 RMLV0414EGSB-4S2#HA1 TSOP-II (44) Tape & Reel 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 RMLV0416EGBG-4S2#AC0 FBGA (48) Tray 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 256K x 16 RMLV0416EGBG-4S2 RMLV0416EGBG-4S2#KC0 FBGA (48) Tape & Reel 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 RMLV0416EGSB-4S2#AA1 TSOP-II (44) Tray 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 RMLV0416EGSB-4S2 RMLV0416EGSB-4S2#HA1 TSOP-II (44) Tape & Reel 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031

Wafer Bit Package Packing Access Operating Operating PLP Density Catalog Part Name Orderable Part Name Process Config. (pinout) Type Time Voltage Temperature period RMLV0808BGSB-4S2#AA0 TSOP-II (44) Tray 45ns 2.4V to 3.6V -40 to 85 °C Mar. 2031 1M x 8 RMLV0808BGSB-4S2 RMLV0808BGSB-4S2#HA0 TSOP-II (44) Tape & Reel 45ns 2.4V to 3.6V -40 to 85 °C Mar. 2031 RMLV0816BGBG-4S2#AC0 FBGA (48) Tray 45ns 2.4V to 3.6V -40 to 85 °C Mar. 2031 512K x 16 RMLV0816BGBG-4S2 RMLV0816BGBG-4S2#KC0 FBGA (48) Tape & Reel 45ns 2.4V to 3.6V -40 to 85 °C Mar. 2031

0.11um 512K x 16 RMLV0816BGSA-4S2#AA0 TSOP-I (48) Tray 45ns 2.4V to 3.6V -40 to 85 °C Mar. 2031 8Mbit RMLV0816BGSA-4S2 Advanced / 1M x 8 RMLV0816BGSA-4S2#KA0 TSOP-I (48) Tape & Reel 45ns 2.4V to 3.6V -40 to 85 °C Mar. 2031 RMLV0816BGSB-4S2#AA0 TSOP-II (44) Tray 45ns 2.4V to 3.6V -40 to 85 °C Mar. 2031 512K x 16 RMLV0816BGSB-4S2 RMLV0816BGSB-4S2#HA0 TSOP-II (44) Tape & Reel 45ns 2.4V to 3.6V -40 to 85 °C Mar. 2031

512K x 16 RMLV0816BGSD-4S2#AA1 uTSOP (52) Tray 45ns 2.4V to 3.6V -40 to 85 °C Mar. 2031 RMLV0816BGSD-4S2 / 1M x 8 RMLV0816BGSD-4S2#HA1 uTSOP (52) Tape & Reel 45ns 2.4V to 3.6V -40 to 85 °C Mar. 2031

Wafer Bit Package Packing Access Operating Operating PLP Density Catalog Part Name Orderable Part Name Process Config. (pinout) Type Time Voltage Temperature period R1LV1616HBG-4SI#B0 FBGA (48) Tray 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 R1LV1616HBG-4SI R1LV1616HBG-4SI#S0 FBGA (48) Tape & Reel 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 1M x 16 R1LV1616HBG-5SI#B0 FBGA (48) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 R1LV1616HBG-5SI 0.13um 16Mbit R1LV1616HBG-5SI#S0 FBGA (48) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 CMOS ECC embedded R1LV1616HSA-4SI#B1 TSOP-I (48) Tray 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 R1LV1616HSA-4SI 1M x 16 R1LV1616HSA-4SI#S1 TSOP-I (48) Tape & Reel 45ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 / 2M x 8 R1LV1616HSA-5SI#B1 TSOP-I (48) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 R1LV1616HSA-5SI R1LV1616HSA-5SI#S1 TSOP-I (48) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 RMLV1616AGBG-5S2#AC0 FBGA (48) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2030 1M x 16 RMLV1616AGBG-5S2 RMLV1616AGBG-5S2#KC0 FBGA (48) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2030

0.11um RMLV1616AGSA-5S2#AA0 TSOP-I (48) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2030 16Mbit RMLV1616AGSA-5S2 Advanced 1M x 16 RMLV1616AGSA-5S2#KA0 TSOP-I (48) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2030 / 2M x 8 RMLV1616AGSD-5S2#AA1 uTSOP (52) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 RMLV1616AGSD-5S2 RMLV1616AGSD-5S2#HA1 uTSOP (52) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031

Wafer Bit Package Packing Access Operating Operating PLP Density Catalog Part Name Orderable Part Name Process Config. (pinout) Type Time Voltage Temperature period

0.11um RMWV3216AGBG-5S2#AC0 FBGA (48) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2030 32Mbit 2M x 16 RMWV3216AGBG-5S2 Advanced RMWV3216AGBG-5S2#KC0 FBGA (48) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2030 RMLV3216AGBG-5S2#AC0 FBGA (48) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 2M x 16 RMLV3216AGBG-5S2 RMLV3216AGBG-5S2#KC0 FBGA (48) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031

0.11um 32Mbit RMLV3216AGSA-5S2#AA0 TSOP-I (48) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 New RMLV3216AGSA-5S2 Advanced 2M x 16 product RMLV3216AGSA-5S2#KA0 TSOP-I (48) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 / 4M x 8 RMLV3216AGSD-5S2#AA0 uTSOP (52) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 RMLV3216AGSD-5S2 RMLV3216AGSD-5S2#HA0 uTSOP (52) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 RMWV6416AGBG-5S2#AC0 FBGA (48) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 4M x 16 RMWV6416AGBG-5S2 RMWV6416AGBG-5S2#KC0 FBGA (48) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031

0.11um 64Mbit RMWV6416AGSA-5S2#AA0 TSOP-I (48) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 New RMWV6416AGSA-5S2 Advanced product 4M x 16 RMWV6416AGSA-5S2#KA0 TSOP-I (48) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 / 8M x 8 RMWV6416AGSD-5S2#AA0 uTSOP (52) Tray 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031 RMWV6416AGSD-5S2 RMWV6416AGSD-5S2#HA0 uTSOP (52) Tape & Reel 55ns 2.7V to 3.6V -40 to 85 °C Mar. 2031

Wafer Bit Package Packing Access Operating Operating PLP Density Catalog Part Name Orderable Part Name Process Config. (pinout) Type Time Voltage Temperature period R1RP0408DGE-2LR R1RP0408DGE-2LR#B1 SOJ (36) Magazine 12ns 4.5V to 5.5V 0 to 70 °C - 512K x 8 R1RP0408DGE-2PI R1RP0408DGE-2PI#B1 SOJ (36) Magazine 12ns 4.5V to 5.5V -40 to 85 °C - R1RP0408DGE-2PR R1RP0408DGE-2PR#B1 SOJ (36) Magazine 12ns 4.5V to 5.5V 0 to 70 °C - R1RP0416DGE-2LR R1RP0416DGE-2LR#B1 SOJ (44) Magazine 12ns 4.5V to 5.5V 0 to 70 °C - R1RP0416DGE-2PI R1RP0416DGE-2PI#B1 SOJ (44) Magazine 12ns 4.5V to 5.5V -40 to 85 °C - 256K x 16 R1RP0416DGE-2PR R1RP0416DGE-2PR#B1 SOJ (44) Magazine 12ns 4.5V to 5.5V 0 to 70 °C - R1RP0416DGE-2SR R1RP0416DGE-2SR#B1 SOJ (44) Magazine 12ns 4.5V to 5.5V 0 to 70 °C - 0.18um 4Mbit R1RP0416DSB-0PI R1RP0416DSB-0PI#D1 TSOP-II (44) Tray 10ns 4.5V to 5.5V -40 to 85 °C Mar. 2030 CMOS R1RP0416DSB-0PR R1RP0416DSB-0PR#D1 TSOP-II (44) Tray 10ns 4.5V to 5.5V 0 to 70 °C Mar. 2030 R1RP0416DSB-2LR#D1 TSOP-II (44) Tray 12ns 4.5V to 5.5V 0 to 70 °C Mar. 2030 R1RP0416DSB-2LR 256K x 16 R1RP0416DSB-2LR#S1 TSOP-II (44) Tape & Reel 12ns 4.5V to 5.5V 0 to 70 °C Mar. 2030 R1RP0416DSB-2PI R1RP0416DSB-2PI#D1 TSOP-II (44) Tray 12ns 4.5V to 5.5V -40 to 85 °C Mar. 2030 R1RP0416DSB-2PR#D1 TSOP-II (44) Tray 12ns 4.5V to 5.5V 0 to 70 °C Mar. 2030 R1RP0416DSB-2PR R1RP0416DSB-2PR#S1 TSOP-II (44) Tape & Reel 12ns 4.5V to 5.5V 0 to 70 °C Mar. 2030 R1RP0416DSB-2SR R1RP0416DSB-2SR#D1 TSOP-II (44) Tray 12ns 4.5V to 5.5V 0 to 70 °C Mar. 2030

Wafer Bit Package Packing Access Operating Operating PLP Density Catalog Part Name Orderable Part Name Process Config. (pinout) Type Time Voltage Temperature period R1RW0408DGE-2LR R1RW0408DGE-2LR#B1 SOJ (36) Magazine 12ns 3.0V to 3.6V 0 to 70 °C - 512K x 8 R1RW0408DGE-2PI R1RW0408DGE-2PI#B1 SOJ (36) Magazine 12ns 3.0V to 3.6V -40 to 85 °C - R1RW0408DGE-2PR R1RW0408DGE-2PR#B1 SOJ (36) Magazine 12ns 3.0V to 3.6V 0 to 70 °C - R1RW0416DGE-2LR R1RW0416DGE-2LR#B1 SOJ (44) Magazine 12ns 3.0V to 3.6V 0 to 70 °C - 256K x 16 R1RW0416DGE-2PI R1RW0416DGE-2PI#B1 SOJ (44) Magazine 12ns 3.0V to 3.6V -40 to 85 °C - R1RW0416DGE-2PR R1RW0416DGE-2PR#B1 SOJ (44) Magazine 12ns 3.0V to 3.6V 0 to 70 °C - R1RW0416DSB-0PI#D1 TSOP-II (44) Tray 10ns 3.0V to 3.6V -40 to 85 °C Mar. 2030 R1RW0416DSB-0PI 0.18um R1RW0416DSB-0PI#S1 TSOP-II (44) Tape & Reel 10ns 3.0V to 3.6V -40 to 85 °C Mar. 2030 4Mbit CMOS R1RW0416DSB-0PR#D1 TSOP-II (44) Tray 10ns 3.0V to 3.6V 0 to 70 °C Mar. 2030 R1RW0416DSB-0PR R1RW0416DSB-0PR#S1 TSOP-II (44) Tape & Reel 10ns 3.0V to 3.6V 0 to 70 °C Mar. 2030 R1RW0416DSB-2LR R1RW0416DSB-2LR#D1 TSOP-II (44) Tray 12ns 3.0V to 3.6V 0 to 70 °C Mar. 2030 256K x 16 R1RW0416DSB-2PI#D1 TSOP-II (44) Tray 12ns 3.0V to 3.6V -40 to 85 °C Mar. 2030 R1RW0416DSB-2PI R1RW0416DSB-2PI#S1 TSOP-II (44) Tape & Reel 12ns 3.0V to 3.6V -40 to 85 °C Mar. 2030 R1RW0416DSB-2PR#D1 TSOP-II (44) Tray 12ns 3.0V to 3.6V 0 to 70 °C Mar. 2030 R1RW0416DSB-2PR R1RW0416DSB-2PR#S1 TSOP-II (44) Tape & Reel 12ns 3.0V to 3.6V 0 to 70 °C Mar. 2030 R1RW0416DSB-2SR R1RW0416DSB-2SR#D1 TSOP-II (44) Tray 12ns 3.0V to 3.6V 0 to 70 °C Mar. 2030

© 2021 Renesas Electronics Corporation. All rights reserved. Page 21 Low Power SRAM : Part name decoder R1 L V 5256 E SA - 5 S I #B1 Packing, Environmental Packing Environmental R1 L P 04 08 D SP - 5 S I #B0 #B0 / #B1 Tray or Magazine Pb free

#S0 / #S1 Tape & Reel Pb free RM L V 04 16 E G SB - 4 S 2 #A A 1 Assembly Site Rev. , etc. RENESAS Memory Environment 0 Rev. Code

Chip configuration A Pb free (pure-Tin plating) 1 Rev. Code

L LPSRAM, Single chip C Pb free (non pure-Tin plating) W LPSRAM, Two chips Packing A Tray Operating Voltage C Magazine Operating Temperature H Tape & Reel (TSOP, uTSOP, SOP) V 3V R 0 to 70 deg. C K Tape & Reel (FBGA, sTSOP) 5V P I -40 to 85 deg. C

Memory Density 2 -40 to 85 deg. C Stand-by current / Data retention current 5256 256Kb (x8) Package Bus Width Type Access time 01 1Mb L Standard SA TSOP-I 5 55 ns Low power version 02 2Mb x8 S 08 (256Kb/8Mb/16Mb/32Mb/64Mb) 4 45 ns 04 4Mb 16 x16 sTSOP (1Mb/2Mb/4Mb) 08 8Mb SB TSOP-II 16 16Mb Chip Generation SD μTSOP

32 32Mb Industrial Grade SF TSOP-I (1Mb) 64 64Mb SP SOP (256Kb, 4Mb) SN SOP (1Mb) BG FBGA © 2021 Renesas Electronics Corporation. All rights reserved. Page 22 Asynchronous Fast 4Mb SRAM : Part name decoder R1 R W 04 16 D SB - 2 P I #D1

RENESAS Memory Packing, Environmental Packing Environmental Fast SRAM #B0 / #B1 Magazine (SOJ) Pb free #D0 / #D1 Tray (TSOP) Pb free #S0 / #S1 Tape & Reel Pb free

Operation Voltage Operating Temperature W 3.3V R 0 to 70 deg C P 5V I -40 to 85 deg C Memory density Stand by current / Data retention current 04 4Mb P Standard L Low power version Bus Width S Super Low power version 08 x8 Access time 16 x16 2 12 ns 0 10 ns Package type Chip generation GE SOJ SB TSOP-II

Example shown here: Part number R1RW0416DSB-2PI#D1