COM Express Compact Module User's Manual

BW968 COM Express Compact Module User’s Manual

A-3811-M-2011

Chapter 1 Introduction www.dfi.com Copyright FCC and DOC Statement on Class B

This publication contains information that is protected by copyright. No part of it may be re- This equipment has been tested and found to comply with the limits for a Class B digital produced in any form or by any means or used to make any transformation/adaptation without device, pursuant to Part 15 of the FCC rules. These limits are designed to provide reason- the prior written permission from the copyright holders. able protection against harmful interference when the equipment is operated in a residential installation. This equipment generates, uses and can radiate radio frequency energy and, if not This publication is provided for informational purposes only. The manufacturer makes no installed and used in accordance with the instruction manual, may cause harmful interference representations or warranties with respect to the contents or use of this manual and specifi- to radio communications. However, there is no guarantee that interference will not occur in a cally disclaims any express or implied warranties of merchantability or fitness for any particular particular installation. If this equipment does cause harmful interference to radio or television purpose. The user will assume the entire risk of the use or the results of the use of this docu- reception, which can be determined by turning the equipment off and on, the user is encour- ment. Further, the manufacturer reserves the right to revise this publication and make changes aged to try to correct the interference by one or more of the following measures: to its contents at any time, without obligation to notify any person or entity of such revisions or changes. • Reorient or relocate the receiving antenna. • Increase the separation between the equipment and the receiver. Changes after the publication’s first release will be based on the product’s revision. The website • Connect the equipment into an outlet on a circuit different from that to which the receiver will always provide the most updated information. is connected. • Consult the dealer or an experienced radio TV technician for help. © 2016. All Rights Reserved.

Notice:

Trademarks 1. The changes or modifications not expressly approved by the party responsible for compliance could void the user’s authority to operate the equipment. Product names or trademarks appearing in this manual are for identification purpose only and 2. Shielded interface cables must be used in order to comply with the emission limits. are the properties of the respective owners.

COM Express Specification Reference

PICMG® COM Express ModuleTM Base Specification. http://www.picmg.org/

Chapter 1 Introduction www.dfi.com Table of Contents Cooling Options...... 23 Installing BW968 onto a Carrier Board...... 24 Installing the COM Express Debug Card...... 26 Copyright ��2 Chapter 4 - BIOS Setup ��28 Trademarks ��2 Overview ...... 28 Insyde BIOS Setup Utility...... 29 Main...... 29 COM Express Specification Reference ��2 Advanced ...... 29 Security...... 35 FCC and DOC Statement on Class B ��2 Boot...... 35 Exit...... 36 Updating the BIOS...... 37 About this Manual ��4 Notice: BIOS SPI ROM...... 37 Warranty ��4 Chapter 5 - Supported Software ��38 Static Electricity Precautions ��4 Appendix A - Troubleshooting ��50 Safety Measures ��4 Appendix B - Insyde BIOS Standard Status POST Code 52 About the Package ��5 Optional Items ��5 Before Using the System Board ��5 Chapter 1 - Introduction ��6

Specifications...... 6 Features ...... 7 Chapter 2 - Concept ��8

COM Express Module Standards...... 8 Specification Comparison Table...... 9 Chapter 3 - Hardware Installation ��10

Board Layout...... 10 Block Diagram...... 10 Mechanical Diagram...... 11 System Memory...... 12 Connectors...... 13 CPU Fan Connector...... 13 COM Express Connectors...... 13 COM Express Connectors...... 14 COM Express Connectors Signals and Descriptions...... 15 Standby Power LED...... 23

Chapter 1 Introduction www.dfi.com About this Manual Static Electricity Precautions This manual can be downloaded from the website, or acquired as an electronic file included in It is quite easy to inadvertently damage your PC, system board, components or devices even the optional CD/DVD. The manual is subject to change and update without notice, and may be before installing them in your system unit. Static electrical discharge can damage computer based on editions that do not resemble your actual products. Please visit our website or con- components without causing any signs of physical damage. You must take extra care in han- tact our sales representatives for the latest editions. dling them to ensure against electrostatic build-up.

1. To prevent electrostatic build-up, leave the system board in its anti-static bag until you are ready to install it. Warranty 2. Wear an antistatic wrist strap. 1. Warranty does not cover damages or failures that arised from misuse of the product, in- 3. Do all preparation work on a static-free surface. ability to use the product, unauthorized replacement or alteration of components and product specifications. 4. Hold the device only by its edges. Be careful not to touch any of the components, contacts or connections. 2. The warranty is void if the product has been subjected to physical abuse, improper installation, modification, accidents or unauthorized repair of the product. 5. Avoid touching the pins or contacts on all modules and connectors. Hold modules or connectors by their ends. 3. Unless otherwise instructed in this user’s manual, the user may not, under any circum- stances, attempt to perform service, adjustments or repairs on the product, whether in or out of warranty. It must be returned to the purchase point, factory or authorized service Important: agency for all such work. Electrostatic discharge (ESD) can damage your processor, disk drive and other components. Perform the upgrade instruction procedures described at an ESD worksta- 4. We will not be liable for any indirect, special, incidental or consequencial damages to the tion only. If such a station is not available, you can provide some ESD protection by product that has been modified or altered. wearing an antistatic wrist strap and attaching it to a metal part of the system chassis. If a wrist strap is unavailable, establish and maintain contact with the system chassis throughout any procedures requiring ESD protection.

Safety Measures To avoid damage to the system: • Use the correct AC input voltage range.

To reduce the risk of electric shock: • Unplug the power cord before removing the system chassis cover for installation or servicing. After installation or servicing, cover the system chassis before plugging the power cord.

Chapter 1 Introduction www.dfi.com About the Package The package contains the following items. If any of these items are missing or damaged, please contact your dealer or sales representative for assistance.

• One BW968 board • One Heat sink (Height: TBD) Optional Items • COM332-B carrier board kit • Heat spreader

The board and accessories in the package may not come similar to the information listed above. This may differ in accordance with the sales region or models in which it was sold. For more information about the standard package in your region, please contact your dealer or sales representative. Before Using the System Board Before using the system board, prepare basic system components.

If you are installing the system board in a new system, you will need at least the following internal components.

• Memory module • Storage devices such as hard disk drive, DVD-ROM, etc.

You will also need external system peripherals you intend to use which will normally include at least a keyboard, a mouse and a video display monitor.

Chapter 1 Introduction www.dfi.com Chapter 1

Chapter 1 - Introduction

Specifications

System Processor Intel® Pentium®/Celeron® Processor N3000 Family, BGA 1170 (*) WatchDog Output & System Reset, Programmable via Software from 1 to 255 Seconds Intel® Atom™ Processor x5-E8000, Quad Core, 2M Cache, 1.04GHz, 5W Timer Interval Intel® Pentium® Processor N3710, Quad Core, 2M Cache, 1.6GHz (2.56GHz), 6W Intel® Celeron® Processor N3160, Quad Core, 2M Cache, 1.6GHz (2.24GHz), 6W Security TPM Available Upon Request Intel® Celeron® Processor N3060, Dual Core, 2M Cache, 1.6GHz (2.48GHz), 6W Power Type 12V, 5VSB, VCC_RTC (ATX mode) ® ® Intel Celeron Processor N3010, Dual Core, 2M Cache, 1.04GHz (2.24GHz), 4W 12V, VCC_RTC (AT mode) Memory Two 204-pin SODIMM up to 8GB Consumption Typical: N3710: 12V @ 0.28A (3.41Watt) Dual Channel DDR3L 1600MHz Max.: N3710: 12V @ 0.61A (7.35Watt) BIOS Insyde SPI 64Mbit OS Support Windows 8.1 64-bit Graphics Controller Intel® HD Graphics Windows 7 (/WES7) 32/64-bit Windows 10 IoT Enterprise 64-bit Feature OpenGL 4.2, Direct X 11.1, OpenCL 1.2, OGL ES 3.0 HW Decode: H.264, MPEG2, VC1, VP8, H.265, MPEG4 Debian 8 (with VESA graphic driver) HW Encode: H.264, MPEG2, MPEG4 CentOS 7 (with VESA graphic driver) Ubuntu 15.10 (Intel graphic driver available) Display 1 x VGA/DDI (DDI available upon request) 1 x LVDS/eDP (eDP available upon request) Environment Temperature Operating: 0 to 60°C 1 x DDI Storage: -40 to 85°C VGA: resolution up to 1920x1200 @ 60Hz Humidity Operating: 10 to 90% RH LVDS: dual channel 24-bit, resolution up to 1920x1200 @ 60Hz Storage: 10 to 90% RH eDP: resolution up to 2560x1440 @ 60Hz HDMI: resolution up to 3840x2160 @ 30Hz or 2560x1600 @ 60Hz MTBF 746,818 hrs @ 25°C; 402,691 hrs @ 45°C; 241,711 hrs @ 60°C DP: resolution up to 3840x2160 @ 30Hz or 2560x1600 @ 60Hz Calculation Model: Telcordia Issue 2, Method Case 3 Environment: GB, GC – Ground Benign, Controlled Triple VGA + LVDS + DDI ® Displays DDI + eDP + DDI (available upon request) Mechanical Dimensions COM Express Compact 95mm (3.74") x 95mm (3.74") Expansion Interface 3 x PCIe x1 (Gen 2) ® 1 x LPC Compliance PICMG COM Express R2.1, Type 6 2 1 x I C *When PXE function is used with the UEFI boot type, the client screen might display partial screen 1 x SMBus if the PXE server employs a graphical user interface (GUI)-based management interface. This prob- 2 x Serial (TX/RX) lem is due to resolution compatibility between the server and the client. Audio Interface HD Audio Ethernet Controller 1 x Intel® I211AT PCIe (10/100/1000Mbps) I/O USB 4 x USB 3.0 8 x USB 2.0 SATA 2 x SATA 3.0 (up to 6Gb/s) DIO 1 x 8-bit DIO

Chapter 1 Introduction www.dfi.com Chapter 1

Features

• Watchdog Timer

The Watchdog Timer function allows your application to regularly “clear” the system at the set time interval. If the system hangs or fails to function, it will reset at the set time interval so that your system will continue to operate.

• DDR3L

DDR3L is a higher performance DDR3 SDRAM interface providing less voltage and higher speed successor. DDR3L supporting 1600MHz delivers increased system bandwidth and im- proved performance to provide its higher bandwidth and its increase in performance at a lower power.

• Graphics

The integrated Intel® HD graphics engine delivers an excellent blend of graphics performance and features to meet business needs. It provides excellent video and 3D graphics with out- standing graphics responsiveness. These enhancements deliver the performance and compatibility needed for today’s and tomorrow’s business applications. Supports 1 x VGA/DDI, 1 x LVDS/eDP and 1 DDI interfaces for triple display outputs.

• Serial ATA

Serial ATA is a storage interface that is compliant with SATA 1.0a specification. With speed of up to 6Gb/s (SATA 3.0), it improves hard drive performance faster than the standard parallel ATA whose data transfer rate is 100MB/s. The bandwidth of the SATA 3.0 will be limited by carrier board design.

• Gigabit LAN

The Intel® I211AT Gigabit Ethernet controller supports up to 1Gbps data transmission.

• USB

The system board supports the new USB 3.0. It is capable of running at a maximum transmission speed of up to 5 Gbit/s (625 MB/s) and is faster than USB 2.0 (480 Mbit/s, or 60 MB/s) and USB 1.1 (12Mb/s). USB 3.0 reduces the time required for data transmission, reduces power consumption, and is backward compatible with USB 2.0. It is a marked improvement in device transfer speeds between your computer and a wide range of simultaneously accessible external Plug and Play peripherals.

Chapter 1 Introduction www.dfi.com Chapter 2

Chapter 2 - Concept

COM Express Module Standards

The figure below shows the dimensions of the different types of COM Express modules.

BW968 is a COM Express Compact module. The dimension is 95mm x 95mm. Common for all Form Factors Extended only Basic only Compact only Compact and Basic only Mini only

106.00 Extended 91.00 Compact Basic

70.00

51.00 Mini

18.00

6.00 4.00 0.00 0.00 4.00 16.50 74.20 80.00 91.00 121.00 151.00

Chapter 2 Concept www.dfi.com PICMG® COM.0 COM Express® Module Base Specification oPICMGn 2.1 - Draft 0.92® COM.0 3 Required and Optional Features COM Express® Module Base Specification o3.2n 2.1 - DraftModule 0.92 Pin-out Types 1-6 & 10 - Required and Optional Features COM Express Required and Optional features are summarized in the following table. The features identified as Minimum (Min.) shall be im Change3 Required Key: and Optional Features 3.2 Module Pin-out Types 1-6 & 10 - Required and Optional Features COMTable Express3.2: Module Required Pin-out and - Required Optional and features Optional are Features summarized A-B Connector in the following table. The features identified as Minimum (Min.) shall be im Change Key: COM Express Module Base DFI BW968 Specification Type 6 Type 6 ConnectorTable 3.2: Module Feature Pin-out - Required and Optional Features A-B Connector (No IDE or PCI, add DDI+ USB3) MinCOM/ Express Max Module Base DFI BW968 A-B Specification Type 6System I/O Type 6 A-BConnector FeaturePCI Express Lanes 0 - 5 1 / 6 3 (No IDE or PCI, add DDI+ USB3) A-B LVDS Channel A 0 / 1 0 / 1 (Option : eDP or LVDS) Min / Max A-B LVDS Channel B 0 / 1 System I/O 1 A-B eDPPCI Expresson LVDS Lanes CH A 0pins - 5 10 / 61 31 / 0 (Option : eDP or LVDS) A-B VGALVDS Port Channel A 0 / 1 0/10 / 1(Option (Option : DDI2: eDP or or VGA) LVDS) A-B TV-OutLVDS Channel B NA0 / 1 NA1 A-B eDPDDI 0on LVDS CH A pins NA0 / 1 NA1 / 0 (Option : eDP or LVDS) 5 A-B VGASerial Port Ports 1 - 2 0 / 12 0/12 (Option : DDI2 or VGA) A-B TV-OutCAN interface on SER1 NA0 / 1 NA0 A-B DDISATA 0 / SAS Ports NA1 / 4 NA2 A-B5 AC’97 / HDA Digital Interface 0 / 1 1 A-B Serial Ports 1 - 2 0 / 2 2 A-B USBCAN 2.0interface Ports on SER1 40 / 81 80 A-B USBSATA Client / SAS Ports 01 / 14 02 A-B USBAC’97 3.0 / HDAPorts Digital InterfaceNA 0 / 1 NA1 A-B USBLAN Port2.0 Ports 0 41 / 81 81 A-B USBExpress Client Card Support 10 / 21 20 Chapter A-B2 USBLPC Bus3.0 Ports NA1 / 1 NA1 PICMG® COM.0 A-B LANSPI Port 0 1 / 21 1 A-B Express Card Support 1 / 2 System Management2 ® SDIO (muxed on GPIO) 0 / 1 0 COM Express Module Base Specification A-B6 LPC Bus 1 / 1 1 A-B on 2.1 - Draft 0.92 A-B SPIGeneral Purpose I/O 18 / 28 18 3 Required and Optional Features A-B SMBus 1 / 1 System Management1 A-B SDIOI2C (muxed on GPIO) 10 / 1 10 A-B6 3.2 Module Pin-out Types 1-6 & 10 - Required and Optional Features A-B GeneralWatchdog Purpose Timer I/O 80 / 81 81 SpecificationCOM Express Required and OptionalComparison features are summarized Table in the following table. The features identified as Minimum (Min.)A-B shall beSMBusSpeaker im Out 1 / 1 1 Change Key: A-B I2CExternal BIOS ROM Support1 0 / 12 1 A-B Reset Functions 1 / 1 1 The table below shows the COM Express standard specifications and the corresponding specifications supportedA-B on theWatchdog BW968 Timer module. 0 / 1 1 Table 3.2: Module Pin-out - Required and Optional Features A-B Connector A-B5 Indicates 12V-tolerantSpeaker featuresOut on former VCC_12V signals.1 / 1 1 A-B6 Cells in the connectedExternal columnsBIOS ROM spanning Support rows provide 0 /a 2 rough approximation of features sharing1 connector pins. COM Express Module Base DFI BW968 A-B Reset Functions 1COM / 1 Express Module Base 1DFI BW968 Specification Type 6 Type 6 Specification Type 6 Type 6 5 Indicates 12V-tolerant features on former VCC_12V signals. Connector Feature Connector Feature 6 Cells in the connected columns spanning rows provide a rough approximation of features sharing connector pins. (No IDE or PCI, add DDI+ USB3) (No IDE or PCI, add DDI+ USB3) Min / Max COMMin / Express Max Module Base DFI BW968 A-B System I/O A-B Specification TypePower 6 ManagementType 6 A-B PCI Express Lanes 0 - 5 1 / 6 3 A-BConnectorThermal Feature Protection 0 / 1 1 (No IDE or PCI, add DDI+ USB3) A-B LVDS Channel A 0 / 1 0 / 1 (Option : eDP or LVDS) A-B Battery Low Alarm 0 / 1 1 Min / Max A-B LVDS Channel B 0 / 1 1 A-B Suspend/Wake Signals 0 / 3 Power Management1 A-B eDP on LVDS CH A pins 0 / 1 1 / 0 (Option : eDP or LVDS) A-B ThermalPower Button Protection Support 10 / 1 1 A-B VGA Port 0 / 1 0/1 (Option : DDI2 or VGA) A-B BatteryPower Good Low Alarm 10 / 1 1 A-B TV-Out NA NA A-B VCC_5V_SBYSuspend/Wake Contacts Signals 40 / 43 14 5 A-B DDI 0 NA NA A-B PowerSleep Input Button Support 10 / 1 1 5 5 A-B Serial Ports 1 - 2 0 / 2 2 A-B PowerLid Input Good 10 / 1 1 5 A-B CAN interface on SER1 0 / 1 0 A-B VCC_5V_SBYFan Control Signals Contacts 40 / 42 42 A-B5 Trusted Platform Modules 0 / 1 A-B SATA / SAS Ports 1 / 4 2 A-B Sleep Input 0 / 1 1 A-B5 Power A-B AC’97 / HDA Digital Interface 0 / 1 1 A-B Lid Input 0 / 1 1 A-B5 VCC_12V Contacts 12 / 12 A-B USB 2.0 Ports 4 / 8 8 A-B Fan Control Signals 0 / 2 212 A-B USB Client 0 / 1 0 A-BTable 3.3: ModuleTrusted Platform Pin-out Modules - Required and0 / 1 Optional Features C-D Connector1 A-B USB 3.0 Ports NA NA A-B COM Express Module BasePower DFI BW968 Specification Type 6 Type 6 ® A-B LAN Port 0 1 / 1 1 ModuleA-B Pin-outVCC_12V - ContactsRequired and Optional12 / 12 Features C-D Connector. PICMG COM.0 Revision 2.1 Connector Feature 12 A-B Express Card Support 1 / 2 2 Table 3.3: Module Pin-out - Required and(No OIDEptional or PCI, Features add DDI+ USB3)C-D Connector A-B LPC Bus 1 / 1 1 MinCOM/ Express Max Module Base DFI BW968 A-B SPI 1 / 2 1 C-D Specification Type 6System I/O Type 6 A-B System Management Connector FeaturePCI Express Lanes 16 - 31 0 / 16 0 SDIO (muxed on GPIO) 0 / 1 0 (No IDE or PCI, add DDI+ USB3) 6 PCI Express Graphics (PEG) 0 / 1 0 A-B Min / Max General Purpose I/O 8 / 8 8 6 C-D Muxed SDVO Channels 1 - 2 NA System I/O NA A-B SMBus 1 / 1 1 PCI Express Lanes 616 - -15 31 0 / 216 0 A-B I2C 1 / 1 1 PCI ExpressBus - 32 GraphicsBit (PEG) 0NA / 1 0NA A-B Watchdog Timer 0 / 1 1 6 PATA Port NA C-D Muxed SDVO Channels 1 - 2 NA NA A-B Speaker Out 1 / 1 1 PCILAN ExpressPorts 1 -Lanes 2 6 - 15 0NA / 2 0NA A-B External BIOS ROM Support 0 / 2 1 PCIDDIs Bus 1 - -3 32 Bit 0NA / 3 NA1/2 (Option : DDI2 or VGA) A-B Reset Functions 1 / 1 1 6 C-D PATAUSB 3.0 Port Ports NA0 / 4 NA2 5 Indicates 12V-tolerant features on former VCC_12V signals. C-D LAN Ports 1 - 2 NA Power NA 6 Cells in the connected columns spanning rows provide a rough approximation of features sharing connector pins. • 5 Indicates 12V-tolerant features on former VCC_12V signals. C-D VCC_12VDDIs 1 - 3 Contacts 012 / /3 12 1/212 (Option : DDI2 or VGA) COM Express Module Base DFI BW968 C-D6 USB 3.0 Ports 0 / 4 2 • 6 Cells in the connected columnsSpecification spanning Type rows 6 provide aType rough 6 approximation of features Connector Feature C-D Power sharing connector pins. (No IDE or PCI, add DDI+ USB3) C-D VCC_12V Contacts 12 / 12 12 Min / Max A-B Power Management A-B Thermal Protection 0 / 1 1 A-B Battery Low Alarm 0 / 1 1 A-B Suspend/Wake Signals 0 / 3 1 A-B Power Button Support 1 / 1 1 A-B Power Good 1 / 1 1 A-B VCC_5V_SBY Contacts 4 / 4 4 A-B5 Sleep Input 0 / 1 1 A-B5 Lid Input 0 / 1 1 A-B5 Fan Control Signals 0 / 2 2 A-B Trusted Platform Modules 0 / 1 1 A-B Power A-B VCC_12V Contacts 12 / 12 12 Table 3.3: Module Pin-out - Required and Optional Features C-D Connector COM Express Module Base DFI BW968 Specification Type 6 Type 6 Connector Feature (No IDE or PCI, add DDI+ USB3) Min / Max C-D System I/O 9 PCI Express Lanes 16 - 31 0 / 16 0 Chapter 2PCI Concept Express Graphics (PEG) 0 / 1 0 www.dfi.com C-D6 Muxed SDVO Channels 1 - 2 NA NA PCI Express Lanes 6 - 15 0 / 2 0 PCI Bus - 32 Bit NA NA PATA Port NA NA LAN Ports 1 - 2 NA NA DDIs 1 - 3 0 / 3 1/2 (Option : DDI2 or VGA) C-D6 USB 3.0 Ports 0 / 4 2 C-D Power C-D VCC_12V Contacts 12 / 12 12 Chapter 3

Chapter 3 - Hardware Installation Block Diagram Board Layout

R31 S DDI (optional) VGA CH7517 1 an LVDS eDP/DDI (optional) (optional) DDI Port 2 PTN3460

LPC Bus Intel Serial Port 0,1

SLP/LID TPM DDR3L 1600MHz i Top View WDT Embedded 1.2/2.0 SODIMM Pentium 8528 (optional) Channel A Fan PWM/ Controller Celeron TACH_IN IT8518E I2C Bus DDR3L 1600MHz SODIMM Channel B ntel G211 SS EEPROM S2517

8-bit DIO C / D A / B Pentium/Celeron TCA6408A N3000 Family USB 3.0 4x Stand SMBus oer S lash S PCIe x1 (3 x1/1 x2, 1 x1) DDI Port 1 MDI PCIe x1 Intel® GLAN I211AT R32 S USB 2.0 4x

USB 2.0 4x USB 2.0 USB2517

SATA 3.0 2x

HDA

SPI Bus

Bottom View SPI Flash

110 1

xress connector

110 1 110 1

xress connector

110 1

Chapter 3 Hardware Installation www.dfi.com Chapter 3

Mechanical Diagram

BW968 Module

BW968 Module with Heat Sink 4 91

91 101.00 94.00 83.00

16.00 7.00 4.00

49.91 0.30

8.00 Top View 1.40

87.00 18 91.00 95.00 6

3.00 4 0 0 4 80 95 49.21 16.50 3.50 12.50 78.75 87.25 88.50 2 Bottom View

Side View of the Module with Heat Sink 0 45.35

Chapter 3 Hardware Installation www.dfi.com Chapter 3

Important: SystemElectrostatic Memory discharge (ESD) can damage your board, processor, disk drives, add-in boards, and other components. Perform installation procedures at an ESD workstation only. If such a station is not available, you can provide some ESD protection by wear- R32 S ing an antistatic wrist strap and attaching it to a metal part of the system chassis. If a wrist strap is unavailable, establish and maintain contact with the system chassis DDR3L throughout any procedures requiring ESD protection.

System Memory

The system board is equipped with 2GB/4GB/8GB DDR3L system memory onboard supporting 1600MHz, dual channel memory interface.

Important: When the Standby Power LED is red, it indicates that there is power on the board. Power-off the PC then unplug the power cord prior to installing any devices. Failure to do so will cause severe damage to the board and components. 110 1

xress connector

110 1 110 1 R31 S DDR3L xress connector

110 1 1 an Bottom View

Intel

i Pentium 8528 Celeron

ntel G211 SS S2517

Stand oer S lash S

Top View

Chapter 3 Hardware Installation www.dfi.com Chapter 3

Connectors COM Express Connectors The COM Express connectors are used to interface the BW968 COM Express board to a carrier CPU Fan Connector board. Connect the COM Express connectors (located on the solder side of the board) to the COM Express connectors on the carrier board.

R31 S Refer to the “Installing onto a Carrier Board” section for more information. 3 Ground 1 +12V an 1 Sense

R32 S Intel

i Pentium 8528 Celeron

ntel G211 SS S2517

Stand oer S lash S

110 1

xress connector

110 1 Connect the CPU fan’s cable connector to the CPU fan connector on the board. The cooling fan 110 1 COM Express Connectors will provide adequate airflow throughout the chassis to prevent overheating the CPU and board xress connector components. 110 1 BIOS Setting

“Module Board H/W Monitor” submenu in the Advanced menu of the BIOS will display the cur- Refer to the following pages for the pin functions of these connectors. rent speed of the cooling fan. Refer to chapter 4 of the manual for more information.

Chapter 3 Hardware Installation www.dfi.com Chapter 3

COM Express Connectors RowRow A A RowRow B B RowRow A A RowRow B B RowRow C C RowRow D D RowRow C C RowRow D D A1A1 GND GND (FIXED) (FIXED) B1 B1 GND GND (FIXED) (FIXED) A56 A56 NA NA B56B56 NA NA C1C1 GND GND (FIXED) (FIXED) D1 D1 GND GND (FIXED) (FIXED) C56 C56 NA NA D56D56 NA NA A2A2 GBE0_MDI3- GBE0_MDI3- B2 B2 GBE0_ACT# GBE0_ACT# A57 A57 GND GND B57 B57 GPO2 GPO2 C2C2 GND GND D2D2 GND GND C57C57 NA NA D57D57 NA NA A3A3 GBE0_MDI3+ GBE0_MDI3+ B3 B3 LPC_FRAME# LPC_FRAME# A58 A58 NA NA B58B58 NA NA C3C3 USB_SSRX0- USB_SSRX0- D3 D3 USB_SSTX0- USB_SSTX0- C58 C58 NA NA D58D58 NA NA A4A4 GBE0_LINK100# GBE0_LINK100# B4 B4 LPC_AD0 LPC_AD0 A59 A59 NA NA B59B59 NA NA C4C4 USB_SSRX0+ USB_SSRX0+ D4 D4 USB_SSTX0+ USB_SSTX0+ C59 C59 NA NA D59D59 NA NA A5A5 GBE0_LINK1000# GBE0_LINK1000# B5 B5 LPC_AD1 LPC_AD1 A60 A60 GND GND (FIXED) (FIXED) B60 B60 GND GND (FIXED) (FIXED) C5C5 GND GND D5D5 GND GND C60C60 GND GND (FIXED) (FIXED) D60 D60 GND GND (FIXED) (FIXED) A6A6 GBE0_MDI2- GBE0_MDI2- B6 B6 LPC_AD2 LPC_AD2 A61 A61 PCIE_TX2+ PCIE_TX2+ B61 B61 PCIE_RX2+ PCIE_RX2+ C6C6 USB_SSRX1- USB_SSRX1- D6 D6 USB_SSTX1- USB_SSTX1- C61 C61 NA NA D61D61 NA NA A7A7 GBE0_MDI2+ GBE0_MDI2+ B7 B7 LPC_AD3 LPC_AD3 A62 A62 PCIE_TX2- PCIE_TX2- B62 B62 PCIE_RX2- PCIE_RX2- C7C7 USB_SSRX1+ USB_SSRX1+ D7 D7 USB_SSTX1+ USB_SSTX1+ C62 C62 NA NA D62D62 NA NA A8A8 GBE0_LINK# GBE0_LINK# B8 B8 NA NA A63A63 GPI1 GPI1 B63 B63 GPO3 GPO3 C8C8 GND GND D8D8 GND GND C63C63 RSVD RSVD D63 D63 RSVD RSVD A9A9 GBE0_MDI1- GBE0_MDI1- B9 B9 NA NA A64A64 PCIE_TX1+ PCIE_TX1+ B64 B64 PCIE_RX1+ PCIE_RX1+ C9C9 USB_SSRX2- USB_SSRX2- D9 D9 USB_SSTX2- USB_SSTX2- C64 C64 RSVD RSVD D64 D64 RSVD RSVD A10A10 GBE0_MDI1+ GBE0_MDI1+ B10 B10 LPC_CLK LPC_CLK A65 A65 PCIE_TX1- PCIE_TX1- B65 B65 PCIE_RX1- PCIE_RX1- C10C10 USB_SSRX2+ USB_SSRX2+ D10 D10 USB_SSTX2+ USB_SSTX2+ C65 C65 NA NA D65D65 NA NA A11A11 GND GND (FIXED) (FIXED) B11 B11 GND GND (FIXED) (FIXED) A66 A66 GND GND B66B66 WAKE0# WAKE0# C11C11 GND GND (FIXED) (FIXED) D11 D11 GND GND (FIXED) (FIXED) C66 C66 NA NA D66D66 NA NA A12A12 GBE0_MDI0- GBE0_MDI0- B12 B12 PWRBTN# PWRBTN# A67 A67 GPI2 GPI2 B67B67 WAKE1#(LAN_WAKE-) WAKE1#(LAN_WAKE-) C12C12 USB_SSRX3- USB_SSRX3- D12 D12 USB_SSTX3- USB_SSTX3- C67 C67 RSVD RSVD D67 D67 GND GND A13A13 GBE0_MDI0+ GBE0_MDI0+ B13 B13 SMB_CK SMB_CK A68 A68 PCIE_TX0+ PCIE_TX0+ B68 B68 PCIE_RX0+ PCIE_RX0+ C13C13 USB_SSRX3+ USB_SSRX3+ D13 D13 USB_SSTX3+ USB_SSTX3+ C68 C68 NA NA D68D68 NA NA A14A14 NA NA B14B14 SMB_DAT SMB_DAT A69 A69 PCIE_TX0- PCIE_TX0- B69 B69 PCIE_RX0- PCIE_RX0- C14C14 GND GND D14D14 GND GND C69C69 NA NA D69D69 NA NA A15A15 SUS_S3# SUS_S3# B15 B15 SMB_ALERT# SMB_ALERT# A70 A70 GND(FIXED) GND(FIXED) B70 B70 GND GND (FIXED) (FIXED) C15C15 NA NA D15D15 DDI1_CTRLCLK_AUX+ DDI1_CTRLCLK_AUX+ C70 C70 GND GND (FIXED) (FIXED) D70 D70 GND GND (FIXED) (FIXED) A16A16 SATA0_TX+ SATA0_TX+ B16 B16 SATA1_TX+ SATA1_TX+ A71 A71 LVDS_A0+ LVDS_A0+ B71 B71 LVDS_B0+ LVDS_B0+ C16C16 NA NA D16D16 DDI1_CTRLDATA_AUX- DDI1_CTRLDATA_AUX- C71 C71 NA NA D71D71 NA NA A17A17 SATA0_TX- SATA0_TX- B17 B17 SATA1_TX- SATA1_TX- A72 A72 LVDS_A0- LVDS_A0- B72 B72 LVDS_B0- LVDS_B0- C17C17 RSVD RSVD D17D17 RSVD RSVD C72C72 NA NA D72D72 NA NA A18A18 SUS_S4# SUS_S4# B18 B18 SUS_STAT# SUS_STAT# A73 A73 LVDS_A1+ LVDS_A1+ B73 B73 LVDS_B1+ LVDS_B1+ C18C18 RSVD RSVD D18D18 RSVD RSVD C73C73 GND GND D73 D73 GND GND A19A19 SATA0_RX+ SATA0_RX+ B19 B19 SATA1_RX+ SATA1_RX+ A74 A74 LVDS_A1- LVDS_A1- B74 B74 LVDS_B1- LVDS_B1- C19C19 NA NA D19D19 NA NA C74C74 NA NA D74D74 NA NA A20A20 SATA0_RX- SATA0_RX- B20 B20 SATA1_RX- SATA1_RX- A75 A75 LVDS_A2+ LVDS_A2+ B75 B75 LVDS_B2+ LVDS_B2+ C20C20 NA NA D20D20 NA NA C75C75 NA NA D75D75 NA NA A21A21 GND GND (FIXED) (FIXED) B21 B21 GND GND (FIXED) (FIXED) A76 A76 LVDS_A2- LVDS_A2- B76 B76 LVDS_B2- LVDS_B2- C21C21 GND GND (FIXED) (FIXED) D21 D21 GND GND (FIXED) (FIXED) C76 C76 GND GND D76 D76 GND GND A22A22 NA NA B22B22 NA NA A77A77 LVDS_VDD_EN LVDS_VDD_EN B77 B77 LVDS_B3+ LVDS_B3+ C22C22 NA NA D22D22 NA NA C77C77 RSVD RSVD D77 D77 RSVD RSVD A23A23 NA NA B23B23 NA NA A78A78 LVDS_A3+ LVDS_A3+ B78 B78 LVDS_B3- LVDS_B3- C23C23 NA NA D23D23 NA NA C78C78 NA NA D78D78 NA NA A24A24 SUS_S5# SUS_S5# B24 B24 PWR_OK PWR_OK A79 A79 LVDS_A3- LVDS_A3- B79 B79 LVDS_BKLT_EN LVDS_BKLT_EN C24C24 DDI1_HPD DDI1_HPD D24D24 RSVD RSVD C79C79 NA NA D79D79 NA NA A25A25 NA NA B25B25 NA NA A80A80 GND GND (FIXED) (FIXED) B80 B80 GND GND (FIXED) (FIXED) C25C25 NA NA D25D25 RSVD RSVD C80C80 GND GND (FIXED) (FIXED) D80 D80 GND GND (FIXED) (FIXED) A26A26 NA NA B26B26 NA NA A81A81 LVDS_A_CK+ LVDS_A_CK+ B81 B81 LVDS_B_CK+ LVDS_B_CK+ C26C26 NA NA D26D26 DDI1_PAIR0+ DDI1_PAIR0+ C81 C81 NA NA D81D81 NA NA A27A27 BATLOW# BATLOW# B27 B27 WDT WDT A82A82 LVDS_A_CK- LVDS_A_CK- B82 B82 LVDS_B_CK- LVDS_B_CK- C27C27 RSVD RSVD D27D27 DDI1_PAIR0- DDI1_PAIR0- C82C82 NA NA D82D82 NA NA A28A28 (S)ATA_ACT# (S)ATA_ACT# B28 B28 NA NA A83A83 LVDS_I2C_CK LVDS_I2C_CK B83 B83 LVDS_BKLT_CTRL LVDS_BKLT_CTRL C28C28 RSVD RSVD D28D28 RSVD RSVD C83C83 RSVD RSVD D83 D83 RSVD RSVD A29A29 AC/HDA_SYNC AC/HDA_SYNC B29 B29 AC/HDA AC/HDA _SDIN1 _SDIN1 A84 A84 LVDS_I2C_DAT LVDS_I2C_DAT B84 B84 VCC_5V_SBY VCC_5V_SBY C29C29 NA NA D29D29 DDI1_PAIR1+ DDI1_PAIR1+ C84 C84 GND GND D84 D84 GND GND A30A30 AC/HDA AC/HDA _RST# _RST# B30 B30 AC/HDA AC/HDA _SDIN0 _SDIN0 A85 A85 GPI3 GPI3 B85B85 VCC_5V_SBY VCC_5V_SBY C30C30 NA NA D30D30 DDI1_PAIR1- DDI1_PAIR1- C85C85 NA NA D85D85 NA NA A31A31 GND GND (FIXED) (FIXED) B31 B31 GND GND (FIXED) (FIXED) A86 A86 RSVD RSVD B86 B86 VCC_5V_SBY VCC_5V_SBY C31C31 GND GND (FIXED) (FIXED) D31 D31 GND GND (FIXED) (FIXED) C86 C86 NA NA D86D86 NA NA A32A32 AC/HDA AC/HDA _BITCLK _BITCLK B32 B32 SPKR SPKR A87A87 eDP_HPD eDP_HPD B87 B87 VCC_5V_SBY VCC_5V_SBY C32C32 DDI2_CTRLCLK_AUX+ DDI2_CTRLCLK_AUX+ D32 D32 DDI1_PAIR2+ DDI1_PAIR2+ C87 C87 GND GND D87 D87 GND GND A33A33 AC/HDA AC/HDA _SDOUT _SDOUT B33 B33 I2C_CK I2C_CK A88A88 PCIE0_CK_REF+ PCIE0_CK_REF+ B88 B88 BIOS_DIS1# BIOS_DIS1# C33C33 DDI2_CTRLDATA_AUX- DDI2_CTRLDATA_AUX- D33 D33 DDI1_PAIR2- DDI1_PAIR2- C88C88 NA NA D88D88 NA NA A34A34 BIOS_DIS0# BIOS_DIS0# B34 B34 I2C_DAT I2C_DAT A89 A89 PCIE0_CK_REF- PCIE0_CK_REF- B89 B89 VGA_RED VGA_RED C34C34 DDI2_DDC_AUX_SEL DDI2_DDC_AUX_SEL D34 D34 DDI1_DDC_AUX_SEL DDI1_DDC_AUX_SEL C89 C89 NA NA D89D89 NA NA A35A35 THRMTRIP# THRMTRIP# B35 B35 THRM# THRM# A90A90 GND GND (FIXED) (FIXED) B90 B90 GND GND (FIXED) (FIXED) C35C35 RSVD RSVD D35D35 RSVD RSVD C90C90 GND GND (FIXED) (FIXED) D90 D90 GND GND (FIXED) (FIXED) A36A36 USB6- USB6- B36B36 USB7- USB7- A91A91 SPI_POWER SPI_POWER B91 B91 VGA_GRN VGA_GRN C36C36 NA NA D36D36 DDI1_PAIR3+ DDI1_PAIR3+ C91 C91 NA NA D91D91 NA NA A37A37 USB6+ USB6+ B37 B37 USB7+ USB7+ A92A92 SPI_MISO SPI_MISO B92 B92 VGA_BLU VGA_BLU C37C37 NA NA D37D37 DDI1_PAIR3- DDI1_PAIR3- C92C92 NA NA D92D92 NA NA A38A38 USB_6_7_OC# USB_6_7_OC# B38 B38 USB_4_5_OC# USB_4_5_OC# A93 A93 GPO0 GPO0 B93 B93 VGA_HSYNC VGA_HSYNC C38C38 NA NA D38D38 RSVD RSVD C93C93 GND GND D93 D93 GND GND A39A39 USB4- USB4- B39B39 USB5- USB5- A94A94 SPI_CLK SPI_CLK B94 B94 VGA_VSYNC VGA_VSYNC C39C39 NA NA D39D39 DDI2_PAIR0+ DDI2_PAIR0+ C94 C94 NA NA D94D94 NA NA A40A40 USB4+ USB4+ B40 B40 USB5+ USB5+ A95A95 SPI_MOSI SPI_MOSI B95 B95 VGA_I2C_CK VGA_I2C_CK C40C40 NA NA D40D40 DDI2_PAIR0- DDI2_PAIR0- C95C95 NA NA D95D95 NA NA A41A41 GND GND (FIXED) (FIXED) B41 B41 GND GND (FIXED) (FIXED) A96 A96 TPM_PP TPM_PP B96 B96 VGA_I2C_DAT VGA_I2C_DAT C41C41 GND GND (FIXED) (FIXED) D41 D41 GND GND (FIXED) (FIXED) C96 C96 GND GND D96 D96 GND GND A42A42 USB2- USB2- B42B42 USB3- USB3- A97A97 NA NA B97B97 SPI_CS# SPI_CS# C42C42 NA NA D42D42 DDI2_PAIR1+ DDI2_PAIR1+ C97 C97 RSVD RSVD D97 D97 RSVD RSVD A43A43 USB2+ USB2+ B43 B43 USB3+ USB3+ A98A98 SER0_TX SER0_TX B98 B98 RSVD RSVD C43C43 NA NA D43D43 DDI2_PAIR1- DDI2_PAIR1- C98C98 NA NA D98D98 NA NA A44A44 USB_2_3_OC# USB_2_3_OC# B44 B44 USB_0_1_OC# USB_0_1_OC# A99 A99 SER0_RX SER0_RX B99 B99 RSVD RSVD C44C44 NA NA D44D44 DDI2_HPD DDI2_HPD C99C99 NA NA D99D99 NA NA A45A45 USB0- USB0- B45B45 USB1- USB1- A100A100 GND GND (FIXED) (FIXED) B100 B100 GND GND (FIXED) (FIXED) C45C45 RSVD RSVD D45D45 RSVD RSVD C100C100 GND GND (FIXED) (FIXED) D100 D100 GND GND (FIXED) (FIXED) A46A46 USB0+ USB0+ B46 B46 USB1+ USB1+ A101A101 SER1_TX SER1_TX B101 B101 FAN_PWMOUT FAN_PWMOUT C46C46 NA NA D46D46 DDI2_PAIR2+ DDI2_PAIR2+ C101 C101 NA NA D101D101 NA NA A47A47 VCC_RTC VCC_RTC B47 B47 EXCD1_PERST# EXCD1_PERST# A102 A102 SER1_RX SER1_RX B102 B102 FAN_TACHIN FAN_TACHIN C47C47 NA NA D47D47 DDI2_PAIR2- DDI2_PAIR2- C102C102 NA NA D102D102 NA NA A48A48 EXCD0_PERST# EXCD0_PERST# B48 B48 EXCD1_CPPE# EXCD1_CPPE# A103 A103 LID# LID# B103B103 SLEEP# SLEEP# C48C48 RSVD RSVD D48D48 RSVD RSVD C103C103 GND GND D103 D103 GND GND A49A49 EXCD0_CPPE# EXCD0_CPPE# B49 B49 SYS_RESET# SYS_RESET# A104 A104 VCC_12V VCC_12V B104 B104 VCC_12V VCC_12V C49C49 NA NA D49D49 DDI2_PAIR3+ DDI2_PAIR3+ C104 C104 VCC_12V VCC_12V D104 D104 VCC_12V VCC_12V A50A50 LPC_SERIRQ LPC_SERIRQ B50 B50 CB_RESET# CB_RESET# A105 A105 VCC_12V VCC_12V B105 B105 VCC_12V VCC_12V C50C50 NA NA D50D50 DDI2_PAIR3- DDI2_PAIR3- C105C105 VCC_12V VCC_12V D105 D105 VCC_12V VCC_12V A51A51 GND GND (FIXED) (FIXED) B51 B51 GND GND (FIXED) (FIXED) A106 A106 VCC_12V VCC_12V B106 B106 VCC_12V VCC_12V C51C51 GND GND (FIXED) (FIXED) D51 D51 GND GND (FIXED) (FIXED) C106 C106 VCC_12V VCC_12V D106 D106 VCC_12V VCC_12V A52A52 NA NA B52B52 NA NA A107A107 VCC_12V VCC_12V B107 B107 VCC_12V VCC_12V C52C52 NA NA D52D52 NA NA C107C107 VCC_12V VCC_12V D107 D107 VCC_12V VCC_12V A53A53 NA NA B53B53 NA NA A108A108 VCC_12V VCC_12V B108 B108 VCC_12V VCC_12V C53C53 NA NA D53D53 NA NA C108C108 VCC_12V VCC_12V D108 D108 VCC_12V VCC_12V A54A54 GPI0 GPI0 B54B54 GPO1 GPO1 A109A109 VCC_12V VCC_12V B109 B109 VCC_12V VCC_12V C54C54 NA NA D54D54 NA NA C109C109 VCC_12V VCC_12V D109 D109 VCC_12V VCC_12V A55A55 NA NA B55B55 NA NA A110A110 GND GND (FIXED) (FIXED) B110 B110 GND GND (FIXED) (FIXED) C55C55 NA NA D55D55 NA NA C110C110 GND GND (FIXED) (FIXED) D110 D110 GND GND (FIXED) (FIXED)

Chapter 3 Hardware Installation www.dfi.com Chapter 3

COM Express Connectors Signals and Descriptions

Pin Types I Input to the Module O Output from the Module I/O Bi-directional input / output signal OD Open drain output

AC97/HDA Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description AC/HAD_RST# A30 O CMOS 3.3V Suspend/3.3V Connect to CODEC pin 11 RESET# Reset output to CODEC, active low. AC/HDA_SYNC A29 O CMOS 3.3V/3.3V Connect to CODEC pin 10 SYNC Sample-synchronization signal to the CODEC(s). AC/HDA_BITCLK A32 I/O CMOS 3.3V/3.3V Connect to CODEC pin 6 BIT_CLK Serial data clock generated by the external CODEC(s). AC/HDA_SDOUT A33 O CMOS 3.3V/3.3V Connect to CODEC pin 5 SDATA_OUT Serial TDM data output to the CODEC. AC/HDA_SDIN2 B28 I/O CMOS 3.3V Suspend/3.3V NA AC/HDA_SDIN1 B29 I/O CMOS 3.3V Suspend/3.3V Serial TDM data inputs from up to 2 CODECs. AC/HDA_SDIN0 B30 I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC0 pin 8 SDATA_IN

Gigabit Ethernet Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description Gigabit Ethernet Controller 0: Media Dependent Interface Differential Pairs 0,1,2,3. The MDI can operate in 1000, 100 and 10 Mbit / sec modes. Some pairs are unused in some modes, per the following: 1000BASE-T 100BASE-TX 10BASE-T GBE0_MDI0+ A13 I/O Analog 3.3V max Suspend Connect to Magnetics Module MDI0+/- MDI[0]+/- B1_DA+/- TX+/- TX+/- MDI[1]+/- B1_DB+/- RX+/- RX+/- MDI[2]+/- B1_DC+/- MDI[3]+/- B1_DD+/- GBE0_MDI0- A12 I/O Analog 3.3V max Suspend GBE0_MDI1+ A10 I/O Analog 3.3V max Suspend Connect to Magnetics Module MDI1+/- GBE0_MDI1- A9 I/O Analog 3.3V max Suspend GBE0_MDI2+ A7 I/O Analog 3.3V max Suspend Connect to Magnetics Module MDI2+/- GBE0_MDI2- A6 I/O Analog 3.3V max Suspend GBE0_MDI3+ A3 I/O Analog 3.3V max Suspend Connect to Magnetics Module MDI3+/- GBE0_MDI3- A2 I/O Analog 3.3V max Suspend GBE0_ACT# B2 OD CMOS 3.3V Suspend/3.3V Connect to LED and recommend current limit resistor 150Ω to 3.3VSB Gigabit Ethernet Controller 0 activity indicator, active low. GBE0_LINK# A8 OD CMOS 3.3V Suspend/3.3V NC Gigabit Ethernet Controller 0 link indicator, active low. GBE0_LINK100# A4 OD CMOS 3.3V Suspend/3.3V Gigabit Ethernet Controller 0 100 Mbit / sec link indicator, active low. GBE0_LINK100# A4 OD CMOS 3.3V Suspend/3.3V Connect to LED and recommend current limit resistor 150Ω to 3.3VSB Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low. GBE0_LINK1000# A5 OD CMOS 3.3V Suspend/3.3V Connect to LED and recommend current limit resistor 150Ω to 3.3VSB

SATA Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description SATA0_TX+ A16 O SATA AC coupled on Module AC Coupling capacitor Connect to SATA0 Conn TX pin Serial ATA or SAS Channel 0 transmit differential pair. SATA0_TX- A17 O SATA AC coupled on Module AC Coupling capacitor SATA0_RX+ A19 I SATA AC coupled on Module AC Coupling capacitor Connect to SATA0 Conn RX pin Serial ATA or SAS Channel 0 receive differential pair. SATA0_RX- A20 I SATA AC coupled on Module AC Coupling capacitor SATA1_TX+ B16 O SATA AC coupled on Module AC Coupling capacitor Connect to SATA1 Conn TX pin Serial ATA or SAS Channel 1 transmit differential pair. SATA1_TX- B17 O SATA AC coupled on Module AC Coupling capacitor SATA1_RX+ B19 I SATA AC coupled on Module AC Coupling capacitor Connect to SATA1 Conn RX pin Serial ATA or SAS Channel 1 receive differential pair. SATA1_RX- B20 I SATA AC coupled on Module AC Coupling capacitor SATA2_TX+ A22 O SATA AC coupled on Module NA Connect to SATA2 Conn TX pin Serial ATA or SAS Channel 2 transmit differential pair. SATA2_TX- A23 O SATA AC coupled on Module NA SATA2_RX+ A25 I SATA AC coupled on Module NA Connect to SATA2 Conn RX pin Serial ATA or SAS Channel 2 receive differential pair. SATA2_RX- A26 I SATA AC coupled on Module NA SATA3_TX+ B22 O SATA AC coupled on Module NA Serial ATA or SAS Channel 3 transmit differential pair. SATA3_TX- B23 O SATA AC coupled on Module NA SATA3_RX+ B25 I SATA AC coupled on Module NA Serial ATA or SAS Channel 3 receive differential pair. SATA3_RX- B26 I SATA AC coupled on Module NA ATA_ACT# A28 I/O CMOS 3.3V / 3.3V PU 10K to 3.3V Connect to LED and recommend current limit resistor 220Ω to 3.3V ATA (parallel and serial) or SAS activity indicator, active low.

PCI Express Lanes Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description PCIE_TX0+ A68 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 0 PCIE_TX0- A69 AC Coupling capacitor PCIE_RX0+ B68 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 0 PCIE_RX0- B69 Slot - Connect to PCIE Conn pin PCIE_TX1+ A64 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 1 PCIE_TX1- A65 AC Coupling capacitor PCIE_RX1+ B64 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 1 PCIE_RX1- B65 Slot - Connect to PCIE Conn pin PCIE_TX2+ A61 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 2 PCIE_TX2- A62 AC Coupling capacitor PCIE_RX2+ B61 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 2 PCIE_RX2- B62 Slot - Connect to PCIE Conn pin PCIE_TX3+ A58 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 3 PCIE_TX3- A59 NA 15 PCIE_RX3+ B58 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 3 PCIE_RX3- B59 NA Slot - Connect to PCIE Conn pin PCIE_TX4+ A55 NA Chapter 3 Hardware Installation O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 4 www.dfi.com PCIE_TX4- A56 NA PCIE_RX4+ B55 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 4 PCIE_RX4- B56 NA Slot - Connect to PCIE Conn pin PCIE_TX5+ A52 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 5 PCIE_TX5- A53 NA PCIE_RX5+ B52 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 5 PCIE_RX5- B53 NA Slot - Connect to PCIE Conn pin PCIE_TX6+ D19 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 6 PCIE_TX6- D20 NA PCIE_RX6+ C19 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 6 PCIE_RX6- C20 NA Slot - Connect to PCIE Conn pin PCIE_TX7+ D22 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 7 PCIE_TX7- D23 NA PCIE_RX7+ C22 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 7 PCIE_RX7- C23 NA Slot - Connect to PCIE Conn pin PCIE0_CK_REF+ A88 Reference clock output for all PCI Express and PCI Express Graphics O PCIE PCIE Connect to PCIE device, PCIe CLK Buffer or slot PCIE0_CK_REF- A89 lanes.

PEG Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description PEG_TX0+ D52 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 0 PEG_TX0- D53 NA PEG_RX0+ C52 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 0 PEG_RX0- C53 NA PEG_TX1+ D55 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 1 PEG_TX1- D56 NA PEG_RX1+ C55 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 1 PEG_RX1- C56 NA PEG_TX2+ D58 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 2 PEG_TX2- D59 NA PEG_RX2+ C58 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 2 PEG_RX2- C59 NA PEG_TX3+ D61 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 3 PEG_TX3- D62 NA PEG_RX3+ C61 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 3 PEG_RX3- C62 NA PEG_TX4+ D65 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 4 PEG_TX4- D66 NA PEG_RX4+ C65 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 4 PEG_RX4- C66 NA PEG_TX5+ D68 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 5 PEG_TX5- D69 NA PEG_RX5+ C68 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 5 PEG_RX5- C69 NA PEG_TX6+ D71 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 6 PEG_TX6- D72 NA PEG_RX6+ C71 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 6 PEG_RX6- C72 NA PEG_TX7+ D74 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 7 PEG_TX7- D75 NA PEG_RX7+ C74 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 7 PEG_RX7- C75 NA PEG_TX8+ D78 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 8 PEG_TX8- D79 NA PEG_RX8+ C78 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 8 PEG_RX8- C79 NA PEG_TX9+ D81 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 9 PEG_TX9- D82 NA PEG_RX9+ C81 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 9 PEG_RX9- C82 NA PEG_TX10+ D85 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 10 PEG_TX10- D86 NA PEG_RX10+ C85 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 10 PEG_RX10- C86 NA PEG_TX11+ D88 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 11 PEG_TX11- D89 NA PEG_RX11+ C88 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 11 PEG_RX11- C89 NA PEG_TX12+ D91 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 12 PEG_TX12- D92 NA PEG_RX12+ C91 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 12 PEG_RX12- C92 NA PEG_TX13+ D94 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 13 PEG_TX13- D95 NA PEG_RX13+ C94 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 13 PEG_RX13- C95 NA PEG_TX14+ D98 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 14 PEG_TX14- D99 NA PEG_RX14+ C98 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 14 PEG_RX14- C99 NA PEG_TX15+ D101 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 15 PEG_TX15- D102 NA PEG_RX15+ C101 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 15 PEG_RX15- C102 NA PCI Express Graphics lane reversal input strap. Pull low on the Carrier PEG_LANE_RV# D54 I CMOS 3.3V / 3.3V PU 10K to 3.3V board to reverse lane order.

ExpressCard Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description EXCD0_CPPE# A49 PCI ExpressCard: PCI Express capable card request, active low, one per I CMOS 3.3V /3.3V EXCD1_CPPE# B48 card EXCD0_PERST# A48 O CMOS 3.3V /3.3V PCI ExpressCard: reset, active low, one per card EXCD1_PERST# B47

DDI Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description DDI1_PAIR0+/SDVO1_RED+ D26 Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module DDI 1 Pair 0 differential pairs/Serial Digital Video B red output differential pair DDI1_PAIR0-/SDVO1_RED- D27 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR1+/SDVO1_GRN+ D29 Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module DDI 1 Pair 1 differential pairs/Serial Digital Video B green output differential pair DDI1_PAIR1-/SDVO1_GRN- D30 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR2+/SDVO1_BLU+ D32 Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module DDI 1 Pair 2 differential pairs/Serial Digital Video B blue output differential pair DDI1_PAIR2-/SDVO1_BLU- D33 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR3+/SDVO1_CK+ D36 Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module DDI 1 Pair 3 differential pairs/Serial Digital Video B clock output differential pair. DDI1_PAIR3-/SDVO1_CK- D37 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR4+/SDVO1_INT+ C25 NA I PCIE AC coupled off Module Serial Digital Video B interrupt input differential pair. DDI1_PAIR4-/SDVO1_INT- C26 NA DDI1_PAIR5+/SDVO1_TVCLKIN+ C29 NA I PCIE AC coupled off Module Serial Digital Video TVOUT synchronization clock input differential pair. DDI1_PAIR5-/SDVO1_TVCLKIN- C30 NA DDI1_PAIR6+/SDVO1_FLDSTALL+ C15 NA I PCIE AC coupled off Module Serial Digital Video Field Stall input differential pair. DDI1_PAIR6-/SDVO1_FLDSTALL- C16 NA PD 100K to GND I/O PCIE AC coupled on Module (S/W IC between Rpu/PCH) Connect to DP AUX+ DP AUX+ function if DDI1_DDC_AUX_SEL is no connect DDI1_CTRLCLK_AUX+/SDVO1_CTRLCLK D15 PU 4.7K to 3.3V, PD 100K to GND I/O OD CMOS 3.3V / 3.3V (S/W IC between Rpu/Rpd Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI1_DDC_AUX_SEL is pulled high resistor) PU 100K to 3.3V I/O PCIE AC coupled on Module Connect to DP AUX- DP AUX- function if DDI1_DDC_AUX_SEL is no connect (S/W IC between Rpu/PCH) DDI1_CTRLCLK_AUX-/SDVO1_CTRLDATA D16 PU 4.7K to 3.3V/PU 100K to 3.3V I/O OD CMOS 3.3V / 3.3V (S/W IC between 4.7K/100K Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI1_DDC_AUX_SEL is pulled high resistor)

DDI1_HPD C24 I CMOS 3.3V / 3.3V PD 100K to GND PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

Selects the function of DDI1_CTRLCLK_AUX+ and DDI1_CTRLDATA_AUX-. DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm DDI1_DDC_AUX_SEL D34 I CMOS 3.3V / 3.3V PD 1M to GND PU 100K to 3.3V for DDC(HDMI/DVI) resistor to configure the DDI[n]_AUX pair as the DDC channel. Carrier DDI[n]_DDC_AUX_SEL should be connected to pin 13 of the DisplayPort DDI2_PAIR0+ D39 Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module DDI 2 Pair 0 differential pairs DDI2_PAIR0- D40 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR1+ D42 Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module DDI 2 Pair 1 differential pairs DDI2_PAIR1- D43 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR2+ D46 Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module DDI 2 Pair 2 differential pairs DDI2_PAIR2- D47 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR3+ D49 Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module DDI 2 Pair 3 differential pairs DDI2_PAIR3- D50 Connect AC Coupling Capacitors 0.1uF to Device PD 100K to GND I/O PCIE AC coupled on Module (S/W IC between Rpu/PCH) Connect to DP AUX+ DP AUX+ function if DDI2_DDC_AUX_SEL is no connect DDI2_CTRLCLK_AUX+ C32 PU 2.2K to 3.3V, PD 100K to GND I/O OD CMOS 3.3V / 3.3V (S/W IC between Rpu/Rpd Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI2_DDC_AUX_SEL is pulled high resistor) PU 100K to 3.3V I/O PCIE AC coupled on Module Connect to DP AUX- DP AUX- function if DDI2_DDC_AUX_SEL is no connect (S/W IC between Rpu/PCH) DDI2_CTRLCLK_AUX- C33 PU 2.2K to 3.3V/PU 100K to 3.3V I/O OD CMOS 3.3V / 3.3V (S/W IC between 4.7K/100K Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI2_DDC_AUX_SEL is pulled high resistor) DDI2_HPD D44 I CMOS 3.3V / 3.3V PD 100K to GND PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect Selects the function of DDI2_CTRLCLK_AUX+ and DDI2_CTRLDATA_AUX-. DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm DDI2_DDC_AUX_SEL C34 I CMOS 3.3V / 3.3V PD 1M to GND PU 100K to 3.3V for DDC(HDMI/DVI) resistor to configure the DDI[n]_AUX pair as the DDC channel. Carrier DDI[n]_DDC_AUX_SEL should be connected to pin 13 of the DisplayPort DDI3_PAIR0+ C39 NA O PCIE AC coupled off Module DDI 3 Pair 0 differential pairs DDI3_PAIR0- C40 NA DDI3_PAIR1+ C42 NA O PCIE AC coupled off Module DDI 3 Pair 1 differential pairs DDI3_PAIR1- C43 NA DDI3_PAIR2+ C46 NA O PCIE AC coupled off Module DDI 3 Pair 2 differential pairs DDI3_PAIR2- C47 NA DDI3_PAIR3+ C49 NA O PCIE AC coupled off Module DDI 3 Pair 3 differential pairs DDI3_PAIR3- C50 NA I/O PCIE AC coupled on Module NA DP AUX+ function if DDI3_DDC_AUX_SEL is no connect DDI3_CTRLCLK_AUX+ C36 I/O OD CMOS 3.3V / 3.3V NA HDMI/DVI I2C CTRLCLK if DDI3_DDC_AUX_SEL is pulled high

I/O PCIE AC coupled on Module NA DP AUX- function if DDI3_DDC_AUX_SEL is no connect DDI3_CTRLCLK_AUX- C37 I/O OD CMOS 3.3V / 3.3V NA HDMI/DVI I2C CTRLDATA if DDI3_DDC_AUX_SEL is pulled high DDI3_HPD C44 I CMOS 3.3V / 3.3V NA DDI Hot-Plug Detect Selects the function of DDI3_CTRLCLK_AUX+ and DDI3_CTRLDATA_AUX-. DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm DDI3_DDC_AUX_SEL C38 I CMOS 3.3V / 3.3V NA resistor to configure the DDI[n]_AUX pair as the DDC channel. Carrier DDI[n]_DDC_AUX_SEL should be connected to pin 13 of the DisplayPort

USB Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description USB0+ A46 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 0 USB0- A45 connector USB1+ B46 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 1 USB1- B45 connector USB2+ A43 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 2 USB2- A42 connector USB3+ B43 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 3 USB3- B42 connector USB4+ A40 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 4 USB4- A39 connector USB5+ B40 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 5 USB5- B39 connector USB6+ A37 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 6 USB6- A36 connector USB7+ B37 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 7 USB7- B36 connector USB over-current sense, USB channels 0 and 1. A pull-up for this line shall be present on the Module. An open drain driver from a USB USB_0_1_OC# B44 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch current monitor on the Carrier Board may drive this line low. Do not pull this line high on the Carrier Board. USB over-current sense, USB channels 2 and 3. A pull-up for this line shall be present on the Module. An open drain driver from a USB USB_2_3_OC# A44 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch current monitor on the Carrier Board may drive this line low. Do not pull this line high on the Carrier Board. USB over-current sense, USB channels 4 and 5. A pull-up for this line shall be present on the Module. An open drain driver from a USB USB_4_5_OC# B38 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch current monitor on the Carrier Board may drive this line low. Do not pull this line high on the Carrier Board. USB over-current sense, USB channels 6 and 7. A pull-up for this line shall be present on the Module. An open drain driver from a USB USB_6_7_OC# A38 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch current monitor on the Carrier Board may drive this line low. Do not pull this line high on the Carrier Board. USB_SSTX0+ D4 AC Coupling capacitor Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path. USB_SSTX0- D3 AC Coupling capacitor connector USB_SSRX0+ C4 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path. USB_SSRX0- C3 connector USB_SSTX1+ D7 AC Coupling capacitor Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path. USB_SSTX1- D6 AC Coupling capacitor connector USB_SSRX1+ C7 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path. USB_SSRX1- C6 connector USB_SSTX2+ D10 AC Coupling capacitor Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path. USB_SSTX2- D9 AC Coupling capacitor connector USB_SSRX2+ C10 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path. USB_SSRX2- C9 connector USB_SSTX3+ D13 AC Coupling capacitor Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path. USB_SSTX3- D12 AC Coupling capacitor connector USB_SSRX3+ C13 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path. USB_SSRX3- C12 connector

LVDS Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description LVDS_A0+ A71 Connect to LVDS connector LVDS Channel A differential pairs O LVDS LVDS LVDS_A0- A72 Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-, LVDS_B_CK+/-) shall have 100Ω terminations across the pairs at the destination. These LVDS_A1+ A73 Connect to LVDS connector O LVDS LVDS terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer LVDS_A1- A74 on-board LVDS_A2+ A75 Connect to LVDS connector O LVDS LVDS LVDS_A2- A76 LVDS_A3+ A78 Connect to LVDS connector O LVDS LVDS LVDS_A3- A79 LVDS_A_CK+ A81 Connect to LVDS connector O LVDS LVDS LVDS Channel A differential clock LVDS_A_CK- A82 LVDS_B0+ B71 Connect to LVDS connector O LVDS LVDS LVDS_B0- B72 LVDS Channel B differential pairs LVDS_B1+ B73 Connect to LVDS connector O LVDS LVDS Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-, LVDS_B1- B74 LVDS_B_CK+/-) shall have 100Ω terminations across the pairs at the destination. These LVDS_B2+ B75 Connect to LVDS connector O LVDS LVDS terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer LVDS_B2- B76 on-board LVDS_B3+ B77 Connect to LVDS connector O LVDS LVDS LVDS_B3- B78 LVDS_B_CK+ B81 Connect to LVDS connector O LVDS LVDS LVDS Channel B differential clock LVDS_B_CK- B82 LVDS_VDD_EN A77 O CMOS 3.3V / 3.3V Connect to enable control of LVDS panel power circuit LVDS panel power enable LVDS_BKLT_EN B79 O CMOS 3.3V / 3.3V Connect to enable control of LVDS panel backlight power circuit. LVDS panel backlight enable LVDS_BKLT_CTRL B83 O CMOS 3.3V / 3.3V Connect to brightness control of LVDS panel backlight power circuit. LVDS panel backlight brightness control LVDS_I2C_CK A83 I/O OD CMOS 3.3V / 3.3V PU 4.7K to 3.3V Connect to DDC clock of LVDS panel I2C clock output for LVDS display use LVDS_I2C_DAT A84 I/O OD CMOS 3.3V / 3.3V PU 4.7K to 3.3V Connect to DDC data of LVDS panel I2C data line for LVDS display use

LPC Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description LPC_AD0 B4 LPC_AD1 B5 I/O CMOS 3.3V / 3.3V LPC multiplexed address, command and data bus LPC_AD2 B6 Connect to LPC device LPC_AD3 B7 LPC_FRAME# B3 O CMOS 3.3V / 3.3V LPC frame indicates the start of an LPC cycle LPC_DRQ0# B8 NC NC I CMOS 3.3V / 3.3V LPC serial DMA request LPC_DRQ1# B9 NC NC LPC_SERIRQ A50 I/O CMOS 3.3V / 3.3V PU 1K to 3.3V LPC serial interrupt Connect to LPC device LPC_CLK B10 O CMOS 3.3V / 3.3V LPC clock output - 24MHz nominal

SPI Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description SPI_CS# B97 O CMOS 3.3V Suspend/3.3V Connect to Carrier Board SPI Device CS# pin Chip select for Carrier Board SPI - may be sourced from chipset SPI0 or SPI1 SPI_MISO A92 I CMOS 3.3V Suspend/3.3V Connect a series resistor 33Ω to Carrier Board SPI Device SO pin Data in to Module from Carrier SPI SPI_MOSI A95 O CMOS 3.3V Suspend/3.3V Connect a series resistor 33Ω to Carrier Board SPI Device SI pin Data out from Module to Carrier SPI SPI_CLK A94 O CMOS 3.3V Suspend/3.3V Connect a series resistor 33Ω to Carrier Board SPI Device SCK pin Clock from Module to Carrier SPI Power supply for Carrier Board SPI – sourced from Module – nominally 3.3V. The Module shall provide a minimum of 100mA on SPI_POWER. SPI_POWER A91 O 3.3V Suspend/3.3V Carriers shall use less than 100mA of SPI_POWER. SPI_POWER shall only be used to power SPI devices on the Carrier Selection straps to determine the BIOS boot device. The Carrier should only float these or pull them low, please refer to COM Express Module Base Specification Revision 2.1 for strapping options of BIOS disable signals. BIOS_DIS0# A34 PU 10K to 3.3V

BIOS BIOS Chipset Chipset Carrier SPI Bios Ref DIS1# DIS0# SPI CS1# SPI CS0# SPI_CS# Descriptor Entry Line Destination Destination 1 1 Module Module High Module SPI0/SPI1 0 I CMOS NA 1 0 Module Module High Module Carrier FWH 1 Module Carrier SPI0 Carrier SPI0/SPI1 2 BIOS_DIS1# B88 PU 10K to 3.3V 0 1 0 0 Carrier Module SPI1 Module SPI0/SPI1 3 (Default) (Default) (Default) (Default) (Default)

VGA Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description VGA_RED B89 O Analog Analog PD 150 to GND PD 150R,connect to VGA connector with EMI filter & ESD protect component. Red for monitor. Analog output VGA_GRN B91 O Analog Analog PD 150 to GND PD 150R,connect to VGA connector with EMI filter & ESD protect component. Green for monitor. Analog output VGA_BLU B92 O Analog Analog PD 150 to GND PD 150R,connect to VGA connector with EMI filter & ESD protect component. Blue for monitor. Analog output VGA_HSYNC B93 O CMOS 3.3V / 3.3V Connect to VGA connector with a3.3V Buffer IC to isolate PCH & Display Device Horizontal sync output to VGA monitor VGA_VSYNC B94 O CMOS 3.3V / 3.3V Connect to VGA connector with a 33V Buffer IC to isolate PCH & Display Device Vertical sync output to VGA monitor VGA_I2C_CK B95 I/O OD CMOS 3.3V / 3.3V PU 2.2K to 3.3V Connect to VGA connector with a 3.3V to 5V Level shift circuit. DDC clock line (I2C port dedicated to identify VGA monitor capabilities) VGA_I2C_DAT B96 I/O OD CMOS 3.3V / 3.3V PU 2.2K to 3.3V Connect to VGA connector with a 3.3V to 5V Level shift circuit. DDC data line.

Serial Interface Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description General purpose serial port 0 transmitter SER0_TX A98 O CMOS 3.3V/5V PD 4.7K to GND (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) General purpose serial port 0 receiver SER0_RX A99 I CMOS 3.3V/5V PU 10K to 3.3V (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) General purpose serial port 1 transmitter SER1_TX A101 O CMOS 3.3V/5V PD 4.7K to GND (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) General purpose serial port 1 receiver SER1_RX A102 I CMOS 3.3V/5V PU 10K to 3.3V (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V)

Miscellaneous Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description Output for audio enunciator - the "speaker" in PC-AT systems. SPKR B32 O CMOS 3.3V / 3.3V PU 10K to 3.3V This port provides the PC beep signal and is mostly intended for debugging purposes. WDT B27 O CMOS 3.3V / 3.3V PD 100K to GND Output indicating that a watchdog time-out event has occurred. Fan speed control. Uses the Pulse Width Modulation (PWM) technique to control the fan's RPM. FAN_PWNOUT B101 O OD CMOS 3.3V / 3.3V (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) Fan tachometer input for a fan with a two pulse output. FAN_TACHIN B102 I OD CMOS 3.3V / 3.3V PU 47K to 3V3 (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) Trusted Platform Module (TPM) Physical Presence pin. Active high. TPM_PP A96 I CMOS 3.3V / 3.3V TPM chip has an internal pull down. This signal is used to indicate Physical Presence to the TPM.

Power and System Management Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description A falling edge creates a power button event. Power button events can PWRBTN# B12 I CMOS 3.3V Suspend/3.3V PU 10K to 3V3_DU_EC PU 4.7K to 3V3_SB be used to bring a system out of S5 soft off and other suspend states, as well as powering the system down.

Reset button input. Active low request for Module to reset and reboot. May be falling edge sensitive. For situations when SYS_RESET# is SYS_RESET# B49 I CMOS 3.3V Suspend/3.3V PU 10K to 3V3SB NC PU 4.7K to 3V3_SB not able to reestablish control of the system, PWR_OK or a power cycle may be used.

Reset output from Module to Carrier Board. Active low. Issued by Module chipset and may result from a low SYS_RESET# input, a low CB_RESET# B50 O CMOS 3.3V Suspend/3.3V PWR_OK input, a VCC_12V power input that falls below the minimum specification, a watchdog timeout, or may be initiated by the Module software.

Power OK from main power supply. A high value indicates that the power is good. This signal can be used to hold off Module startup to PWR_OK B24 I CMOS 3.3V / 3.3V PU 10K to 3V3 allow Carrier based FPGAs or other configurable devices time to be programmed.

SUS_STAT# B18 O CMOS 3.3V Suspend/3.3V PU 1K to 3V3SB Indicates imminent suspend operation; used to notify LPC devices. Indicates system is in Suspend to RAM state. Active low output. An SUS_S3# A15 O CMOS 3.3V Suspend/3.3V PD 100K to GND inverted copy of SUS_S3# on the Carrier Board may be used to enable the non-standby power on a typical ATX supply. SUS_S4# A18 O CMOS 3.3V Suspend/3.3V PD 100K to GND Indicates system is in Suspend to Disk state. Active low output. SUS_S5# A24 O CMOS 3.3V Suspend/3.3V PD 100K to GND Indicates system is in Soft Off state. WAKE0# B66 I CMOS 3.3V Suspend/3.3V PU 10K to 3V3SB PCI Express wake up signal. General purpose wake up signal. May be used to implement wake-up WAKE1# B67 I CMOS 3.3V Suspend/3.3V NA on PS2 keyboard or mouse activity. Indicates that external battery is low. BATLOW# A27 I CMOS 3.3V Suspend/ 3.3V PU 10K to 3V3SB This port provides a battery-low signal to the Module for orderly transitioning to power saving or power cut-off ACPI modes.

LID switch. Low active signal used by the ACPI operating system for a LID switch. LID# A103 I OD CMOS 3.3V Suspend/12V PU 47K to 3V3_DU_EC (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V)

Sleep button. Low active signal used by the ACPI operating system to bring the SLEEP# B103 I OD CMOS 3.3V Suspend/12V PU 4.7K to 3V3_DU system to sleep state or to wake it up again. (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) THRM# B35 I CMOS 3.3V / 3.3V PU 1K to 3V3 Input from off-Module temp sensor indicating an over-temp situation. THRMTRIP# A35 O CMOS 3.3V / 3.3V PU 1K to 3.3V Active low output indicating that the CPU has entered thermal shutdown. SMB_CK B13 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3V3_DU_EC System Management Bus bidirectional clock line. SMB_DAT B14 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3V3_DU_EC System Management Bus bidirectional data line. System Management Bus Alert – active low input can be used to SMB_ALERT# B15 I CMOS 3.3V Suspend/3.3V PU 10K to 3V3_DU_EC generate an SMI# (System Management Interrupt) or to wake the system.

GPIO Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description GPO0 A93 GPO1 B54 General purpose output pins. O CMOS 3.3V / 3.3V GPO2 B57 Upon a hardware reset, these outputs should be low. GPO3 B63 GPI0 A54 PU 47K to 3.3V GPI1 A63 PU 47K to 3.3V General purpose input pins. I CMOS 3.3V / 3.3V GPI2 A67 PU 47K to 3.3V Pulled high internally on the Module. GPI3 A85 PU 47K to 3.3V

Power and GND Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description A104~A109 B104~B109 VCC_12V Power Primary power input: +12V nominal. All available VCC_12V pins on the connector(s) shall be used. C104~C109 D104~D109 Standby power input: +5.0V nominal. If VCC5_SBY is used, all available VCC_5V_SBY pins on the connector(s) shall be used. Only VCC_5V_SBY B84~B87 Power used for standby and suspend functions. May be left unconnected if these functions are not used in the system design. VCC_RTC A47 Power Real-time clock circuit-power input. Nominally +3.0V.

SATA Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description SATA0_TX+ A16 O SATA AC coupled on Module AC Coupling capacitor Connect to SATA0 Conn TX pin Serial ATA or SAS Channel 0 transmit differential pair. SATA0_TX- A17 O SATA AC coupled on Module AC Coupling capacitor SATA0_RX+ A19 I SATA AC coupled on Module AC Coupling capacitor Connect to SATA0 Conn RX pin Serial ATA or SAS Channel 0 receive differential pair. SATA0_RX- A20 I SATA AC coupled on Module AC Coupling capacitor SATA1_TX+ B16 O SATA AC coupled on Module AC Coupling capacitor Connect to SATA1 Conn TX pin Serial ATA or SAS Channel 1 transmit differential pair. SATA1_TX- B17 O SATA AC coupled on Module AC Coupling capacitor SATA1_RX+ B19 I SATA AC coupled on Module AC Coupling capacitor Connect to SATA1 Conn RX pin Serial ATA or SAS Channel 1 receive differential pair. SATA1_RX- B20 I SATA AC coupled on Module AC Coupling capacitor SATA2_TX+ A22 O SATA AC coupled on Module NA Connect toChapter SATA2 Conn TX pin 3 Serial ATA or SAS Channel 2 transmit differential pair. SATA2_TX- A23 O SATA AC coupled on Module NA SATA2_RX+ A25 I SATA AC coupled on Module NA Connect to SATA2 Conn RX pin Serial ATA or SAS Channel 2 receive differential pair. SATA2_RX- A26 I SATA AC coupled on Module NA SATA3_TX+ B22 O SATA AC coupled on Module NA Serial ATA or SAS Channel 3 transmit differential pair. SATA3_TX- B23 O SATA AC coupled on Module NA SATA3_RX+ B25 I SATA AC coupled on Module NA Serial ATA or SAS Channel 3 receive differential pair. SATA3_RX- B26 I SATA AC coupled on Module NA ATA_ACT# A28 I/O CMOS 3.3V / 3.3V PU 10K to 3.3V Connect to LED and recommend current limit resistor 220Ω to 3.3V ATA (parallel and serial) or SAS activity indicator, active low.

PCI Express Lanes Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description PCIE_TX0+ A68 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 0 PCIE_TX0- A69 AC Coupling capacitor PCIE_RX0+ B68 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 0 PCIE_RX0- B69 Slot - Connect to PCIE Conn pin PCIE_TX1+ A64 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 1 PCIE_TX1- A65 AC Coupling capacitor PCIE_RX1+ B64 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 1 PCIE_RX1- B65 Slot - Connect to PCIE Conn pin PCIE_TX2+ A61 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 2 PCIE_TX2- A62 AC Coupling capacitor PCIE_RX2+ B61 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 2 PCIE_RX2- B62 Slot - Connect to PCIE Conn pin PCIE_TX3+ A58 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 3 PCIE_TX3- A59 NA PCIE_RX3+ B58 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 3 PCIE_RX3- B59 NA Slot - Connect to PCIE Conn pin PCIE_TX4+ A55 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 4 PCIE_TX4- A56 NA PCIE_RX4+ B55 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 4 PCIE_RX4- B56 NA Slot - Connect to PCIE Conn pin PCIE_TX5+ A52 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 5 PCIE_TX5- A53 NA PCIE_RX5+ B52 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 5 PCIE_RX5- B53 NA Slot - Connect to PCIE Conn pin PCIE_TX6+ D19 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 6 PCIE_TX6- D20 NA PCIE_RX6+ C19 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 6 PCIE_RX6- C20 NA Slot - Connect to PCIE Conn pin PCIE_TX7+ D22 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 7 PCIE_TX7- D23 NA PCIE_RX7+ C22 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 7 PCIE_RX7- C23 NA Slot - Connect to PCIE Conn pin PCIE0_CK_REF+ A88 Reference clock output for all PCI Express and PCI Express Graphics O PCIE PCIE Connect to PCIE device, PCIe CLK Buffer or slot PCIE0_CK_REF- A89 lanes.

PEG Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description PEG_TX0+ D52 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 0 PEG_TX0- D53 NA PEG_RX0+ C52 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 0 PEG_RX0- C53 NA PEG_TX1+ D55 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 1 PEG_TX1- D56 NA PEG_RX1+ C55 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 1 PEG_RX1- C56 NA PEG_TX2+ D58 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 2 PEG_TX2- D59 NA PEG_RX2+ C58 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 2 PEG_RX2- C59 NA PEG_TX3+ D61 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 3 PEG_TX3- D62 NA PEG_RX3+ C61 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 3 PEG_RX3- C62 NA PEG_TX4+ D65 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 4 PEG_TX4- D66 NA PEG_RX4+ C65 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 4 PEG_RX4- C66 NA PEG_TX5+ D68 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 5 PEG_TX5- D69 NA PEG_RX5+ C68 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 5 PEG_RX5- C69 NA PEG_TX6+ D71 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 6 PEG_TX6- D72 NA PEG_RX6+ C71 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 6 PEG_RX6- C72 NA PEG_TX7+ D74 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 7 PEG_TX7- D75 NA PEG_RX7+ C74 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 7 PEG_RX7- C75 NA PEG_TX8+ D78 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 8 PEG_TX8- D79 NA PEG_RX8+ C78 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 8 PEG_RX8- C79 NA PEG_TX9+ D81 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 9 PEG_TX9- D82 NA PEG_RX9+ C81 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 9 PEG_RX9- C82 NA PEG_TX10+ D85 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 10 PEG_TX10- D86 NA 16 PEG_RX10+ C85 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 10 PEG_RX10- C86 NA PEG_TX11+ D88 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 11 PEG_TX11-Chapter 3 Hardware InstallationD89 NA www.dfi.com PEG_RX11+ C88 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 11 PEG_RX11- C89 NA PEG_TX12+ D91 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 12 PEG_TX12- D92 NA PEG_RX12+ C91 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 12 PEG_RX12- C92 NA PEG_TX13+ D94 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 13 PEG_TX13- D95 NA PEG_RX13+ C94 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 13 PEG_RX13- C95 NA PEG_TX14+ D98 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 14 PEG_TX14- D99 NA PEG_RX14+ C98 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 14 PEG_RX14- C99 NA PEG_TX15+ D101 NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 15 PEG_TX15- D102 NA PEG_RX15+ C101 NA I PCIE AC coupled off Module PCI Express Graphics receive differential pairs 15 PEG_RX15- C102 NA PCI Express Graphics lane reversal input strap. Pull low on the Carrier PEG_LANE_RV# D54 I CMOS 3.3V / 3.3V PU 10K to 3.3V board to reverse lane order.

DDI1_HPD C24 I CMOS 3.3V / 3.3V PD 100K to GND PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

A1, A11, A21, A31, A41, A51, A57, A60, A66, A70, A80, A90, A100, A110, B1, B11, B21 ,B31, B41, B51, B60, B70, B80, B90, B100, B110, C1, C2, C5, C8, C11, C14, C21, C31, C41, C51, C60, C70, C73, Ground - DC power and signal and AC signal return path. GND C76, C80, C84, C87, Power All available GND connector pins shall be used and tied to Carrier C90, C93, C96, Board GND plane. C100, C103, C110, D1, D2, D5, D8, D11, D14, D21, D31, D51, D60, D67, D70, D73, D76, D80, D84, D87, D90, D93, D96, D100, D103, D110 Pin Types I Input to the Module OPin Types Output from the Module I/OI InputBi-directional to the Module input / output signal ODO OpenOutput drain from output the Module I/O Bi-directional input / output signal OD Open drain output AC97/HDA Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description AC/HAD_RST#AC97/HDA Signals and DescriA30ptions O CMOS 3.3V Suspend/3.3V Connect to CODEC pin 11 RESET# Reset output to CODEC, active low. AC/HDA_SYNCSignal A29Pin# OModule CMOS Pin Type3.3V/3.3V Pwr Rail /Tolerance BW968 Connect to CODEC pin 10 SYNC Carrier Board Sample-synchronizationDescription signal to the CODEC(s). AC/HDA_BITCLKAC/HAD_RST# A32A30 I/OO CMOS CMOS 3.3V/3.3V3.3V Suspend/3.3V Connect to CODEC pin 611 BIT_CLK RESET# SerialReset dataoutput clock to CODEC,generated active by thelow. external CODEC(s). AC/HDA_SDOUTAC/HDA_SYNC A33A29 O CMOS 3.3V/3.3V Connect to CODEC pin 510 SDATA_OUT SYNC SerialSample-synchronization TDM data output tosignal the CODEC.to the CODEC(s). AC/HDA_SDIN2AC/HDA_BITCLK B28A32 I/O CMOS 3.3V3.3V/3.3V Suspend/3.3V NA Connect to CODEC pin 6 BIT_CLK Serial data clock generated by the external CODEC(s). AC/HDA_SDIN1AC/HDA_SDOUT B29A33 I/OO CMOS CMOS 3.3V3.3V/3.3V Suspend/3.3V Connect to CODEC pin 5 SDATA_OUT Serial TDM data inputsoutput fromto the up CODEC. to 2 CODECs. AC/HDA_SDIN0AC/HDA_SDIN2 B30B28 I/O CMOS 3.3V Suspend/3.3V NA Connect 33 Ω in series to CODEC0 pin 8 SDATA_IN AC/HDA_SDIN1 B29 I/O CMOS 3.3V Suspend/3.3V Serial TDM data inputs from up to 2 CODECs. AC/HDA_SDIN0Gigabit Ethernet Signals andB30 Descriptions I/O CMOS 3.3V Suspend/3.3V Connect 33 Ω in series to CODEC0 pin 8 SDATA_IN Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description Gigabit Ethernet Signals and Descriptions Gigabit Ethernet Controller 0: Media Dependent Interface Differential Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board PairsDescription 0,1,2,3. The MDI can operate in 1000, 100 and 10 Mbit / sec modes.Gigabit EthernetSome pairs Controller are unused 0: Media in some Dependent modes, perInterface the following: Differential Pairs 0,1,2,3. The MDI can operate 1000BASE-T in 1000, 100 100BASE-TX and 10 Mbit 10BASE-T / sec GBE0_MDI0+ A13 I/O Analog 3.3V max Suspend Connect to Magnetics Module MDI0+/- modes. Some pairs MDI[0]+/- are unused B1_DA+/- in some modes, TX+/- per the following: TX+/- MDI[1]+/- B1_DB+/- 1000BASE-T 100BASE-TXRX+/- 10BASE-T RX+/- GBE0_MDI0+ A13 I/O Analog 3.3V max Suspend Connect to Magnetics Module MDI0+/- MDI[2]+/-MDI[0]+/- B1_DC+/-B1_DA+/- TX+/- TX+/- MDI[3]+/-MDI[1]+/- B1_DD+/-B1_DB+/- RX+/- RX+/- GBE0_MDI0- A12 I/O Analog 3.3V max Suspend MDI[2]+/- B1_DC+/- GBE0_MDI1+ A10 I/O Analog 3.3V max Suspend Connect to Magnetics Module MDI1+/- MDI[3]+/- B1_DD+/- GBE0_MDI1-GBE0_MDI0- A9A12 I/O Analog 3.3V max Suspend GBE0_MDI2+GBE0_MDI1+ A7A10 I/O Analog 3.3V max Suspend Connect to Magnetics Module MDI2+/-MDI1+/- GBE0_MDI2-GBE0_MDI1- A6A9 I/O Analog 3.3V max Suspend GBE0_MDI3+GBE0_MDI2+ A3A7 I/O Analog 3.3V max Suspend Connect to Magnetics Module MDI3+/-MDI2+/- GBE0_MDI3-GBE0_MDI2- A2A6 I/O Analog 3.3V max Suspend GBE0_ACT#GBE0_MDI3+ B2A3 ODI/O CMOSAnalog3.3V Suspend/3.3Vmax Suspend Connect to LEDMagnetics and recommend Module MDI3+/- current limit resistor 150Ω to 3.3VSB Gigabit Ethernet Controller 0 activity indicator, active low. GBE0_LINK#GBE0_MDI3- A8A2 ODI/O CMOSAnalog3.3V Suspend/3.3Vmax Suspend NC Gigabit Ethernet Controller 0 link indicator, active low. GBE0_LINK100#GBE0_ACT# A4B2 OD CMOS 3.3V Suspend/3.3V Connect to LED and recommend current limit resistor 150Ω to 3.3VSB Gigabit Ethernet Controller 0 100activity Mbit indicator, / sec link active indicator, low. active low. GBE0_LINK100#GBE0_LINK# A4A8 OD CMOS 3.3V Suspend/3.3V ConnectNC to LED and recommend current limit resistor 150Ω to 3.3VSB Gigabit Ethernet Controller 0 link indicator, active low. Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low. GBE0_LINK1000#GBE0_LINK100# A5A4 OD CMOS 3.3V Suspend/3.3V Connect to LED and recommend current limit resistor 150Ω to 3.3VSB Gigabit Ethernet Controller 0 100 Mbit / sec link indicator, active low. GBE0_LINK100# A4 OD CMOS 3.3V Suspend/3.3V Connect to LED and recommend current limit resistor 150Ω to 3.3VSB Gigabit Ethernet Controller 0 1000 Mbit / sec link indicator, active low. GBE0_LINK1000#SATA Signals and DescriptionA5s OD CMOS 3.3V Suspend/3.3V Connect to LED and recommend current limit resistor 150Ω to 3.3VSB Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description SATA0_TX+SATA Signals and DescriptionA16s O SATA AC coupled on Module AC Coupling capacitor Connect to SATA0 Conn TX pin Serial ATA or SAS Channel 0 transmit differential pair. SATA0_TX-Signal A17Pin# OModule SATA Pin TypeAC Pwr coupled Rail /Tolerance on Module AC CouplingBW968 capacitor Carrier Board Description SATA0_RX+SATA0_TX+ A19A16 IO SATA SATA AC coupled on Module AC Coupling capacitor Connect to SATA0 Conn RXTX pin Serial ATA or SAS Channel 0 receivetransmit differential differential pair. pair. SATA0_RX-SATA0_TX- A20A17 IO SATA SATA AC coupled on Module AC Coupling capacitor SATA1_TX+SATA0_RX+ B16A19 OI SATASATA AC coupled on Module AC Coupling capacitor Connect to SATA1SATA0 Conn TXRX pin Serial ATA or SAS Channel 10 transmitreceive differential differential pair. pair. SATA1_TX-SATA0_RX- B17A20 OI SATASATA AC coupled on Module AC Coupling capacitor SATA1_RX+SATA1_TX+ B19B16 IO SATA SATA AC coupled on Module AC Coupling capacitor Connect to SATA1 Conn RXTX pin Serial ATA or SAS Channel 1 receivetransmit differential differential pair. pair. SATA1_RX-SATA1_TX- B20B17 IO SATA SATA AC coupled on Module AC Coupling capacitor SATA2_TX+SATA1_RX+ A22B19 OI SATASATA AC coupled on Module AC CouplingNA capacitor Connect to SATA2SATA1 Conn TXRX pin Serial ATA or SAS Channel 21 transmitreceive differential differential pair. pair. SATA2_TX-SATA1_RX- A23B20 OI SATASATA AC coupled on Module AC CouplingNA capacitor SATA2_RX+SATA2_TX+ A25A22 IO SATA SATA AC coupled on Module NA Connect to SATA2 Conn RXTX pin Serial ATA or SAS Channel 2 receivetransmit differential differential pair. pair. SATA2_RX-SATA2_TX- A26A23 IO SATA SATA AC coupled on Module NA SATA3_TX+SATA2_RX+ B22A25 OI SATASATA AC coupled on Module NA Connect to SATA2 Conn RX pin Serial ATA or SAS Channel 32 transmitreceive differential differential pair. pair. SATA3_TX-SATA2_RX- B23A26 OI SATASATA AC coupled on Module NA SATA3_RX+SATA3_TX+ B25B22 IO SATA SATA AC coupled on Module NA Serial ATA or SAS Channel 3 receivetransmit differential differential pair. pair. SATA3_RX-SATA3_TX- B26B23 IO SATA SATA AC coupled on Module NA ATA_ACT#SATA3_RX+ A28B25 I/OI SATA CMOS 3.3VAC coupled / 3.3V on Module PU 10KNA to 3.3V Connect to LED and recommend current limit resistor 220Ω to 3.3V ATA (parallel and serial) or SAS activity indicator, active low. Serial ATA or SAS Channel 3 receive differential pair. SATA3_RX- B26 I SATA AC coupled on Module NA ATA_ACT#PCI Express Lanes Signals andA28 DescriptionI/Os CMOS 3.3V / 3.3V PU 10K to 3.3V Connect to LED and recommend current limit resistor 220Ω to 3.3V ATA (parallel and serial) or SAS activity indicator, active low. Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description PCIE_TX0+PCI Express Lanes Signals andA68 Descriptions AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 0 PCIE_TX0-Signal A69Pin# Module Pin Type Pwr Rail /Tolerance AC CouplingBW968 capacitor Carrier Board Description PCIE_RX0+PCIE_TX0+ B68A68 AC Coupling capacitor Device - Connect AC Coupling cap 0.1uF IO PCIE PCIE AC coupled offon Module Connect to PCIE device or slot PCI Express Differential ReceiveTransmit Pairs Pairs 0 0 PCIE_RX0-PCIE_TX0- B69A69 AC Coupling capacitor Slot - Connect to PCIE Conn pin PCIE_TX1+PCIE_RX0+ A64B68 AC Coupling capacitor Device - Connect AC Coupling cap 0.1uF OI PCIEPCIE AC coupled onoff ModuleModule Connect to PCIE device or slot PCI Express Differential TransmitReceive Pairs Pairs 0 1 PCIE_TX1-PCIE_RX0- A65B69 AC Coupling capacitor Slot - Connect to PCIE Conn pin PCIE_RX1+PCIE_TX1+ B64A64 AC Coupling capacitor Device - Connect AC Coupling cap 0.1uF IO PCIE PCIE AC coupled offon Module Connect to PCIE device or slot PCI Express Differential ReceiveTransmit Pairs Pairs 1 1 PCIE_RX1-PCIE_TX1- B65A65 AC Coupling capacitor Slot - Connect to PCIE Conn pin PCIE_TX2+PCIE_RX1+ A61B64 AC Coupling capacitor Device - Connect AC Coupling cap 0.1uF OI PCIEPCIE AC coupled onoff ModuleModule Connect to PCIE device or slot PCI Express Differential TransmitReceive Pairs Pairs 1 2 PCIE_TX2-PCIE_RX1- A62B65 AC Coupling capacitor Slot - Connect to PCIE Conn pin PCIE_RX2+PCIE_TX2+ B61A61 AC Coupling capacitor Device - Connect AC Coupling cap 0.1uF IO PCIE PCIE AC coupled offon Module Connect to PCIE device or slot PCI Express Differential ReceiveTransmit Pairs Pairs 2 2 PCIE_RX2-PCIE_TX2- B62A62 AC Coupling capacitor Slot - Connect to PCIE Conn pin PCIE_TX3+PCIE_RX2+ A58B61 NA Device - Connect AC Coupling cap 0.1uF OI PCIEPCIE AC coupled onoff ModuleModule Connect to PCIE device or slot PCI Express Differential TransmitReceive Pairs Pairs 2 3 PCIE_TX3-PCIE_RX2- A59B62 NA Slot - Connect to PCIE Conn pin PCIE_RX3+PCIE_TX3+ B58A58 NA Device - Connect AC Coupling cap 0.1uF IO PCIE PCIE AC coupled offon Module Connect to PCIE device or slot PCI Express Differential ReceiveTransmit Pairs Pairs 3 3 PCIE_RX3-PCIE_TX3- B59A59 NA Slot - Connect to PCIE Conn pin PCIE_TX4+PCIE_RX3+ A55B58 NA Device - Connect AC Coupling cap 0.1uF OI PCIEPCIE AC coupled onoff ModuleModule Connect to PCIE device or slot PCI Express Differential TransmitReceive Pairs Pairs 3 4 PCIE_TX4-PCIE_RX3- A56B59 NA Slot - Connect to PCIE Conn pin PCIE_RX4+PCIE_TX4+ B55A55 NA Device - Connect AC Coupling cap 0.1uF IO PCIE PCIE AC coupled offon Module Connect to PCIE device or slot PCI Express Differential ReceiveTransmit Pairs Pairs 4 4 PCIE_RX4-PCIE_TX4- B56A56 NA Slot - Connect to PCIE Conn pin PCIE_TX5+PCIE_RX4+ A52B55 NA Device - Connect AC Coupling cap 0.1uF OI PCIEPCIE AC coupled onoff ModuleModule Connect to PCIE device or slot PCI Express Differential TransmitReceive Pairs Pairs 4 5 PCIE_TX5-PCIE_RX4- A53B56 NA Slot - Connect to PCIE Conn pin PCIE_RX5+PCIE_TX5+ B52A52 NA Device - Connect AC Coupling cap 0.1uF IO PCIE PCIE AC coupled offon Module Connect to PCIE device or slot PCI Express Differential ReceiveTransmit Pairs Pairs 5 5 PCIE_RX5-PCIE_TX5- B53A53 NA Slot - Connect to PCIE Conn pin PCIE_TX6+PCIE_RX5+ D19B52 NA Device - Connect AC Coupling cap 0.1uF OI PCIEPCIE AC coupled onoff ModuleModule Connect to PCIE device or slot PCI Express Differential TransmitReceive Pairs Pairs 5 6 PCIE_TX6-PCIE_RX5- D20B53 NA Slot - Connect to PCIE Conn pin PCIE_RX6+PCIE_TX6+ C19D19 NA Device - Connect AC Coupling cap 0.1uF IO PCIE PCIE AC coupled offon Module Connect Chapterto PCIE device or slot 3 PCI Express Differential ReceiveTransmit Pairs Pairs 6 6 PCIE_RX6-PCIE_TX6- C20D20 NA Slot - Connect to PCIE Conn pin PCIE_TX7+PCIE_RX6+ D22C19 NA Device - Connect AC Coupling cap 0.1uF OI PCIEPCIE AC coupled onoff ModuleModule Connect to PCIE device or slot PCI Express Differential TransmitReceive Pairs Pairs 6 7 PCIE_TX7-PCIE_RX6- D23C20 NA Slot - Connect to PCIE Conn pin PCIE_RX7+PCIE_TX7+ C22D22 NA Device - Connect AC Coupling cap 0.1uF IO PCIE PCIE AC coupled offon Module Connect to PCIE device or slot PCI Express Differential ReceiveTransmit Pairs Pairs 7 7 PCIE_RX7-PCIE_TX7- C23D23 NA Slot - Connect to PCIE Conn pin PCIE0_CK_REF+PCIE_RX7+ A88C22 NA Device - Connect AC Coupling cap 0.1uF Reference clock output for all PCI Express and PCI Express Graphics OI PCIEPCIE PCIEAC coupled off Module Connect to PCIE device, PCIe CLK Buffer or slot PCI Express Differential Receive Pairs 7 PCIE0_CK_REF-PCIE_RX7- A89C23 NA Slot - Connect to PCIE Conn pin lanes. PCIE0_CK_REF+ A88 Reference clock output for all PCI Express and PCI Express Graphics O PCIE PCIE Connect to PCIE device, PCIe CLK Buffer or slot PCIE0_CK_REF-PEG Signals and DescriptionA89s lanes. Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description PEG_TX0+PEG Signals and DescriptionD52s NA O PCIE AC coupled on Module PCI Express Graphics transmit differential pairs 0 PEG_TX0-Signal D53Pin# Module Pin Type Pwr Rail /Tolerance BW968NA Carrier Board Description PEG_RX0+PEG_TX0+ C52D52 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 0 0 PEG_RX0-PEG_TX0- C53D53 NA PEG_TX1+PEG_RX0+ D55C52 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 0 1 PEG_TX1-PEG_RX0- D56C53 NA PEG_RX1+PEG_TX1+ C55D55 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 1 1 PEG_RX1-PEG_TX1- C56D56 NA PEG_TX2+PEG_RX1+ D58C55 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 1 2 PEG_TX2-PEG_RX1- D59C56 NA PEG_RX2+PEG_TX2+ C58D58 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 2 2 PEG_RX2-PEG_TX2- C59D59 NA PEG_TX3+PEG_RX2+ D61C58 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 2 3 PEG_TX3-PEG_RX2- D62C59 NA PEG_RX3+PEG_TX3+ C61D61 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 3 3 PEG_RX3-PEG_TX3- C62D62 NA PEG_TX4+PEG_RX3+ D65C61 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 3 4 PEG_TX4-PEG_RX3- D66C62 NA PEG_RX4+PEG_TX4+ C65D65 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 4 4 PEG_RX4-PEG_TX4- C66D66 NA PEG_TX5+PEG_RX4+ D68C65 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 4 5 PEG_TX5-PEG_RX4- D69C66 NA PEG_RX5+PEG_TX5+ C68D68 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 5 5 PEG_RX5-PEG_TX5- C69D69 NA PEG_TX6+PEG_RX5+ D71C68 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 5 6 PEG_TX6-PEG_RX5- D72C69 NA PEG_RX6+PEG_TX6+ C71D71 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 6 6 PEG_RX6-PEG_TX6- C72D72 NA PEG_TX7+PEG_RX6+ D74C71 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 6 7 PEG_TX7-PEG_RX6- D75C72 NA PEG_RX7+PEG_TX7+ C74D74 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 7 7 PEG_RX7-PEG_TX7- C75D75 NA PEG_TX8+PEG_RX7+ D78C74 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 7 8 PEG_TX8-PEG_RX7- D79C75 NA PEG_RX8+PEG_TX8+ C78D78 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 8 8 PEG_RX8-PEG_TX8- C79D79 NA PEG_TX9+PEG_RX8+ D81C78 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 8 9 PEG_TX9-PEG_RX8- D82C79 NA PEG_RX9+PEG_TX9+ C81D81 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 9 9 PEG_RX9-PEG_TX9- C82D82 NA PEG_TX10+PEG_RX9+ D85C81 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 9 10 PEG_TX10-PEG_RX9- D86C82 NA PEG_RX10+PEG_TX10+ C85D85 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 10 10 PEG_RX10-PEG_TX10- C86D86 NA PEG_TX11+PEG_RX10+ D88C85 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 10 11 PEG_TX11-PEG_RX10- D89C86 NA PEG_RX11+PEG_TX11+ C88D88 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 11 11 PEG_RX11-PEG_TX11- C89D89 NA PEG_TX12+PEG_RX11+ D91C88 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 11 12 PEG_TX12-PEG_RX11- D92C89 NA PEG_RX12+PEG_TX12+ C91D91 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 12 12 PEG_RX12-PEG_TX12- C92D92 NA PEG_TX13+PEG_RX12+ D94C91 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 12 13 PEG_TX13-PEG_RX12- D95C92 NA PEG_RX13+PEG_TX13+ C94D94 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 13 13 PEG_RX13-PEG_TX13- C95D95 NA PEG_TX14+PEG_RX13+ D98C94 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 13 14 PEG_TX14-PEG_RX13- D99C95 NA PEG_RX14+PEG_TX14+ C98D98 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 14 14 PEG_RX14-PEG_TX14- C99D99 NA PEG_TX15+PEG_RX14+ D101C98 NA OI PCIEPCIE AC coupled onoff ModuleModule PCI Express Graphics transmitreceive differential differential pairs pairs 14 15 PEG_TX15-PEG_RX14- D102C99 NA PEG_RX15+PEG_TX15+ C101D101 NA IO PCIE PCIE AC coupled offon Module PCI Express Graphics receivetransmit differential differential pairs pairs 15 15 PEG_RX15-PEG_TX15- C102D102 NA PEG_RX15+ C101 NA PCI Express Graphics lane reversal input strap. Pull low on the Carrier PEG_LANE_RV# D54 I CMOSPCIE 3.3VAC coupled / 3.3V off Module PU 10K to 3.3V PCI Express Graphics receive differential pairs 15 PEG_RX15- C102 NA board to reverse lane order. PCI Express Graphics lane reversal input strap. Pull low on the Carrier PEG_LANE_RV# D54 I CMOS 3.3V / 3.3V PU 10K to 3.3V ExpressCard Signals and Descriptions board to reverse lane order. Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description EXCD0_CPPE#ExpressCard Signals and DescriA49 ptions PCI ExpressCard: PCI Express capable card request, active low, one per I CMOS 3.3V /3.3V EXCD1_CPPE#Signal B48Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board cardDescription EXCD0_CPPE# A49 EXCD0_PERST# A48 PCI ExpressCard: PCI Express capable card request, active low, one per OI CMOSCMOS 3.3V /3.3V PCI ExpressCard: reset, active low, one per card EXCD1_PERST#EXCD1_CPPE# B47B48 card EXCD0_PERST# A48 O CMOS 3.3V /3.3V PCI ExpressCard: reset, active low, one per card EXCD1_PERST#DDI Signals and DescriptionB47s Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description DDI1_PAIR0+/SDVO1_RED+ D26 Connect AC Coupling Capacitors 0.1uF to Device DDI Signals and Descriptions O PCIE AC coupled off Module DDI 1 Pair 0 differential pairs/Serial Digital Video B red output differential pair DDI1_PAIR0-Signal /SDVO1_RED- D27Pin# Module Pin Type Pwr Rail /Tolerance BW968 Connect AC Coupling Capacitors 0.1uF Carrierto Device Board Description DDI1_PAIR1+/SDVO1_GRN+DDI1_PAIR0+/SDVO1_RED+ D29D26 Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module 17 DDI 1 Pair 10 differential pairs/Serial Digital Video B greenred output output differential differential pair pair DDI1_PAIR1-/SDVO1_GRN-DDI1_PAIR0-/SDVO1_RED- D30D27 Connect AC CouplingCoupling CapacitorsCapacitors 0.1uF to Device DDI1_PAIR2+/SDVO1_BLU+DDI1_PAIR1+/SDVO1_GRN+ D32D29 Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module DDI 1 Pair 21 differential pairs/Serial Digital Video B bluegreen output output differential differential pair pair DDI1_PAIR2-/SDVO1_BLU-DDI1_PAIR1-/SDVO1_GRN- D33D30 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR3+/SDVO1_CK+ChapterDDI1_PAIR2+/SDVO1_BLU+ 3 Hardware InstallationD36D32 Connect AC Coupling Capacitors 0.1uF to Device www.dfi.com O PCIE AC coupled off Module DDI 1 Pair 32 differential pairs/Serial Digital Video B clockblue outputoutput differentialdifferential pairpair. DDI1_PAIR3-/SDVO1_CK-DDI1_PAIR2-/SDVO1_BLU- D37D33 Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR4+DDI1_PAIR3+/SDVO1_CK+/SDVO1_INT+ C25D36 NA Connect AC Coupling Capacitors 0.1uF to Device IO PCIE PCIE AC coupled off Module SerialDDI 1 DigitalPair 3 differentialVideo B interrupt pairs/Serial input Digitaldifferential Video pair. B clock output differential pair. DDI1_PAIR4-/SDVO1_INT-DDI1_PAIR3-/SDVO1_CK- C26D37 NA Connect AC Coupling Capacitors 0.1uF to Device DDI1_PAIR5+/SDVO1_TVCLKIN+DDI1_PAIR4+/SDVO1_INT+ C29C25 NANA I PCIE AC coupled off Module Serial Digital Video TVOUTB interrupt synchronization input differential clock pair. input differential pair. DDI1_PAIR5-/SDVO1_TVCLKIN-DDI1_PAIR4-/SDVO1_INT- C30C26 NA DDI1_PAIR6+/SDVO1_FLDSTALL+DDI1_PAIR5+/SDVO1_TVCLKIN+ C15C29 NA I PCIE AC coupled off Module Serial Digital Video FieldTVOUT Stall synchronization input differential clock pair. input differential pair. DDI1_PAIR6-/SDVO1_FLDSTALL-DDI1_PAIR5-/SDVO1_TVCLKIN- C16C30 NA DDI1_PAIR6+/SDVO1_FLDSTALL+ C15 PD 100K to GND NA I PCIE AC coupled off Module Serial Digital Video Field Stall input differential pair. DDI1_PAIR6-/SDVO1_FLDSTALL- C16 I/O PCIE AC coupled on Module (S/W IC betweenNA Rpu/PCH) Connect to DP AUX+ DP AUX+ function if DDI1_DDC_AUX_SEL is no connect DDI1_CTRLCLK_AUX+/SDVO1_CTRLCLK D15 PU PD 4.7K 100K to to 3.3V, GND PD 100K to GND I/O PCIE AC coupled on Module (S/W IC between Rpu/PCH) Connect to DP AUX+ DP AUX+ function if DDI1_DDC_AUX_SEL is no connect I/O OD CMOS 3.3V / 3.3V (S/W IC between Rpu/Rpd Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI1_DDC_AUX_SEL is pulled high DDI1_CTRLCLK_AUX+/SDVO1_CTRLCLK D15 resistor)PU 4.7K to 3.3V, PD 100K to GND I/O OD CMOS 3.3V / 3.3V PU(S/W 100K IC to between 3.3V Rpu/Rpd Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI1_DDC_AUX_SEL is pulled high I/O PCIE AC coupled on Module Connect to DP AUX- DP AUX- function if DDI1_DDC_AUX_SEL is no connect (S/Wresistor) IC between Rpu/PCH) PU 4.7K100K toto 3.3V/PU3.3V 100K to 3.3V DDI1_CTRLCLK_AUX-/SDVO1_CTRLDATA D16 I/O PCIE AC coupled on Module Connect to DP AUX- DP AUX- function if DDI1_DDC_AUX_SEL is no connect I/O OD CMOS 3.3V / 3.3V (S/W IC between 4.7K/100KRpu/PCH) Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI1_DDC_AUX_SEL is pulled high DDI1_CTRLCLK_AUX-/SDVO1_CTRLDATA D16 resistor)PU 4.7K to 3.3V/PU 100K to 3.3V I/O OD CMOS 3.3V / 3.3V (S/W IC between 4.7K/100K Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI1_DDC_AUX_SEL is pulled high DDI1_HPD C24 I CMOS 3.3V / 3.3V resistor) PD 100K to GND PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

DDI1_HPD C24 I CMOS 3.3V / 3.3V PD 100K to GND PD 1M and Connect to device Hot Plug Detect SelectsDDI Hot-Plug the function Detect of DDI1_CTRLCLK_AUX+ and DDI1_CTRLDATA_AUX-. DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm DDI1_DDC_AUX_SEL D34 I CMOS 3.3V / 3.3V PD 1M to GND PU 100K to 3.3V for DDC(HDMI/DVI) resistorSelects theto configure function ofthe DDI1_CTRLCLK_AUX+ DDI[n]_AUX pair as the and DDC DDI1_CTRLDATA_AUX-. channel. CarrierDDI[n]_DDC_AUX_SEL DDI[n]_DDC_AUX_SEL shall be should pulled beto connected3.3V on the to Carrier pin 13 withof the a 100KDisplayPort Ohm DDI1_DDC_AUX_SEL D34 I CMOS 3.3V / 3.3V PD 1M to GND PU 100K to 3.3V for DDC(HDMI/DVI) resistor to configure the DDI[n]_AUX pair as the DDC channel. DDI2_PAIR0+ D39 Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module DDICarrier 2 Pair DDI[n]_DDC_AUX_SEL 0 differential pairs should be connected to pin 13 of the DisplayPort DDI2_PAIR0- D40 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR1+DDI2_PAIR0+ D42D39 Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module DDI 2 Pair 10 differential pairs DDI2_PAIR1-DDI2_PAIR0- D43D40 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR2+DDI2_PAIR1+ D46D42 Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module DDI 2 Pair 21 differential pairs DDI2_PAIR2-DDI2_PAIR1- D47D43 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR3+DDI2_PAIR2+ D49D46 Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module DDI 2 Pair 32 differential pairs DDI2_PAIR3-DDI2_PAIR2- D50D47 Connect AC Coupling Capacitors 0.1uF to Device DDI2_PAIR3+ D49 PD 100K to GND Connect AC Coupling Capacitors 0.1uF to Device O PCIE AC coupled off Module DDI 2 Pair 3 differential pairs DDI2_PAIR3- D50 I/O PCIE AC coupled on Module (S/W IC between Rpu/PCH) Connect to AC DP Coupling AUX+ Capacitors 0.1uF to Device DP AUX+ function if DDI2_DDC_AUX_SEL is no connect PU PD 2.2K 100K to to 3.3V, GND PD 100K to GND DDI2_CTRLCLK_AUX+ C32 I/O PCIE AC coupled on Module Connect to DP AUX+ DP AUX+ function if DDI2_DDC_AUX_SEL is no connect I/O OD CMOS 3.3V / 3.3V (S/W IC between Rpu/RpdRpu/PCH) Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI2_DDC_AUX_SEL is pulled high DDI2_CTRLCLK_AUX+ C32 resistor)PU 2.2K to 3.3V, PD 100K to GND I/O OD CMOS 3.3V / 3.3V PU(S/W 100K IC to between 3.3V Rpu/Rpd Connect to HDMI/DVI I2C CTRLCLK HDMI/DVI I2C CTRLCLK if DDI2_DDC_AUX_SEL is pulled high I/O PCIE AC coupled on Module Connect to DP AUX- DP AUX- function if DDI2_DDC_AUX_SEL is no connect (S/Wresistor) IC between Rpu/PCH) DDI2_CTRLCLK_AUX- C33 PU 2.2K100K toto 3.3V/PU3.3V 100K to 3.3V I/O PCIE AC coupled on Module Connect to DP AUX- DP AUX- function if DDI2_DDC_AUX_SEL is no connect I/O OD CMOS 3.3V / 3.3V (S/W IC between 4.7K/100KRpu/PCH) Connect to HDMI/DVI I2C CTRLDATA HDMI/DVI I2C CTRLDATA if DDI2_DDC_AUX_SEL is pulled high DDI2_CTRLCLK_AUX- C33 resistor)PU 2.2K to 3.3V/PU 100K to 3.3V DDI2_HPD D44 II/O CMOS OD CMOS3.3V / 3.3V (S/W IC betweenPD 100K 4.7K/100Kto GND PDConnect 1M and to ConnectHDMI/DVI to I2Cdevice CTRLDATA Hot Plug Detect DDIHDMI/DVI Hot-Plug I2C Detect CTRLDATA if DDI2_DDC_AUX_SEL is pulled high resistor) Selects the function of DDI2_CTRLCLK_AUX+ and DDI2_CTRLDATA_AUX-. DDI2_HPD D44 I CMOS 3.3V / 3.3V PD 100K to GND PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm DDI2_DDC_AUX_SEL C34 I CMOS 3.3V / 3.3V PD 1M to GND PU 100K to 3.3V for DDC(HDMI/DVI) resistorSelects theto configure function ofthe DDI2_CTRLCLK_AUX+ DDI[n]_AUX pair as the and DDC DDI2_CTRLDATA_AUX-. channel. CarrierDDI[n]_DDC_AUX_SEL DDI[n]_DDC_AUX_SEL shall be should pulled beto connected3.3V on the to Carrier pin 13 withof the a 100KDisplayPort Ohm DDI2_DDC_AUX_SEL C34 I CMOS 3.3V / 3.3V PD 1M to GND PU 100K to 3.3V for DDC(HDMI/DVI) resistor to configure the DDI[n]_AUX pair as the DDC channel. DDI3_PAIR0+ C39 NA O PCIE AC coupled off Module DDICarrier 3 Pair DDI[n]_DDC_AUX_SEL 0 differential pairs should be connected to pin 13 of the DisplayPort DDI3_PAIR0- C40 NA DDI3_PAIR1+DDI3_PAIR0+ C42C39 NA O PCIE AC coupled off Module DDI 3 Pair 10 differential pairs DDI3_PAIR1-DDI3_PAIR0- C43C40 NA DDI3_PAIR2+DDI3_PAIR1+ C46C42 NA O PCIE AC coupled off Module DDI 3 Pair 21 differential pairs DDI3_PAIR2-DDI3_PAIR1- C47C43 NA DDI3_PAIR3+DDI3_PAIR2+ C49C46 NA O PCIE AC coupled off Module DDI 3 Pair 32 differential pairs DDI3_PAIR3-DDI3_PAIR2- C50C47 NA DDI3_PAIR3+ C49 NA I/OO PCIE PCIE AC coupled onoff ModuleModule NA DPDDI AUX+ 3 Pair function 3 differential if DDI3_DDC_AUX_SEL pairs is no connect DDI3_PAIR3- C50 NA DDI3_CTRLCLK_AUX+ C36 I/O PCIE AC coupled on Module NA DP AUX+ function if DDI3_DDC_AUX_SEL is no connect I/O OD CMOS 3.3V / 3.3V NA HDMI/DVI I2C CTRLCLK if DDI3_DDC_AUX_SEL is pulled high DDI3_CTRLCLK_AUX+ C36 I/O OD CMOS 3.3V / 3.3V NA HDMI/DVI I2C CTRLCLK if DDI3_DDC_AUX_SEL is pulled high I/O PCIE AC coupled on Module NA DP AUX- function if DDI3_DDC_AUX_SEL is no connect DDI3_CTRLCLK_AUX- C37 I/O ODPCIE CMOS 3.3VAC coupled / 3.3V on Module NA HDMI/DVIDP AUX- function I2C CTRLDATA if DDI3_DDC_AUX_SEL if DDI3_DDC_AUX_SEL is no connect is pulled high DDI3_CTRLCLK_AUX- C37 DDI3_HPD C44 I CMOS 3.3V / 3.3V NA DDI Hot-Plug Detect I/O OD CMOS 3.3V / 3.3V NA HDMI/DVI I2C CTRLDATA if DDI3_DDC_AUX_SEL is pulled high Selects the function of DDI3_CTRLCLK_AUX+ and DDI3_CTRLDATA_AUX-. DDI3_HPD C44 I CMOS 3.3V / 3.3V NA DDI[n]_DDC_AUX_SELDDI Hot-Plug Detect shall be pulled to 3.3V on the Carrier with a 100K Ohm DDI3_DDC_AUX_SEL C38 I CMOS 3.3V / 3.3V NA resistorSelects theto configure function ofthe DDI3_CTRLCLK_AUX+ DDI[n]_AUX pair as the and DDC DDI3_CTRLDATA_AUX-. channel. CarrierDDI[n]_DDC_AUX_SEL DDI[n]_DDC_AUX_SEL shall be should pulled beto connected3.3V on the to Carrier pin 13 withof the a 100KDisplayPort Ohm DDI3_DDC_AUX_SEL C38 I CMOS 3.3V / 3.3V NA resistor to configure the DDI[n]_AUX pair as the DDC channel. USB Signals and Descriptions Carrier DDI[n]_DDC_AUX_SEL should be connected to pin 13 of the DisplayPort Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description USB0+USB Signals and DescriptionA46s Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 0 USB0-Signal A45Pin# Module Pin Type Pwr Rail /Tolerance BW968 connector Carrier Board Description USB1+USB0+ B46A46 Connect 90Ω @100MHz@100MHz CommonCommon ChokeChoke inin seriesseries andand ESDESD suppressorssuppressors toto GNDGND toto USBUSB I/O USB 3.3V Suspend/3.3V USB differential pairs 10 USB1-USB0- B45A45 connector USB2+USB1+ A43B46 Connect 90Ω @100MHz@100MHz CommonCommon ChokeChoke inin seriesseries andand ESDESD suppressorssuppressors toto GNDGND toto USBUSB I/O USB 3.3V Suspend/3.3V USB differential pairs 21 USB2-USB1- A42B45 connector USB3+USB2+ B43A43 Connect 90Ω @100MHz@100MHz CommonCommon ChokeChoke inin seriesseries andand ESDESD suppressorssuppressors toto GNDGND toto USBUSB I/O USB 3.3V Suspend/3.3V USB differential pairs 32 USB3-USB2- B42A42 connector USB4+USB3+ A40B43 Connect 90Ω @100MHz@100MHz CommonCommon ChokeChoke inin seriesseries andand ESDESD suppressorssuppressors toto GNDGND toto USBUSB I/O USB 3.3V Suspend/3.3V USB differential pairs 43 USB4-USB3- A39B42 connector USB5+USB4+ B40A40 Connect 90Ω @100MHz@100MHz CommonCommon ChokeChoke inin seriesseries andand ESDESD suppressorssuppressors toto GNDGND toto USBUSB I/O USB 3.3V Suspend/3.3V USB differential pairs 54 USB5-USB4- B39A39 connector USB6+USB5+ A37B40 Connect 90Ω @100MHz@100MHz CommonCommon ChokeChoke inin seriesseries andand ESDESD suppressorssuppressors toto GNDGND toto USBUSB I/O USB 3.3V Suspend/3.3V USB differential pairs 65 USB6-USB5- A36B39 connector USB7+USB6+ B37A37 Connect 90Ω @100MHz@100MHz CommonCommon ChokeChoke inin seriesseries andand ESDESD susuppressorsppressors toto GNDGND toto USBUSB I/O USB 3.3V Suspend/3.3V USB differential pairs 76 USB7-USB6- B36A36 connector USB7+ B37 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB over-currentdifferential pairs sense, 7 USB channels 0 and 1. A pull-up for this line USB7- B36 connector shall be present on the Module. An open drain driver from a USB USB_0_1_OC# B44 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch currentUSB over-current monitor on sense, the Carrier USB channels Board may 0 and drive 1. thisA pull-up line low. for Dothis not line pullshall this be presentline high on on the the Module. Carrier Board.An open drain driver from a USB USB_0_1_OC# B44 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch current monitor on the Carrier Board may drive this line low. Do not USB over-current sense, USB channels 2 and 3. A pull-up for this line pull this line high on the Carrier Board. shall be present on the Module. An open drain driver from a USB USB_2_3_OC# A44 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch currentUSB over-current monitor on sense, the Carrier USB channels Board may 2 and drive 3. thisA pull-up line low. for Dothis not line pullshall this be presentline high on on the the Module. Carrier Board.An open drain driver from a USB USB_2_3_OC# A44 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch current monitor on the Carrier Board may drive this line low. Do not USB over-current sense, USB channels 4 and 5. A pull-up for this line pull this line high on the Carrier Board. shall be present on the Module. An open drain driver from a USB USB_4_5_OC# B38 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch currentUSB over-current monitor on sense, the Carrier USB channels Board may 4 and drive 5. thisA pull-up line low. for Dothis not line pullshall this be presentline high on on the the Module. Carrier Board.An open drain driver from a USB USB_4_5_OC# B38 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch current monitor on the Carrier Board may drive this line low. Do not USB over-current sense, USB channels 6 and 7. A pull-up for this line pull this line high on the Carrier Board. shall be present on the Module. An open drain driver from a USB USB_6_7_OC# A38 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch currentUSB over-current monitor on sense, the Carrier USB channels Board may 6 and drive 7. thisA pull-up line low. for Dothis not line pullshall this be presentline high on on the the Module. Carrier Board.An open drain driver from a USB USB_6_7_OC# A38 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch USB_SSTX0+ D4 AC Coupling capacitor Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB current monitor on the Carrier Board may drive this line low. Do not O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path. USB_SSTX0- D3 AC Coupling capacitor connector pull this line high on the Carrier Board. USB_SSRX0+USB_SSTX0+ C4D4 AC Coupling capacitor Connect 90Ω @100MHz@100MHz CommonCommon ChokeChoke inin seriesseries andand ESDESD suppressorssuppressors toto GNDGND toto USBUSB IO PCIE PCIE AC coupled offon ModuleModul Additional receivetransmit signal signal differential differential pairs pairs for for the the SuperSpeed SuperSpeed USB USB data data path. path. USB_SSRX0-USB_SSTX0- C3D3 AC Coupling capacitor connector USB_SSTX1+USB_SSRX0+ D7C4 AC Coupling capacitor Connect 90Ω @100MHz@100MHz CommonCommon ChokeChoke inin seriesseries andand ESDESD suppressorssuppressors toto GNDGND toto USBUSB OI PCIEPCIE AC coupled onoff ModuleModul Additional transmitreceive signal signal differential differential pairs pairs for for the the SuperSpeed SuperSpeed USB USB data data path. path. USB_SSTX1-USB_SSRX0- D6C3 AC Coupling capacitor connector USB_SSRX1+USB_SSTX1+ C7D7 AC Coupling capacitor Connect 90Ω @100MHz@100MHz CommonCommon ChokeChoke inin seriesseries andand ESDESD suppressorssuppressors toto GNDGND toto USBUSB IO PCIE PCIE AC coupled offon ModuleModul Additional receivetransmit signal signal differential differential pairs pairs for for the the SuperSpeed SuperSpeed USB USB data data path. path. USB_SSRX1-USB_SSTX1- C6D6 AC Coupling capacitor connector USB_SSTX2+USB_SSRX1+ D10C7 AC Coupling capacitor Connect 90Ω @100MHz@100MHz CommonCommon ChokeChoke inin seriesseries andand ESDESD suppressorssuppressors toto GNDGND toto USBUSB OI PCIEPCIE AC coupled onoff ModuleModul Additional transmitreceive signal signal differential differential pairs pairs for for the the SuperSpeed SuperSpeed USB USB data data path. path. USB_SSTX2-USB_SSRX1- D9C6 AC Coupling capacitor connector USB_SSRX2+USB_SSTX2+ C10D10 AC Coupling capacitor Connect 90Ω @100MHz@100MHz CommonCommon ChokeChoke inin seriesseries andand ESDESD suppressorssuppressors toto GNDGND toto USBUSB IO PCIE PCIE AC coupled offon ModuleModul Additional receivetransmit signal signal differential differential pairs pairs for for the the SuperSpeed SuperSpeed USB USB data data path. path. USB_SSRX2-USB_SSTX2- C9D9 AC Coupling capacitor connector USB_SSTX3+USB_SSRX2+ D13C10 AC Coupling capacitor Connect 90Ω @100MHz@100MHz CommonCommon ChokeChoke inin seriesseries andand ESDESD suppressorssuppressors toto GNDGND toto USBUSB OI PCIEPCIE AC coupled onoff ModuleModul Additional transmitreceive signal signal differential differential pairs pairs for for the the SuperSpeed SuperSpeed USB USB data data path. path. USB_SSTX3-USB_SSRX2- D12C9 AC Coupling capacitor connector USB_SSRX3+USB_SSTX3+ C13D13 AC Coupling capacitor Connect 90Ω @100MHz@100MHz CommonCommon ChokeChoke inin seriesseries andand ESDESD suppressorssuppressors toto GNDGND toto USBUSB IO PCIE PCIE AC coupled offon ModuleModul Additional receivetransmit signal signal differential differential pairs pairs for for the the SuperSpeed SuperSpeed USB USB data data path. path. USB_SSRX3-USB_SSTX3- C12D12 AC Coupling capacitor connector USB_SSRX3+ C13 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path. USB_SSRX3-LVDS Signals and DescriptionC12s connector Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description LVDS_A0+LVDS Signals and DescriptionA71s Connect to LVDS connector LVDS Channel A differential pairs Signal Pin# OModule LVDS Pin TypeLVDS Pwr Rail /Tolerance BW968 Carrier Board Description LVDS_A0- A72 Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-, LVDS_A0+ A71 Connect to LVDS connector LVDS_B_CK+/-)LVDS Channel A shalldifferential have 100 pairsΩ terminations across the pairs at the destination. These Connect to LVDS connector LVDS_A1+ A73 O LVDS LVDS terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer LVDS_A0- A72 O LVDS LVDS Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-, LVDS_A1- A74 on-boardLVDS_B_CK+/-) shall have 100Ω terminations across the pairs at the destination. These LVDS_A1+ A73 Connect to LVDS connector LVDS_A2+ A75 O LVDS LVDS Connect to LVDS connector terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer LVDS_A1- A74 O LVDS LVDS on-board LVDS_A2- A76 LVDS_A2+ A75 Connect to LVDS connector LVDS_A3+ A78 O LVDS LVDS Connect to LVDS connector LVDS_A2- A76 O LVDS LVDS LVDS_A3- A79 LVDS_A3+ A78 Connect to LVDS connector LVDS_A_CK+ A81 Connect to LVDS connector O LVDS LVDS LVDS Channel A differential clock LVDS_A_CK-LVDS_A3- A82A79 LVDS_B0+LVDS_A_CK+ B71A81 Connect to LVDS connector O LVDS LVDS LVDS Channel A differential clock LVDS_B0-LVDS_A_CK- B72A82 LVDS Channel B differential pairs LVDS_B1+LVDS_B0+ B73B71 Connect to LVDS connector O LVDS LVDS Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-, LVDS_B1-LVDS_B0- B74B72 LVDS_B_CK+/-)LVDS Channel B shalldifferential have 100 pairsΩ terminations across the pairs at the destination. These LVDS_B2+LVDS_B1+ B75B73 Connect to LVDS connector O LVDS LVDS terminationsTher LVDS flat may panel be ondifferential the Carrier pairs Board (LVDS_A[0:3]+/-, if the Carrier Board LVDS_B[0:3]+/-. implements aLVDS_A_CK+/-, LVDS deserializer LVDS_B2-LVDS_B1- B76B74 on-boardLVDS_B_CK+/-) shall have 100Ω terminations across the pairs at the destination. These LVDS_B3+LVDS_B2+ B77B75 Connect to LVDS connector O LVDS LVDS terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer LVDS_B2- B76 LVDS_B3- B78 on-board LVDS_B_CK+LVDS_B3+ B81B77 Connect to LVDS connector O LVDS LVDS LVDS Channel B differential clock LVDS_B_CK-LVDS_B3- B82B78 LVDS_VDD_ENLVDS_B_CK+ A77B81 O CMOS 3.3V / 3.3V Connect to enableLVDS connector control of LVDS panel power circuit LVDS panel power enable O LVDS LVDS LVDS Channel B differential clock LVDS_BKLT_ENLVDS_B_CK- B79B82 O CMOS 3.3V / 3.3V Connect to enable control of LVDS panel backlight power circuit. LVDS panel backlight enable LVDS_BKLT_CTRLLVDS_VDD_EN B83A77 O CMOS 3.3V / 3.3V Connect to brightnessenable control control of LVDS of LVDS panel panel power backlight circuit power circuit. LVDS panel backlightpower enable brightness control LVDS_I2C_CKLVDS_BKLT_EN A83B79 I/OO CMOS OD CMOS 3.3V / 3.3V PU 4.7K to 3.3V Connect to DDCenable clock control of LVDS of LVDS panel panel backlight power circuit. I2CLVDS clock panel output backlight for LVDS enable display use LVDS_I2C_DATLVDS_BKLT_CTRL A84B83 I/OO CMOS OD CMOS 3.3V / 3.3V PU 4.7K to 3.3V Connect to DDCbrightness data of control LVDS ofpanel LVDS panel backlight power circuit. I2CLVDS data panel line backlight for LVDS brig displayhtness use control LVDS_I2C_CK A83 I/O OD CMOS 3.3V / 3.3V PU 4.7K to 3.3V Connect to DDC clock of LVDS panel I2C clock output for LVDS display use LVDS_I2C_DATLPC Signals and DescriptionA84s I/O OD CMOS 3.3V / 3.3V PU 4.7K to 3.3V Connect to DDC data of LVDS panel I2C data line for LVDS display use Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description LPC_AD0LPC Signals and DescriptionB4s LPC_AD1Signal B5Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description I/O CMOS 3.3V / 3.3V LPC multiplexed address, command and data bus LPC_AD2LPC_AD0 B6B4 Connect to LPC device LPC_AD3LPC_AD1 B7B5 I/O CMOS 3.3V / 3.3V LPC multiplexed address, command and data bus LPC_FRAME#LPC_AD2 B3B6 O CMOS 3.3V / 3.3V Connect to LPC device LPC frame indicates the start of an LPC cycle LPC_DRQ0#LPC_AD3 B8B7 NC NC I CMOS 3.3V / 3.3V LPC serial DMA request LPC_DRQ1#LPC_FRAME# B9B3 O CMOS 3.3V / 3.3V NC NC LPC frame indicates the start of an LPC cycle LPC_SERIRQLPC_DRQ0# A50B8 I/O CMOS 3.3V / 3.3V PU 1KNC to 3.3V NC LPC serial interrupt I CMOS 3.3V / 3.3V Connect to LPC device LPC serial DMA request LPC_CLKLPC_DRQ1# B10B9 O CMOS 3.3V / 3.3V NC NC LPC clock output - 24MHz nominal LPC_SERIRQ A50 I/O CMOS 3.3V / 3.3V PU 1K to 3.3V LPC serial interrupt Connect to LPC device LPC_CLKSPI Signals and DescriptionsB10 O CMOS 3.3V / 3.3V LPC clock output - 24MHz nominal Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description SPI_CS#SPI Signals and DescriptionsB97 O CMOS 3.3V Suspend/3.3V Connect to Carrier Board SPI Device CS# pin Chip select for Carrier Board SPI - may be sourced from chipset SPI0 or SPI1 SPI_MISOSignal A92Pin# IModule CMOS Pin Type3.3V Pwr RailSuspend/3.3V /Tolerance BW968 Connect a series resistor 33Ω to CarrierCarrier Board SPI Device SO pin DataDescription in to Module from Carrier SPI SPI_MOSISPI_CS# A95B97 O CMOSCMOS 3.3V Suspend/3.3VSuspend/3.3V Connect ato series Carrier resistor Board 33SPIΩ Device to Carrier CS# Board pin SPI Device SI pin DataChip selectout from for ModuleCarrier Boardto Carrier SPI SPI- may be sourced from chipset SPI0 or SPI1 SPI_CLKSPI_MISO A94A92 OI CMOSCMOS 3.3V Suspend/3.3V Connect a series resistor 33Ω toto CarrierCarrier BoardBoard SPISPI DeviceDevice SCKSO pin pin ClockData infrom to ModuleModule fromto Carrier Carrier SPI SPI SPI_MOSI A95 O CMOS 3.3V Suspend/3.3V Connect a series resistor 33Ω to Carrier Board SPI Device SI pin Data out from Module to Carrier SPI Power supply for Carrier Board SPI – sourced from Module – nominally SPI_CLK A94 O CMOS 3.3V Suspend/3.3V Connect a series resistor 33Ω to Carrier Board SPI Device SCK pin Clock from Module to Carrier SPI 3.3V. The Module shall provide a minimum of 100mA on SPI_POWER. SPI_POWER A91 O 3.3V Suspend/3.3V CarriersPower supply shall usefor Carrierless than Board 100mA SPI of– sourcedSPI_POWER. from SPI_POWERModule – nominally shall3.3V. only The beModule used shallto power provide SPI adevices minimum on theof 100mA Carrier on SPI_POWER. SPI_POWER A91 O 3.3V Suspend/3.3V Carriers shall use less than 100mA of SPI_POWER. SPI_POWER Selection straps to determine the BIOS boot device. shall only be used to power SPI devices on the Carrier The Carrier should only float these or pull them low, please refer to COMSelection Express straps Module to determine Base Specification the BIOS bootRevision device. 2.1 for strapping options of BIOS disable signals. BIOS_DIS0# A34 PU 10K to 3.3V The Carrier should only float these or pull them low, please refer to COM Express Module Base Specification Revision 2.1 for strapping options of BIOS disable signals. BIOS_DIS0# A34 PU 10K to 3.3V BIOS BIOS Chipset Chipset Carrier SPI Bios Ref DIS1# DIS0# SPI CS1# SPI CS0# SPI_CS# Descriptor Entry Line BIOS BIOS DestinationChipset DestinationChipset Carrier SPI Bios Ref DIS1# DIS0# SPI CS1# SPI CS0# SPI_CS# Descriptor Entry Line 1 1 Module Module High Module SPI0/SPI1 0 I CMOS NA Destination Destination 1 01 Module Module High Module CarrierSPI0/SPI1 FWH 10 I CMOS NA Module Carrier SPI0 Carrier SPI0/SPI1 2 BIOS_DIS1# B88 PU 10K to 3.3V 01 01 Module Module High Module Carrier FWH 1 0 01 CarrierModule ModuleCarrier SPI1SPI0 ModuleCarrier SPI0/SPI1 32 BIOS_DIS1# B88 PU 10K to 3.3V (Default) (Default) (Default) (Default) (Default) 0 0 Carrier Module SPI1 Module SPI0/SPI1 3 (Default) (Default) (Default) (Default) (Default)

VGA Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description VGA_REDVGA Signals and DescriptionB89s O Analog Analog PD 150 to GND PD 150R,connect to VGA connector with EMI filter & ESD protect component. Red for monitor. Analog output VGA_GRNSignal B91Pin# OModule Analog Pin TypeAnalog Pwr Rail /Tolerance PD 150BW968 to GND PD 150R,connect to VGA connectorCarrier with BoardEMI filter & ESD protect component. GreenDescription for monitor. Analog output VGA_BLUVGA_RED B92B89 O Analog Analog PD 150 to GND PD 150R,connect to VGA connector with EMI filter & ESD protect component. BlueRed forfor monitor.monitor. AnalogAnalog outputoutput VGA_HSYNCVGA_GRN B93B91 O CMOSAnalog 3.3VAnalog / 3.3V PD 150 to GND ConnectPD 150R,connect to VGA connector to VGA connector with a3.3V with Buffer EMI IC filter to isolate& ESD protectPCH & Display component. Device HorizontalGreen for monitor.sync output Analog to VGA output monitor VGA_VSYNCVGA_BLU B94B92 O CMOSAnalog 3.3VAnalog / 3.3V PD 150 to GND ConnectPD 150R,connect to VGA connector to VGA connector with a 33V with Buffer EMI IC filter to isolate& ESD PCHprotect & Display component. Device VerticalBlue for syncmonitor. output Analog to VGA output monitor VGA_I2C_CKVGA_HSYNC B95B93 I/OO CMOS OD CMOS 3.3V / 3.3V PU 2.2K to 3.3V Connect to VGA connector with aa3.3V 3.3V Bufferto 5V LevelIC to shiftisolate circuit. PCH & Display Device DDCHorizontal clock linesync (I2C output port to dedicated VGA monitor to identify VGA monitor capabilities) VGA_I2C_DATVGA_VSYNC B96B94 I/OO CMOS OD CMOS 3.3V / 3.3V PU 2.2K to 3.3V Connect to VGA connector with a 3.3V33V Bufferto 5V LevelIC to shiftisolate circuit. PCH & Display Device DDCVertical data sync line. output to VGA monitor VGA_I2C_CK B95 I/O OD CMOS 3.3V / 3.3V PU 2.2K to 3.3V Connect to VGA connector with a 3.3V to 5V Level shift circuit. DDC clock line (I2C port dedicated to identify VGA monitor capabilities) VGA_I2C_DATSerial Interface Signals and B96Descriptions I/O OD CMOS 3.3V / 3.3V PU 2.2K to 3.3V Connect to VGA connector with a 3.3V to 5V Level shift circuit. DDC data line. Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description General purpose serial port 0 transmitter SER0_TXSerial Interface Signals andA98 Descriptions O CMOS 3.3V/5V PD 4.7K to GND Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board (DescriptionRecommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) General purpose serial port 0 receivertransmitter SER0_RXSER0_TX A99A98 IO CMOS CMOS 3.3V/5V PU 10K to 3.3V PD 4.7K to GND (Recommend add Protecting LoLogicic LevelLevel SiSignals on Pins Reclaimed from VCC_12V) General purpose serial port 10 transmitterreceiver SER1_TXSER0_RX A101A99 OI CMOSCMOS 3.3V/5V PU 10K to 3.3V PD 4.7K to GND (Recommend add Protecting LoLogicic LevelLevel SiSignals on Pins Reclaimed from VCC_12V) General purpose serial port 1 receivertransmitter SER1_RXSER1_TX A102A101 IO CMOS CMOS 3.3V/5V PU 10K to 3.3V PD 4.7K to GND (Recommend add Protecting LoLogicic LevelLevel SiSignals on Pins Reclaimed from VCC_12V) General purpose serial port 1 receiver SER1_RX A102 I CMOS 3.3V/5V PU 10K to 3.3V Miscellaneous Signals and Descriptions (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description Miscellaneous Signals and Descriptions Output for audio enunciator - the "speaker" in PC-AT systems. SPKRSignal B32Pin# OModule CMOS Pin Type3.3V Pwr Rail/ 3.3V /Tolerance PU 10KBW968 to 3.3V Carrier Board ThisDescription port provides the PC beep signal and is mostly intended for debuggingOutput for purposes.audio enunciator - the "speaker" in PC-AT systems. SPKR B32 O CMOS 3.3V / 3.3V PU 10K to 3.3V This port provides the PC beep signal and is mostly intended for WDT B27 O CMOS 3.3V / 3.3V PD 100K to GND Output indicating that a watchdog time-out event has occurred. debugging purposes. Fan speed control. Uses the Pulse Width Modulation (PWM) technique to control the fan's RPM. FAN_PWNOUTWDT B101B27 O ODCMOS CMOS 3.3V / 3.3V PD 100K to GND Output indicating that a watchdog time-out event has occurred. (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) Fan speed control. Uses the Pulse Width Modulation (PWM) technique to control the fan's RPM. FAN_PWNOUT B101 O OD CMOS 3.3V / 3.3V Fan tachometer input for a fan with a two pulse output. FAN_TACHIN B102 I OD CMOS 3.3V / 3.3V PU 47K to 3V3 (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) Fan tachometer input for a fan with a two pulse output. FAN_TACHIN B102 I OD CMOS 3.3V / 3.3V PU 47K to 3V3 Trusted Platform Module (TPM) Physical Presence pin. Active high. (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) TPM_PP A96 I CMOS 3.3V / 3.3V TPM chip has an internal pull down. This signal is used to indicate PhysicalTrusted PlatformPresence Module to the TPM.(TPM) Physical Presence pin. Active high. TPM_PP A96 I CMOS 3.3V / 3.3V TPM chip has an internal pull down. This signal is used to indicate Power and System Management Signals and Descriptions Physical Presence to the TPM. Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description Power and System Management Signals and Descriptions A falling edge creates a power button event. Power button events can Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description PWRBTN# B12 I CMOS 3.3V Suspend/3.3V PU 10K to 3V3_DU_EC PU 4.7K to 3V3_SB be used to bring a system out of S5 soft off and other suspend states, asA fallingwell as edge powering creates the a systempower button down. event. Power button events can PWRBTN# B12 I CMOS 3.3V Suspend/3.3V PU 10K to 3V3_DU_EC PU 4.7K to 3V3_SB be used to bring a system out of S5 soft off and other suspend states, Resetas well button as powering input. Activethe system low request down. for Module to reset and reboot. May be falling edge sensitive. For situations when SYS_RESET# is SYS_RESET# B49 I CMOS 3.3V Suspend/3.3V PU 10K to 3V3SB NC PU 4.7K to 3V3_SB notReset able button to reestablish input. Active control low ofrequest the system, for Module PWR_OK to reset or a and power reboot. cycleMay bemay falling be used. edge sensitive. For situations when SYS_RESET# is SYS_RESET# B49 I CMOS 3.3V Suspend/3.3V PU 10K to 3V3SB NC PU 4.7K to 3V3_SB not able to reestablish control of the system, PWR_OK or a power Resetcycle mayoutput be fromused. Module to Carrier Board. Active low. Issued by Module chipset and may result from a low SYS_RESET# input, a low CB_RESET# B50 O CMOS 3.3V Suspend/3.3V PWR_OKReset output input, from a VCC_12V Module to power Carrier input Board. that Active falls below low. Issuedthe minimum by specification,Module chipset a watchdogand may result timeout, from or a may low beSYS_RESET# initiated by input, the Module a low CB_RESET# B50 O CMOS 3.3V Suspend/3.3V software.PWR_OK input, a VCC_12V power input that falls below the minimum specification, a watchdog timeout, or may be initiated by the Module Powersoftware. OK from main power supply. A high value indicates that the power is good. This signal can be used to hold off Module startup to PWR_OK B24 I CMOS 3.3V / 3.3V PU 10K to 3V3 allowPower Carrier OK from based main FPGAs power or supply. other configurable A high value devices indicates time that to the be programmed.power is good. This signal can be used to hold off Module startup to PWR_OK B24 I CMOS 3.3V / 3.3V PU 10K to 3V3 allow Carrier based FPGAs or other configurable devices time to be SUS_STAT# B18 O CMOS 3.3V Suspend/3.3V PU 1K to 3V3SB Indicatesprogrammed. imminent suspend operation; used to notify LPC devices. Indicates system is in Suspend to RAM state. Active low output. An SUS_STAT# B18 O CMOS 3.3V Suspend/3.3V PU 1K to 3V3SB Indicates imminent suspend operation; used to notify LPC devices. SUS_S3# A15 O CMOS 3.3V Suspend/3.3V PD 100K to GND inverted copy of SUS_S3# on the Carrier Board may be used to enableIndicates the system non-standby is in Suspend power onto RAMa typical state. ATX Active supply. low output. An SUS_S4#SUS_S3# A18A15 O CMOS 3.3V Suspend/3.3V PD 100K to GND Indicatesinverted copy system of SUS_S3#is in Suspend on the to DiskCarrier state. Board Active may low be output.used to enable the non-standby power on a typical ATX supply. SUS_S5# A24 O CMOS 3.3V Suspend/3.3V PD 100K to GND Indicates system is in Soft Off state. SUS_S4# A18 O CMOS 3.3V Suspend/3.3V PD 100K to GND Indicates system is in Suspend to Disk state. Active low output. WAKE0# B66 I CMOS 3.3V Suspend/3.3V PU 10K to 3V3SB PCI Express wake up signal. SUS_S5# A24 O CMOS 3.3V Suspend/3.3V PD 100K to GND Indicates system is in Soft Off state. General purpose wake up signal. May be used to implement wake-up WAKE1# B67 I CMOS 3.3V Suspend/3.3V NA WAKE0# B66 I CMOS 3.3V Suspend/3.3V PU 10K to 3V3SB onPCI PS2 Express keyboard wake or up mouse signal. activity. General purpose wake up signal. May be used to implement wake-up WAKE1# B67 I CMOS 3.3V Suspend/3.3V NA Indicates that external battery is low. on PS2 keyboard or mouse activity. BATLOW# A27 I CMOS 3.3V Suspend/ 3.3V PU 10K to 3V3SB This port provides a battery-low signal to the Module for orderly transitioningIndicates that to external power saving battery or is power low. cut-off ACPI modes. BATLOW# A27 I CMOS 3.3V Suspend/ 3.3V PU 10K to 3V3SB This port provides a battery-low signal to the Module for orderly LID switch. Low active signal used by the ACPI operating system for a LID switch. LID# A103 I OD CMOS 3.3V Suspend/12V PU 47K to 3V3_DU_EC transitioning to power saving or power cut-off ACPI modes. (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) LID switch. Low active signal used by the ACPI operating system for a LID switch. LID# A103 I OD CMOS 3.3V Suspend/12V PU 47K to 3V3_DU_EC Sleep(Recommend button. Low add active Protecting signal used Logic by Levelthe ACPI Signals operating on Pins system Reclaimed to bring the from VCC_12V) SLEEP# B103 I OD CMOS 3.3V Suspend/12V PU 4.7K to 3V3_DU system to sleep state or to wake it up again. (RecommendSleep button. Low add active Protecting signal used Logic by Levelthe ACPI Signals operating on Pins system Reclaimed to bring thefrom VCC_12V) SLEEP# B103 I OD CMOS 3.3V Suspend/12V PU 4.7K to 3V3_DU system to sleep state or to wake it up again. THRM# B35 I CMOS 3.3V / 3.3V PU 1K to 3V3 Input from off-Module temp sensor indicating an over-temp situation. (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) THRMTRIP# A35 O CMOS 3.3V / 3.3V PU 1K to 3.3V Active low output indicating that the CPU has entered thermal shutdown. SMB_CKTHRM# B13B35 I/OI CMOS OD CMOS 3.3V Suspend/3.3V/ 3.3V PU 2.2KPU 1Kto 3V3_DU_ECto 3V3 SystemInput from Management off-Module Bus temp bidirectional sensor indicating clock line. an over-temp situation. SMB_DATTHRMTRIP# B14A35 I/OO CMOS OD CMOS 3.3V Suspend/3.3V/ 3.3V PU 2.2KPU 1Kto 3V3_DU_ECto 3.3V SystemActive low Management output indicating Bus bidirectional that the CPU data has line. entered thermal shutdown. SMB_CK B13 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3V3_DU_EC System Management Bus bidirectional clock line. System Management Bus Alert – active low input can be used to SMB_ALERT# B15 I CMOS 3.3V Suspend/3.3V PU 10K to 3V3_DU_EC SMB_DAT B14 I/O OD CMOS 3.3V Suspend/3.3V PU 2.2K to 3V3_DU_EC generateSystem Management an SMI# (System Bus bidirectional Management data Interrupt) line. or to wake the system. System Management Bus Alert – active low input can be used to SMB_ALERT# B15 I CMOS 3.3V Suspend/3.3V PU 10K to 3V3_DU_EC GPIO Signals and Descriptions generate an SMI# (System Management Interrupt) or to wake the system. Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description GPO0GPIO Signals and DescriptionA93s GPO1Signal B54Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board GeneralDescription purpose output pins. O CMOS 3.3V / 3.3V GPO2GPO0 B57A93 Upon a hardware reset, these outputs should be low. GPO3GPO1 B63B54 General purpose output pins. O CMOS 3.3V / 3.3V GPI0GPO2 A54B57 PU 47K to 3.3V Upon a hardware reset, these outputs should be low. GPI1GPO3 A63B63 PU 47K to 3.3V General purpose input pins. I CMOS 3.3V / 3.3V GPI2GPI0 A67A54 PU 47K to 3.3V Pulled high internally on the Module. GPI3GPI1 A85A63 PU 47K to 3.3V General purpose input pins. I CMOS 3.3V / 3.3V GPI2 A67 PU 47K to 3.3V Pulled high internally on the Module. GPI3Power and GND Signals andA85 Descriptions PU 47K to 3.3V Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description Power and GND Signals andA Descri104~A109ptions B104~B109 VCC_12VSignal Pin# PowerModule Pin Type Pwr Rail /Tolerance BW968 Carrier Board PrimaryDescription power input: +12V nominal. All available VCC_12V pins on the connector(s) shall be used. C104~C109A104~A109 D104~D109B104~B109 VCC_12V Power Primary power input: +12V nominal. All available VCC_12V pins on the connector(s) shall be used. C104~C109 Standby power input: +5.0V nominal. If VCC5_SBY is used, all D104~D109 available VCC_5V_SBY pins on the connector(s) shall be used. Only VCC_5V_SBY B84~B87 Power usedStandby for standbypower input: and suspend+5.0V nominal. functions. If VCC5_SBYMay be left is unconnected used, all if theseavailable functions VCC_5V_SBY are not pinsused on in thethe connector(s)system design. shall be used. Only VCC_5V_SBY B84~B87 Power VCC_RTC A47 Power Real-timeused for standby clock circuit-power and suspend input. functions. Nominally May be+3.0V. left unconnected if these functions are not used in the system design. VCC_RTC A47 Power Real-time clock circuit-power input. Nominally +3.0V. A1, A11, A21, A31, A41, A51, A57, A60, A66,A1, A11, A70, A21, A80, A31, A90, A100,A41, A51, A110, A57, B1, A60, B11,A66, B21A70, ,B31, A80, B41,A90, B51,A100, B60, A110, B70, B1, B80, B90,B11, B100,B21 ,B31, B110, B41, C1,B51, C2, B60, C5, B70, C8, B80,C11, C14,B90, C21,B100, C31, B110, C41, C51,C1, C2, C60, C5, C70, C8, C73,C11, Ground - DC power and signal and AC signal return path. GND C76,C14, C80,C21, C84,C31, C87,C41, Power All available GND connector pins shall be used and tied to Carrier C90,C51, C93,C60, C96,C70, C73, BoardGround GND - DC plane. power and signal and AC signal return path. GND C100,C76, C80, C103, C84, C110, C87, Power All available GND connector pins shall be used and tied to Carrier D1,C90, D2, C93, D5, C96, D8, Board GND plane. D11,C100, D14, C103, D21, C110, D31,D1, D2, D51, D5, D60, D8, D67,D11, D70,D14, D73,D21, D76,D31, D80,D51, D84,D60, D87,D67, D90,D70, D93,D73, D96,D76, D100,D80, D84, D103, D110D87, D90, D93, D96, D100, D103, D110 Pin Types I Input to the Module O Output from the Module I/O Bi-directional input / output signal OD Open drain output

PCI Express Lanes Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description PCIE_TX0+ A68 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 0 PCIE_TX0- A69 AC Coupling capacitor PCIE_RX0+ B68 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 0 PCIE_RX0- B69 Slot - Connect to PCIE Conn pin PCIE_TX1+ A64 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 1 PCIE_TX1- A65 AC Coupling capacitor PCIE_RX1+ B64 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 1 PCIE_RX1- B65 Slot - Connect to PCIE Conn pin PCIE_TX2+ A61 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 2 PCIE_TX2- A62 AC Coupling capacitor PCIE_RX2+ B61 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 2 PCIE_RX2- B62 Slot - Connect to PCIE Conn pin PCIE_TX3+ A58 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 3 PCIE_TX3- A59 NA PCIE_RX3+ B58 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 3 PCIE_RX3- B59 NA Slot - Connect to PCIE Conn pin PCIE_TX4+ A55 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 4 PCIE_TX4- A56 NA PCIE_RX4+ B55 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 4 PCIE_RX4- B56 NA Slot - Connect to PCIE Conn pin PCIE_TX5+ A52 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 5 PCIE_TX5- A53 NA PCIE_RX5+ B52 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 5 PCIE_RX5- B53 NA Slot - Connect to PCIE Conn pin PCIE_TX6+ D19 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 6 PCIE_TX6- D20 NA PCIE_RX6+ C19 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 6 PCIE_RX6- C20 NA Slot - Connect to PCIE Conn pin PCIE_TX7+ D22 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 7 PCIE_TX7- D23 NA PCIE_RX7+ C22 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 7 PCIE_RX7- C23 NA Slot - Connect to PCIE Conn pin PCIE0_CK_REF+ A88 Reference clock output for all PCI Express and PCI Express Graphics O PCIE PCIE Connect to PCIE device, PCIe CLK Buffer or slot PCIE0_CK_REF- A89 lanes.

DDI1_HPD C24 I CMOS 3.3V / 3.3V PD 100K to GND PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

I/O PCIE AC coupled on Module NA DP AUX+ function if DDI3_DDC_AUX_SEL is no connect DDI3_CTRLCLK_AUX+ C36 I/O OD CMOS 3.3V / 3.3V NA HDMI/DVI I2C CTRLCLK if DDI3_DDC_AUX_SEL is pulled high

USB Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 18 Carrier Board Description USB0+ A46 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 0 USB0- A45 connector USB1+ B46 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB Chapter 3 Hardware Installation I/O USB 3.3V Suspend/3.3V USB differential pairs 1 www.dfi.com USB1- B45 connector USB2+ A43 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 2 USB2- A42 connector USB3+ B43 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 3 USB3- B42 connector USB4+ A40 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 4 USB4- A39 connector USB5+ B40 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 5 USB5- B39 connector USB6+ A37 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 6 USB6- A36 connector USB7+ B37 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I/O USB 3.3V Suspend/3.3V USB differential pairs 7 USB7- B36 connector USB over-current sense, USB channels 0 and 1. A pull-up for this line shall be present on the Module. An open drain driver from a USB USB_0_1_OC# B44 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch current monitor on the Carrier Board may drive this line low. Do not pull this line high on the Carrier Board. USB over-current sense, USB channels 2 and 3. A pull-up for this line shall be present on the Module. An open drain driver from a USB USB_2_3_OC# A44 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch current monitor on the Carrier Board may drive this line low. Do not pull this line high on the Carrier Board. USB over-current sense, USB channels 4 and 5. A pull-up for this line shall be present on the Module. An open drain driver from a USB USB_4_5_OC# B38 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch current monitor on the Carrier Board may drive this line low. Do not pull this line high on the Carrier Board. USB over-current sense, USB channels 6 and 7. A pull-up for this line shall be present on the Module. An open drain driver from a USB USB_6_7_OC# A38 I CMOS 3.3V Suspend/3.3V PU 10k to 3V3SB Connect to Overcurrent of USB Power Switch current monitor on the Carrier Board may drive this line low. Do not pull this line high on the Carrier Board. USB_SSTX0+ D4 AC Coupling capacitor Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path. USB_SSTX0- D3 AC Coupling capacitor connector USB_SSRX0+ C4 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path. USB_SSRX0- C3 connector USB_SSTX1+ D7 AC Coupling capacitor Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path. USB_SSTX1- D6 AC Coupling capacitor connector USB_SSRX1+ C7 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path. USB_SSRX1- C6 connector USB_SSTX2+ D10 AC Coupling capacitor Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path. USB_SSTX2- D9 AC Coupling capacitor connector USB_SSRX2+ C10 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path. USB_SSRX2- C9 connector USB_SSTX3+ D13 AC Coupling capacitor Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB O PCIE AC coupled on Module Additional transmit signal differential pairs for the SuperSpeed USB data path. USB_SSTX3- D12 AC Coupling capacitor connector USB_SSRX3+ C13 Connect 90Ω @100MHz Common Choke in series and ESD suppressors to GND to USB I PCIE AC coupled off Modul Additional receive signal differential pairs for the SuperSpeed USB data path. USB_SSRX3- C12 connector

PCI Express Lanes Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description PCIE_TX0+ A68 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 0 PCIE_TX0- A69 AC Coupling capacitor PCIE_RX0+ B68 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 0 PCIE_RX0- B69 Slot - Connect to PCIE Conn pin PCIE_TX1+ A64 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 1 PCIE_TX1- A65 AC Coupling capacitor PCIE_RX1+ B64 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 1 PCIE_RX1- B65 Slot - Connect to PCIE Conn pin PCIE_TX2+ A61 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 2 PCIE_TX2- A62 AC Coupling capacitor PCIE_RX2+ B61 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 2 PCIE_RX2- B62 Slot - Connect to PCIE Conn pin PCIE_TX3+ A58 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 3 PCIE_TX3- A59 NA PCIE_RX3+ B58 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 3 PCIE_RX3- B59 NA Slot - Connect to PCIE Conn pin PCIE_TX4+ A55 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 4 PCIE_TX4- A56 NA PCIE_RX4+ B55 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 4 PCIE_RX4- B56 NA Slot - Connect to PCIE Conn pin PCIE_TX5+ A52 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 5 PCIE_TX5- A53 NA PCIE_RX5+ B52 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 5 PCIE_RX5- B53 NA Slot - Connect to PCIE Conn pin PCIE_TX6+ D19 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 6 PCIE_TX6- D20 NA PCIE_RX6+ C19 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 6 PCIE_RX6- C20 NA Slot - Connect to PCIE Conn pin PCIE_TX7+ D22 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 7 PCIE_TX7- D23 NA PCIE_RX7+ C22 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 7 PCIE_RX7- C23 NA Slot - Connect to PCIE Conn pin PCIE0_CK_REF+ A88 Reference clock output for all PCI Express and PCI Express Graphics O PCIE PCIE Connect to PCIE device, PCIe CLK Buffer or slot PCIE0_CK_REF- A89 lanes.

DDI1_HPD C24 I CMOS 3.3V / 3.3V PD 100K to GND PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

I/O PCIE AC coupled on Module NA DP AUX- function if DDI3_DDC_AUX_SEL is no connect DDI3_CTRLCLK_AUX- C37 Chapter 3 I/O OD CMOS 3.3V / 3.3V NA HDMI/DVI I2C CTRLDATA if DDI3_DDC_AUX_SEL is pulled high DDI3_HPD C44 I CMOS 3.3V / 3.3V NA DDI Hot-Plug Detect Selects the function of DDI3_CTRLCLK_AUX+ and DDI3_CTRLDATA_AUX-. DDI[n]_DDC_AUX_SEL shall be pulled to 3.3V on the Carrier with a 100K Ohm DDI3_DDC_AUX_SEL C38 I CMOS 3.3V / 3.3V NA resistor to configure the DDI[n]_AUX pair as the DDC channel. Carrier DDI[n]_DDC_AUX_SEL should be connected to pin 13 of the DisplayPort

PCI Express Lanes Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description PCIE_TX0+ A68 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 0 PCIE_TX0- A69 AC Coupling capacitor PCIE_RX0+ B68 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 0 PCIE_RX0- B69 Slot - Connect to PCIE Conn pin PCIE_TX1+ A64 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 1 PCIE_TX1- A65 AC Coupling capacitor PCIE_RX1+ B64 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 1 PCIE_RX1- B65 Slot - Connect to PCIE Conn pin PCIE_TX2+ A61 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 2 PCIE_TX2- A62 AC Coupling capacitor PCIE_RX2+ B61 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 2 PCIE_RX2- B62 Slot - Connect to PCIE Conn pin PCIE_TX3+ A58 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 3 PCIE_TX3- A59 NA PCIE_RX3+ B58 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 3 PCIE_RX3- B59 NA Slot - Connect to PCIE Conn pin PCIE_TX4+ A55 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 4 PCIE_TX4- A56 NA PCIE_RX4+ B55 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 4 PCIE_RX4- B56 NA Slot - Connect to PCIE Conn pin PCIE_TX5+ A52 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 5 PCIE_TX5- A53 NA PCIE_RX5+ B52 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 5 PCIE_RX5- B53 NA Slot - Connect to PCIE Conn pin PCIE_TX6+ D19 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 6 PCIE_TX6- D20 NA PCIE_RX6+ C19 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 6 PCIE_RX6- C20 NA Slot - Connect to PCIE Conn pin PCIE_TX7+ D22 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 7 PCIE_TX7- D23 NA PCIE_RX7+ C22 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 7 PCIE_RX7- C23 NA Slot - Connect to PCIE Conn pin PCIE0_CK_REF+ A88 Reference clock output for all PCI Express and PCI Express Graphics O PCIE PCIE Connect to PCIE device, PCIe CLK Buffer or slot PCIE0_CK_REF- A89 lanes.

DDI1_HPD C24 I CMOS 3.3V / 3.3V PD 100K to GND PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

LVDS Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description LVDS_A0+ A71 Connect to LVDS connector LVDS Channel A differential pairs O LVDS LVDS LVDS_A0- A72 Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-, LVDS_B_CK+/-) shall have 100Ω terminations across the pairs at the destination. These LVDS_A1+ A73 Connect to LVDS connector O LVDS LVDS terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer LVDS_A1- A74 on-board LVDS_A2+ A75 Connect to LVDS connector O LVDS LVDS LVDS_A2- A76 LVDS_A3+ A78 Connect to LVDS connector O LVDS LVDS LVDS_A3- A79 LVDS_A_CK+ A81 Connect to LVDS connector O LVDS LVDS LVDS Channel A differential clock LVDS_A_CK- A82 LVDS_B0+ B71 Connect to LVDS connector O LVDS LVDS LVDS_B0- B72 LVDS Channel B differential pairs LVDS_B1+ B73 Connect to LVDS connector O LVDS LVDS Ther LVDS flat panel differential pairs (LVDS_A[0:3]+/-, LVDS_B[0:3]+/-. LVDS_A_CK+/-, LVDS_B1- B74 LVDS_B_CK+/-) shall have 100Ω terminations across the pairs at the destination. These LVDS_B2+ B75 Connect to LVDS connector O LVDS LVDS terminations may be on the Carrier Board if the Carrier Board implements a LVDS deserializer LVDS_B2- B76 on-board LVDS_B3+ B77 Connect to LVDS connector O LVDS LVDS LVDS_B3- B78 Chapter 3 LVDS_B_CK+ B81 Connect to LVDS connector O LVDS LVDS LVDS Channel B differential clock LVDS_B_CK- B82 LVDS_VDD_EN A77 O CMOS 3.3V / 3.3V Connect to enable control of LVDS panel power circuit LVDS panel power enable LVDS_BKLT_EN B79 O CMOS 3.3V / 3.3V Connect to enable control of LVDS panel backlight power circuit. LVDS panel backlight enable LVDS_BKLT_CTRL B83 O CMOS 3.3V / 3.3V Connect to brightness control of LVDS panel backlight power circuit. LVDS panel backlight brightness control LVDS_I2C_CK A83 I/O OD CMOS 3.3V / 3.3V PU 4.7K to 3.3V Connect to DDC clock of LVDS panel I2C clock output for LVDS display use LVDS_I2C_DAT A84 I/O OD CMOS 3.3V / 3.3V PU 4.7K to 3.3V Connect to DDC data of LVDS panel I2C data line for LVDS display use

Serial Interface Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description General purpose serial port 0 transmitter SER0_TX A98 O CMOS V PD 4.7K to GND 5 / 12V (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) General purpose serial port 0 receiver SER0_RX A99 I CMOS PU 10K to 3.3V 5V / 12V (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) General purpose serial port 1 transmitter SER1_TX A101 O CMOS PD 4.7K to GND 5V / 12V (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) General purpose serial port 1 receiver SER1_RX A102 I CMOS PU 10K to 3.3V 5V / 12V (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V)

Power and System Management Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description 20 A falling edge creates a power button event. Power button events can PWRBTN# B12 I CMOS 3.3V Suspend/3.3V PU 10K to 3V3_DU_EC PU 4.7K to 3V3_SB be used to bring a system out of S5 soft off and other suspend states, as well as powering the system down.

Chapter 3 Hardware Installation Reset button input. Active low request for Module to reset and reboot. www.dfi.com May be falling edge sensitive. For situations when SYS_RESET# is SYS_RESET# B49 I CMOS 3.3V Suspend/3.3V PU 10K to 3V3SB NC PU 4.7K to 3V3_SB not able to reestablish control of the system, PWR_OK or a power cycle may be used.

PCI Express Lanes Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description PCIE_TX0+ A68 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 0 PCIE_TX0- A69 AC Coupling capacitor PCIE_RX0+ B68 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 0 PCIE_RX0- B69 Slot - Connect to PCIE Conn pin PCIE_TX1+ A64 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 1 PCIE_TX1- A65 AC Coupling capacitor PCIE_RX1+ B64 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 1 PCIE_RX1- B65 Slot - Connect to PCIE Conn pin PCIE_TX2+ A61 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 2 PCIE_TX2- A62 AC Coupling capacitor PCIE_RX2+ B61 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 2 PCIE_RX2- B62 Slot - Connect to PCIE Conn pin PCIE_TX3+ A58 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 3 PCIE_TX3- A59 NA PCIE_RX3+ B58 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 3 PCIE_RX3- B59 NA Slot - Connect to PCIE Conn pin PCIE_TX4+ A55 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 4 PCIE_TX4- A56 NA PCIE_RX4+ B55 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 4 PCIE_RX4- B56 NA Slot - Connect to PCIE Conn pin PCIE_TX5+ A52 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 5 PCIE_TX5- A53 NA PCIE_RX5+ B52 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 5 PCIE_RX5- B53 NA Slot - Connect to PCIE Conn pin PCIE_TX6+ D19 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 6 PCIE_TX6- D20 NA PCIE_RX6+ C19 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 6 PCIE_RX6- C20 NA Slot - Connect to PCIE Conn pin PCIE_TX7+ D22 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 7 PCIE_TX7- D23 NA PCIE_RX7+ C22 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 7 PCIE_RX7- C23 NA Slot - Connect to PCIE Conn pin PCIE0_CK_REF+ A88 Reference clock output for all PCI Express and PCI Express Graphics O PCIE PCIE Connect to PCIE device, PCIe CLK Buffer or slot PCIE0_CK_REF- A89 lanes.

DDI1_HPD C24 I CMOS 3.3V / 3.3V PD 100K to GND PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

Serial Interface Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description Chapter 3 General purpose serial port 0 transmitter SER0_TX A98 O CMOS 3.3V/5V PD 4.7K to GND (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) General purpose serial port 0 receiver SER0_RX A99 I CMOS 3.3V/5V PU 10K to 3.3V (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) General purpose serial port 1 transmitter SER1_TX A101 O CMOS 3.3V/5V PD 4.7K to GND (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V) General purpose serial port 1 receiver SER1_RX A102 I CMOS 3.3V/5V PU 10K to 3.3V (Recommend add Protecting Logic Level Signals on Pins Reclaimed from VCC_12V)

Power and GND Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description A104~A109 B104~B109 VCC_12V Power Primary power input: +12V nominal. All available VCC_12V pins on the connector(s) shall be used. C104~C109 D104~D109 21 Standby power input: +5.0V nominal. If VCC5_SBY is used, all available VCC_5V_SBY pins on the connector(s) shall be used. Only VCC_5V_SBY B84~B87 Power used for standby and suspend functions. May be left unconnected if Chapter 3 Hardware Installation these functions are not used in the system design. www.dfi.com VCC_RTC A47 Power Real-time clock circuit-power input. Nominally +3.0V.

PCI Express Lanes Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description PCIE_TX0+ A68 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 0 PCIE_TX0- A69 AC Coupling capacitor PCIE_RX0+ B68 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 0 PCIE_RX0- B69 Slot - Connect to PCIE Conn pin PCIE_TX1+ A64 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 1 PCIE_TX1- A65 AC Coupling capacitor PCIE_RX1+ B64 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 1 PCIE_RX1- B65 Slot - Connect to PCIE Conn pin PCIE_TX2+ A61 AC Coupling capacitor O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 2 PCIE_TX2- A62 AC Coupling capacitor PCIE_RX2+ B61 Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 2 PCIE_RX2- B62 Slot - Connect to PCIE Conn pin PCIE_TX3+ A58 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 3 PCIE_TX3- A59 NA PCIE_RX3+ B58 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 3 PCIE_RX3- B59 NA Slot - Connect to PCIE Conn pin PCIE_TX4+ A55 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 4 PCIE_TX4- A56 NA PCIE_RX4+ B55 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 4 PCIE_RX4- B56 NA Slot - Connect to PCIE Conn pin PCIE_TX5+ A52 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 5 PCIE_TX5- A53 NA PCIE_RX5+ B52 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 5 PCIE_RX5- B53 NA Slot - Connect to PCIE Conn pin PCIE_TX6+ D19 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 6 PCIE_TX6- D20 NA PCIE_RX6+ C19 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 6 PCIE_RX6- C20 NA Slot - Connect to PCIE Conn pin PCIE_TX7+ D22 NA O PCIE AC coupled on Module Connect to PCIE device or slot PCI Express Differential Transmit Pairs 7 PCIE_TX7- D23 NA PCIE_RX7+ C22 NA Device - Connect AC Coupling cap 0.1uF I PCIE AC coupled off Module PCI Express Differential Receive Pairs 7 PCIE_RX7- C23 NA Slot - Connect to PCIE Conn pin PCIE0_CK_REF+ A88 Reference clock output for all PCI Express and PCI Express Graphics O PCIE PCIE Connect to PCIE device, PCIe CLK Buffer or slot PCIE0_CK_REF- A89 lanes.

DDI1_HPD C24 I CMOS 3.3V / 3.3V PD 100K to GND PD 1M and Connect to device Hot Plug Detect DDI Hot-Plug Detect

GPIO Signals and Descriptions Signal Pin# Module Pin Type Pwr Rail /Tolerance BW968 Carrier Board Description GPO0 A93 Chapter 3 GPO1 B54 General purpose output pins. O CMOS 3.3V / 3.3V GPO2 B57 Upon a hardware reset, these outputs should be low. GPO3 B63 GPI0 A54 PU 47K to 3.3V GPI1 A63 PU 47K to 3.3V General purpose input pins. I CMOS 3.3V / 3.3V GPI2 A67 PU 47K to 3.3V Pulled high internally on the Module. GPI3 A85 PU 47K to 3.3V

Chapter 3 Hardware Installation www.dfi.com Chapter 3

Standby Power LED Cooling Options Heat Sink with Cooling Fan R31 S Note: 1 The system board used in the following illustrations may not resemble the actual an board. These illustrations are for reference only.

Intel

i Pentium 8528 Celeron

ntel Top View of the Heat Sink G211 SS S2517

Stand oer S lash S

Standby Power LED (LED1) This LED will light when the system is in the standby mode.

1 1 Bottom View of the Heat Sink

• “1” denotes the location of the thermal pad/paste designed to contact the corresponding components that are on BW968.

Important: Remove the plastic covering from the thermal pads prior to mounting the heat sink onto BW968.

Chapter 3 Hardware Installation www.dfi.com Chapter 3

Installing BW968 onto a Carrier Board

Important: The carrier board (COM332-B) used in this section is for reference purpose only and may not resemble your carrier board. These illustrations are mainly to guide you on how to install BW968 onto the carrier board of your choice. COM Express connectors on BW968

1. Install the module and heatsink onto the carrier board. The photo below shows the location of the mounting holes on the carrier board.

COM Express connectors on the carrier board

Mounting standoffs

3. Press BW968 down firmly to seat it in the COM Express connectors of the carrier board.

Pressing points

2. Grasp BW968 by its edges and position it on top of the carrier board with the mounting holes of BW968 aligning with the standoffs on the carrier board. This will also align the COM Express connectors of the two boards to each other.

Note: The above illustration shows the pressing points of the module onto the carrier board. Be careful when pressing the module to avoid damages to the connectors.

Chapter 3 Hardware Installation www.dfi.com Chapter 3

4. Verify that BW968 is firmly seated in the COM Express connectors of the carrier board.

Carrier board

BW968

5. Install a heat sink onto the BW968 with the carrier board. The photo below shows the heatsink installed on BW968.

Chapter 3 Hardware Installation www.dfi.com Chapter 3

Installing the COM Express Debug Card 2. Connect the COMe-DEBUG card to COMe-LINK1 via a cable.

Note: COMe-DEBUG The system board used in the following illustrations may not resemble the actual board. These illustrations are for reference only.

Code Review 80 Port Display 1. COMe-LINK1 is the COM Express debug card designed for COM Express Compact modules Control to debug and display signals and codes of COM Express modules. LPC

COMe-LINK1 COMe-LINK1/2 Connector COMe-DEBUG Connector

COM Express COM Express Type Display Signal Display COM Express Power/Reset/ Power Display Sleep/LID control

COM Express Connectors Cable Top view COMe-DEBUG COMe-LINK1

COM Express Connectors

Bottom view

Chapter 3 Hardware Installation www.dfi.com Chapter 3

4. Use the provided screws to fix the COMe-LINK1 debug card onto the carrier board.

Screws

COMe-LINK1

Carrier Board

COMe-DEBUG

5. Then use the instructions from the previous section to install BW968 and heatsink on the top of the COMe-LINK1 debug card.

BW968

COMe-LINK1

Carrier Board

Side View of the Module, Debug Card and Carrier Board

Chapter 3 Hardware Installation www.dfi.com Chapter 4

Chapter 4 - BIOS Setup Legends Overview KEYs Function The BIOS is a program that takes care of the basic level of communication between the CPU and peripherals. It contains codes for various advanced features found in this system board. F1 Help The BIOS allows you to configure the system and save the configuration in a battery-backed CMOS so that the data retains even when the power is off. In general, the information stored Exit in the CMOS RAM of the EEPROM will stay unchanged unless a configuration change has been made such as a hard drive replaced or a device added. Up and Down Arrows Select Item It is possible that the CMOS battery will fail causing CMOS data loss. If this happens, you need to install a new CMOS battery and reconfigure the BIOS settings. Right and Left Arrows Select Item

Note: / Change Values The BIOS is constantly updated to improve the performance of the system board; therefore the BIOS screens in this chapter may not appear the same as the actual Select  Submenu one. These screens are for reference purpose only. Setup Defaults

Default Configuration Save and Exit

Most of the configuration settings are either predefined according to the Load Optimal Defaults settings which are stored in the BIOS or are automatically detected and configured without Scroll Bar requiring any actions. There are a few settings that you may need to change depending on your system configuration. When a scroll bar appears to the right of the setup screen, it indicates that there are more available fields not shown on the screen. Use the up and down arrow keys to scroll through all Entering the BIOS Setup Utility the available fields. Submenu The BIOS Setup Utility can only be operated from the keyboard and all commands are keyboard commands. The commands are available at the right side of each setup screen. When ““ appears on the left of a particular field, it indicates that a submenu which contains additional options are available for that field. To display the submenu, move the highlight to The BIOS Setup Utility does not require an operating system to run. After you power up the that field and press . system, the BIOS message appears on the screen and the memory count begins. After the memory test, the message “Press DEL to run setup” will appear on the screen. If the message disappears before you respond, restart the system or press the “Reset” button. You may also restart the system by pressing the and ~~keys simultaneously.~~

Chapter 4 BIOS Setup www.dfi.com Chapter 4

Insyde BIOS Setup Utility Advanced

The Advanced menu allows you to configure your system for basic operation. Some entries are Main defaults required by the system board, while others, if enabled, will improve the performance of your system or let you set some features according to your preference. The Main menu is the first screen that you will see when you enter the BIOS Setup Utility.

Important: Setting incorrect field values may cause the system to malfunction.

System Date

The date format is , , . Day displays a day, from Sunday to Saturday. Month displays the month, from January to December. Date displays the date, from 1 to 31. Year displays the year, from 1980 to 2099.

System Time

The time format is , , . The time is based on the 24-hour military-time clock. For example, 1 p.m. is 13:00:00. Hour displays hours from 00 to 23. Minute displays minutes from 00 to 59. Second displays seconds from 00 to 59.

Chapter 4 BIOS Setup www.dfi.com Chapter 4

ACPI Settings CPU Configuration

This section allows you to configure the ACPI settings. This section allows you to configure the CPU.

Wake on LAN Intel Speed Step

Set this field to enable to wake up the system via the onboard LAN or via a LAN card Enable/Disable Intel Speed Step Technology. that supports the remote wake up function. Turbo Mode After G3 This field is used to enable or disable processor turbo mode. This field is to specify what state to go when power is re-applied after a power failure (G3 state).

Always On Power on the system when power is re-applied after AC power loss.

Always Off The system will be off when power is re-applied after AC power loss.

Chapter 4 BIOS Setup www.dfi.com Chapter 4

Video Configuration LCD Panel Type

This section allows you to configure the video settings. Select the LCD panel resolution.

Primary Display

Select the primary display: Auto, integrated graphics display (IGD) or PCIe graphics card (PCIe).

LCD Panel Color Depth

Select the LCD panel color depth: 18 bit, 24 bit, 36 bit or 48 bit.

Integrated Graphics Device

Enable or disable Integrated Graphics Device when IGD is selected as the primary display.

Chapter 4 BIOS Setup www.dfi.com Chapter 4

Audio Configuration SATA Configuration

This section allows you to configure the audio settings. This section lets you select the SATA controller and the type of hard disk drive installed on the system.

SATA Controller

This field is used to enable or disable SATA controller.

Audio Controller

Control the detection of the Azalia device.

Disabled Serial ATA Port 0 and 1 Azalia will be unconditionally disabled. This field is used to enable or disable the serial ATA port. Enabled Azalia will be unconditionally enabled.

Chapter 4 BIOS Setup www.dfi.com Chapter 4

USB Configuration PCI Express Configuration

This section allows you to configure the parameters of the USB device. This section configures settings relevant to PCI Express root ports.

PCI Express Root Port 1 to PCI Express Root Port 4

USB3.0 Support PCI Express Root Port 1 to 4 Enabled Enable the USB XHCI PreBoot Support. This field is used to enable or disable the PCI Express Root Port.

Disabled Disable the USB XHCI PreBoot Support.

PCIe Speed

Select the speed of the PCI Express Root Port: Gen1 or Gen2.

Chapter 4 BIOS Setup www.dfi.com Chapter 4

EC Configuration WDT

This section allows you to configure the Embedded Controller (EC) settings. Enable or disable the watchdog function. A counter will appear if you select to enable WDT. Input any value between 1 to 255 seconds. COM Port 1 to COM Port 2

Configure the settings for each COM port.

Disable Disable this COM port. Enable Enable this COM port.

PC Health Status

This field only displays the PC health information.

Chapter 4 BIOS Setup www.dfi.com Chapter 4

Security Boot

This section allows you to configure the Trusted Platform Module (TPM) on the system. This section shows the available boot options and allows you to configure them for the system.

TPM Availability OS Selection

Select to show or hide TPM configuration options. This field is used to select the operating system. Numlock TPM Operation Select the power-on state for Numlock. Select “Enable” to enable storage and endorsement hierarchy and “disable” to disable storage and endorsement hierarchy. Select “No Operation” to make no changes. Boot Type Clear TPM Select the boot type. The options are Dual Boot Type, Legacy Boot Type, and UEFI Boot Type. Remove all TPM context associated with a specific owner.

Set Supervisor Password Network Stack Enable or disable UEFI network stack. It supports the operation of these functions or Set the supervisor’s password and the length of the password must be greater than software: Windows 8 BitLocker Network Unlock, UEFI IPv4/IPv6 PXE and legacy PXE one character. Option ROM.

USB Boot

Enable or disable the booting to USB boot devices.

Chapter 4 BIOS Setup www.dfi.com Chapter 4

PXE Boot to LAN Exit If “Legacy Boot Type” is selected for Boot Type, the “PXE Boot to LAN” option will be shown. This field is used to enable or disable booting the device through the Ethernet This section shows the exit options of the BIOS setup program. adaptor supporting PXE (Preboot Execution Environment).

Exit Saving Changes

Select this field and then press to exit the system setup and save your changes.

Load Optimal Defaults

Select this field and then press to load optimal defaults.

Discard Changes

Select this field and then press to exit the system setup without saving your changes.

Chapter 4 BIOS Setup www.dfi.com Chapter 4

Updating the BIOS Notice: BIOS SPI ROM

To update the BIOS, you will need the new BIOS file and a flash utility. Please contact techni- 1. The Intel® Management Engine has already been integrated into this system board. Due to cal support or your sales representative for the files and specific instructions about how to the safety concerns, the BIOS (SPI ROM) chip cannot be removed from this system board update BIOS with the flash utility. and used on another system board of the same model.

When you download the given BIOS file, you may find a BIOS flash utility attached with the 2. The BIOS (SPI ROM) on this system board must be the original equipment from the factory BIOS file. This is the utility for performing BIOS updating procedure. For your convenience, we and cannot be used to replace one which has been utilized on other system boards. will also provide you with an auto-execution file in the BIOS file downloaded. This auto-execution file will bring you directly to the flash utility menu soon after system boots up and finishes 3. If you do not follow the methods above, the Intel® Management Engine will not be running the boot files in your boot disk. updated and will cease to be effective.

Note: RRead file successfully. (path= “platform.ini”) a. You can take advantage of flash tools to update the default configuration of the Information BIOS (SPI ROM) to the latest version anytime. Please do not remove the AC power b. When the BIOS IC needs to be replaced, you have to populate it properly onto the system board after the EEPROM programmer has been burned and follow the technical person's instructions to confirm that the MAC address should be burned Insyde H20FFT (Flash Firmware Tool) Version (SEG) 100.00.08.10 or not. Copyright(c) 2012 - 2016, Insyde Software Corp. All Rights Reserved. Initializing Current BIOS Model name: BW968 New BIOS Model name: BW968

Current BIOS version: 65.05A New BIOS version: 65.05A

Updating Block at FFFFF000h 0% 25% 50% 75% 100% 100% C:\BW968>_

Chapter 4 BIOS Setup www.dfi.com Chapter 5

Chapter 5 - Supported Software Auto Run Page (For Windows 8.1) Install drivers, utilities and software applications that are required to facilitate and enhance the performance of the system board. You may acquire the software from your sales representatives, from an optional DVD included in the shipment, or from the website download page at https://www.dfi.com/DownloadCenter.

Auto Run Page (For Windows 10)

Chapter 5 Supported Software www.dfi.com Chapter 5

Auto Run Page (For Windows 7)

Note:

This step can be ignored if the applications are standalone files.

Chapter 5 Supported Software www.dfi.com Chapter 5

Intel Chipset Software Installation Utility 3. Go through the readme document for system require- The Intel Chipset Software Installation Utility is used for updating Windows INF files so that ments and installation tips then the Intel chipset can be recognized and configured properly in the system. click Next.

To install the utility, click “Intel Chipset Software Installation Utility” on the main menu.

1. Setup is now ready to install the utility. Click Next.

4. After completing installation, click Finish to exit setup.

2. Read the license agreement then click Yes.

Chapter 5 Supported Software www.dfi.com Chapter 5

Intel Graphics Drivers 3. Go through the readme document for system re- To install the driver, click “Intel Graphics Drivers” on the main menu. quirements and installation tips then click “Next”. 1. Setup is now ready to install the graphics driver. Click “Next”.

4. Setup is now installing the driver. Click “Next” to continue.

By default, the “Automatically run WinSAT and enable the Windows Aero desktop theme” is enabled. With this enabled, after installing the graphics driver and the system rebooted, the screen will turn blank for 1 to 2 minutes (while WinSAT is running) before the Windows 7/ Windows 8.1/ Windows 10 desktop appears. The “blank screen” period is the time Windows is testing the graphics performance.

We recommend that you skip this process by disabling this function then click “Next”.

2. Read the license agreement then click “Yes”.

5. Click “Yes, I want to restart this computer now” then click “Finish”.

Restarting the system will allow the new software installation to take effect.

Chapter 5 Supported Software www.dfi.com Chapter 5

Audio Drivers Intel LAN Drivers

To install the driver, click “Audio Drivers” on the main menu. To install the driver, click “Intel LAN Drivers” on the main menu.

1. Setup is ready to install the driver. Click Next. 1. Setup is now ready to install the audio driver. Click Next.

2. Follow the remainder of the steps on the screen; clicking “Next” each time you finish a step.

2. Click “I accept the terms 3. Click “Yes, I want to restart my in the license agreement” computer now” then click Finish. then click “Next”. Restarting the system will allow the new software installation to take effect.

3. Select the program featuers you want installed then click Next.

Chapter 5 Supported Software www.dfi.com Chapter 5

4. Click Install to begin the Kernel Mode Driver (For Windows 7 only) installation. To install the driver, click “Kernel Mode Driver Framework” on the main menu.

1. Click “Yes“ to install the update.

5. After completing installation, click Finish.

2. The update is installed now.

Chapter 5 Supported Software www.dfi.com Chapter 5

3. Click “Restart Now“ to Intel Trusted Execution Engine Driver restart your computer when the installation is complete. To install the driver, click “Intel Trusted Execution Engine Driver” on the main menu.

1. Tick “I accept the terms in the License Agreement“ and then click “Next.”

2. The step shows the components which will be installed. Then, Click Next.

Chapter 5 Supported Software www.dfi.com Chapter 5

3. The step displays the HW Utility installing status in the progress. HW Utility provides information about the board, Watchdog,and DIO. To access the utility, click “HW Utility” on the main menu.

Note: If you are using Windows 7 or later versions, you need to access the operating system as an administrator to be able to install the utility.

1. Setup is ready to install the driver.

4. Click “Finish“ when the installation is complete.

2. Click “Next” to continue.

Chapter 5 Supported Software www.dfi.com Chapter 5

3. Read the license agreement The HW Utility icon will appear on the desktop. Double-click the icon to open the utility. then click “I accept the terms in the license agreement”. Click “Next”.

BW968

Intel® Pentium®/Celeron® Processor N3000 Family, BGA 1170

3949 MBytes

4. The wizard is ready to begin installation. Click “Install”.

Information

Note: Note: The screenshot displayed above is for illustrative purpose only, and may not resemble the actual screen.

The BW968 HW Utility features the following tabs: Information, HW Health, HW Healthset, Watchdog, DIO and Backlight. Click on the tabs to access information about the board.

5. Please wait while the program features are being installed.

Chapter 5 Supported Software www.dfi.com Chapter 5

Intel USB 3.0 Drivers (For Windows 7 and Windows 8.1) 3. Go through the readme document for more installation tips To install the driver, click “Intel USB 3.0 Driver” on the main menu. then click Next.

1. Setup is ready to install the driver. Click Next.

4. Setup is currently installing the driver. After installation has com- pleted, click Next.

2. Read the license agreement then click Yes.

5. After completing installation, click Finish.

Chapter 5 Supported Software www.dfi.com Chapter 5

IO Driver 3. Read the file information then click Next. To install the driver, click “Intel Serial IO Driver” on the main menu

1. Setup is ready to install the driver. Click Next.

4. Setup is ready to install the driver. Click Next.

2. Read the license agreement care- fully. Click “I accept the terms in the Li- cense Agreement” then click Next.

Chapter 5 Supported Software www.dfi.com Chapter 5

5. Setup is now installing the Adobe Acrobat Reader 9.3 driver. To install the reader, click “Adobe Acrobat Reader 9.3” on the main menu.

1. Click Next to install or click Change Destination Folder to select another folder.

6. Click Finish.

2. Click Install to begin installation.

3. Click Finish to exit installation.

Chapter 5 Supported Software www.dfi.com Appendix A

Appendix A - Troubleshooting The picture seems to be constantly moving.

Troubleshooting Checklist 1. The monitor has lost its vertical sync. Adjust the monitor’s vertical sync. 2. Move away any objects, such as another monitor or fan, that may be creating a magnetic This chapter of the manual is designed to help you with problems that you may encounter field around the display. with your personal computer. To efficiently troubleshoot your system, treat each problem indi- vidually. This is to ensure an accurate diagnosis of the problem in case a problem has multiple 3. Make sure your video card’s output frequencies are supported by this monitor. causes.

Some of the most common things to check when you encounter problems while using your The screen seems to be constantly wavering. system are listed below. 1. If the monitor is close to another monitor, the adjacent monitor may need to be turned off. 1. The power switch of each peripheral device is turned on. Fluorescent lights adjacent to the monitor may also cause screen wavering. 2. All cables and power cords are tightly connected. Power Supply 3. The electrical outlet to which your peripheral devices are connected is working. Test the When the computer is turned on, nothing happens. outlet by plugging in a lamp or other electrical device. 1. Check that one end of the AC power cord is plugged into a live outlet and the other end 4. The monitor is turned on. properly plugged into the back of the system. 5. The display’s brightness and contrast controls are adjusted properly. 2. Make sure that the voltage selection switch on the back panel is set for the correct type of voltage you are using. 6. All add-in boards in the expansion slots are seated securely. 3. The power cord may have a “short” or “open”. Inspect the cord and install a new one if 7. Any add-in board you have installed is designed for your system and is set up correctly. necessary. Monitor/Display

If the display screen remains dark after the system is turned on:

1. Make sure that the monitor’s power switch is on.

2. Check that one end of the monitor’s power cord is properly attached to the monitor and the other end is plugged into a working AC outlet. If necessary, try another outlet.

3. Check that the video input cable is properly attached to the monitor and the system’s display adapter.

4. Adjust the brightness of the display by turning the monitor’s brightness control knob.

Appendix A Troubleshooting www.dfi.com Appendix A

Hard Drive System Board

Hard disk failure. 1. Make sure the add-in card is seated securely in the expansion slot. If the add-in card is loose, power off the system, re-install the card and power up the system. 1. Make sure the correct drive type for the hard disk drive has been entered in the BIOS. 2. Check the jumper settings to ensure that the jumpers are properly set. 2. If the system is configured with two hard drives, make sure the bootable (first) hard drive is configured as Master and the second hard drive is configured as Slave. The master hard 3. Verify that all memory modules are seated securely into the memory sockets. drive must have an active/bootable partition. 4. Make sure the memory modules are in the correct locations.

Excessively long formatting period. 5. If the board fails to function, place the board on a flat surface and seat all socketed components. Gently press each component into the socket. If your hard drive takes an excessively long period of time to format, it is likely a cable con- nection problem. However, if your hard drive has a large capacity, it will take a longer time to 6. If you made changes to the BIOS settings, re-enter setup and load the BIOS defaults. format. Serial Port

The serial device (modem, printer) doesn’t output anything or is outputting garbled characters.

1. Make sure that the serial device’s power is turned on and that the device is on-line.

2. Verify that the device is plugged into the correct serial port on the rear of the computer.

3. Verify that the attached serial device works by attaching it to a serial port that is working and configured correctly. If the serial device does not work, either the cable or the serial device has a problem. If the serial device works, the problem may be due to the onboard I/O or the address setting.

4. Make sure the COM settings and I/O address are configured correctly. Keyboard

Nothing happens when a key on the keyboard was pressed.

1. Make sure the keyboard is properly connected.

2. Make sure there are no objects resting on the keyboard and that no keys are pressed dur- ing the booting process.

Appendix A Troubleshooting www.dfi.com SEC Phase 8-Bit POST Code Values Functionality Name POST Code Value Description SEC_SYSTEM_POWER_ON 01 CPU power on and switch to Protected mode SEC_AFTER_MICROCODE_PATCH 03 Setup Cache as RAM SEC_ACCESS_CSR 04 PCIE MMIO Base Address initial SEC_GENERIC_MSRINIT 05 CPU Generic MSR initialization SEC_CPU_SPEEDCFG 06 Setup CPU speed SEC_SETUP_CAR_OK 07 Cache as RAM test SEC_FORCE_MAX_RATIO 08 Tune CPU frequency ratio to maximum level SEC_GO_TO_SECSTARTUP 09 Setup BIOS ROM cache SEC_GO_TO_PEICORE 0A Enter Boot Firmware Volume

PEI Phase 8-Bit POST Code Values Functionality Name POST Code Value Description PEI_SIO_INIT 70 Super I/O initialization PEI_CPU_REG_INIT 71 CPU Early Initialization PEI_CPU_AP_INIT 72 Multi-processor Early initialization PEI_CPU_HT_RESET 73 HyperTransport initialization PEI_PCIE_MMIO_INIT 74 PCIE MMIO BAR Initialization PEI_NB_REG_INIT 75 North Bridge Early Initialization PEI_SB_REG_INIT 76 South Bridge Early Initialization PEI_PCIE_TRAINING 77 PCIE Training PEI_TPM_INIT 78 TPM Initialization PEI_MEMORY_INSTALL 80 Simple Memory test PEI_TXTPEI 81 TXT function early initialization PEI_MEMORY_CALLBACK 83 Set cache for physical memory

DXE Phase 8-Bit POST Code Values Functionality Name Post Code Values Description DXE_SB_SPI_INIT 41 South bridge SPI initialization DXE_VARIABLE_RECLAIM 61 Variable store garbage collection and reclaim operation DXE_FLASH_PART_NONSUPPORT 62 Flash part not supported.

BDS Phase 8-Bit POST Code Values Functionality Name POST Code Value Description BDS_ENTER_BDS 10 Enter BDS entry BDS_INSTALL_HOTKEY 11 Install Hotkey service BDS_ASF_INIT 12 ASF Initialization BDS_PCI_ENUMERATION_START 13 PCI enumeration BDS_BEFORE_PCIIO_INSTALL 14 PCI resource assign complete BDS_PCI_ENUMERATION_END 15 PCI enumeration complete BDS_CONNECT_CONSOLE_IN 16 Keyboard Controller, Keyboard and Mouse initializatio BDS_CONNECT_CONSOLE_OUT 17 Video device initialization BDS_CONNECT_STD_ERR 18 Error report device initialization BDS_CONNECT_USB_HC 19 USB host controller initialization BDS_CONNECT_USB_BUS 1A USB BUS driver initialization BDS_CONNECT_USB_DEVICE 1B USB device driver initialization BDS_NO_CONSOLE_ACTION 1C Console device initialization fail Appendix B BDS_ENUMERATE_ALL_BOOT_OPTION 27 Get boot device information BDS_ENTER_SETUP 29 Enter Setup Menu BDS_ENTER_BOOT_MANAGER 2A Enter Boot manager BDS_READY_TO_BOOT_EVENT 2E Last Chipset initialization before boot to OS BDS_GO_LEGACY_BOOT 2F Start to boot Legacy OS BDS_GO_UEFI_BOOT 30 Start to boot UEFI OS Appendix B - Insyde BIOS Standard Status POST Code BDS_LEGACY16_PREPARE_TO_BOOT 31 Prepare to Boot to Legacy OS BDS_EXIT_BOOT_SERVICES 32 Send END of POST Message to ME via HECI

SEC Phase 8-Bit POST Code Values PostBDS Phase 8-Bit POST Code Values Functionality Name POST Code Value Description Functionality Name POST Code Value Description SEC_SYSTEM_POWER_ON 01 CPU power on and switch to Protected mode POST_BDS_NO_BOOT_DEVICE F9 No Boot Device SEC_AFTER_MICROCODE_PATCH 03 Setup Cache as RAM POST_BDS_JUMP_BOOT_SECTOR FE Try to Boot with INT 19 SEC_ACCESS_CSR 04 PCIE MMIO Base Address initial SEC_GENERIC_MSRINIT 05 CPU Generic MSR initialization SEC_CPU_SPEEDCFG 06 Setup CPU speed ACPI 8-Bit POST Code Values SEC_SETUP_CAR_OK 07 Cache as RAM test Functionality Name POST Code Value Description SEC_FORCE_MAX_RATIO 08 Tune CPU frequency ratio to maximum level ASL_ENTER_S1 51 Prepare to enter S1 SEC_GO_TO_SECSTARTUP 09 Setup BIOS ROM cache ASL_ENTER_S3 53 Prepare to enter S3 SEC_GO_TO_PEICORE 0A Enter Boot Firmware Volume ASL_ENTER_S4 54 Prepare to enter S4 ASL_ENTER_S5 55 Prepare to enter S5 ASL_WAKEUP_S1 E1 System wakeup from S1 PEI Phase 8-Bit POST Code Values ASL_WAKEUP_S3 E3 System wakeup from S3 Functionality Name POST Code Value Description ASL_WAKEUP_S4 E4 System wakeup from S4 PEI_SIO_INIT 70 Super I/O initialization ASL_WAKEUP_S5 E5 System wakeup from S5 PEI_CPU_REG_INIT 71 CPU Early Initialization PEI_CPU_AP_INIT 72 Multi-processor Early initialization PEI_CPU_HT_RESET 73 HyperTransport initialization SMM 8-Bit POST Code Values PEI_PCIE_MMIO_INIT 74 PCIE MMIO BAR Initialization Functionality Name POST Code Value Description PEI_NB_REG_INIT 75 North Bridge Early Initialization SMM_ACPI_ENABLE_END A7 ACPI enable function complete PEI_SB_REG_INIT 76 South Bridge Early Initialization SMM_S1_SLEEP_CALLBACK A1 Enter S1 PEI_PCIE_TRAINING 77 PCIE Training SMM_S3_SLEEP_CALLBACK A3 Enter S3 PEI_TPM_INIT 78 TPM Initialization SMM_S4_SLEEP_CALLBACK A4 Enter S4 PEI_MEMORY_INSTALL 80 Simple Memory test SMM_S5_SLEEP_CALLBACK A5 Enter S5 PEI_TXTPEI 81 TXT function early initialization PEI_MEMORY_CALLBACK 83 Set cache for physical memory

BDS Phase 8-Bit POST Code Values Functionality Name POST Code Value Description BDS_ENTER_BDS 10 Enter BDS entry BDS_INSTALL_HOTKEY 11 Install Hotkey service BDS_ASF_INIT 12 ASF Initialization BDS_PCI_ENUMERATION_START 13 PCI enumeration BDS_BEFORE_PCIIO_INSTALL 14 PCI resource assign complete BDS_PCI_ENUMERATION_END 15 PCI enumeration complete BDS_CONNECT_CONSOLE_IN 16 Keyboard Controller, Keyboard and Mouse initializatio BDS_CONNECT_CONSOLE_OUT 17 Video device initialization BDS_CONNECT_STD_ERR 18 Error report device initialization BDS_CONNECT_USB_HC 19 USB host controller initialization BDS_CONNECT_USB_BUS 1A USB BUS driver initialization BDS_CONNECT_USB_DEVICE 1B USB device driver initialization BDS_NO_CONSOLE_ACTION 1C Console device initialization fail BDS_ENUMERATE_ALL_BOOT_OPTION 27 Get boot device information BDS_ENTER_SETUP 29 Enter Setup Menu BDS_ENTER_BOOT_MANAGER 2A Enter Boot manager BDS_READY_TO_BOOT_EVENT 2E Last Chipset initialization before boot to OS BDS_GO_LEGACY_BOOT 2F Start to boot Legacy OS BDS_GO_UEFI_BOOT 30 Start to boot UEFI OS BDS_LEGACY16_PREPARE_TO_BOOT 31 Prepare to Boot to Legacy OS BDS_EXIT_BOOT_SERVICES 32 Send END of POST Message to ME via HECI

52 PostBDS Phase 8-Bit POST Code Values Functionality Name POST Code Value Description AppendixPOST_BDS_NO_BOOT_DEVICE B Insyde BIOS Standard F9Status NoPOST Boot Device Code www.dfi.com POST_BDS_JUMP_BOOT_SECTOR FE Try to Boot with INT 19

ACPI 8-Bit POST Code Values Functionality Name POST Code Value Description ASL_ENTER_S1 51 Prepare to enter S1 ASL_ENTER_S3 53 Prepare to enter S3