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Clocks, Dbms and States in Timed Systems

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Clocks, Dbms and States in Timed Systems Clocks, DBMs and States in Timed Systems Johan Bengtsson A Dissertation submitted for the Degree of Doctor of Philosophy Department of Information Technology Uppsala University June 2002 Dissertation for the Degree of Doctor of Philosophy in Computer science with specialization in Real Time Systems presented at Uppsala University in 2002. ABSTRACT Bengtsson, J. 2002: Clocks, DBMs and States in Timed Systems. Acta Universitatis Upsaliensis Uppsala Dissertations from the Faculty of Science and Technology 39. 143 pp. Uppsala. ISBN 91-554-5350-3 Today, computers are used to control various technical systems in our society. In many cases, time plays a crucial role in the operation of computers embedded in such systems. This thesis is about techniques and tools for the analysis of timing behaviours of computer systems. Its main contributions are in the development and implementation of UPPAAL, a tool designed to automate the analysis process of systems modelled as timed automata. As the first contribution, we present a software package for timing constraints represented as Difference Bound Matrices. We describe in details, all data-structures and operations for DBMs needed in state-space exploration of timed automata, as well as techniques for efficient imple- mentation. In particular, we have developed two normalisation algorithms to guarantee termina- tion of reachability analysis for timed automata containing constraints on clock differences, that transform DBMs according to not only maximal constants of clocks as in algorithms published in the literature, but also difference constraints appearing in the automata. The second contribu- tion of this thesis is a collection of low level optimisations on the internal data-structures and algorithms of UPPAAL to minimise memory and time consumption. We present compression techniques to allow the state-space of a system to be efficiently stored and manipulated in main memory. We also study super-trace and hash-compaction methods for timed automata to deal with system-models for which the size of available memory is too small to store the explored state-space. Our experiments show that these techniques have greatly improved the performance of UPPAAL. The third contribution is in partial-order reduction techniques for timed-systems. A major problem in automatic verification is the large number of redundant states and transi- tions introduced by modelling concurrent events as interleaved transitions. We propose a notion of committed locations for timed automata. Committed locations are annotations that can be used for not only modelling of intermediate states within atomic transitions, but also guiding the model checker to ignore unnecessary interleavings in state-space exploration. The notion of committed locations has been generalised to give a local-time semantics for networks of timed automata, which allows for the application of existing partial order reduction techniques to timed systems. Johan Bengtsson, Department of Information Technology, Uppsala University, Box 337, SE-751 05 Uppsala, Sweden. c Johan Bengtsson 2002 ISSN 1104-2516 ISBN 91-554-5350-3 Printed in Sweden by Elanders Gotab, Stockholm 2002 Distributor: Uppsala University Library, Box 510, SE-751 20 Uppsala, Sweden Till Erika och Simon Acknowledgements First of all I want to thank my supervisor, Wang Yi. Without his guiding and support this thesis would never have been completed. I have learnt a lot dur- ing the years we have been working together and I hope that someday I will be as good a reasearcher as he is. I would like to thank all current and former members of the UPPAAL group here in Uppsala, i.e. Tobias Amnell, Alexande David, Elena Fersman, Fredrik Larsson, Leonid Mokrushin, Paul Pettersson, and Justin Pearson, for the stimulating environment and all nice moments both in and outside the department. Specially I would like to thank Fredrik and Paul who were around from the very beginning of the UPPAAL-project. I would also like to thank Kim G. Larsen, Gerd Behrmann, and the rest of the UPPAAL group in Aalborg for fruitful collaboration over the years. Without their participation UPPAAL would not have been what it is today. I am also grateful to my co- authors, i.e. Pedro D’Argenio, Ansgar Fehnker, David Griffioen, Bengt Johns- son and Johan Lilius, for fruitful discussions. It has been fun working together with you. I would like to thank everyone at DoCS for making the department such an enjoyable environment. In particular I would like to thank Björn Victor and Anders Berglund for their support. To my wife Erika, I give my love and my deepest thanks. Without her by my side I would never have reached this point. Finally, I want to thank my son Simon, my pride and joy, and my best source of inspiration. This work has been partially supported by the Swedish Board for Technical Devel- opment (NUTEK), the Swedish Technical Research Council (TFR), and EC via the AIT-WOODDES project. This thesis includes, summarises and discusses mainly the results presented in five research papers written between 1996 and 2002. These papers are listed as follows: Paper A: Johan Bengtsson. DBM: Structures, Operations and Implementa- tion. Submitted for publication. Paper B: Johan Bengtsson and Wang Yi. Reachability Analysis of Timed Au- tomata Containing Constraints on Clock Differences. Submitted for pub- lication. Paper C: Johan Bengtsson and Wang Yi. Reducing Memory Usage in Sym- bolic State-Space Exploration for Timed Systems. Technical Report, 2001- 009, Department of Information Technology, Uppsala University, 2001. Paper D: Johan Bengtsson, Bengt Jonsson, Johan Lilius and Wang Yi. Par- tial Order Reductions for Timed Systems. In Proceedings, Ninth Inter- national Conference on Concurrency Theory, volume 1466 of Lecture Notes in Computer Science, Springer Verlag, 1998. Paper E: Johan Bengtsson, W. O. David Griffioen, Kåre J. Kristoffersen, Kim G. Larsen, Fredrik Larsson, Paul Pettersson and Wang Yi. Automated Veri- fication of an Audio-Control Protocol using UPPAAL. Accepted for pub- lication in Journal on Logic and Algebraic Programming. Comments on My Participation Paper A: I implemented the major part of the DBM package in UPPAAL, and wrote the report. Paper B: I participated in discussions, designed and implemented the algo- rithms. I wrote a large part of the paper. Paper C: I participated in discussions, designed and implemented the optimi- sation techniques. I wrote the paper. Paper D: I participated in discussions and wrote part of the paper. I made a prototype implementation which is not described in this paper. Paper E: I participated in discussions and implemented committed locations in UPPAAL. I have also made minor revisions to the semantics for com- mitted location. Apart from the papers listed above, I have also participated in the following work: Tobias Amnell, Gerd Behrmann, Johan Bengtsson, Pedro R. D’Argenio, Alexan- dre David, Ansgar Fehnker, Thomas Hune, Bertrand Jeannet, Kim G. Larsen, M. Oliver Möller, Paul Pettersson, Carsten Weise, and Wang Yi. UPPAAL - Now, Next, and Future. In Proceedings of Modelling and Verification of Parallel Pro- cesses, volume 2067 of LNCS, 2001. Johan Bengtsson, Kim G. Larsen, Fredrik Larsson, Paul Pettersson, Wang Yi and Carsten Weise. New Generation of UPPAAL. In Proceedings of the Inter- national Workshop on Software Tools for Technology Transfer, 1998 Johan Bengtsson, Kim G. Larsen, Fredrik Larsson, Paul Pettersson, Wang Yi. UPPAAL in 1995, In Proceedings of Workshop on Tools and Algorithms for the Construction and Analysis of Systems, volume 1055 of LNCS, 1996. Johan Bengtsson, Kim G. Larsen, Fredrik Larsson, Paul Pettersson and Wang Yi. UPPAAL - a Tool Suite for Automatic Verification of Real-Time Systems. In Proceedings of Workshop on Verification and Control of Hybrid Systems III, volume 1066 of LNCS, 1995. Contents Introduction 1 1 Background . 1 2 Timed Automata . 2 3 Model Checking . 7 4 Contributions of This Thesis . 9 5 Related Work . 12 6 Conclusions and Future Work . 15 Paper A: DBM: Structures, Operations and Implementation 23 1 Introduction . 25 2 DBM basics . 26 2.1 Canonical DBMs . 27 2.2 Minimal Constraint Systems . 28 3 Operations on DBMs . 31 3.1 Checking Properties of DBMs . 33 3.2 Transformations . 33 3.3 Normalisation Operations . 36 4 Zones in Memory . 38 4.1 Storing DBM Elements . 38 i 4.2 Placing DBMs in Memory . 39 4.3 Storing Sparse Zones . 39 5 Conclusions . 40 A Pseudo-Code . 42 Paper B: Reachability Analysis of Timed Automata Containing Con- straints on Clock Differences 45 1 Introduction . 47 2 Preliminaries . 50 2.1 Timed Automata Model . 50 2.2 Reachability Analysis . 51 3 Constraints on Clock Differences and Normalisation . 53 4 New Normalisation Algorithms . 54 4.1 Region Equivalence Refined by Difference Constraints 56 4.2 The Core of Normalisation . 56 4.3 Algorithm: Normalisation without Zone Splitting . 57 4.4 Algorithm: Normalisation with Zone Splitting . 58 5 Conclusion . 63 Paper C: Reducing Memory Usage in Symbolic State-Space Explo- ration for Timed Systems 67 1 Introduction . 69 2 Preliminaries . 70 3 Representing Symbolic States . 73 3.1 Normal Representation . 73 3.2 Packed States . 74 3.3 Packed Zones with Cheap Inclusion Check . 75 4 Representing the Symbolic State-Space . 78 ii 4.1 Representing WAIT . 78 4.2 Representing PASSED . 80 4.3 Supertrace PASSED for Timed Automata . 80 4.4 Hash Compaction for Timed Automata . 83 5 Conclusions . 86 A Examples and Experiment Environment . 91 Paper D: Partial Order Reductions for Timed Systems 93 1 Motivation . 95 2 Preliminaries . 99 2.1 Networks of Timed Automata . 99 2.2 Symbolic Global–Time Semantics . 100 3 Partial Order Reduction and Local-Time Semantics . 102 3.1 Symbolic Local-Time Semantics . 104 3.2 Finiteness of the Symbolic Local Time Semantics . 106 4 Partial Order Reduction in Reachability Analysis . 108 4.1 Operations on Constraint Systems . 110 5 Conclusion and Related Work . 111 Paper E: Automated Verification of an Audio-Control Protocol using UPPAAL 115 1 Introduction .
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