Abstract Evaluation of Capacitor Lifetime Based On

ABSTRACT

EVALUATION OF CAPACITOR LIFETIME BASED ON EMI AND SWITCH CHARACTERISTICS

by John Patrick Doran

Aircraft electrical components are often misdiagnosed leading to high maintenance and upkeep costs. One potential method of increasing the accuracy of diagnostics is to use the system’s Electromagnetic Interference (EMI) to evaluate the systems condition. One of the least reliable components in electrical systems is capacitors. DC link capacitors are used as load-balancing energy storage devices used to mitigate voltage spikes and current surges subjecting them to significant stress. A model of a 3-phase inverter is analyzed to establish the impact of a capacitor’s age on its EMI. With the push for higher power in aircraft systems, the use of Wide BandGap (WBG) has increased. WBG devices are being used due their small size, greater thermal conductivity and efficiency. WBG devices offer higher switching frequencies, which can decrease the size of needed passive filtering components, thus saving in system size and cost. The faster voltage and current transients of WBG devices cause higher order harmonics in the system which may impact passive component lifetimes. Ćuk and SEPIC converters utilizing both Si and SiC devices are used to evaluate the impact that WBG technology could cause in the aging of metalized film capacitors.

Approved for Public Release Case Number: 88ABW-2019-0981

EVALUATION OF CAPACITOR LIFETIME BASED ON EMI AND SWITCH CHARACTERISTICS

A Thesis

Submitted to the

Faculty of Miami University

in partial fulfillment of

the requirements for the degree of

Computational Science and Engineering

John Patrick Doran

Miami University

Oxford, Ohio

2019

Advisor: Dr. Mark J. Scott

Reader: Dr. Donald Ucci

Reader: Dr. David Hartup

Approved for Public Release Case Number: 88ABW-2019-0981 This Thesis titled

EVALUATION OF CAPACITOR LIFETIME BASED ON EMI AND SWITCH CHARACTERISTICS

John Patrick Doran

has been approved for publication by

College of Engineering and Computing

and

Department of Electrical and Computational Engineering

______Dr. Mark J. Scott

______Dr. Donald Ucci

______Dr. David Hartup

Approved for Public Release Case Number: 88ABW-2019-0981 Table of Contents

Chapter 1 Introduction ...... 1 Section 1.2 Thesis Objectives ...... 2 Section 1.3 Summary of Chapters...... 3 Chapter 2 Capacitor Aging ...... 4 Section 2.1 History and Properties of WBG ...... 4 Section 2.2 Film Capacitor Aging ...... 7 Section 2.3 Capacitor Life Expectations: ...... 13 Section 2.4 Methods of Aging: ...... 14 Section 2.5 DC-to-DC converters: ...... 15 Section 2.5.1 Ćuk Converter: ...... 16 Section 2.5.2 SEPIC Converter: ...... 18 Section 2.5.3 Ćuk and SEPIC comparison ...... 20 Chapter 3 EMI as Diagnostic Tool ...... 21 Section 3.1 Types of EMI: ...... 21 Section 3.2 EMI Modeling ...... 26 Section 3.3 Diagnostic Use ...... 32 Chapter 4 Converter Design ...... 34 Section 4.1 Ćuk Design: ...... 35 Section 4.1.1 Simulation of Ćuk system: ...... 37 Section 4.1.2 Ćuk Power Loss ...... 38 Section 4.2 SEPIC Converter Design ...... 39 Section 4.2.1 Simulation of SEPIC: ...... 40 Section 4.2.2 SEPIC Power loss ...... 41 Section 4.2.3 SEPIC Inductor Design ...... 42 Section 4.3 Ćuk and SEPIC Comparison: ...... 45 Chapter 5 Results ...... 47 Section 5.1 Ćuk Design ...... 47 Section 5.1.1 Si Ćuk Results ...... 48 Section 5.1.2 SiC Ćuk Results ...... 49 Section 5.2 SEPIC Design ...... 49 Section 5.2.1 SEPIC Results ...... 49

iii

Section 5.2.2 SEPIC Comparison ...... 52 Section 5.3 Capacitor Aging ...... 53 Chapter 6 Future Work and Conclusion ...... 58 Section 6.1 Conclusion ...... 58 Section 6.2 Future Work: ...... 58 References: ...... 60

List of Tables Table 2-1 Properties of Si, GaN and SiC [13]...... vi Table 3-1 Parameters for Model New and Aged Capacitors ...... 29 Table 4-1: Ćuk Design Parameters ...... 37 Table 4-2: Power Loss for Si and SiC Switches in Ćuk Converter ...... 38 Table 4-3: SEPIC Design Parameters ...... 40 Table 4 -4: SEPIC Switching Devices ...... 42 Table 4 -5: SEPIC Converter Power Loss ...... 42 Table 5-1 Measured Si Ćuk Converter dv/dt ...... 48 Table 5-2 Measured dv/dt for Si and SiC devices...... 53 Table 5-3 Measured Device Temperatures at Steady State ...... 56 Table 5-4 Post Aging Device dv/dt measurement ...... 57

List of Figures Figure 2.1 Internal Structure of an IGBT...... 6 Figure 2.2 Internal Structure of a MOSFET...... 6 Figure 2.3 Equivalent Circuit for a Capacitor...... 9 Figure 2.4 a) A MPPF Capacitor under DC conditions. b) The positive charges collide with the electrode. c) Self-healing current flows when the positive charges reach the electrode. [32] ...... 10 Figure 2.5 Corrosion of Metallization 2 m into roll [35]...... 12 Figure 2.6 Corrosion of Metallization 8 m into roll [35]...... 12 Figure 2.7 Circuit diagram of a Ćuk Converter...... 16 Figure 2.8 Circuit diagram of a Ćuk Converter when Q1 is on...... 17 Figure 2.9 Circuit diagram of a Ćuk Converter when Q1 is off...... 17 Figure 2.10 Circuit diagram of a SEPIC converter...... 18 Figure 2.11 Circuit diagram of a SEPIC converter when Q1 is on...... 19 Figure 2.12 Circuit diagram of a SEPIC converter when Q1 is off...... 19 Figure 3.1 Transmission Paths for EMI between an Emitter and a Victim...... 22 Figure 3.2 Radiated Vs Conducted Emissions between a Source and Victim...... 23 Figure 3.3 Conducted Emissions Noise Paths with LISN with Measurement Points...... 24 Figure 3.4 Equivalent Circuit of a LISN...... 25 Figure 3.5 Circuit diagram of 0⁰ Power Combiner...... 25 Figure 3.6 Circuit Diagram 180⁰ Power Combiner...... 26 Figure 3.7 Schematic of Modeled Three-Phase Inverter...... 27 Figure 3.8 Equivalent Circuit for DC Bus Effects...... 27 Figure 3.9 Impendances for the Simplified Circuit...... 28 Figure 3.10 Capacitor Impendence vs Frequency for New and Aged...... 29 Figure 3.11 Vdm vs Frequency for New and Aged Capacitors...... 30 Figure 3.12 Frequency Spectrum of Pulsed Current Waveform...... 31 Figure 3.14 Simulated Odd Harmonic Spectrum...... 32 Figure 3.13 Model VDM for Three Phase Inverter...... 32 Figure 4.1 3D Model of Ćuk Converter...... 36 Figure 4.2 Graph of Ćuk Converter Currents...... 37 Figure 4.3 Graph of Ćuk Converter Voltages...... 37 Figure 4.4 PCB Layout of Si SEPIC Converter...... 39 Figure 4.5 Graph of SEPIC Converter Currents...... 40 Figure 4.6 Graph of SEPIC Converter Voltages...... 41 Figure 4.7 Designed 500 µH Inductor...... 43 Figure 5.1 Image of Constructed Ćuk Converter...... 47 Figure 5.2 Q1 Turn-On dv/dt Q2 Turn-Off dv/dt ...... 48 Figure 5.3 Assembled SiC SEPIC Converter...... 49 Figure 5.4 Si SEPIC IGBT Turn-On, Diode Turn-Off...... 50 Figure 5.5 Si SEPIC IGBT Turn-Off, Diode Turn-On...... 51 Figure 5.6 SiC SEPIC MOSFET Turn-On, Diode Turn-Off...... 51

Figure 5.7 SiC SEPIC MOSFET Turn Off, Diode Turn-On...... 52 Figure 5.8 (a) Capacitor Measurement Fixture PCB design. (b) Measurement Fixture attached to LCR Meter...... 53 Figure 5.9 Current Results for Capacitor 1...... 54 Figure 5.10 Current Results for Capacitor 2...... 54 Figure 5.11 Current Results for Capacitor 3...... 54 Figure 5.12 Current Results for Capacitor 4...... 54 Figure 5.13 Capacitor Current for SEPIC Converter...... 56 Figure 5.14 MOSFET and Diode Current for SEPIC Converter...... 57

vii

Acknowledgments

I owe a great deal of gratitude to Dr. Mark Scott, my advisor, for his time and patience in answering my many questions and affording me the practical experiences and opportunities to further my education. I am extremely fortunate to have had an advisor who is dedicated and focused on his students and their success.

I would also like to acknowledge my committee members, Dr. Ucci and Dr. Hartup for their advice and feedback throughout my studies. I wish to thank all of my colleagues who I had the opportunity to work with in the laboratory. I especially want to acknowledge Wilson Gou for our many valuable discussions and debates to figure out the next steps.

I would like to express my gratitude to AFRL-RQ, and more specifically Dr. Jim Scofield, who made this project possible.

Finally, I would like to thank my family who have always been supportive and have helped me reach my goals.

viii

Chapter 1 Introduction

Aircraft maintenance accounts for 10 to 20% of an aircraft’s total operating cost [1]. This equals, on average, $3.6M per aircraft per year [1]. In currently utilized systems, 40% of equipment is falsely diagnosed and removed as the result of ambiguous and labor intensive test procedures [1, 2]. As an aircraft become more reliant on electrical components, the complexity of the electrical system increases. This is because electrical sub-systems have replaced what were previously pneumatic and mechanical sub-systems, adding to the total number of electrical systems present. Using a device’s ElectroMagnetic Interference (EMI) profile to identify and repair faults can result in decreased in maintenance costs. Using a device’s EMI spectrum allows it to be measured from the input or output to determine if it is operating normally while remaining in operation. This is valuable when evaluating large electric systems such as electrical power station generators as well as aircraft systems. The generators are normally very reliable. However, a large portion of the generators that are currently in use have reached or are approaching the end of their design lifetime [3]. This is especially true for nuclear reactors in the United States, where if their operating licenses are not further renewed to go past 60 years, 20% of the nation’s power supply will begin shutting down in 2030 [4]. In the 1920s, AM radio was invented and it became part of the utility companies’ responsibility to locate and neutralize radio interference from defective AC power line hardware. In the 1950s, with the invention of analog television this became an issue again because of the higher frequencies being used [5]. A set of test procedures were needed to measure this interference, which resulted in the creation of an international standard for the precise measurement of unwanted interference. This resulted in Comite International Special des Perturbations Radioelectriques (CISPR) [5]. This established a method of data collection, so it no longer mattered the type of device being analyzed and different devices from differing years could be directly compared [5]. In order to be able to correctly diagnose the status of a device such as an inverter, it must be known how each component internal to an inverter changes with age. There are

1 many active and passive components in an inverter. Active components include devices such as transistors and integrated circuits; passive components include capacitors, inductors, transformers and diodes. Little is known about how the implementation of Wide BandGap (WBG) switching devices will impact passive circuit components over a device’s lifetime. As components age, their parasitic parameters such as equivalent series resistance (ESR) will change [8]. Parasitic values are device dependent and change according to the conditions under which the component was aged. There have been many studies about how capacitors age over time depending on the material from which a capacitor was manufactured [7-8]. For metallized film capacitors, there are two primary contributors to its aging: breakdowns due to overvoltage and electrochemical corrosion. The aging process results in chemical and physical changes internal to a capacitor [9]. To study how these parameters such as capacitance and series resistance change, two DC-DC converters were designed to accelerate the rate at which the capacitors age. These DC-DC converters utilize high RMS currents on the main capacitor, as well as AC ripple voltages. For a better understanding of the effects of using WBG devices, such as SiC, on aging. Identical converters were designed using both Silicon Carbide (SiC) and Silicon (Si) power devices. This allowed for capacitors with the same number of hours used to be compared with the only difference being the semiconductor material. To study the effect of the changes in the capacitor parasitic, both new and aged capacitors are used as the DC link capacitors of a three-phase inverter. The conducted EMI profile of the inverter is compared in both capacitor conditions and any change noted. These changes are noted for various different capacitor ages to allow an experimental model to be formulated. Section 1.2 Thesis Objectives

In this thesis, the following goals are to be determined:  Examine the differences that using Si vs SiC causes on the aging of passive components such as capacitors.

 Utilize an EMI model for a three-phase inverter to evaluate how capacitors impact conducted emissions.

Section 1.3 Summary of Chapters

Chapter 2 provides a background into the properties of WBG devices and how metalized film capacitors age. It also discusses the operation of the Ćuk and SEPIC converters. Chapter 3 discusses an overview of EMI and conducted emissions. A model for the impact of a capacitor’s age in a three phase inverter is presented, and the potential for use as a diagnostic is outlined. Chapter 4 shows the design process for both the Ćuk and SEPIC converter. It covers the power loss of the topologies’ inductor design for the SEPIC and a comparison of the use of the two topologies. Chapter 5 provides the initial experimental results as the time derivative of the switching devices, and what aging effects have been measured. Chapter 6, Conclusion and Future Work, summarizes what has been accomplished and potential for future work.

Chapter 2 Capacitor Aging

The rate at which passive components age in circuits is dependent on numerous factors. These include temperature, voltage and current levels and switching speeds [7]. With the development of WBG based power devices and their increased availability in the market, they have become more common in their use in power electronic hardware due to greater efficiency. Due to the physical characteristics of WBG devices, they have a faster change in voltage and current across the device (dv/dt and di/dt respectively) than that of Si based power devices and little research has been done to see if these higher order transients lead to accelerated aging of passive components. This chapter analyses the characteristics of WBG devices that could increase the aging rate, discusses how capacitors age, and reviews two topologies to be used to accelerate the aging of capacitors. Section 2.1 History and Properties of WBG

The development of WBG devices began in the 1980’s with the introduction of Gallium Arsenide (GaAs) [10]. It was later followed by SiC and Gallium Nitride (GaN) in the 1990’s [10]. SiC was first developed by Mitsubishi electric and their first commercial product was launched in 2011 in an air-conditioning inverter [11]. The first all SiC powered traction system was installed on the Shinkansen Bullet Trains in Japan in 2015 [12]. The first commercial 200 V e-mode GaN device was released in 2010 and a 650 V commercial device followed in 2014 [13]. WBG semiconductors have the capability to operate at higher voltages, temperatures, and switching frequencies with greater efficiencies compared to existing Si devices [9, 10]. These characteristics not only result in less losses but enable significantly reduced volume, due to decreased cooling requirements and smaller passive components. This contributes to overall lower system costs [6].

Table 2.1 lists the material properties of Si, GaN, and SiC. WBG power devices have a larger bandgap (퐸퐺) than that of Si, with GaN and SiC having almost triple the bandgap of Si.

A higher bandgap results and leads to a higher critical electric field strength (퐸퐶), which causes a decrease in a device’s ideal on-resistance (Eq. 2.1).

The specific on-resistance (푅푂푁푆푃), of a device is a function of the Breakdown Voltage (BV),

Table 2-1 Properties of Si, GaN and SiC [13].

2 Material 퐸퐺(푒푉) 퐸퐶(MV/cm) 푣푠푎푡(cm/s) 휀푠 휇푛(cm /s) X(W/cmC)

Si 1.2 .3 1.0x107 11.8 1350 1.5

GaN 3.4 3.0 2.5x107 9.5 900 2.1

SiC 3.3 2.0 2.0x107 10 720 4.9

dielectric constant (휀푠) electron mobility (휇푛), and 퐸퐶: 4퐵푉2

푅푂푁푆푃 = 3 (2.1) 휀푠휇푛(퐸퐶)

Materials with higher 퐸퐶 can be made with smaller drift regions [5], which results in smaller on-resistances. The smaller resistance reduces the conduction losses in the switch, increasing its efficiency [9]. Currently, the most popular device technology for high voltage, high current operations is Insulated Gate Bipolar Transistors (IGBTs). With an IGBT, low power loss can be achieved at high breakdown voltages. Minority carriers are injected into the drift region to reduce the forward voltage drop; this process is called conductivity modulation [14]. When the transistor is then turned off, it takes a long period of time for those minority carries to recombine, causing a tail current [6]. This tail current results in increased switching losses and slower switching speeds [6]. Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET) devices do not utilize conductivity modulation to have small on resistances because they already have low drift-layer resistance. As a result, in a MOSFET there is, in principal, no tail current because MOSFETs are majority carrier

5 devices. In both the IGBT (Fig. 2.1) and MOSFET (Fig. 2.2) structures pictured below, the drift region is the N- epilayer. The ability to make smaller devices that have smaller dielectric constant values has led to a decrease in parasitic capacitances. For a power MOSFET, the switching speed of the device is directly related to the Miller capacitance (퐶퐺퐷) [15]. As this value decreases, the device is able to switch much faster [15, 16]. The faster switching speeds leads to higher dv/dt and di/dt across the device [17]. The thin, highly doped drift layer of SiC

Figure 2.1 Internal Structure of an IGBT.

Figure 2.2 Internal Structure of a MOSFET.

6 reduces the size of the device, for example; a Si-MOSFET rated for 900 V can be 35 times larger than a similar device made of SiC [6]. As the junction area of the device decreases, it become difficult to deal with power losses. While a smaller size has lower conduction loss, it has also less the surface area to dissipate that heat [18]. A major drawback to operating power semiconductors at higher temperatures is the increase in its leakage current. The leakage current is directly proportional to the intrinsic carrier (ni) concentration in the semiconductor. WBG devices have orders of magnitude lower concentration of intrinsic carriers leading to the potential for much higher operating temperatures [19]. This, coupled with the much larger thermal conductivity of SiC, makes dealing with smaller devices less of a challenge. With all the benefits of WBG devices, researchers are starting to use them in more applications. The impact of WBG devices on passive components has yet to be studied and could impact performance [20]. Many researchers are using WBGs to switch at higher frequencies and are subjecting passive components, like DC link capacitors, to higher order harmonics. Another concern is that as switching devices get closer to being able to apply an ideal step function with their shorter rise and fall times, higher order harmonics are coupled onto other devices [20]. Considering that capacitors are one of the least reliable components [21], they require a thorough investigation before SiC can be considered as a drop in replacement for Si [21]. Section 2.2 Film Capacitor Aging

Reliability and maintainability are important considerations when designing power electronic systems. This is especially true when it comes to aircraft systems. With the ever pressing shift to More Electric Aircraft (MEA) and the replacement of mechanical and pneumatic systems with electrical ones, the chances of electrical component failure have continually increased [22]. Studies show that one of the most frequent causes of breakdowns of power systems results from the failure of a capacitor [23-25]. Part of this risk has been mitigated with the switch from electrolytic to film capacitors. Electrolytic capacitors have many disadvantages

7 such as sensitivity to temperature variations, short shelf-life, and generally low reliability, with the benefit of lower cost and higher energy density [26, 27].

Metalized film capacitors are a suitable replacement for electrolytic capacitors in fault-tolerant applications due to their lower Equivalent Series Resistance (RESR), wide frequency range, and unique self-healing property [28]. These capacitors are metal based, giving them better tolerance to atmospheric conditions such as temperature and humidity due to the lack of an electrolyte. Two main polymers are used to construct metalized film capacitors: PolyPropylene (PP); and PolyEthylene Terephthalate (PET), also known as polyester. For aerospace applications, energy density, or capacity divided by volume, is a major importance. Energy density is largely dependent on the material, the dielectric constant, and the BV of that material. PET has a higher maximum operating temperature and permeability than PP, but PP exhibits lower dielectric loss. Both materials weight-to-capacitance ratio is roughly equivalent, but PP is preferred for the lower losses in high voltage applications [29]. Metalized film capacitors suffer from two main failure modes: the failure to self-heal (or capacitance loss due to accumulative clearing), and/or electrochemical corrosion or the conversion of the aluminium electrode to aluminium oxide [30]. The failure to self-heal is usually catastrophic because it results in a permanent short. This occurs when the electrode is not completely eliminated at the breakdown site. This failure mode is a function of the roll pressure, temperature, and thickness of the aluminium layer, as well as the voltage applied [31]. A capacitor not only has a capacitance but also has parasitic values of resistance and inductance as well (Fig. 2.3). These parasitics are caused by the leads and plates of the capacitor. These are referred to as the RESR and the Equivalent Series Inductance (LESL). As the frequency of the applied voltage approaches the resonant frequency (fr), the reactance approaches zero. The only remaining component is the RESR. An increase in temperature causes a decrease in the RESR. Do to an increase in conductivity, high voltage rated components are more sensitive to this effect [32]. Above the resonant frequency, the capacitor begins to act more like an inductor.

Figure 2.3 Equivalent Circuit for a Capacitor.

Section 2.2.1 Breakdowns from self-healing:

One of the benefits of using metalized film capacitors is their ability to self-heal. Initially, breakdowns occur at the weak points of the dielectric film and the capacitor will remain functional, helping them deal with minor overvoltage events. When these breakdowns occur, it results in a minute decrease in the capacitor’s overall capacitance, but the capacitor retains all functionality. Self-healing occurs when an insulation breakdown between layers occurs, resulting in an pinhole in the PP film. This leads to a large current transient though the hole, which destroys the thin layer of metallization, thus isolating the failure point. The amount of area lost during a self-healing event depends on the volume of air between the two layers. More air results in a larger area loss because the inter-area air supplies the initial charged particles that create the breakdown. When a layer of film is rolled into a capacitor, the outer layers of the capacitor are not wound as tightly. This leads to larger gaps between the layers. The loss of the capacitance that occurs at one of these types of events is much more serious if it happens in the outer layers of the capacitor rather than the inner layer due to the presence of more air [33]. Figure 2.4 shows this process occurring when DC voltage is applied to the capacitor. In Fig. 2.4b, the positive charges collide with the metal electrode. If the electric field is high enough, electrons escape from the surface of the negative metal. After electrical breakdown occurs in the dielectric film, the charges flow through the breakdown hole. The positive charges collide with the air, causing the charges to scatter. When positive charges arrive at the negative electrode, the self-healing current forms as in Fig. 2.4c. These events are easily seen on a single layer of film, but the process is more complicated inside a capacitor. Manufacturer’s “preclear” or intentionally cause breakdowns to up to 25% above a capacitor’s rated voltage [34]. This is done to remove

9 impurities in the layers of film. However, it does not prevent other events from occurring because the process is dependent on atmospheric conditions and not all the flaws are guaranteed to clear under any set condition.

Figure 2.4 a) A MPPF Capacitor under DC conditions. b) The positive charges collide with the electrode. c) Self-healing current flows when the positive charges reach the electrode. [33] ©IEEE 2011 Breakdowns are much less likely to occur in capacitors that are impregnated with a mineral or organic oil [35]. The oil displaces the entrapped air, which prevents partial discharge from occurring. Using oil also improves insulation, heat transfer, and resistance to corrosion. However, oil-impregnated capacitors are more expensive because they are more complex. In addition, the oil quality can deteriorate over time [36]. Section 2.2.2 Electrochemical Corrosion: Electrochemical corrosion is the process in which the metal electrode, usually aluminum, is demetalized. The metalized film, which is a very thin layer of less than 1 µm, is gradually degraded by high ripple currents and voltages [29]. Capacitors using aluminum as the electrode are characterized by the appearance of transparent circles at different positions on the foil.

During the electrochemical process, aluminum (Al) is converted into aluminum oxide (Al2O3) [37], while the dielectric remains intact, causing the transparency. The number of transparent circles

10 depends on the homogeneity of the polymer surface, as well as the thickness and quality of the metalized film. The type material used to impregnate the capacitor can also impact the degradation.

The corrosion process involves the migration of oxygen and moisture of the polymer to the interface between the polymer and metallization. The intact polymer acts as a carrier of oxygen/moisture to the dielectric/electrode interface. The exact nature of the polymer’s role in this reaction is uncertain; the rate at which it occurs is strongly dependent on the permeability of the polymer [38]. This is especially true of the quality for the interface between the electrode and dielectric interface, where air bubbles can exist on a microscale. Electrochemical corrosion relies on the application of an AC voltage with a high electric field concentration. The high electric field is the result of simple irregularities in the metallization surface caused during manufacturing. These defects in most cases are caused by dust or pitting in the polymer. The chemical reaction requires a sequence of positive and negative polarities at the point of the irregularity. The reaction forms Al2O3 during the positive alternation, which is then converted back to Al during the negative cycle. The process governing this reaction [38] is shown in Eq. 2.2. − − 2퐴푙 + 6푂퐻 → 퐴푙2푂3 + 3퐻2푂 + 6푒 (2.2) Without the presence of oxygen or moisture, this reaction cannot take place. It also depends on the temperature, AC voltage magnitude and frequency at which the capacitor is being charged and discharged [40]. This corrosion is worse along the capacitor’s outer layers (Fig. 2.5) because the roll is looser than in the interior. The outer layers are much more susceptible to the ingress of moisture and oxygen than the internal ones (Fig. 2.6), and in some cases, the metalized film can become completely detached from the heavy metal edge [39]. With the same testing conditions, this reaction occurs at a constant rate and is accelerated with temperature and

11 humidity [40]. It was found that the number of self-healing events and their locations do

not directly affect the rate at which this reaction can occur.

Figure 2.5 Corrosion of Metallization 2 m into roll [35]. ©IEEE 2006

Figure 2.6 Corrosion of Metallization 8 m into roll [35]. ©IEEE 2006

This corrosion accounts for a much larger loss of capacitance than that of the self- healing events and, also, an increase in the series resistance. It was found in [29] that a capacitor constructed with PP film is much less susceptible to corrosion effects than a capacitor constructed with PET. This difference is likely due to the fact that PP is a hydrophobic material while PET is hydrophilic.

Section 2.3 Capacitor Life Expectations:

The speed that a capacitor ages depends on the temperature, voltage, current and humidity [40]. The increase in these parameters are considered to be aging acceleration factors, which are determined experimentally based on several theories [41]. It has been shown that capacitor aging as a function of temperature follows Arrhenius law, or exponential law [42]

퐸푎 1 1 푡(푇) = 푡푇푛 exp ( ( − )) , (2.3) 푘퐵 푇 푇푛 where 푡푇푛 is the expected lifetime at a reference temperature (푇푛) in Kelvin, 푘퐵 is the

Boltzmann constant, and 퐸푎 is the activation energy. The ratio of 퐸푎/푘푏 is dependent on the capacitor’s materials and is largely found experimentally. Utilizing the capacitor under different conditions causes the expected lifetime to vary. For example, if 푇 is greater than

푇푛, the capacitor’s lifetime decreases [41]. To predict the influence of voltage on the lifetime the inverse power law, or an exponential law, is used [42]. Examining the inverse power law gives the resulting lifetime 푈 −푛

푡 = 푡푈푛 ( ) , (2.4) 푈푛 where: 푡푈푛 is the expected lifetime at the nominal voltage (푈푛), 푈 is the voltage being used and n is the voltage acceleration factor. As the ratio of 푈/푈푛 increases, the expected lifetime of the capacitor decreases [41]. As explained in Section 2.2.2, moisture has a major effect on capacitor degradation [40]. Consequently, the relative humidity of the environment affects the capacitor’s lifetime. It can be estimated as [41]: 푅퐻 푚 푡(푅퐻) = 푡 ( 푛) , (2.5) 퐻푛 푅퐻 where 푡퐻푛 is the expected lifetime at a reference humidity (푅퐻푛), 푅퐻 is the humidity used during aging and m is the acceleration factor.

To accurately estimate the lifetime of a capacitor 퐸푎, 푛 and m must be determined experimentally or by curve fitting to the manufacturer’s data. Then to evaluate the

13 combined effects of temperature, voltage, and humidity (Eq. 2.3) to (Eq. 2.5) can be combined into one equation

−푛 푚 퐸푎 1 1 푈 푅퐻푛 푡(푇, 푈, 푅퐻) = 푡푇푛푈푛푅퐻푛 exp ( ( − )) ( ) ( ) . (2.6) 푘퐵 푇 푇푛 푈푛 푅퐻 Evaluating (Eq. 2.6) at a specific temperature, voltage, and humidity provides an expected lifetime for the capacitor under those operating conditions. Section 2.4 Methods of Aging:

Many variables impact the rate that a capacitor ages, whether it be operational conditions or the type of construction and material used to make the capacitor. To age a capacitor, most experiments have focused on the effect that temperature and voltage have on the capacitor’s lifetime [39]. More recently authors, have begun to look at the effects of high Root Mean Square (RMS) currents though the devices and study how they have decreased the capacitor’s lifetime [29]. Experimenters placed film capacitors in a 200˚C hotpack oven for 2000 hours (12 weeks) with no applied voltage [40]. The researchers studied capacitance degradation, dielectric loss, and increased leakage current. Under these applied temperatures, they found less than a 2% decrease in the total capacitance. Under the influence of these high temperatures alone, little of the capacitor’s performance is lost. When these high temperatures are paired with other factors such as voltage and current, the capacitor degrades much faster. Other researchers tested four film capacitors with an AC stress voltage of 40 V/µm for 192 hours [32]. Under these conditions, circles of corrosion appeared. Their size ranged from tens to hundreds of microns. At these corrosion sites, there was no hole in the metallization, which is the main difference between self-healing and electrochemical corrosion. These corrosion spots were more concentrated in the outer layers of the roll where more oxygen and moisture were likely to be present. Further research demonstrates that the steepness of the voltage waveform applied to the capacitor also influences the rate it ages. It was found that with similar RMS and peak values, capacitors that had more steep excitations were found to have shorter

14 lifetimes. They defined capacitor end of life as a 10% degradation of their total capacitance. The results show that the RMS current through the capacitor did not have as large of an effect as the steepness of the voltage waveform applied, and suggested that current constituted a second order effect in regards to failure time. A factor not examined was how temperature affected this degradation; it was noted that, over time, the internal heating of the capacitor increased by about 10% over its lifetime. This was likely due to the increase of the capacitors series resistance. In [29], high RMS currents were applied in conjunction with DC voltage, to study the effect of currents as well as applying an overvoltage on the capacitor. This has the benefit of causing the capacitors to heat internally, and as long as the power being lost by the capacitor exceeds the amount it dissipates as heat. This temperature increase is a function of the RMS current though the capacitor as well as the series resistance. The temperature increase, ΔT is given by: 퐸푆푅 ∗ 퐼2 ∆푇 = 푟푚푠 (2.7) 퐻 ∗ 푆 where S is the surface area of the capacitor, and H is the heat transfer coefficient in relationship with the surrounding atmosphere, and H is found empirically. With the RMS currents in the capacitor, the researchers were able to heat the core of the capacitor to 100˚C. The capacitor had an overvoltage of 1.1 times its rated value. It was found that the DC voltage offset combined with high ripple currents increased the aging rate of the capacitors. The combination of stressing the capacitors at high temperature, use of overvoltage techniques and high RMS currents, seems to have achieved the fastest rate of aging capacitors. The temperature can either be the result of external atmosphere or internal heating due to capacitor losses. The rate at which the voltage changes on the capacitor was also found to have a greater impact on the aging rate of film capacitors, although this was not explored in conjunction with other conditions such as temperature. Section 2.5 DC-to-DC converters:

DC-to-DC converters change a DC voltage from one voltage to a different voltage. Switch mode power supplies, or SMPS, are the most common form of DC to DC converter

[44]. SMPS utilize a switching device such as an IGBT or MOSFET to change the voltage and current of the output. Unlike with AC voltages, DC voltages cannot be stepped up or down with only the use of a transformer. SMPS DC-to-DC converters can largely be separated into three main groups: Buck, Boost, and Buck-Boost [44]. The way energy is transferred differentiates the three groups. The Buck converter steps down the voltage and increases current. The Boost converter decreases current and increases voltage. The Buck-Boost acts as either the buck or the boost converter depending on the duty cycle of the switch. Section 2.5.1 Ćuk Converter:

The Ćuk converter (Fig. 2.7) belongs to the Buck-Boost family as it can either step- up or step-down the output voltage depending on the duty cycle but it offers advantages such as a constant input and output current.

Figure 2.7 Circuit Diagram of a Ćuk Converter.

The Ćuk Converter was designed by Dr. Slobodan Ćuk of the University of California Institute of Technology in 1976 [45]. Unlike the Buck, Boost, or Buck-Boost, which rely on the inductor to transfer energy between the input and the output, the Ćuk converter depends on the capacitor, C1, to perform this task. It also has the benefit of having constant input and output current. A potential draw back to the Ćuk converter is the output voltage has the opposite polarity of the input. The Ćuk converter has two switching states: (1) the on state (Fig. 2.8) and (2) the off state (Fig. 2.9). The Ćuk converter uses capacitive energy transfer, to transfer energy from the input to the output. When the switch is off the capacitor is connected to the input via the first inductor L1. When the switch turns on the capacitor, C1, transfers energy to the

16 output through L2. The two inductors are used to convert the input voltage (푣퐼푁) and output capacitor voltages (푣표푢푡) into current sources.

Figure 2.8 Circuit Diagram of a Ćuk Converter when Q1 is on.

Figure 2.9 Circuit Diagram of a Ćuk Converter when Q1 is off.

The output voltage of the Ćuk converter is found by applying Volt-Second-Balance (VSB) to the topology. VSB utilizes the fact that the change in current is proportional to the product of voltage and time for an inductor, because the average change in voltage across an inductor during steady state condition is zero.

Applying VSB across L1 with a duty cycle (D) and a period(T) we get 1 퐷 1 1 0 = ∫ 푣푖푛푇푑푇 + ∫ (푣푖푛 − 푣퐶1)푇 푑푇 , (2.4) 푇 0 푇 퐷 where 푣 푣 = 푖푛 . (2.5) 퐶1 1 − 퐷

Applying VSB to L2, we have

(푣표푢푡 + 푣퐶1)퐷푇 + 푣표푢푡(1 − 퐷)푇 = 0 , (2.6) and

푣표푢푡 = −퐷푣퐶1 . (2.7)

푣표푢푡 is obtained by substituting (2.5) into (2.7), we have

퐷푣 푣 = − 푖푛 . (2.8) 표푢푡 1 − 퐷

To find the RMS current though capacitor, C1, the current though both inductors has to be found. This results in the RMS current of C1 as:

1 2 퐷 2 퐼퐿1푝푝(푡 − 퐷) 퐼퐿2푝푝(푡) 퐼퐶1푅푀푆 = √∫ (퐼퐿1max − ) 푑푇 + ∫ (퐼퐿2max − ) 푑푇 (2.9) 퐷 1 − 퐷 0 퐷

퐼 퐷 퐿1푝푝 2 3 3 2 3 9 (퐼퐿1 + ) 퐼퐿1푝푝(−퐷 + 1) −3(− 퐼퐿2 −퐼퐿2푝푝) 퐷 3 퐼퐿2 퐷 3퐼퐿1푝푝(−퐷 + 1) 1 − 퐷 + + − 1 퐼 퐼 (1 − 퐷)2 1 − 퐷 = 퐿2푝푝 퐿2푝푝 (2.10) 3 2 퐼퐿1푝푝퐷 +9 (퐼 + ( )) (1 − 퐷) 퐿1 1 − 퐷 √

This allows for C1 to be sized appropriately. Section 2.5.2 SEPIC Converter:

Figure 2.10 Circuit Diagram of a SEPIC Converter.

The Single-Ended Primary-Inductor Converter or SEPIC (Fig. 2.10) is a modification of the basic Boost and the Ćuk topology. This results in operation similar to a Buck-Boost but without the drawback of having the output voltage’s polarity reversed. Although the SEPIC converter has a higher output ripple current, the lack of the inverted output makes it better for some applications like battery management [46]. The SEPIC converter is also used in LED circuits to provide high power factor correction with reduced component size [47].

When the Q1 is turned on (Fig. 2.11), L1 is charged from the input, and L2 takes energy from C1. During this time, no energy is supplied to the load capacitor.

Figure 2.11 Circuit Diagram of a SEPIC Converter when Q1 is on.

When the Q1 turned off (Fig. 2.12), L1 charges C1 and provides current to the load. L2 also supplies energy to the load at this time.

Figure 2.12 Circuit Diagram of a SEPIC Converter when Q1 is off.

Appling VSB to the circuit we get the following relationship for the output voltage: 퐷 푉 = 푉 (2.11) 표푢푡 1 − 퐷 푖푛

Based on the currents through C1 in the on and off state the RMS current through it can then be found, as

퐷 2 1 2 퐼퐿2푝푝(푡) 퐼퐼푁푝푝(푡 − 퐷) 퐼퐶1푟푚푠 = √∫ (− 퐼퐿2min − ) 푑푇 + ∫ (퐼퐼푁max − ) 푑푇 (2.12) 0 퐷 퐷 1 − 퐷

퐼퐼푛푝푝퐷 2 3 3 2 3 9 (퐼퐼푛푚푖푛 + ) 퐼퐼푛푝푝(−퐷 + 1) −3(− 퐼퐿2min −퐼퐿2푝푝) 퐷 3 퐼퐿2min 퐷 3퐼퐼푛푝푝(−퐷 + 1) 1 − 퐷 − + − 1 퐼 퐼 (1 − 퐷)2 1 − 퐷 = 퐿2푝푝 퐿2푝푝 (2.13) 3 2 퐼퐼푛푝푝퐷 +9 (퐼 + ( )) (1 − 퐷) 퐼푛푚푖푛 1 − 퐷 √

Section 2.5.3 Ćuk and SEPIC comparison

Both the Ćuk converter and the SEPIC converter offer step-up and step-down modes of operation. For the application of aging capacitors, both topologies offer high RMS current through the main capacitor C1. The Ćuk converter also has the added benefit of having a higher magnitude voltage across the capacitor than the SEPIC converter. This higher voltage leads to faster component aging in that topology. Although the SEPIC Converter is easier to cascade than the Ćuk because it has a common ground point and does not invert the output voltage. This ability to cascade converters allows multiple converters to be run in series. Thus multiple capacitors are aged simultaneously. Both topologies have the same voltage and current stresses across the switching devices for the same input voltage and current. The voltage stress of the devices are 푣푖푛 + 푣표푢푡 and the current stress is roughly twice the input current. Using the Ćuk and SEPIC topologies, capacitors were aged and evaluated for changes in their parasitic parameters. The changes are compared between the two different converter topologies, as well as by whether Si or SiC was used as the semiconductor material.

Chapter 3 EMI as Diagnostic Tool

EMI is traditionally viewed as an unwanted consequence of electric circuits. The development of WBG devices and the faster switching speeds that are characteristic of these devices has resulted in an increase in EMI generated [7]. With the faster voltage and current time derivatives of SiC, these fast edges produce significant energy at very high frequency and are the root cause of EMI problems. This high frequency energy can cause ringing in all the topologies’ resonant tanks and can prevent the device from operating correctly [48]. The idea of using EMI as a diagnostic tool arises from the fact that all electronic devices generate these emissions. Small changes in the device can adversely affect these emissions. EMI has been used since the 1980’s to provide condition assessment of large turbine generators [49]. An EMI test can be used identify deterioration in insulation and conductor related defects [4], [50]. Due to EMI’s very sensitive nature, numerous electrical and mechanical problems can be identified in the early stages of their development before the failure of the component [4]. Using EMI as a diagnostic tool would also allow for large systems, like generators and switch gear, to be evaluated while they remain in service. Section 3.1 Types of EMI:

Three things lead to an EMI problem: a source generates some noise, there is a transmission path for that noise, and there exists a device that is susceptible to that noise (Fig. 3.1).

Figure 3.1 Transmission Paths for EMI between an Emitter and a Victim.

Trying to solve the EMI problem by looking at the source involves reducing the amount of emissions by either reducing the amplitude of the emissions or by targeting the transmission of EMI. The device that is generating the emissions is referred to as the emitter and the device being affected is called the victim. There are 4 main types of coupling between the emitter and victim. In resistive or galvanic coupling the noise is transferred through electrical connections between the source and the victim. This occurs at all frequencies and can be mitigated with a good system layout and filtering with inductors and capacitors. Capacitive coupling is caused by electric fields and is usually small but, at high frequencies can be a major factor. An example of this is two wires of different nets placed close to one another, creating a pseudo capacitor. The interference caused by this scenario can be mitigated with proper shielding. Inductive coupling is caused by magnetic fields generated in components like inductors coupling portions of their energy onto other wires or traces. At high frequencies, this coupling gains strength and is best addressed at the source of this field. Wave coupling is the coupling of very high frequency noise transmitted via electromagnetic waves. This is caused by PCB traces or wires acting like antennas at high

22 frequencies. It can be mitigated by clean Printed Circuit Board (PCB) layouts and minimizing the high frequency sources. These coupling paths can be broken down into two main transmission categories: Conducted EMI and Radiated EMI (Fig 3.2). It is generally accepted that conducted EMI is below 30 MHz and radiated is above 30 MHz [48]. The coupling modes cannot be examined independently because ideal components do not exist in actuality, and the parasitic elements of capacitors and inductors contribute to the problem [4]. This discussion will focus on conducted EMI due to the method of measurement and the current capabilities of the laboratory.

Figure 3.2 Radiated Vs Conducted Emissions between a Source and Victim.

The impedance of AC power lines varies widely depending on the length, distance from a transformer, and many other factors. For this reason, a standard impedance is used when EMI testing is done. CISPR has formulated different guidelines to provide this uniformity to EMI testing, and the most common standard used is CISPR16 [49]. CISPR 16 details the procedures of measuring disturbances from 9 kHz to 1 GHz and is specified for radio disturbances. Other CISPR guidelines exist for other applications, for example automotive guidelines are provided in CISPR 25. Figure 3.3 shows LISN or Line Impedance Stabilizer Network also known as an AMN or “Artificial Mains Network”. The LISN is used to provide the standardized impedance for the Device Under Test (DUT) and is directly connected to the input. A spectrum analyzer

23 measures the amplitude and frequency of the noise coupled onto the input power cables [51]. The noise measured by the LISN (Fig. 3.3) is separated into two categories: differential and common mode. Common Mode (CM) noise is caused by capacitive coupling of the switching voltage into the ground and flows in parallel through the 50 ohm resistors, i.e. through both the line and the neutral [48, 52]. Differential Mode (DM) noise is caused by the time varying current demands. It is conductively coupled onto the bus capacitor and flows through the 50-ohm resistors in series (Fig. 3.3).

Figure 3.3 Conducted Emissions Noise Paths with LISN with Measurement Points.

Therefore, EMI voltages measured between the line and ground (푉퐿퐺), and the neutral and ground (푉푁퐺), are different. One is the summation of the CM and DM noise, and the other is the difference between CM and DM as shown in Eqs. (3.1) and (3.2) as

푉퐿퐺 = 50(퐼퐷푀 + 퐼퐶푀) (3.1) and

푉푁퐺 = 50(−퐼퐷푀 + 퐼퐶푀) . (3.2) These represent the noise voltages across the LISN, which can then be separated in the CM and DM components, given in Eqs. (3.3) and (3.4), as (푉 − 푉 ) 푉 = 50퐼 = 퐿퐺 푁퐺 (3.3) 퐷푀 퐷푀 2 and

(푉 + 푉 ) 푉 = 50퐼 = 퐿퐺 푁퐺 . (3.4) 퐷푀 퐷푀 2 The challenge in this is maintaining accuracy over the frequency range. Any small error in the process of summing or subtraction can lead to large percent errors.

Figure 3.4 Equivalent Circuit of a LISN.

The close up of the LISN circuit shown in Fig. 3.5 is a LISN according to MIL-STD- 461. The device used to do this is called a power combiner, for the CM the device is a 0º power combiner (Fig. 3.5) and cancels the DM while leaving the CM intact. A 180º power

Figure 3.5 Circuit Diagram of 0⁰ Power Combiner. 25 combiner (Fig. 3.6) is used to cancel the CM and pass the DM through. In Figure 3.5, a wide band transformer is used as a summer and produces CM noise on its secondary side.

Figure 3.6 Circuit Diagram 180⁰ Power Combiner.

In Figure 3.6 two wide band transformers are used. The first transformer acts as a summer and the second as a subtractor. The resulting CM noise is grounded and the difference of the noise is found by the second transformer resulting in the DM noise. Section 3.2 EMI Modeling

The EMI of a three-phase inverter is modeled using the simplified schematic presented in Fig. 3.7 [53]. This model allows for the simplification of a three-phase inverter to determine the impact of the DC link capacitor on the differential mode EMI spectrum. The model consists of two LISNs, a DC link capacitor and its associated parasitics, and the six semiconductor switching devices modeled as voltage sources (VS,i ). The LISNs are used to provide a standardized impedance to the inverter from the DC supply. The values for the components in the LISN, LLN, CLN, and RLN, are given in [54]. The second order model for a capacitor shown in Fig. 2.3 is used for the DC link capacitor. The parasitic capacitances that couple between the positive and negative bus bars and the chassis are given by CPG and CNG. Each phase also has a parasitic capacitance between it and the chassis CSW,i. The inverter model is connected to a relative load consisting of a resistor

26 in series with an inductor, with a coupling capacitance between the center point and ground (CM).

Figure 3.7 Schematic of Modeled Three-Phase Inverter.

Using the circuit analysis described in [53], Fig. 3.7 is reduced to Fig 3.8. The simplification is done by assuming each phase sees identical loads and have the same behavior in regards to rise time, fall time and current through the device. In Fig. 3.8 the switch is modeled as a trapezoidal current source with rise and fall times dependent on the magnitude of the current through the switch when it transitions states.

Figure 3.8 Equivalent Circuit for DC Bus Effects.

By using circuit analysis on Fig. 3.8, the transfer function between the input current and the DM voltage seen between the neutral and ground and between the positive and ground can be calculated. To do this analysis the circuit is converted into its impendances and both voltage and current division is used to solve for VP and VN, which are then used to find the differential mode noise VDM. The three impendances shown in Fig. 3.9 where 푠 = 푗휔, are

Figure 3.9 Impendances for the Simplified Circuit. 1 ( ) 푅퐿푁 + 푠퐿푆퐶 (푠퐶 ) 푍 = 푃퐺 (3.1) 1 1 푅퐿푁 + 푠퐿푆퐶 + 푠퐶푃퐺 and 1 ( ) 푅퐿푁 + 푠퐿푆퐶 (푠퐶 ) 푍 = 푁퐺 (3.2) 2 1 푅퐿푁 + 푠퐿푆퐶 + 푠퐶푁퐺 and 1 푍3 = 푅퐸푆푅 + 푠퐿퐸푆퐿 + (3.3) 푠퐶퐷퐶

Using these impendances, the voltage drop across the LISN resistors and VDM can be found by:

푅퐿푁 푍3 푉푃 = (푍1 ( )) 퐼퐼푁푉(푠), (3.4) 푅퐿푁 + 푠퐿푆퐶 푍1 + 푍2 + 푍3

푅퐿푁 푍3 푉푁 = (−푍2 ( )) 퐼퐼푁푉(푠), (3.5) 푅퐿푁 + 푠퐿푆퐶 푍1 + 푍2 + 푍3

푉 − 푉 푉 = 푃 푁 . (3.6) 퐷푀 2

As the DC link capacitor changes with age it only impacts the impedance described as 푍3 which then causes a change in 푉퐷푀. The impedance of a capacitor as described by Eq. (2.3) is 1 푍 = 푅퐸푆푅 + 푗휔퐿퐸푆퐿 + (3.7) 푗휔퐶퐷퐶 As described in Chapter 2, the ESR increases and the capacitance decreases with the inductance remains constant. A set of model values is shown below for the two capacitor case; new and aged. Table 3-1 Parameters for Model New and Aged Capacitors

Capacitance RESR LESL New 50 µF 7 mΩ 35 nH Aged 47.5 µF 19 mΩ 35 nH

Using the values described in Table 3.1, the capacitor’s impedance between 10 kHz and 1 MHz was found and is shown in Fig. 3.10.

Figure 3.10 Capacitor Impendance vs Frequency for New and Aged.

As seen in Fig. 3.10 the capacitor has the lowest impedance at the resonant frequency, or where the complex components described by Eq. (3.7) cancel out. The resonant frequency

(fr) can be found by: 1 푓푟 = (3.8) 2휋√퐿퐶 As the capacitors age, the capacitance decreases causing the resonant frequency of the capacitor to increase. The increase in the ESR also causes the impedance to increase in magnitude at all frequencies. The capacitor impedance is then used in (3.6) and the differential mode noise is determined using a constant current excitation of 1 A to show the general trend (Fig. 3.11).

Figure 3.11 Vdm vs Frequency for New and Aged Capacitors. Again, the lowest magnitude was at the capacitor’s resonant frequency. The slight shift between the two cases is due to the lower capacitance of the aged capacitor. The percentage difference at the resonant frequency for the magnitude is 116 %. The resonant frequency increased by 1.5 %.

A current source with pulses from 0 to 10 A with varying rise time was generated to model the switching current of an inverter 퐼퐼푁푉 (Fig. 3.8). The rise times increased and fall times decreased with increased current magnitude [53], the change in time is due to the difference in turn-on and turn-off speed of the specific devices at different currents. The Fast Fourier transform of the pulsed current waveform was taken to convert it into the frequency domain (Fig. 3.12).

Figure 3.12 Frequency Spectrum of Pulsed Current Waveform. Using the spectrum in Fig 3.12, a model spectrum for the differential mode noise for each capacitor case is found by multiplying the values in Fig. 3.12 with those in Fig. 3.11.

The resulting spectrum is a model of VDM for a three-phase inverter (Fig. 3.13). The impact of the capacitor impedance can be seen in the resulting spectrum, with small changes in magnitude or frequency directly impacting the result.

Even order harmonics are larger than expected. These harmonics are amplified due to an artifact of taking the Fourier transform of the time domain current source and should be disregarded.

Figure 3.14 Model VDM for Three Phase Inverter.

Figure 3.13 Simulated Odd Harmonic Spectrum. To have a better understanding of the two cases, spectrums of the odd order harmonics were plotted over the entire frequency range (Fig. 3.14). Based on these simulated results it should prove possible to determine capacitor age based on an inverter’s EMI spectrum. Section 3.3 Diagnostic Use

EMI is still mainly viewed as an unwanted component of switching devices and something to mitigate as per government regulations. One of the first successful applications of the CISPR 16 guidelines was the detection of conductor deterioration in

32 large voltage generators [65, 57]. This was done by placing a Radio Frequency Current Transformer (RFCT) on the generator’s neutral line. Since then, these techniques have been used to successfully diagnose other generator insulation deteriorations [56]. Application in the petrochemical environment quickly followed [59]. Researchers were able to diagnose partial discharges and arcing in a variety of electric industrial equipment [57]. They analyzed devices with a RFCT and were able to identify the events occurring as the corresponding EMI was generated. Issues identified include: improper grounding of the shaft of a generator, broken rotor bars in an induction machine, loose connectors in a transformer, and several partial discharge events from bolts left on a bus enclosure of a switch gear. These RFCTs were used to measure EMI in the 100 kHz to 30 MHz range, and after repairs, it was confirmed that these anomalies were no longer present. In a USAF patent [60], an apparatus was built and a method developed to detect corrosion in metal junctions. Metal junctions act as nonlinear devices and inject harmonics into any signal applied to the junction. There are two main methods of diagnosing corrosion: visual inspection and x-ray. Visual inspection is not always adequate due to inability to diagnose the severity of the corrosion. Additionally, the corrosion could be in difficult to reach locations or invisible to the naked eye. It was proposed to use current probes over a large range of frequencies to analyze for corrosion at any point in the circuit given adequate excitation, because the corrosion is frequency dependent. The reason EMI as a diagnostic tool is so promising is its ability to correctly identify and show a need repairs before catastrophic failure occurs. It also offers the ability to analyze large electric machines while they remain in service. This reduces the down time and cost of repairs leading to longer machine lifetimes and greater reliability. It has proven to be successful in diagnosing varieties of problems in both large generators and electric machines and with further research, will increase in application.

Chapter 4 Converter Design

Several test set ups were created to study the effect of different WBG devices on the aging process of passive circuit components. Ćuk converters and SEPIC converters were utilized to accelerate the aging of capacitors because they have high RMS currents through their energy transferring capacitor. These high RMS currents cause internal heating to the capacitors. This effect, coupled with the AC ripple voltage, increases the rate at which the aluminium metallization converts into aluminium oxide, thus aging the capacitor [38]. The design process starts by selecting the main capacitors in either converter. These capacitors were selected to be compatible with the existing 3-phase inverter in the lab for EMI testing purposes. To properly select the switching devices and size the heat sink, the power loss of the switches was calculated. There are two forms of loss in a power device: conduction loss and switching loss. These losses are unique from device to device and are influenced by many other parameters such as temperature and gate resistance. Most manufacturers use experimental methods to calculate these losses and give relationship curves in the device datasheet.

Conduction loss (Pcond) occurs when current flows through the device and is equal to the voltage drop times the conducted current. The voltage drop across the device is device dependent and changes with temperature, current, as well as other factors. For an IBGT and a diode, the change is given by:

푃푐표푛푑 = 푉푓 ∗ 퐼푎푣푔 , (4.2) where 푉푓 is the forward voltage drop of the device when it is conducting and 퐼푎푣푔 is the average current through the device. The conduction loss for a MOSFET is slightly different because of the device’s on- resistance. The conduction loss for a MOSFET is found by using the on-resistance of the device (푅푑푠푂푁) and multiplying it by the square of the RMS current (퐼푟푚푠) through the device. 2 푃푐표푛푑 = 푅푑푠푂푁 ∗ 퐼푟푚푠 (4.3)

Switching loss (푃푠푤) occurs when the device transitions from the blocking state to the conducting state, and vice-versa. This loss is related to the voltage across its terminals and the current though the device. The energy dissipated in each transition needs to be multiplied by the switching frequency (푓푠) to get the power loss in watts. The simplified form of calculating switching loss is shown in Eq. (4.4), as 푓 푃 = 푉 ∗ 퐼 ∗ (푡 + 푡 ) ∗ 푠 , (4.4) 푠푤 푆푡푟푒푠푠 푎푣푔 푟 푓 2 where 푡푟 is the rise time and 푡푓 is the fall time. 푉푠푡푟푒푠푠 is the voltage blocked by the switch when it is off. Another way of calculating power loss is to use the switching energy loss during turn-on (퐸표푛) and turn-off(퐸표푓푓) given in the datasheet and multiplying it by the switching frequency as shown in Eq. (4.5) as,

푃푠푤 = (퐸표푛 + 퐸표푓푓)푓푠 . (4.5) To be able to compare the theoretical energy loss (Eq. 4.5) to the experimental data used by the manufacture to calculate the energy loss Eq. 4.6 is used, where 푉푟푒푓 and 퐼푟푒푓 are the test conditions provided by the manufacturer: 1.3 1.3 푉푠푡푟푒푠푠 퐼푎푣푔 푃푠푤 = ( ) ( ) (퐸표푛 + 퐸표푓푓)푓푠. (4.6) 푉푟푒푓 퐼푟푒푓

The switching loss of a diode is different than the loss of a switch. It is related to 푉푓,

푓푠 and the reverse recovery charge (푄푅).

푃푠푤 = 푄푅푉푅푓푠 (4.7)

The reverse recovery charge (푄푅) is a direct measurement of the stored charge, either from the barrier junction capacitance of Schottky devices or the minority carrier that flow in the drift region of a P-N junction-based device. This charge must be removed so that the depletion region can block the reverse voltage of the diode. Section 4.1 Ćuk Design:

In order to compare the aging effects of SiC and Si, two Ćuk converters were built, one with SiC technology and one with Si technology. These setups both use two capacitors in parallel for the energy transferring capacitor, which were rated for 20 A RMS. This means 40 A RMS were needed for the pair. The RMS current though the capacitor as shown in Chapter 2, is dependent on the inductor current and the size of the inductor used 35 because it is dependent on the ripple current of the inductor( the larger the inductor the less ripple would exist). The other factor in this corrosion is the capacitor voltage ripple. The ripple voltage on the capacitor is shown in Eq. (4.8),

푉푖푛퐷 푉∆퐶1 = (4.8) 2(1 − 퐷)푅퐶1푓푠 where R is the load resistance, 퐶1 is the capacitance of 퐶1 and 푓푠 is the switching frequency. Half bridge modules were selected for the switching devices operating at a frequency of 10 kHz. Discrete devices were not used due to the high voltage and current, as well as to minimize the stray inductance in the main power loop to avoid decreased switching speed. For these currents, the power loss was found to be quite high, especially for the Si IGBT; therefore, a large heatsink was needed for proper cooling. Figure 4.1 is a model of the system that was built. The main capacitors are kept as close to the switching device as possible to reduce as many parasitic elements in the topology. This design also allows the capacitors to be externally heated if the internal heating does not provide a high enough temperature rise in the capacitors. Table 4.1 indicates the main design parameters.

Figure 4.1 3D Model of Ćuk Converter.

Table 4-1: Ćuk Design Parameters

푉푖푛 푉표푢푡 퐼퐶1푟푚푠 푅퐿표푎푑 퐿1/퐿2 푓푠 270 V -270 V 40 A 7 Ω .5 mH 10 kHz

Section 4.1.1 Simulation of Ćuk system:

Based on the system parameters in Table 1, the Ćuk converter was simulated.

Figure 4.2 shows the waveforms for the currents: Iin, Iout, IC1, IQ1 and IQ2. Figure 4.3 shows the voltages across VC1, VQ1 and VQ2. Knowledge of the voltages across and currents through the switching devices and passive components is essential for correct component selection.

Figure 4.2 Graph of Ćuk Converter Currents.

Figure 4.3 Graph of Ćuk Converter Voltages.

The switching device stress voltage 푉푄1 and 푉푄2 shown in Fig. 4.3 is the voltage the device has to block when it is not conducting. For the Ćuk converter, the stress voltage is equal to the max voltage of the capacitor 퐶1, Eq. (4.8) plus the ripple voltage in Eq. (4.9), 푉 푉 = 푖푛 . (4.9) 퐶1 1 − 퐷 These values match closely with the ones derived in the Appendix and are the basis of selecting the switching devices used in the test setup. The capacitors have an RMS current of 40 A with a ripple of 20 V. Using the calculated and simulated values, the switching devices were selected and power loss was calculated. Section 4.1.2 Ćuk Power Loss

For the Ćuk converter, Wolfspeed’s CAS120M12BM2 [61] half-bridge module was selected as the SiC device, and the Si device is a POWEREX CM200DY-24A [62]. Due to the use of a half bridge module instead of a switch and a diode, both devices are switches and are rated at 1.2 kV and 200 A. The power loss shown in Table 4.2 is calculated using (4.2) and (4.6). The total loss of the Si module is 512 W and the SiC is 199.2 W. The heat sink is then sized to keep the junction temperature (Tj) of the devices below 100⁰ C at the peak power loss.

Table 4-2: Power Loss for Si and SiC Switches in Ćuk Converter

Si SiC

푄1푙표푠푠 256W 99.6W

푄2푙표푠푠 256W 99.6W

To size the heat sink (Eq. 4.10) is used where: TA is the ambient temperature, θSA is the heat sink thermal resistance, θJC is the junction-to-case thermal resistance, θCS is the case-to-sink thermal resistance, and PD is the total power to be dissipated.

푇푗 − 푇퐴 휃푆퐴 = − 휃퐽퐶 − 휃퐶푆 (4.10) 푃퐷

θJC is provided in the device data sheet and θCS depends on the thermal interface being used. With these values, and a desired junction temperature the heatsink can be sized. For the heat sink to work with both modules, a heatsink with a thermal resistance of .03 is required and is reachable with forced convection. Section 4.2 SEPIC Converter Design

For the SEPIC converter topology, two converters were designed, one for Si devices and one for SiC. For these converters, TO-247 packaged switches and diodes were selected to be the switching devices. Again, the energy transferring capacitor was the starting point of the design and a capacitor rated for 15 A RMS was selected for it. The ripple voltage for the capacitor C1 can be found with Eq. (4.11), as

퐼표푢푡퐷 푉∆퐶1 = . (4.11) 퐶1푓푠 The PCB layout shown in Fig. 4.4, was used for the SEPIC converter. The low voltage control and gate drive are on the left side of the board and the high voltage main power

Figure 4.4 PCB Layout of Si SEPIC Converter. loop on the right. The main power loop is kept as small as possible to minimize the stray inductance and keep switching speed high. The only difference between this layout and the one for the SiC design is the use of multiple diodes in parallel to deal with the peak current.

Section 4.2.1 Simulation of SEPIC:

Using the parameters in Table 4.3, the SEPIC simulation was written in PSIM using the topology described in Chapter 2. In Fig. 4.5, the input (Iin) and output current (Iout), the capacitor C1 current (IC1), and the switch (IQ1) and diode (ID1) current are shown.

Table 4-3: SEPIC Design Parameters

푉푖푛 푉표푢푡 퐼퐶1푟푚푠 푅퐿표푎푑 퐿1/퐿2 푓푠 270 V 270 V 15 A 19 Ω 1 mH 10 kHz

Figure 4.5 Graph of SEPIC Converter Currents.

The device stress voltages, VQ1 and VD1 (Fig. 4.6), for the SEPIC converter are equal to the capacitor voltage (VC1) added with the output voltage.

Note from plots in Fig. 4.5 and Fig. 4.6 that the simulation values match closely with the calculated values from the equations derived in the Appendix and are the basis for the selection of the switch and diode components. The capacitor C1 of the SEPIC converter has 15 A RMS and a ripple voltage of 14 V.

Figure 4.6 Graph of SEPIC Converter Voltages.

Section 4.2.2 SEPIC Power loss

The devices selected for the SEPIC design are shown in Table 4.4. The SiC diodes were not rated for a high enough peak current so multiple devices were placed in parallel. This reduces the conduction loss of each diode due to less current flowing through each one, but more loss overall. Having multiple diodes in parallel has the drawback of increasing the diode switching loss, but the SEPIC converter has the possibility to have zero turn-off current for the diode, reducing that loss. This is because the inductor can be operated close to DCM.

Table 4-4: SEPIC Switching Devices

Device Type Material

STGWA80H65FB [63] IGBT Si IDW75E60FKSA1 [64] Diode Si SCT3022ALGC11 [65] MOSFET SiC IDW30G65C5XKSA1 [66] Diode SiC

Table 4-5: SEPIC Converter Power Loss

Si SiC

푄1 43.3 W 15.44 W

퐷1 17.8 W 11.65 W

These power losses are calculated using Eqs. (4.2) and (4.6) and the manufacturer provided datasheets. Section 4.2.3 SEPIC Inductor Design

For the operation of the SEPIC converter, a large inductor had to be designed and fabricated. The inductor had to be large enough to handle the high peak to peak currents as well as not saturate at full load, even at elevated temperatures due to losses. This means the inductor has to stay in Continuous Conduction Mode (CCM) that is the inductor current is always greater than 0 A.

The selected core has an AL value of 370 nH/T2 at room temperature. As temperature increases, this value decreases. AL is a manufacture’ supplied value but can be calculated from the cross-sectional area (X), effective path length (leff) and permeability (µr) of the core as shown, 푋 휇 휇 퐴 = 0 푟 . (4.12) 퐿 푙푒푓푓

Using AL and the inductance needed, in this case 500 µH, the number of turns, (N), can be found as

퐿 푁 = √ . (4.13) 퐴퐿

This resulted in needing 38 turns to achieve the 500 µH inductance at room temperature. Using manufacturer specified equations and variables, the maximum flux was found to be 0.38 Wb, well below the saturation point. The inductors were tested at 215 V and an RMS current of 15 A with 16 A peak-to- peak. The inductors operated as expected with a notable temperature rise, although they remained below saturation. To find the expected temperature rise of the inductor, the losses must be found.

Figure 4.7 Designed 500 µH Inductor. Inductor losses consist of core loss and winding loss. Core loss is the loss by the core due to the alternating magnetization. Equation 4.14 is used to find the power loss density of the core, where a, b, and c are manufacturer specified for a particular core, the AC flux swing (∆훽), and the frequency (f). 푏 푐 푃퐿 = 푎∆훽 푓 (4.14) To find ∆훽, the minimum and maximum flux density are found. This is done by first calculating the magnetizing field (H) (Eqs. (4.15-16)), where 퐼퐷퐶 is the DC current through the core and ∆퐼 is the current ripple.

푁 ∆퐼 퐻퐴퐶푀퐴푋 = [ (퐼퐷퐶 + )] (4.15) 푙푒푓푓 2 푁 ∆퐼 퐻퐴퐶푀퐼푁 = [ (퐼퐷퐶 − )] (4.16) 푙푒푓푓 2

Using the calculated H values in Eqs. 4.14-15, the maximum (훽푚푎푥) and minimum (훽푚푖푛) flux density can be found with Eq. 4.17. This calculation relies on manufacturer parameters: a, b, c, d, e, and x [67]. 푥 푎 + 푏퐻 + 푐퐻 2 푖 푖 훽푚푎푥/푚푖푛 = [ 2] , (4.17) 1 + 푑퐻푖 + 푒퐻푖 where 퐻푖 = 퐻퐴퐶푀퐴푋 , or 퐻퐴퐶푀퐼푁. Now, Eq. 4.18 can be used to find ∆훽. 훽 − 훽 ∆훽 = 푚푎푥 푚푖푛 (4.18) 2 Using the result of Eq. 4.18 in Eq. 4.13, the core loss density was calculated. To find the core loss, the volume (V) of the core is multiplied by the loss density to get the final loss in Watts.

푃푓푒 = 푃퐿 ∗ 푉 표푟 푃퐿 ∗ 푙푒푓푓 ∗ 푋 = 4.756 푊 (4.19) Winding loss is found by calculating the AC resistance of the wire used to wind the inductor and the length of the wire. To find the AC resistance of the wire, the skin depth (δ) at the frequency of operation (f) must be found. The symbol 휇 is the constant for permeability.

푅푒푠푖푠푡푖푣푖푡푦 표푓 퐶표푝푝푒푟 훿 = √ (4.20) 휋푓휇

At a frequency of 15 kHz, the δ of copper is 0.533 mm. Using the skin depth, the usable area of the conductor can be calculated and then the AC resistance for a given length of wire can be found. 퐴 = 휋푟2 − 휋(푟 − 훿)2 (4.21) 푅푒푠푖푠푡푖푣푖푡푦 표푓 퐶표푝푝푒푟 ∗ 퐿푒푛푔푡ℎ 푅 = (4.22) 퐴퐶 퐴

Using 10 AWG wire for a length of 10 meters, RAC was found to be 0.051 Ω. With the AC resistance, the loss of the wire can be found at a given current with Eq. 4.23 as

2 푃푊 = 퐼 푅퐴퐶 = 11.47 푊. (4.23) Combining both losses found in Eqs. 4.14 and 4.23, the total inductor loss is found.

푃퐼푛푑푢푐푡표푟 = 푃퐿 + 푃푊 = 16.23 푊 (4.24) Finally, using the total loss of the inductor, the expected change in temperature can be calculated as 푃 .833 16230 푚푊 .833 ∆푇 = ( 퐼푛푑푢푐푡표푟 ) = ( ) = 60.8 ℃. (4.25) 푆푢푟푓푎푐푒퐴푟푒푎 117.32 푐푚2 This calculation only provides a rough estimate because there is no way to guarantee the many properties that affect the thermal dissipation. Here the units of loss are in mW and the surface area is in cm2, resulting in a temperature rise of 60.8 °C

Section 4.3 Ćuk and SEPIC Comparison:

The main difference between these two topologies is the negative output that the

Ćuk converter has and the stress voltage on capacitor C1. For the Ćuk converter, the peak voltage on the capacitor is twice the input; for the SEPIC, it is equal to the input. This could lead to different aging rates of the capacitors. Such differences might not be easily comparable due to the other minor differences in the topologies’ currents, as well as the different capacitor in use. Both topologies have the same stress voltage across the switching devices for the same input voltage. They also have very similar currents for the same output power rating, but because the converters are being run at different power levels, it changes the current through the devices. The SEPIC converter devices have a maximum conduction current of 40 A, while the Ćuk converter devices have to conduct 100 A. The greatest benefit to using the SEPIC topology is the common ground between the input and output. This allows for multiple SEPIC converters to be run in series to increase the number of capacitors being aged at a time. The Ćuk converter does not have the common ground and the reversed voltage can complicate this process. The Ćuk Converter and SEPIC converter were discussed in this chapter. The power loss of each converter switch and diode was found for the discussed parameters. The two topologies both have pros and cons with the Ćuk converter offering higher capacitor stress

45 voltage and the SEPIC the ease of cascading them together for better power utilization. Both converters are able to age two capacitors at the same time.

Chapter 5 Results

In order to assess the performance of the converters discussed in Chapter 4, all of the converter were assembled and tested. The topologies were built using the switching devices discussed in Chapter 4 for the design parameters listed in Tables 4.1 and 4.3. All the topologies have been tested at the specified input voltage, with the Ćuk converters only tested at 50 percent of full power. The dv/dt across all the devices was recorded to show the difference that implementing SiC causes. The dv/dt of all the devices measured was evaluated for 10% to 90% of the full blocked voltage. These converters were run for several hundred hours to age the capacitors that were tested. Section 5.1 Ćuk Design

Figure 5.1 contains an image of the final SiC Ćuk converter. The Si converter is very similar in appearance. The sections below give the results for both the Si and the SiC modules.

Figure 5.1 Image of Constructed Ćuk Converter.

Section 5.1.1 Si Ćuk Results

The Si Ćuk converter was tested at 4.5 kW with an input voltage of 270 V. The rise and fall time of both IGBT devices was measured from the collector to the emitter using an oscilloscope and differential probes. Channel 1 of Figure 5.2 shows the turn on of Q1 and

Channel 2 shows the turn off of Q2. The dv/dt for the rise and fall can be calculated for both switches by finding the slope of the curve. Table 5.1 has the turn on and turn off characteristics of dv/dt for both switches.

Figure 5.2 Q1 Turn-On dv/dt Q2 Turn-Off dv/dt

Table 5-1 Measured Si Ćuk Converter dv/dt

Turn On Turn Off

Q1 1.24 V/ns 3.27 V/ns

Q2 3.28 V/ns 1.21 V/ns

The switches block 540 V when not conducting. The slope was found between roughly 10% and 90% of the blocked voltage. When the switch turns on, the voltage drop across it falls resulting in the turn on dv/dt. When the device turns off, the voltage across it increases giving the turn-on dv/dt.

Section 5.1.2 SiC Ćuk Results

The SiC Ćuk converter was tested at the same power levels as the Si converter for functionality. The rise and fall time of the switching devices was recorded and compared with that of the Si system. Section 5.2 SEPIC Design

The Si and SiC SEPIC converters (Fig. 5.3) were tested at 3.6 kW with an input voltage of 270 V. The converters were run until the switching devices stabilized in temperature to ensure adequate cooling. The Si IGBT increased to 45° C and the SiC MOSFET to 38° C. The results for each converter are in the sections below.

Section 5.2.1 SEPIC Results

Figure 5.3 Assembled SiC SEPIC Converter.

For the Si SEPIC, the turn-on and turn-off times for the different devices are shown in Figs. 5.4 and 5.5. The IGBT voltage is VQ and the diode voltage is VD. In Fig. 5.4. the IGBT is turned on and the diode blocks the capacitor and output voltage. The turn-on time of the IGBT is 43 ns with a voltage change of 414 V, resulting in a slope of 9.6 V/ns compared to the datasheet value of 7.7 V/ns. The turn off of the IGBT is shown in Fig. 5.5 and the dv/dt of the IGBT and diode are in Table 5.2. The SiC SEPIC converter (Fig. 5.3) dv/dt results are shown in Figs. 5.6 and 5.7. The

Figure 5.4 Si SEPIC IGBT Turn-On, Diode Turn-Off. MOSFET voltage is in yellow with the diode in pink. In Figure 5.6, the turn-on of the MOSFET and turn-off the diode are shown. Figure 5.7 shows the MOSFET turn-off and diode turn-on. The dv/dt for both components is given in Table 5.2.

Figure 5.5 Si SEPIC IGBT Turn-Off, Diode Turn-On.

Figure 5.6 SiC SEPIC MOSFET Turn-On, Diode Turn-Off.

The diode in the SiC case is faster than the MOSFET, this may be partially due to the diode having half the current than that of the MOSFET. This is because there are two diodes in parallel in the SiC SEPIC converter.

Figure 5.7 SiC SEPIC MOSFET Turn Off, Diode Turn-On.

Section 5.2.2 SEPIC Comparison

The SiC SEPIC devices have faster turn-on and turn-offs than the fastest Si device. Although the difference is much less than expected, the datasheet values are all different from the measured results, likely due to the different conditions under which they were evaluated. In all but the IGBT turn off case, the measured values are faster than the datasheet ones. The SiC MOSFET only has a 4 V/ns improvement on the Si IGBT. This could be due to inductance slowing the switch down or the switching device itself. The Si devices have a larger increase in temperature due to the greater power loss but remain in acceptable operating conditions. With the slight difference in dv/dt it will be interesting to note how the aging rate of the capacitor differs between the two.

Table 5-2 Measured dv/dt for Si and SiC devices.

Measured Datasheet Measured Datasheet Turn On Turn On Turn Off Turn Off Si IGBT 9.7 V/ns 7.6 V/ns 7.6 V/ns 12.9 V/ns Si Diode 8.6 V/ns 10.2 V/ns SiC MOSFET 13.6 V/ns 5.6 V/ns 11 V/ns 8.5 V/ns SiC Diode 13.9 V/ns 16.2 V/ns

Section 5.3 Capacitor Aging

Four capacitors were aged for 600 hours, and two for 500 hours, with little detectable difference seen. This is to be expected because the capacitors are designed for a total lifetime of 100,000 hours by the manufacturer [68]. For consistency of capacitor measurement, a test fixture was designed to interface the capacitor with the LCR (Fig. 5.8) and due to this change in measurement style, the baseline measurements of the capacitors cannot be compare with the aged values. Use of this fixture removed issues when compensating the original one. With the original fixture, resistance was largely affected by much the compensation device was tightened.

Figure 5.8 (a) Capacitor Measurement Fixture PCB design. (b) Measurement Fixture attached to LCR Meter. This new fixture removed that issue. This issue also affected the capacitor measurements, with the tighter the fastening the lower measured resistance.

Instead of comparing with the initial values, measurements were taken at 200 through 600 hours for the SEPIC capacitors 1-4 shown below (Figs. 5.9-12). As shown, there is no difference between any of the measured impedances and further aging is required to see the aging of device material on capacitors. Based on the process outlined in

Figure 5.10 Current Results for Capacitor 1. Figure 5.10 Current Results for Capacitor 2.

Figure 5.9 Current Results for Capacitor 3. Figure 5.12 Current Results for Capacitor 4. section 2.3 and the conditions they were aged under the estimated number hours to reach the capacitors end of life would be 1.1x1010 hours (See (Eq. 5.1)). The values for Ea and n were found using curve fitting of the manufacturer’s data [68]. 퐸 1 1 푈 −푛 푡(푇, 푈) = 푡 exp ( 푎 ( − )) ( ) 푇푛푈푛 푘 푇 푇 푈 퐵 푛 푛 1 1 270 −9.5 = 1푒5 ∗ exp (13000 ( − ) ( ) (5.1) 31 70 550

By increasing the temperature and voltage, the capacitors aging can be accelerated and the number of hours to reach end-of-life decreases dramatically. If the temperature was 100°C with a voltage of 550 V, the number of hours to reach end-of-life is only 4.74 x103. Capacitors 1 and 2 were aged using Si devices for 600 hours while capacitors 3 and 4 were aged for 600 hours using SiC devices. During aging, the capacitors reached an external temperature of 36 °C for the Si setup and 31 °C for the SiC, each with an RMS current of 13 A. Due to the difficulty in experimentally finding the heat transfer coefficient for a capacitor, the manufacturer provided equations were used to estimate the loss and temperature rise of the capacitor in steady state conditions. The losses are broken down into dielectric loss (Pd) and thermal loss (Pt). Dielectric loss is dependent on frequency, capacitance (C) and the peak-to-peak ripple voltage (Vpp). Thus Pd is given in Eq. (5.2) as, 1 푃 = 퐶푉2 ∗ 푓 ∗ 2 ∗ 10−4. (5.2) 푑 2 푝푝 Thermal loss is dependent on the series resistance and the RMS current through the capacitor 2 푃푡 = 푅푒푠푟퐼푟푚푠 (5.3)

Adding the losses together and multiplying the sum by the thermal resistance (RTH) results in a change in temperature (5.3) of 11.5 °C.

∆℃ = (푃푑 + 푃푡)푅푇퐻 (5.4) This compares well with the measured temperatures of the capacitors from the ambient temperature of 20 °C.

The measured waveform for the capacitor current is shown in Fig. 5.13. The capacitor current could not be directly measured due to the layout of the PCB, so the two inductor currents were measured and then post processed to determine the capacitor current. When the switch is on, the capacitor current equals the negative of the current though L2, and when the switch is off the capacitor current is equal to the current through

L1.

Figure 5.11 Capacitor Current for SEPIC Converter. The devices in the SEPIC converter reached the temperatures listed in Table 5-3 at steady state with an RMS current of 18 A (Fig 5.14). The currents shown in Fig 5.14 are the same for both the Si devices and the SiC devices. The Si devices do have a higher temperature due to the larger loss they exhibit. Table 5-3 Measured Device Temperatures at Steady State

Temperature Si IGBT 61°C Si Diode 34°C SiC MOSFET 47°C SiC Diode 33°C

Figure 5.12 MOSFET and Diode Current for SEPIC Converter. The devices used to age the capacitors for 600 hours were re-evaluated for their dv/dt after the aging process to determine if there was any change in their behaviour (Table 5-4). Table 5-4 Post Aging Device dv/dt measurement

Turn On Turn Off Si IGBT 8.5 V/ns 7.1 V/ns Si Diode 7.9 V/ns 9.8 V/ns SiC MOSFET 12.1 V/ns 9.9 V/ns SiC Diode 12.7 V/ns 15.0 V/ns

While all the times for the devices seem to have decreased slightly, none of the changes are very large. These measurements were also taken at a lower VDS compared to the original measurements, due to higher overshoot with the converters cascaded. With more hours of run time these devices may change further.

Chapter 6 Future Work and Conclusion

Section 6.1 Conclusion

In this thesis, EMI is proposed as a diagnostic tool for the airline industry. With the increased use of WBG devices, it is important to understand the effect on the lifetime passive circuit components. In Chapter 2, the differences in SiC and Si devices were presented as well as how metalized film capacitors age. To speed the aging rate of capacitors, the use of both the Ćuk and SEPIC topologies were discussed. Chapter 3 contains a review of EMI and how it has previously been used as a diagnostic tool, as well as the implementation of a method to model how an inverter’s DC link capacitor affects the differential mode noise. In Chapter 4, both the Ćuk and the SEPIC converter are designed for the aging of capacitors. Both topologies were simulated in PSIM. The power loss of both converters with Si and SiC power devices were found. In Chapter 5, the converters designed in Chapter 4 were tested and the dv/dt of the IGBT, MOSFET and diodes were found. For the SEPIC, the SiC converter has faster switching when compared to that of the Si. This will subject the capacitor to higher order harmonics than the Si. The capacitors used in the converters were then evaluated for any detectable difference in the aging rate with no difference found. Section 6.2 Future Work:

With the capacitors aged for 600 hours no difference in impedance observed. The capacitors need to be aged for more hours to see if any information can be concluded beyond the fact that a faster aging method is needed. If no results are found within 1000 hours, a new method for aging capacitors needs to be established. One potential method to age the capacitors is to use a hotplate to artificially cause higher heating in the capacitors as well as increasing the voltage across, them thereby increasing the aging rate. The aged capacitors should be tested in a three-phase inverter to see if any difference in the conducted EMI can be established. The measured results should be compared with the model to evaluate the fidelity of it. If the model is in accurate it will have to be reformed.

Another concern with the current aging setup is if one of the cascaded SEPIC converters fails, the others remain in operation. This can lead to a build-up of voltage on the large electrolytic capacitors potentially causing a catastrophic failure. In order for the test setup to be run unattended, a safety circuit needs to be designed that will interface with both the Digital Signal Processor (DSP) controlling the device operation and the emergency shut off for the main DC voltage supply. This will ensure that if a device fails the rest of the system is protected. A discharge circuit would also be beneficial in this case so high voltage does not remain on the outputs. A potentially interesting study could be conducted on the semiconductor devices in this experiment to evaluate how their parameters change with aging. The devices could be evaluated with a curve tracer prior to and during aging to evaluate any changes in their performance. The only complication with this is the removal of the devices from the PCB. Methods of soldering and de-soldering from the board can damage the PCB, so an interfacing component is needed. This can cause another issue in increasing the stray inductance in the circuit, leading to higher ringing on the switching devices. Performing additional EMI testing with the SEPIC converters before aging and after aging different components can be evaluated for their impact on the conducted emissions. These measurements can be done with aged devices and new capacitors, as well as old ones due to the modular in nature of the capacitors. The impact of the capacitors can also be established with a similar method.

References:

[1] International Air Transport Association, Airline Maintenance Cost Executive Commentary, Montreal CA: Maintenance Cost Task Force, 2015.

[2] U. PeriyarSelvam et al., “Analysis on Costs for Aircraft Maintenance,” Analysis on Costs for Aircraft Maintenance, vol. 3, no. 3, pp 177-182, 2013.

[3] Geoff Klempner; Isidor Kerszenbaum, "Generator Auxiliary Systems," in Operation and Maintenance of Large Turbo-Generators , Wiley-IEEE Press, 2004.

[4] D. Hoppock and S. Adair,” The Uncertain Future of Nuclear Power in the Southeast: Implications of an Aging Fleet for Electricity Sector Planning and Emissions,” in Duke Nicholas Institute Policy Brief, Duke University, Jan. 2017.

[5] J. E. Timperley and J. M. Vallejo, "Condition Assessment of Electrical Apparatus With EMI Diagnostics," in IEEE Trans. on Ind. App., vol. 53, no. 1, pp. 693-699, Jan.-Feb. 2017.

[6] Rohm Semiconductor, “SiC Power Devices and Modules,” Application Note, Aug. 2014.

[7] M. H. El-Husseini, P. Venet, A. Al-Majid, M. Fathallah, G. Rojat, and J. A. Ferreira, “Manufacturing technology effect on current pulse handling performance of metallized polypropylene film capacitors,” J. Phys. D: Appl. Phys., vol. 36, p. 2295–2303, 2003.

[8] D. F. Taylor, “On the mechanism of aluminum corrosion in metallized film AC capacitors,” IEEE Trans. Elect. Insul., vol. EI-19, no. 4, pp. 288–293, Aug. 1984.

[9] R. W. Brown, "Linking corrosion and catastrophic failure in low-power metallized polypropylene capacitors," in IEEE Trans. on Device and Materials Rel., vol. 6, no. 2, pp. 326- 333, June 2006.

[10] B. J. Baliga, “Gallium nitride devices for power electronic applications ” in Semiconductor Science and Technology, vol. 28, no. 7, pp. 1-8, July 2013.

[11] Mitsubishi Electric. SiC Power Modules. May 2015. URL: http://www.mitsubishielectric. com/semiconductors/catalog/pdf/sicpowermodule_e_201505.pdf (visited on 09/09/2015).

[12] Mitsubishi Electric. Mitsubishi Electric Installs Railcar Traction System with All-SiC Power Modules on Shinkansen Bullet Trains. June 2015.

[13] H Amano et al., “The 2018 GaN power electronics roadmap,” Journal of Physics D: Applied Physics, vol. 51, 2018.

[14] N. Ikeda et al., “GaN power transistors on Si substrates for switching applications,” in Proc. of the IEEE, vol. 98, no. 7, pp. 1151-1161, July 2010.

[15] B. Hughes et al., “Normally-off GaN switching 400 V in 1.4 ns using an ultralow resistance and inductance gate drive,” in IEEE Workshop on Wide Bandgap Power Devices and App. (WiPDA), 2013, Columbus, OH, Oct. 27-29, 2013, pp. 76-79.

[16] X. Gong and J. A. Ferreira, "Investigation of Conducted EMI in SiC JFET Inverters Using Separated Heat Sinks," in IEEE Trans. on Ind. Electron., vol. 61, no. 1, pp. 115-125, Jan. 2014.

[17] M. Liang, T. Q. Zheng and Y. Li, "Performance evaluation of SiC MOSFET, Si CoolMOS and IGBT," 2014 International Power Electronics and Application Conference and Exposition, Shanghai, 2014, pp. 1369-1373.

[18] M. Esposto, A. Chini, and S. Rajan, “Analytical model for power switching ganbased hemt design,” in IEEE Trans. Electron. , vol. 58, no. 5, pp. 1456-1461, May 2011.

[19] R. Singh and S. Sundaresan, "Fulfilling the Promise of High-Temperature Operation with Silicon Carbide Devices: Eliminating bulky thermal-management systems with SJTs," in IEEE Power Electron. Mag., vol. 2, no. 1, pp. 27-35, March 2015.

[20] H. Wang and F. Blaabjerg, “Reliablity of Capacitors for DC-Link Applications in Power Electronic Converters- An Overview,” in IEEE Trans. on Ind. Appl., vol. 50, no. 5, pp.3569- 3578, Sept.-Oct. 2014.

[21] A. Wechsler, B. C. Mecrow, D. J. Atkinson, J. W. Bennett, and M. Benarous, “Condition monitoring of DC-link capacitors in aerospace drives,” in IEEE Trans. Ind. Appl., vol. 48, no. 6, pp. 1866–1874, Nov./Dec. 2012.

[22] N. Nagel, "Challenges of the More Electric Aircraft [Viewpoint]," in IEEE Electrification Mag., vol. 2, no. 4, pp. 48-46, Dec. 2014.

[23] R. Orsagh, D. Brown, M. Roemer, T. Dabnev, and A. Hess, “Prognostic health management for avionics system power supplies,” in Proc. IEEE Aerosp. Conf., 2005, pp. 3585–3591.

[24] Z. Kun, P. Ciufo, and S. Perera, “Rectifier capacitor filter stress analysis when subject to regular voltage fluctuations,” in IEEE Trans. Power Electron., vol. 28, no. 7, pp. 3627–3635, Jul. 2013

[25] G. Terzulli and B. Peace, “Film technology to replace electrolytic technology,” May 26, 2011. [Online]. Available: http://www.avx.com/docs/ techinfo/filmtech.pdf

[26]M. Hao and W. Linguo, “Fault diagnosis and failure prediction of aluminum electrolytic capacitors in power electronic converters,” in Proc. 31st Annu. IEEE IECON, 2005, p. 6, pp..

[27] K.-W. Lee, M. Kim, J. Yoon, S. B. Lee, and J.-Y. Yoo, “Condition monitoring of DC-link electrolytic capacitors in adjustable-speed drives,” in IEEE Trans. Ind. Appl., vol. 44, no. 5, pp. 1606–1613, Sep./Oct. 2008.

[28] N. Venkat, T. D. Dang, Z. Bai, V. K. McNier, J. N. DeCerbo, B.-H. Tsao, and J. T. Stricker, “High temperature polymer film dielectrics for aerospace power conditioning capacitor applications,” Mater. Sci. Eng. B, vol. 168, pp. 16–21, 2010.

[29] M. Makdessi, A. Sari, P. Venet, P. Bevilacqua and C. Joubert, "Accelerated Ageing of Metallized Film Capacitors Under High Ripple Currents Combined With a DC Voltage," in IEEE Trans. on Power Electron., vol. 30, no. 5, pp. 2435-2444, May 2015.

[30] A. Yializis, S. W. Cichanowski and D. G. Shaw, "Electrode corrosion degradation in metallized polypropylene capacitors," 1980 IEEE International Conference on Electrical Insulation, Howard Johnson 57 Park Plaza Hotel, Boston, MA, USA, 1980, pp. 89-93.

[31] M. Baumann, "The Self-Healing Effect in Metallized Capacitors With Synthetic Dielectrics", Bauelemente Elektrotechnik, Vol. 12, No. 3, p. 42, 1977.

[32] M. L. Gasperi, "Life prediction modeling of bus capacitors in AC variable-frequency drives," in IEEE Trans. on Ind. Appl., vol. 41, no. 6, pp. 1430-1435, Nov.-Dec. 2005.

[33] Y. Chen, H. Li, F. Lin, F. Lv, Z. Li and M. Zhang, "Effect of interlayer air on performance of dry-type metalized film capacitor in DC, AC and pulsed applications," in IEEE Trans. Dielectr. Electr. Insul., vol. 18, no. 4, pp. 1301-1306, August 2011.

[34] C. W. Reed and S. W. Cichanowski, “The fundamentals of aging in HV polymer-film capacitors,” in IEEE Trans. Dielect. Elect. Insul., vol. 1, no. 5, pp. 904–922, Oct. 1994.

[35] A. Schneuwly, P. Groning, L. Schlapbach, C. Irrgang, and J. Vogt, “Breakdown behavior of oil impregnated polypropylene as dielectric in film capacitors,” in IEEE Trans. Dielectr. Electr. Insul., vol. 5, no. 6, pp. 862–868, Dec. 1998.

[36] R. W. Brown, "Linking corrosion and catastrophic failure in low-power metallized polypropylene capacitors," in IEEE Trans. Device Mater. Rel, vol. 6, no. 2, pp. 326-333, June 2006.

[37] M. H. El-Husseini, P. Venet, A. Al-Majid, M. Fathallah, G. Rojat, and J. A. Ferreira, “Manufacturing technology effect on current pulse handling performance of metallized polypropylene film capacitors,” J. Phys. D: Appl. Phys., vol. 36, p. 2295–2303, 2003.

[38] D. F. Taylor, “On the mechanism of aluminum corrosion in metallized film AC capacitors,” in IEEE Trans. Elect. Insul., vol. EI-19, no. 4, pp. 288–293, Aug. 1984.

[39] M. H. El-Husseini, P. Venet, G. Rojat, and M. Fathallah, “Effect of the geometry on the aging of metalized polypropylene film capacitors,” in Proc. IEEE 32nd Annu. Power Electron. Spec. Conf., Jun. 2001, vol. 4, pp. 2061–2066.

[40] M. Horák and P. Mach, "Study of thermal ageing of polypropylene film capacitors," 2015 IEEE 21st International Symposium for Design and Technology in Electronic Packaging (SIITME), Brasov, 2015, pp. 57-60.

[41] E. Overton, A. Hammoud, E. D. Baumann and I. T. Myers, "Thermal aging effects on the electrical properties of film and ceramic capacitors," in Proc. of Electrical/Electronics Insulation Conference, Chicago, IL, 1993, pp. 201-205.

[42] Gallay, Roland. (2014). Metallized Film Capacitor Lifetime Evaluation and Failure Mode Analysis.

[43] G. C. Montanari and D. Fabiani, "Searching for the factors which affect self-healing capacitor degradation under non-sinusoidal voltage," in IEEE Trans. Dielectr. Electr. Insul., vol. 6, no. 3, pp. 319-325, Jun 1999.

[44] M. Tushar, “Comparative study on DC-DC Converters”, BRAC University, 2012.

[45] S. Cuk, “Modelling, analysis and design of switching converters,” Ph.D. dissertation, California Institute of Technology, Nov. 1976. Also, NASA Report CR-135 L74.

[46] J. Falin, “Designing DC/DC converters based on SEPIC topology,” Analog Applications Journal, pp.18-23,2008.

[47] B. Singh, S. Singh, A. Chandra and K. Al-Haddad, "Comprehensive Study of Single-Phase AC-DC Power Factor Corrected Converters With High-Frequency Isolation," in IEEE Trans. Ind. Informat., vol. 7, no. 4, pp. 540-556, Nov. 2011.

[48] A. Hesener, “Electromagnetic Interference (EMI) in Power Supplies,” In Fairchild Semiconductor Power Seminar, 2010, pp. 1-16.

[49] R. T. Harrold, F. T. Emery, F. J. Murphy and S. A. Drinkut, "Radio Frequency Sensing of Incipient Arcing Faults within Large Turbine Generators," in IEEE Trans. Power App. Syst., vol. PAS-98, no. 4, pp. 1167-1173, July 1979.

[50] F. T. Emery and R. T. Harrold, "On Line Incipient ARC Detection in Large Turbine Generator Stator Winding," in IEEE Trans. Power App. Syst., vol. PAS-99, no. 6, pp. 2232- 2240, Nov. 1980.

[51] I. Cadirci, B. Saka and Y. Eristiren, "Practical EMI-filter-design procedure for high- power high-frequency SMPS according to MIL-STD 461," in IEEE Procs. - Electric Power Appl., vol. 152, no. 4, pp. 775-782, 8 July 2005.

[52] H. W. Ott, "Electromagnetic Compatibility" in , Wiley, 2009.

[53] Chingchi Chen and Xingyi Xu, “Modeling the conducted EMI emission of an electric vehicle (EV) traction drive,” 1998 IEEE EMC Symposium. International Symposium on

Electromagnetic Compatibility. Symposium Record (Cat. No.98CH36253), Denver, CO, USA, 1998, pp.796-801 vol.2. [54] CISPR 25: Vehicles, Boats and Internal Combustion Engines-Radio Disturbance Characteristics—Limits and Methods of Measurements for the Protection of On-board Receivers, IEC, third ed., 2008.

[55]C. DiMarino, “High Temperature Characterization and Analysis of Silicon Carbide (SiC) Power Semiconductor Transistors,” Virginia: Virginia Polytechnic Institute,2014.

[56] Ting Guo, D. Y. Chen and F. C. Lee, "Separation of the common-mode- and differential- mode-conducted EMI noise," in IEEE Trans. Power Electron., vol. 11, no. 3, pp. 480-488, May 1996.

[57] F. T. Emery and R. T. Harrold, “On line incipient arc detection in large turbine generator stator windings,” in IEEE Trans. Power App. Syst., vol. PAS-99, no. 6, pp. 2232– 2240, Nov./Dec. 1980.

[58] J. E. Timperley and E. K. Chambers, “Locating defects in large rotating machines and associated electrical systems through EMI diagnostics,” in Proc. 34th Session CIGRE, Paris, France, Sep. 1992, pp. 11–311.

[59] J. T. Phillipson, “Experience with RF techniques in the petrochemical industry,” in Proc. 4th Int. Conf. Generator Motor Partial Discharge Testing, Houston, TX, USA, May 1996.

[60] F. Born et al., “Apparatus and method to detect corrosion in metal junctions,” U. S. Patent 09,450,459, 29 Nov., 1999.

[61] Cree. “CAS120M12BM2 1.2kV, 13 mΩ All-Silicon Carbide Half-Bridge Module,” CAS120M12BM2 Datasheet, 2014. [Online] Available: https://www.wolfspeed.com/downloads/dl/file/id/179/product/100/cas120m12bm2.pd f

[62] Mitsubishi. (2009, Feb.). “CM200DY-24A High Power Switching Use,” [Online] Available: https://www.mitsubishielectric-mesh.com/products/pdf/cm200dy-24a_e.pdf

[63] St. “STGW80H65FB Trench gate field-stop IGBT, HB series 650 V, 80 A high speed,” STGW80H65FB Datasheet, 2017. [Online] Available: https://www.st.com/resource/en/datasheet/stgw80h65fb.pdf

[64] Infineon. “IDW75E60 Fast Switching Emitter Controlled Diode,” IDW75E60 Datasheet, 2013. [Online] Available: https://www.infineon.com/dgdl/Infineon-IDW75E60-DS- v02_02-en.pdf?fileId=db3a304412b407950112b438de4f6bbe

[65] Rohm. “SCT3022AL N-channel SiC power MOSFET,” SCT3022AL Datasheet, 2018. [Online] Available: https://www.rohm.com/datasheet/SCT3022AL

[66] Infineon. “IDW30G65C5 5th Generation thinQ! SiC Schottky Diode,” IDW30G65C5 Datasheet, 2013. [Online] Available: https://www.infineon.com/dgdl/Infineon- IDW30G65C5-DS-v02_02-en.pdf?fileId=db3a30433899edae0138a4b3a2b221ca

[67] Magnetics. “Magnetics Powder Core Catalogue,” 2017. [Online] Available: https://www.mag-inc.com/Media/Magnetics/File-Library/Product%20Literature/Powder %20Core%20Literature/2017-Magnetics-Powder-Core-Catalog.pdf

[68] AVX. “FE52N6J0506KB Medium Power Film Capacitors,” FE52N6J0506KB Datasheet, 2015. [Online] Available: http://datasheets.avx.com/fe.pdf

Appendix:

Matlab varying current code using in Chapter 3.2: clear close all tic fc=60; fs=20000; wc=2*pi*fc; t=0:5.0050e-05:2/fc; x=abs(sin(wc*t)*20); % figure % plot(t,x) % title('Sine Current') current=[0,5,10,15,20 rt=[1,7,13,19,26]; ft=[60,47,31,25,20]; for k=1:length(x) sampleRt(k)=round(interp1(current,rt,x(k))); sampleFt(k)=round(interp1(current,ft,x(k))); end % figure % plot(t,sampleRt,t,sampleFt) % title('Rt,Ft vs t') % legend('Rt','Ft')

Tr=16E-9; Tf=51E-9; %Tf=16E-9;

Ton=25E-6; T=1/fs; Toff=T-Ton-Tr-Tf; peakC=20; index=1; for n=1:length(x) Tr=sampleRt(n)*10^-9; Tf=sampleFt(n)*10^-9; onslope=peakC/Tr; offslope=peakC/Tf; for y=0:1E-9:T if y<=T/4-Tr c(index)=0; elseif y>T/4-Tr && y<=T/4 if(c(index-1)+onslope/(10^9)>=10) c(index)=peakC;

else c(index)=c(index-1)+onslope/(10^9); end elseif y<=(3*T/4) && y>T/4 c(index)=peakC; elseif y>(3*T/4) && y<=((3*T/4+Tf)) if(c(index-1)-offslope/(10^9)<0) c(index)=0; else c(index)=c(index-1)-offslope/(10^9); end

elseif y>((3*T/4+Tf)) && y<=T c(index)=0; else c(index)=20; end index=index+1;

end end tnew=linspace(0,T*length(x),index-1); figure plot(tnew,c) title('Current pulses with varied rt,ft','FontSize',24) xlabel('Time','FontSize',20) ylabel('Current','FontSize',20) xlim([0,.001]) ylim([-1,21])

FS=1/(1E-9); f=round(0:FS/length(c):FS/2,-1); xdft=20*log10(abs(fft(c)/length(c))/1E-6); temp=20*log10(fft(c)/length(c)/1E-6); temp=temp(1:length(c)/2+1); xdft=xdft(1:length(c)/2+1); index=find(f>30000000,1,'first'); xdft=xdft(1:index); temp=temp(1:index); f=f(1:index); figure loglog(f,abs(xdft)) title('FFt of Current waveforms','FontSize',24) xlabel('Hz','FontSize',20); ylabel('dbuv','FontSize',20) xlim([1e3 3.1e7]) ylim([1e-2 1e3])

% get odd harmonics from resulting spectrum count=1; for a=1:length(xdft) hopefq(count)=f(a); all(count)=xdft(a); count=count+1; 67 end count=1; for a=1:2:1500 fsample(count)=20000*a; oddharm(count)=xdft(1+667*a); count=count+1; end count=1; for a=2:2:1500 fsampleeve(count)=20000*a; evenharm(count)=xdft(1+667*a); count=count+1; end figure subplot(2,1,1) loglog(f,abs(xdft)) title('FFt of Current waveforms') xlabel('Hz'); ylabel('dbuv') legend('Matlab') xlim([1e3 3.1e7]) subplot(2,1,2) loglog(fsample,oddharm,'*',fsampleeve,evenharm,'*') legend({'Odd','Even'},'Location','SouthWest') xlim([1e3 3.1e7])

%% calculate Z at all R1=50; R2=50; L1=1.6E-6; L2=1.3E-6; C1=10E-12; Resr=.005; Resr2=.01; Lesl=35E-9; Ccap=50E-6; Ccap2=40E-6; clear i count =1; for j=1:length(hopefq)% becuase the data for both the current soruce methods are 100Hz spaced we do the same for this freq_all(count)=hopefq(j); w=2*pi*freq_all(count); S=2i*w; Z1(count)=R1+S*L1; Z2(count)=R2+S*L2; Z3(count)=(Z1(count)*1/(S*C1))/(Z1(count)+1/(S*C1)); Z4(count)=(Z2(count)*1/(S*C1))/(Z2(count)+1/(S*C1)); Z5_1(count)=Resr+S*Lesl+1/(S*Ccap); Z5_2(count)=Resr2+S*Lesl+1/(S*Ccap2); Z6(count)=Z3(count)+Z4(count); ZT(count)=((Z6(count))*(Z5_1(count)))/(Z6(count)+Z5_1(count)); ZT2(count)=((Z6(count))*(Z5_2(count)))/(Z6(count)+Z5_2(count)); count=count+1;

68 end

% current div to find I_p I_n and then Vp Vn Vz3_1=Z3.*(Z5_1./(Z3+Z4+Z5_1)); Vz4_1=Z4.*(Z5_1./(Z3+Z4+Z5_1)); Vp_1=(R1./Z1).*(Vz3_1);% find Vp and Vn for the first "new" case Vn_1=(R1./Z2).*(-Vz4_1);

Vdm1=(Vp_1-Vn_1)/2; for n=1:length(freq_all) Vp_1_test(n)=Vp_1(n)*all(n); Vn_1_test(n)=Vn_1(n)*all(n); end domain_all=((Vp_1_test-Vn_1_test)./2);% the resulting for spectrum for matlab Vdm clear Z1 Z2 Z3 Z4 Z5_1 Z5_2 Z6 ZT ZT2 Vz3_1 Vz4_1 Vp_1 Vn_1 Vdm1 Vp_1_test Vn_1_test %% calculate Z at odd order harmonics R1=50; R2=50; L1=1.6E-6; L2=1.3E-6; C1=10E-12; Resr=.005; Resr2=.01; Lesl=35E-9; Ccap=50E-6; Ccap2=40E-6; clear i count =1; for j=1:length(fsample)% becuase the data for both the current soruce methods are 100Hz spaced we do the same for this freqodd(count)=fsample(j); w=2*pi*freqodd(count); S=2i*w; Z1(count)=R1+S*L1; Z2(count)=R2+S*L2; Z3(count)=(Z1(count)*1/(S*C1))/(Z1(count)+1/(S*C1)); Z4(count)=(Z2(count)*1/(S*C1))/(Z2(count)+1/(S*C1)); Z5_1(count)=Resr+S*Lesl+1/(S*Ccap); Z5_2(count)=Resr2+S*Lesl+1/(S*Ccap2); Z6(count)=Z3(count)+Z4(count); ZT(count)=((Z6(count))*(Z5_1(count)))/(Z6(count)+Z5_1(count)); ZT2(count)=((Z6(count))*(Z5_2(count)))/(Z6(count)+Z5_2(count)); count=count+1; end

% current div to find I_p I_n and then Vp Vn Vz3_1=Z3.*(Z5_1./(Z3+Z4+Z5_1)); Vz4_1=Z4.*(Z5_1./(Z3+Z4+Z5_1)); Vp_1=(R1./Z1).*(Vz3_1);% find Vp and Vn for the first "new" case

Vn_1=(R1./Z2).*(-Vz4_1);

Vz3_2=Z3.*(Z5_2./(Z3+Z4+Z5_2)); Vz4_2=Z4.*(Z5_2./(Z3+Z4+Z5_2)); Vp_2=(R1./Z1).*(Vz3_2); Vn_2=(R1./Z2).*(-Vz4_2);

Vdm1=(Vp_1-Vn_1)/2; for n=1:length(freqodd) Vp_1_test(n)=Vp_1(n)*oddharm(n); Vn_1_test(n)=Vn_1(n)*oddharm(n); Vp_2_test(n)=Vp_2(n)*oddharm(n); Vn_2_test(n)=Vn_2(n)*oddharm(n); end domainodd=((Vp_1_test-Vn_1_test)./2);% the resulting for spectrum for matlab Vdm domainodd2=((Vp_2_test-Vn_2_test)./2); %% calculate Z at even order harmonics R1=50; R2=50; L1=1.6E-6; L2=1.3E-6; C1=10E-12; Resr=.005; Resr2=.01; Lesl=35E-9; Ccap=50E-6; Ccap2=40E-6; clear i count =1; for j=1:length(fsampleeve)% becuase the data for both the current soruce methods are 100Hz spaced we do the same for this freqeven(count)=fsample(j); w=2*pi*freqeven(count); S=2i*w; Z1(count)=R1+S*L1; Z2(count)=R2+S*L2; Z3(count)=(Z1(count)*1/(S*C1))/(Z1(count)+1/(S*C1)); Z4(count)=(Z2(count)*1/(S*C1))/(Z2(count)+1/(S*C1)); Z5_1(count)=Resr+S*Lesl+1/(S*Ccap); Z5_2(count)=Resr2+S*Lesl+1/(S*Ccap2); Z6(count)=Z3(count)+Z4(count); ZT(count)=((Z6(count))*(Z5_1(count)))/(Z6(count)+Z5_1(count)); ZT2(count)=((Z6(count))*(Z5_2(count)))/(Z6(count)+Z5_2(count)); count=count+1; end

% current div to find I_p I_n and then Vp Vn Vz3_1=Z3.*(Z5_1./(Z3+Z4+Z5_1)); Vz4_1=Z4.*(Z5_1./(Z3+Z4+Z5_1)); Vp_1=(R1./Z1).*(Vz3_1);% find Vp and Vn for the first "new" case Vn_1=(R1./Z2).*(-Vz4_1);

Vdm1=(Vp_1-Vn_1)/2; for n=1:length(freqeven) Vp_1_test(n)=Vp_1(n)*evenharm(n); Vn_1_test(n)=Vn_1(n)*evenharm(n); end domaineven=((Vp_1_test-Vn_1_test)./2);% the resulting for spectrum for matlab Vdm clear Z1 Z2 Z3 Z4 Z5_1 Z5_2 Z6 ZT ZT2 %% plot spectrums figure% plot of matlab new and aged cases against one another subplot(2,1,1) loglog(freqodd,abs(domainodd),freqeven,abs(domaineven)) grid on xlabel('Hz','FontSize',20) ylabel('Magnitude','FontSize',20) title('Model Spectrum Matlab','FontSize',24) legend({'odd','even'},'FontSize',20,'Location','SouthWest') xlim([1e3 3.1e7]) subplot(2,1,2) loglog(fsample,oddharm,'*',fsampleeve,evenharm,'*') grid on xlabel('Hz','FontSize',20) ylabel('Magnitude','FontSize',20) legend({'Odd','Even'},'Location','SouthWest') xlim([1e3 3.1e7]) figure loglog(freq_all,abs(domain_all)) title('Fq Spectrum','FontSize',24) grid on xlabel('Hz','FontSize',20) ylabel('Magnitude','FontSize',20) xlim([1e3 3.1e7])

figure loglog(freqodd,abs(domainodd),freqodd,abs(domainodd2)) grid on xlabel('Hz','FontSize',20) ylabel('Magnitude','FontSize',20) title('Model Spectrum Matlab','FontSize',24) legend({'New','Old'},'FontSize',20,'Location','SouthEast') toc

Schematics for SEPIC Converters: