NEUTRAMS: Neural Network Transformation and Co-design under Neuromorphic Hardware Constraints Yu Ji ∗, YouHui Zhang∗‡, ShuangChen Li†,PingChi†, CiHang Jiang∗,PengQu∗,YuanXie†, WenGuang Chen∗‡ Email:
[email protected],
[email protected] ∗Department of Computer Science and Technology, Tsinghua University, PR.China † Department of Electrical and Computer Engineering, University of California at Santa Barbara, USA ‡ Center for Brain-Inspired Computing Research, Tsinghua University, PR.China Abstract—With the recent reincarnations of neuromorphic (CMP)1 with a Network-on-Chip (NoC) has emerged as a computing comes the promise of a new computing paradigm, promising platform for neural network simulation, motivating with a focus on the design and fabrication of neuromorphic chips. many recent studies of neuromorphic chips [4]–[10]. The A key challenge in design, however, is that programming such chips is difficult. This paper proposes a systematic methodology design of neuromorphic chips is promising to enable a new with a set of tools to address this challenge. The proposed computing paradigm. toolset is called NEUTRAMS (Neural network Transformation, One major issue is that neuromorphic hardware usually Mapping and Simulation), and includes three key components: places constraints on NN models (such as the maximum fan- a neural network (NN) transformation algorithm, a configurable in/fan-out of a single neuron, the limited range of synaptic clock-driven simulator of neuromorphic chips and an optimized runtime tool that maps NNs onto the target hardware for weights) that it can support, and the hardware types of neurons better resource utilization. To address the challenges of hardware or activation functions are usually simpler than the software constraints on implementing NN models (such as the maximum counterparts.