Picoblaze Software Development with Fidex PLC2 Days 2014 2 / 49 the Picoblaze Family

Xilinx PicoBlazeTM software development with FIDExTM

All Programmable PLC2 Days 2014

Christoph Fauck

www.fautronix.com

Version 0.4 Outline

 Introduction to the PicoBlaze family

 Why using assembler  Introduction to FIDEx

 Connecting logic to a PicoBlaze  Using FIDEx with examples

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 2 / 49 The PicoBlaze family

PicoBlaze family member Xilinx FPGA / CPLD family

PicoBlaze 6 Spartan-6, Virtex-6 and newer FPGAs

PicoBlaze 3 Spartan-3, Virtex-II, Virtex-II Pro, Virtex 4 and newer FPGAs

PicoBlaze II Virtex-II FPGAs

PicoBlaze Virtex-E and Spartan-II/IIE FPGAs

PicoBlaze CPLD CoolRunner-II CPLDs

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 3 / 49 The PicoBlaze in detail

int intAck s s e

r Port d

d Program

a address, Counter dtaWr, (PC) Register dtaWrEn, bank dtaRd, Instruction dtaRdAck Memory Call (PROM) n ALU o i

t stack Scratch pad c

u Memory r t s n i Instruction decoder Flags: Z, C

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 4 / 49 PicoBlaze compared

Features PicoBlaze PicoBlaze PicoBlaze PicoBlaze PicoBlaze 6 3 II CPLD IO ports 256 256 256 256 256 Register count 2 x 16 16 32 16 8 Scratchpad 64/128/256 64 0 0 0 size in Bytes Callstack size 30 31 31 15 4 Program size 1024/ 1024 1024 256 256 in instructions 2048/ 4096

Cycles per 2 2 2 2 2 instruction Interrupt count 1 1 1 1 1

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 5 / 49 Why using Assembler

● Assembler in VHDL simulator easily traceable, C only troublesome

● C in some things easier and clearer (loops, function calls)

● Limits of the hardware more transparent in assembler (e.g. register count) ● Runtimes clearly defined in assembler, compiler dependent in C ● For very small processors similar coding effort

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 6 / 49 FIDEx

FIDEx is an IDE for developing manufacturer platform independent assembler code. It contains

● a project manager ● a simulator supporting several processors ● a coding editor ● an extensive online ● a source navigator manual ● a multi-pass assembler supporting several ● a message viewer and processors ● a scripting engine

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 7 / 49 Project manager

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 8 / 49 Main window

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 9 / 49 Online help

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 10 / 49 Source navigator

Navigator items:

● Label ● Navigator instructions

;; \navConst\navConst labellabel ;; \navConst\navConst "Label"Label text"text"

;; \navHw\navHw labellabel ;; \navHw\navHw "Label"Label text"text"

;; \navSep\navSep labellabel ;; \navSep\navSep "Label"Label text"text"

;; \navGrpBegin\navGrpBegin labellabel ;; \navGrpBegin\navGrpBegin "Label"Label text"text"

;; \navGrpEnd\navGrpEnd

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 11 / 49 Templates

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 12 / 49 Import filter

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 13 / 49 The FIDEx instruction set

Category Instruction set

Program flow call, jump, ret, nop

Logic and, comp, compC, or, test, testC, xor

Arithmetic add, addC, sub, subC

Shift and rotate sl0, sl1, slx, sr0, sr1, srx, rol, rolc, ror, rorc

Move data load, loadRet, wrMem, rdMem, wrPrt, rdPrt, hwBuild, regBank, star

Interrupt int enable/disable, reti enable/disable

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 14 / 49 Directives

FIDEx supports C-style directives for defining constants, renaming processor hardware, manipulating the address mapping and so on: ● EQU

● IF, ELSEIF, ELSE and DEF ● MACRO, ENDMACRO

● NAMESPACE, ENDNAMESPACE ● ORG

● SET

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 15 / 49 EQU directives

EQU directives are used to

● define and rename constants ● rename processor hardware

;; RecusiveRecusive equationsequations #EQU#EQU equRegSubst1,equRegSubst1, equRegSubst2equRegSubst2 #EQU#EQU equRegSubst2,equRegSubst2, equSubstNumequSubstNum #EQU#EQU equSubstNum,equSubstNum, 0x010x01

;; RenamingRenaming hardwarehardware componentscomponents #EQU#EQU yourRegName,yourRegName, s0s0 #EQU#EQU yourRegBankName,yourRegBankName, AA

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 16 / 49 Project settings dialog

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 17 / 49 SET directives

SET directives are used to

● overwrite configuration dialog parameter ● set additional configuration parameter not accessible from configuration dialog

#SET#SET editor::tabWidth,editor::tabWidth, 44

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 18 / 49 SET directive namespaces

All configuration aprameter are grouped into namespaces:

Namespace Description asm Configuration parameter for assembler engine itself editor Configuration parameter for the editor instMem Configuration parameter for the instruction memory ioDev Configuration parameter for IO devices proc::xpblze6 Configuration parameter for the PicoBlaze 6 proc::xpblze3 Configuration parameter for the PicoBlaze 3 processor proc::xpblzeII Configuration parameter for the PicoBlaze II processor proc::xpblze Configuration parameter for the PicoBlaze processor proc::xpblzeCpld Configuration parameter for the PicoBlaze CPLD processor

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 19 / 49 ORG directives

ORG directives are used to affect the mapping of the assembled code to the instruction memory.

;; SetSet addressaddress ofof nextnext instructioninstruction toto 10231023 #ORG#ORG ADDR,ADDR, 10231023

;; SetSet memorymemory rangerange #ORG#ORG MEMRANGE,MEMRANGE, [SHARED,[SHARED, PAGEn]PAGEn]

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 20 / 49 Namespace directives

FIDEx supports the usage #EQU#EQU REG_workGlobal,REG_workGlobal, s0s0 of nested namespaces to #NAMESPACE#NAMESPACE AA encapsulate code #EQU#EQU REG_workA,REG_workA, ::REG_workGlobal::REG_workGlobal segments. #NAMESPACE#NAMESPACE BB

#EQU#EQU REG_workB,REG_workB, A::REG_workAA::REG_workA

LOADLOAD REG_workB,REG_workB, 0x120x12 LOADLOAD A::REG_workA,A::REG_workA, 0x340x34 LOADLOAD ::REG_workGlobal,::REG_workGlobal, 0x560x56

#ENDNAMESPACE#ENDNAMESPACE #ENDNAMESPACE#ENDNAMESPACE

LOADLOAD REG_workGlobal,REG_workGlobal, A::B::REG_workBA::B::REG_workB

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 21 / 49 Ifdef, elseif, else, endif and define directives

For the selected processor an #DEFINE#DEFINE xyzEnxyzEn implicite define will be defined: #IFDEF#IFDEF xyzEnxyzEn

youryour ifif instructionsinstructions ● PROC::XPBLZE6 #ELSEIF#ELSEIF PROC::XPblze6PROC::XPblze6

● PROC::XPBLZE3 youryour elseifelseif instructionsinstructions #ELSE ● PROC::XPBLZEII #ELSE youryour elseelse instructionsinstructions ● PROC::XPBLZE #ENDIF#ENDIF ● PROC::XPBLZECPLD

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 22 / 49 Numerics

● Hexadecimal: 0x44 or 0X44

● Decimal: 68 ● Oktal: \104

● Binary: b1000100 or B1000100

;; DefiningDefining aa constantconstant #EQU#EQU const,const, 0x12340x1234

;; AccessingAccessing thethe higherhigher bytebyte viavia indexindex LOADLOAD regWork,regWork, const[15..8]const[15..8]

;; AccessingAccessing thethe higherhigher bytebyte viavia formulaformula LOADLOAD regWork,regWork, (( constconst >>>> 88 )) && 0xFF0xFF

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 23 / 49 Endianess

● All numerics have little endianess as default

● Set to big endianess using an attribute: – 0x1234'2BE = 0x3412 – 0x12345678'4BE = 0x78563412 – 0x1234'4BE = 0x34120000

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 24 / 49 Formulas

FIDEx supports the usage of formulas. Formulas can be used in directives as well as in instructions.

Several expressions of a formula may be cascaded using brackets.

#EQU#EQU num,num, 0x330x33

#EQU#EQU expr,expr, (( (( (( numnum ++ 4)4) ** 55 )) -12-12 )) // 1010 ;; exprexpr == 0x1A0x1A

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 25 / 49 Formulas

Operators with its priorities:

Mnemonic Priority Associativity Description #EQU const, ~0xFF highest right-to-left Bitwise inversion #EQU const, 3 * 5 left-to-right Multiplication #EQU const, 10 / 2 Division #EQU const, 10 % 3 Modulo #EQU const, 2 + 3 Addition #EQU const, 5 - 3 Subtraction #EQU const, 0x0F << Shift left #EQU const, 0xF0 >> Shift right #EQU const, 0x0F & 0xF0 Bitwise and #EQU const, 0x55 ^ 0xAA Bitwise xor #EQU const, 0x0F | 0xF0 lowest left-to-right Bitwise or

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 26 / 49 Strings

The use of Strings is subjected to the following rules:

● Enclosing with "-Characters ● Encapsulating "-Characters within the string: \"

● Using a charset/default charset ● Accessing a string using indexes

Character sets are desktop sytem dependent!

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 27 / 49 Strings - Character sets

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 28 / 49 Strings - Examples

#SET#SET ASM::dfltCharset,ASM::dfltCharset, utf-8utf-8

LOADLOAD s0,s0, "A""A" LOADLOAD s0,s0, "ö""ö" ;; resultsresults inin anan errorerror

#SET#SET ASM::dfltCharset,ASM::dfltCharset, utf-8utf-8

#EQU#EQU yourStringyourString "This"This isis aa string"string"

LOADLOAD s0,s0, yourString'lenyourString'len ;; s0s0 == 1616 LOADLOAD s1,s1, yourString[0]yourString[0] ;; s1s1 == 'T''T' LOADLOAD s2,s2, yourString[8]yourString[8] ;; s2s2 == 'a''a'

#EQU#EQU anotherStringanotherString yourString'ISO-8859-1yourString'ISO-8859-1

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 29 / 49 IO device concept

IODevice VHDL file configuration

Verilog file Instructions IODevice HEX file

Arbitrary values MEM file

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 30 / 49 IO device concept

#SET#SET IODev::BRAM0::en,IODev::BRAM0::en, TRUETRUE #SET#SET IODev::BRAM0::type,IODev::BRAM0::type, memmem #SET#SET IODev::BRAM0::size,IODev::BRAM0::size, 10241024

#SET#SET IODev::BRAM0::initvalue,IODev::BRAM0::initvalue, 0x000000x00000 #SET#SET IODev::BRAM0::value,IODev::BRAM0::value, instMem[0:1023][7:0]instMem[0:1023][7:0] InstMem #SET#SET IODev::BRAM0::vhdlEn,IODev::BRAM0::vhdlEn, TRUETRUE #SET#SET IODev::BRAM0::vhdlEntityName,IODev::BRAM0::vhdlEntityName, "BRAM0""BRAM0" #SET#SET IODev::BRAM0::vhdlTmplFile,IODev::BRAM0::vhdlTmplFile, "bramTmpl.vhd""bramTmpl.vhd" #SET#SET IODev::BRAM0::vhdlTargetFile,IODev::BRAM0::vhdlTargetFile, "bram0.vhd""bram0.vhd"

IODevice BRAM0 VHDL file: bram0.vhd

IODevice BRAM1 VHDL file: bram1.vhd

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 31 / 49 IO device base configuration

#SET#SET IODev::BRAM0::en,IODev::BRAM0::en, truetrue #SET#SET IODev::BRAM0::type,IODev::BRAM0::type, memmem #SET#SET IODev::BRAM0::size,IODev::BRAM0::size, 10241024

#SET#SET IODev::BRAM0::initvalue,IODev::BRAM0::initvalue, 0x000000x00000

#SET#SET IODev::BRAM0::value,IODev::BRAM0::value, 0x01:0x01: 0x330x33 #SET#SET IODev::BRAM0::value,IODev::BRAM0::value, 0x01:0x01: 0x44,0x44, 55,55, \66\66 #SET#SET IODev::BRAM0::value,IODev::BRAM0::value, instMeminstMem #SET#SET IODev::BRAM0::value,IODev::BRAM0::value, instMem[page0]instMem[page0] #SET#SET IODev::BRAM0::value,IODev::BRAM0::value, instMem[0:2047]instMem[0:2047] #SET#SET IODev::BRAM0::value,IODev::BRAM0::value, instMem[page1][7:0]instMem[page1][7:0] #SET#SET IODev::BRAM0::value,IODev::BRAM0::value, instMem[0:1023][7:0]instMem[0:1023][7:0]

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 32 / 49 IO device output file configuration

#SET#SET IODev::BRAM0::vhdlEn,IODev::BRAM0::vhdlEn, truetrue #SET#SET IODev::BRAM0::vhdlEntityName,IODev::BRAM0::vhdlEntityName, "BRAM0""BRAM0" #SET#SET IODev::BRAM0::vhdlTmplFile,IODev::BRAM0::vhdlTmplFile, "ROM_1bank_form.vhd""ROM_1bank_form.vhd" #SET#SET IODev::BRAM0::vhdlTargetFile,IODev::BRAM0::vhdlTargetFile, "../VHDL/BRAM0.vhd""../VHDL/BRAM0.vhd"

#SET#SET IODev::BRAM0::verilogEn,IODev::BRAM0::verilogEn, truetrue #SET#SET IODev::BRAM0::verilogEntityName,IODev::BRAM0::verilogEntityName, "BRAM0""BRAM0" #SET#SET IODev::BRAM0::verilogTmplFile,IODev::BRAM0::verilogTmplFile, "ROM_1bank_form.v""ROM_1bank_form.v" #SET#SET IODev::BRAM0::verilogTargetFile,IODev::BRAM0::verilogTargetFile, "BRAM0.v""BRAM0.v"

#SET#SET IODev::BRAM0::hexEn,IODev::BRAM0::hexEn, truetrue #SET#SET IODev::BRAM0::hexTargetFile,IODev::BRAM0::hexTargetFile, "BRAM0.hex""BRAM0.hex"

#SET#SET IODev::BRAM0::memEn,IODev::BRAM0::memEn, truetrue #SET#SET IODev::BRAM0::memTargetFile,IODev::BRAM0::memTargetFile, "BRAM0.mem""BRAM0.mem" #SET#SET IODev::BRAM0::memGapStuffing,IODev::BRAM0::memGapStuffing, truetrue

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 33 / 49 Mapping an IO device to VHDL or verilog files

● Xilinx VHDL or Verilog template file

● Parity bit used as Data bit ● Supported Placeholder: – {begin template} – {projectPath} – {INIT_nn}, {INITP_nn}, ... – {projectFileName} – {projectTitle} – {entityName} – {projectComment} – {timestamp} – {projectVersion}

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 34 / 49 Mapping an IO device to VHDL or verilog files

bram:bram: RAMB16_S18RAMB16_S18

generic map ( Block RAM generic map (

INIT_00 => X"{INIT_00}",

e INIT_01INIT_01 =>=> X"{INIT_01}",X"{INIT_01}", g

n INIT_02INIT_02 =>=> X"{INIT_02}",X"{INIT_02}", a

r INIT_03 => X"{INIT_03}", INIT INIT_03 => X"{INIT_03}",

IODevice t i INIT_04 => X"{INIT_04}",

b INIT_04 => X"{INIT_04}", INITP Data bit INIT_05 => X"{INIT_05}", y INIT_05 => X"{INIT_05}", t

i range r INIT_06INIT_06 =>=> X"{INIT_06}",X"{INIT_06}", a INIT_07 => X"{INIT_07}", P INIT_07 => X"{INIT_07}", ......

High Block RAM Low Block RAM

e e g g n n a a r r

[8:0]INIT

IODevice t t i i

[8:0]INITP b b Data bit Data bit y y t t

[17:9]INIT i range i range r r

[17:9]INITP a a P P

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 35 / 49 Simulating

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 36 / 49 Simulating

Simulation control

● Reset

● Set program counter from text cursor

● Simulate continuous (Run)

● Simulate next line ● Simulate next instruction

● Simulate to end of call (until next RET) ● Simulate to cursor position

● Interrupt

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 37 / 49 Connecting logic to a PicoBlaze

addr wrEn dataWr rdAck dataRd PicoBlaze int intAck Process 1 Process n

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 38 / 49 PicoBlaze to Logic

selPage:selPage: process(process( in_clkin_clk )) beginbegin ifif rising_edge(rising_edge( in_clkin_clk )) thenthen ifif in_rstin_rst == '1''1' thenthen sig_instrPageSelsig_instrPageSel <=<= (( othersothers =>=> '0''0' );); elseelse ifif sig_busAddrsig_busAddr == X"00"X"00" andand sig_busWrEnsig_busWrEn == '1''1' thenthen sig_instrPageSelsig_instrPageSel <=<= sig_busWrDtasig_busWrDta(3(3 downtodownto 0);0); endend if;if; endend if;if; endend if;if; endend processprocess selPage;selPage;

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 39 / 49 Logic to PicoBlaze statusReg:statusReg: process(process( in_clkin_clk )) variablevariable var_statusvar_status :: std_logic_vector(7std_logic_vector(7 downtodownto 0);0); beginbegin ifif rising_edge(rising_edge( in_clkin_clk )) thenthen ifif in_rstin_rst == '1''1' thenthen var_statusvar_status :=:= (( othersothers =>=> '0''0' );); elseelse sig_busRdDtasig_busRdDta <=<= (( othersothers =>=> ['0'['0' || 'Z']'Z'] ););

ifif sig_busAddrsig_busAddr == X"01"X"01" thenthen

sig_busRdDtasig_busRdDta <=<= var_status;var_status;

ifif sig_busRdAcksig_busRdAck == '1''1' thenthen var_statusvar_status :=:= (( othersothers =>=> '0''0' );); endend if;if; Bild vom Signalverlauf endend if;if;

var_statusvar_status :=:= var_statusvar_status oror in_status;in_status; endend if;if; endend if;if; endend processprocess statusReg;statusReg;

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 40 / 49 Interrupts

● You can choose whether you want to use intAck.

● The interrupt does not need to be cleared using intAck. It may applied during the complete interrupt service routine.

int

PicoBlaze intAck

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 41 / 49 Interrupts intReg:intReg: process(process( in_clkin_clk )) beginbegin ifif rising_edge(rising_edge( in_clkin_clk )) thenthen ifif in_rstin_rst == '1''1' thenthen sig_intsig_int <=<= '0';'0'; elseelse sig_intsig_int <=<= '0';'0'; sig_busRdDtasig_busRdDta <=<= (( othersothers =>=> '0''0' ););

ifif in_intin_int /=/= X"00"X"00" thenthen sig_intsig_int <=<= '1';'1'; endend if;if;

ifif sig_busAddrsig_busAddr == X"01"X"01" thenthen sig_busRdDtasig_busRdDta <=<= in_int;in_int; endend if;if; endend if;if; endend if;if; endend processprocess intReg;intReg;

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 42 / 49 Miscellaneous

● Saving power – „sleep“ signal since PicoBlaze 6 – lowPowerLoop: JUMP lowPowerLoop ● Address bus sensitive to high fanout → reducing address fanout using auto increment mechanisms

● Organizing bus addresses using a package ● Block oriented assembler coding and documentation for better overview

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 43 / 49 Generating a new project

● Generate a new project

● Generate a new source file ● Inserting a PicoBlaze skeleton template

● Add file to project during first saving ● Open config dialog and select a PicoBlaze processor

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 44 / 49 Using pages

One of the extended capabilities of Fidex is the support of instruction memory pages. intermediate CALL

Program shared shared in page0 RET range range

switch page in shared range

page0 page1 RET function in page1

function CALL

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 45 / 49 Page application examples

● Memory expansion if your program exceeds the PicoBlaze supported default memory limit

● Loading context dependent program parts from external memory to pages

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 46 / 49 Getting Help

● Online Help

● FIDEx forum on www.fautronix.com ● Otherwise contact us directly, please

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 47 / 49 Example files

All example files used in this presentation can be downloaded from our website

http://www.fautronix.com/fidex-downloads

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 48 / 49 Change log

Version 0.4

● Added this change log ● Fixed Renaming hardware components bug on page 16

● Fixed Endianess bug on page 24

All programmable PicoBlaze software development with FIDEx PLC2 days 2014 49 / 49