University of Central Florida STARS
Retrospective Theses and Dissertations
1986
Direct Sequence Spread Spectrum Acquisition Design
John C. Fakatselis University of Central Florida
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STARS Citation Fakatselis, John C., "Direct Sequence Spread Spectrum Acquisition Design" (1986). Retrospective Theses and Dissertations. 4954. https://stars.library.ucf.edu/rtd/4954 DIREX:T SEX:)UUJCE SPREAD SPE:TRUM ACQUISITIOO DESIGN
BY
JOHN C. FAK.~TSELIS B.S.E., 1983
THESIS
Sul:rnitted in partial fullfillne."'lt of the requirerrents for the degree of Ma.ster of Science in Engineering in the Graduate Studies Program of the College of Engineering University of Central Florida · Orlando, Florida
Surrrrer Tenn 1986 ABSTRACT
Spread SJ?ectrum cormrunication techniques are utilized to provide transmission of signals which have anti-jamning properties, a low probability of being intercepted, and can support a multiple-access system by servicing simultaneously a number of channels. This thesis concentrates on the receiver acquisition problem of a transmitted signal which is the output of a spread SJ?ectrum conmunication system.
The acquisition require:rrents of a spread spectrum system and also the general approaches to the problem of "active and passive correlation" are discussed. A unique general purpose all-digital acquisition hardware design is developed and described to the schematic level of detail, where specific parts and their interconnections are illus trated. The hardware design has been :rrodeled and verified using CAD tools. The hardware design developrrent and analvsis workstation used is developed by the Daisy Corporation. TABLE OF CONTENTS
LIST OF FIGURES ...... iv
ABSTRACT v
INTRODUCTION 1
SPREADING OPERATION CONCEPT AND PROPERTIES 3 A. AJ (Anti-Jarrming) . • . . • . . . . 3 B. LPI (Low Probability of Interception) 4 C. MA (Multiple Access) ...... 4
ANALYSIS OF COHERENT DIREx:T-SBJUENCE SYSTEMS ...... 6 A. Direct-Sequence Spread Binary-Phase Shift Keying . . 6 B. A Direct-Sequence Spread BPSK System Under Constant Power Broadband and ON Jamrrer . . . . . 16
PSEUDORANDOM BIT SBJUENCES ...... 22 A. :Maxima.l Length Shift Register Sequences ...... 22 B. :Maximal Length Shift Register Sequence Properties 25 C. :Maxi.rral Length Shift Register Sequence Autocorrelation and Power Spectral Density Functions 27
ACQUISITION PROBLEM FOR SPREAD SPECTRUM Ca.1MUNICATIONS . . . . . 34 A. Requirements for PN Synchronization ...... 34 B. Methods to Reduce Ti.Ire Uncertainty . . . . . 35 C. Active and Passive Acquisition Correlators . 36
ACQUISITION CIRCUIT HARDWARE DESIGN ...... 40 A. Design Definition • ...... 40 B. Interface Signal Description/Requirerrents 42 C. Functional Description ...... 43 D. Detail Design Schema.tics and Functional 45 Description E. Design Verification . . . . 52 CONCLUSION 64 BIBLICGRAPHY ...... 65
iii LIST OF FIGURE'S
1. Spreading Operation • • • 5
2. DS/BPSK Waveforms • 14
3. DS/BPSK M:xiulation • • 15
4. Uncoded DS/BPSK System • 17
5. Feedback Shift Register • • 23
6. PN Generator • • • 24
7. Fourier Transfonns • • 29
8. Autocorrelation Function of c(t) • • • • 32
9. ~1er Spectral Density of c(t) • • 33
10. Block Diagram of Single Dwell Tine PN Acquisition System • • • . . • . • 38
11. A I.aw Pass Version of a Matched Filter Aquisition System • • . • . • • . • • • 39
12. 'Ibp Level Interface Block Diagram .• 41
13. Functional Detail Block Diagram • 44
iv ,
INTRODUCTION
The object of this thesis is to give an introduction of the theoretical aspects of spread spectrum comnunications without expanding to the analysis of classical corrmunication subjects such as carrier m::>dulation/derrodulation, etc. The thesis is focused especially on the receiver acquisition problem of a spread spectrum system. A hard\vare design to meet the acquisition requirerrents is also developed, described, and verified herein. The paper begins with a description of the spreading concept, its operation and its unique properties which are anti-jamming, low probability of inter ception and multiple-access capabilities. The analysis of a coherent direct-sequence system is described by using a specific example assuming binary phase-shift keying. The example continues with the analysis of a spread spectrum signal under the effect of broadband and CW jamrrers. The spreading of the signal is achieved by mixing the desired data with a pseudorandom bit sequence (Pt-1 sequence). The
PN sequences are generated from maximal length shift registers. The hardware structure of the rra.xinal length shift registers and the properties of the PN sequences as they apply to spread spectrum corrmun ications are also described and derived. Of special interest for the acquisition problem is the autocorrelation and power spectral density of the PN sequences. The paper continues with specifics on the acqui sition problem by defining it, describing synchronization require- 2
mmts, suggesting ~thcx:ls to reduce tine tmcertainty, and briefly describing the architecture of active and passive aCXjllisition correlators.. A hardware implerrentation of an all-digital aCXjllisition circuit is also included. The design is based on existing parts and it is described to the schematic level with a complete functional description starting from the block diagram level. The design has also been verified for functionality by using the CAD hardware develop rrent and analysis workstation provided by the Daisy Corporation. Timing diagrams and state lists of the simulations are also included for reference. SPREADI!'G OPERATION CONCEPT AND PROPERrIES
The basic idea of spread spectrum signaling is to operate on a communication signal in a way that the power spectral density is expanded in bandwidth and reduced proportionally in amplitude. Spread spectrum corrnnunication signals can defeat specific problems encountered during data transmission especially for military communication applications. Some specific capabilities of spread spectrum are given below.
A. AJ (Anti-Jarraning) It is desirable to establish a corrmunication link from transmitter "A" to receiver "A" when one or more other transmitters are transmitting within the same bandwidth and with much greater effective radiated power in the direction of receiver "A" than that of transmitter "A" with the intention of disrupting the corrmunication link between transmitter "A" and receiver "A". Primary concern for system analysis and design is the power advantage that the jammers must have over the desired communication signal in order to successfully interrupt the corrmunication link.
3 4
B. LPI (Low Probability of Interception) It is desired to establish a reliable conununication link from transmitter "A" to receiver "A" in a way that no other unauthorized receivers can reliably determine that the conmunication is taking place and reliably decode the transmitted information. The primary concern for system development (analysis, design) is the unauthorized receiver quality level relative to the intended receivers to achieve simultaneously a high probability of detecting the transmission when it actually takes place and a low probability of false alarming when the signal is absent.
c. MA (Multiple-Access It is desired to establish simultaneous reliable communication links from transmitter #n to receiver #n (n = 1,2,3, ••• N). Several spread spectrum systems should operate in the same frequency band, each rejecting the interference produced by the others. The primary concern for system development (analysis, design) is to maximize the number of reliable conununication links which can be established simultaneously. A top level block diagram of a spread spectrwn system is shown in Figure 1. The signal power spectral density is also sketched at different points of the transmitter and receiver of the system to illustrate the transformation of the signal throughout the spreading and despreading operation X(t) represents the actual user data and C(t) is random data mixed with X(t) to achieve the spreading of X(t) over the frequency band. The effects, generation and properties of C(t), will be discussed in more detail in subsequent sections of the thesis. DATA DATA X(t) A B c X(t) SPREADER DE SPREADER MODULATION DE~ULAIDN
C(t) A COS(W t + 9) A COS(W t + 9) C(t) c c
Figure 1. Spreading Operation ANALYSIS OF COHERENT DIRECT-SEQUENCE SYSTEMS
In its most general form a direct-sequence spread anti-jam communication system takes a binary data sequence and multiplies it by a higher rate pseudorandom (PN) binary sequence. The result is a binary sequence at the PN binary sequence rate which is then modulated. Corrpared to the usual modulation of the data, the data multiplied by the PN sequence causes the modulated signal spectrum to spread by a factor of N, the ratio of the PN sequence bit rate to the data bit rate. A mathematical description of a Direct Sequence Spread using BPSK modulation follows.
A. Direct-Sequence Spread Binary-Phase-Shift-Keying To illustrate a mathematical description of some basic spread spectrum concepts consider the example of an uncoded coherent, direct sequence spread, binary phase-shift-keying (DS/BPSK) system. According to Simon (1985), ordinary BPSK signals have the form
s (t) = j2SsinCw 0t + drf/2];
nTb < t < (n + 1) Tb' n = integer
Here Tb is the data bit time and (dn) is the sequence of independent data bits where
6 7
1, with probability 1/2
-1, with probability 1/2
The above equation can also be expressed in the form
nTb~ t < (n + l)Tb' n = integer
Hence, we can view BPSK as phase modulation or amplitude modulation.
Ordinary BPSK signals have a (sin2x>lx2 shaped power spectrum with one-sided first null bandwidth equal to l/Tb.
Direct sequence spreading of this BPSK signal is done with a pseudorandom (PN) binary sequence (ck) whose elements have values +/-
1 and are generated by the PN sequence generator N times faster than the data rate. Thus, the time Tc of a PN binary symbol referred to as a "chip" is
The PN chip rate might be several megabits per second while the data rate might be a few bits per second. The direct sequence spread spectrum signal has the form 8
x
k = 0,1,2, ••••• N - 1 n = integer Being more explicit on the mathematical derivation of x(t):
If c(t) = +l d Ct> = ±1
Tc = chip rate
Tb = data rate
Then: S(t) = A d(t) cos~t describes the PSK waveform having a power
P = s = A2/2 The spread waveform is given by
X(t) = S(t)C(t)
Hence x(t) = d(t) • c(t) • cosw t. ..j; 0
This signal is similar to ordinary BPSK except that the apparent data rate is N times faster, resulting in a signal spectrum N times wider. 9
To illustrate mathematically the spreading operation, the derivation of the spectrum is given below:
S(t) = {2s d(t) cos~t (PSK waveform)
Its power spectral density is given according to Shanmugam (1979),
Also by using the Wiener-Khintchine theorem
where c(f) is the power spectral density of c(t) and Rc(T) its autocorrelation function.
Assuming that c(t) is an infinite sequence of random "l' and "-1" then:
R (T) = lirrt l__J~C{t) c(t+T) at c t -.co 2Tc
-Tc
for t = 0 then 2 Rc (0) = average power of c(t) !or O<-r Re {T) c L.JT.cdt c i.:..:__ lTc-1] = l _:t__ Tc Tc Tc I R (T) = at = .i_ lT+Tcl = c i_(-+'I'C Tc j Tc 0 According to Cooper (1971), the autocorrelation function is otherwise zero for random and functionally independent bits. Therefore Rc("'t) has a triangular shape centered at T= 0 and extending from 0 to Tc and from 0 to -Tc. Thus: c (fl = F I RC (T:) l 2 = Tc sinc CfTc) As derived previously for the BPSK case: x(t) = S(t) • C(t) Thus: Y.{f) : S(f) * C(f) ~(f) =Joo S{f') .ccf-f • > df -oo 11 2 x ( f ) '"' -co [ I 1 I 2 S Tb i:; i n C ( f • - f ) Tb + l I 2 s Tb 0 2 2 sinc Cf' ·H0 >TbJ !Tc sinc Cf-f' >Tel df' which siJri:1lif ies to: 2 >: (f) 1/2 s Tb Tc sinC l Cf'-f )Tbl sinc2 [ (f-f •)Tel df' = Joo 0 -00 00 2 2 +1/2 s Tb Tc JsinC £ {J (f'+f ) 0 ('I'he sine function is so narrow thc.t it can be app.ro>:irratej b~ 1 an i.'r11p ·..LL s c ) Tm.ls: 00 2 x{f) = 1/2 Tb Tc sine I Cf-f') T ] .l__ 6 (f '-f ) df' s c 0 Tb -00 J using the sifting property of the impulse function 12 finally, xCf) = 1/2 s T sinc2rcf-f )T J + 1/2 s Tc sinc2 rcf+f )T J c 0 c 0 c The result shows clearly that the spreaded signal's amplitude is proportional to Tc while the bandwidth is inversely proportional to Tc. The spreading operation is depicted on Figure 1 where signal B denotes x(f). The processing gain according to Simon (1985), is given by: w - PG = SS = N, where wss is again the direct sequence spread signal bandwidth, and Defining the data function act> = an' 13 for all integers n, and PN function c(t) = ck, kTc- < t < Cn+l)Tc for all integers k, the direct sequence spread BPSK signal can be expressed as x{t) = sin[w t + c(t)d(t)7r/2l ...J;; 0 = c(t)d(t).y2; cos~t Figure 2 illustrates d(t), c(t) and c{t)d(t) for N = 6. Figure 3a displays the normal form of the DS/BPSK modulator and Figure 3b shows a :more convenient model for analysis. Note that in this latter form, x(t) = c(t)s(t), where s Ct> = d Ct>~ cos Wt0 . is the ordinary BPSK signal. Also, since c2 Ct) = 1 for all t, it follows that c(t)x(t) = s(t). Assuming the intended receiver has a PN sequence generator that is synchronized to the one in the transmitter, c(t) is available to both the transmitter and receiver. 14 O(t) . ' ' ~ ..... T f b •'' ' t ' 'f 'f ' ' ' ' - C(t)- ~ 4T __. c t ------D(t) C(t) - t ....._ - - - - i...- Figure 2. DS/BPSK waveforms. S(t) BPSK X(t) ~DULATOR C(t) PN GENERATOR a. Normal form S(t) BPSK X(t) tvK)OULA TOR PN GENERATOR b. Convenient Form Figure 3. DS/BPSK modulation 16 B. A Direct-Sequence Spread BPSK System Under Constant Power Broadband and 01 Jammer a. Broadband Jarraner Suppose a jamrner is transmitting a signal J(t) with constant power J in the system shown in Figure 4. An ideal coherent BPSK demodulator is assumed to follow the received signal y(t) multiplied by the PN sequence c{t). Here, the channel output is y(t) = x{t) + J(t) which is multiplied by the PN sequence c{t) to obtain r{t) = c(t)y{t) = c(t)x(t) + c(t)J(t) = s(t) + C(t)J(t). This is the ordinary BPSK signal imbedded in sorre additive noise given by c(t)J(t). According ·to Simon (1985), the BPSK detector output which is optimum for broadband interference is r = d~ + n where d is the data bit for this Tb second interval. ~ = srb is the bit energy, and n is the· equivalent noise component given by _ ~T2 (To c(t)J{t)cosw tdt. n - b Jo o TRANSMITTER RECEIVER J(t) d(t) BPSK S(t) r rvoDULATOA INTEGRATOR C(t) C(t) ..J2fbcoswt 0 PN PN GENERATOR GENERATOR Figure 4. Uncoded DS/BPSK system. 18 The typical BPSK decision rule is 1, if r > 0 d = -1, if r~ 0 Hence, the bit error probability is Pb= Pr(r>O d = -1) = Pr(n?~l assuming, without loss of generality, that d = -1. The noise term depends upon many PN chips, i.e., N-1 k+l)Tc n = J According to Simon (1985), a broadband noise jarruner spreads Gaussian noise of total power J evenly over the total frequency range of the spread bandwidth W • This results in an equivalent single-sided SS noise power spectral density N = J_ J Wss Since the signal energy per bit is S Tb where Tb = l/~ 19 Asswning the jarrmer transmits broadband Gaussian noise of one-sided power spectral density, the terms n k =.f;c are inaepenaent zero-mean Gaussian ranaorn variables with variance NJ"'2· Thus, n can be rewritten as: N-1 n= L k=O is a zero-mean Gaussian random variable with variance l~J"'2· For a continuous broadband noise jammer of constant power J the uncoded bit error probability is where QCx> ::: J"" .1 x r::-: v 21'(' is the Gaussian probability integral. 20 According to Simon (1985), regardless of the signal and jammer waveforms, an equivalent bit energy to jarroner noise ratio is defined as: where: W· ~ = PG Cpro=essing gain) ~ ~ = jarmr~ng to signal power ratio s The ref ore: = cws~/Pn' J/S = N (J/S) b. CW Jarmner Assuming cw jarraners which according to Simon (1985), have the form of: J(t) = {2i cos[wt+6] 21 and given that N TJBW 2/Tb total noise power 0 = = rr = (due to Gaussian noise or thermal noise) (probability of bit in error) then: t ::N +N. No 0 J where: N received total noise power 0 ' = N. jarmner power J = =1]W jW CW = 2/T ) No ' +17 b N I 2- (1]+ n. l = 2- 1}' 0 = J Tb Tb thus: but: ,., - N .,j - ~ w thus: PSEUDORANDOM BIT SEQUENCES The spreading signal C(t) is a random bit sequence referred as pseudorandom bit sequence or PN sequence. PN is actually the logical implementation of a mathematical polynomial which is selected to generate a given length sequence before it starts repeating itself. The length of the sequence can vary and it can be determined by the polynomial. Depending on the mathematical polynomial selected, the resulting PN sequence can either be maximal length or nonmaximal length. By B. Iane,(1983) sequence is said to be maximal length when a polynomial of degree n will be generating a repeating random sequence of 2n-l length. The sequence is considered nonmaximal otherwise. A polynomial that results to a maximal length sequence is called primitive. A formal definition of a primitive polynomial is: "An irreducible polynomial of degree n is primitive if and only if it divides (factor of) xm-1 for no rn less than 2n-l." A. Maximal Length Shift Register Sequences The device illustrated on Figure 5 is called a feedback shift register. At every clock cycle the register shifts its current contents to the right by one stage with the rightmost bit being the output. The indicated modulo-2 adders are placed on the circuit as determined by the selected polynomial. The number of stages on the shift register is determined by the degree of the selected polynomial. 22 ...... Q Q Q Q Q Q a b c d n-1 n Figure 5. Feedback Shift Register. SR SR SR SR SR 5 4 2 1 0 x x x x x 3 5 Figure 6. PN Generator of x + x + 25 If_ the register is initiated in an all-zero state, then it remains at the zero state indefinitely. If the register is initiated at some nonzero value, it eventually reaches a state in which it has previously been and then periodically repeats the state sequence. Once the number of the shift register stages and the XOR taps are selected, then the sequence generated is known and unique for the chosen configuration. A general form of the polynomials is: Where n specifies the shift register length and the coefficients C indicate the location of the XOR taps. C is a binary number of a value of logic "l" or logic "0". A logic "l" coefficient indicates a modulo-2 tapped X term while a logic "0" coefficient indicates a nontaped X term. An example of a shift register implementation is shown on Figure 6. 5 3 The polynomial implemented is x +x +1 (101001) with n=5, and c 0=1, 5-1 implemented generator will output a sequence of 2 or 31 bits long. B. Maximal Length Shift Register Sequence Properties The output of the maximal length shift registers are used as the C(t) signal that the user data is mixed with during the spreading operation of a spread spectrum corrmunications system. Maximal length shift register sequences have many properties of a purely random binary sequence, yet the sequence can be implemented in hardware relatively easy by simply loading the shift register with the correct phase and then allowing it to run at the selected chip rate. Maximal 26 length shift register sequences are a convenient source of the spreading code C(t) used in a direct sequence system. Some properties of maximal length shift register sequences that are of specific interest for direct sequence spread spectrum system analsysis are: a. A maximal length sequence contains exactly 2n-l l's and 2n-l_l O's over any period of 2n-l consecutive chips. If the period of the generator clock is T then the waveform C(t) c Evaluating the i:x: value of C(t) we have: = l [ (1) (2n-l_l) + (-1) 2n-l]T c (2n-1 )Tc (1) b. A maximal length sequence that is formed from a bit-by-bit modulo 2 addition of an original input PN sequence and its delayed version by K-chips will be also a delayed version of the original sequence by 1- chip. If C(t) is the original input sequence C(t-KTc) is its delayed 27 version and D(t) is the resulting sequence of the modulo 2 addition then we have: D(t) = C(t)C(t-kT ) c D(t) = C(t- lTc) (2) where K =/: 2n-l c. A maximal length sequence which is delayed by K-chips over a period of 2n-l chips if it is corrpared to itself will yield 2n-l_l chips which agree in value and 2n-l chips which disagree. This property actually follows as a combination of properties a and b described herein. Properties a, b, and c of the maximal length sequence constitute the baseline to develop and optimize a data acquisition system at the receiver and of a general direct sequence spread spectrum corrmunications system. c. Maximal Length Shift Register Sequence Autocorrelation and Power Spectral Density Functions The knowledge of the autocorrelation and power spectral density functions of C(t) is a necessary tool for the analysis, development and evaluation of a spread spectrum cormnunications system. The autocorrelation function of X(t) is defined as: R (T) x ( t) x ( t+T) x =< > where:< > indicates averaging over time, according to Cooper (1971). 28 Properties of ~(T) that are of interest are: 2 1) R (0) x 2) Rx(T) = ~(-T) 3) If x(t) is periodic with period T then Rx(T) is periodic with period T From the autocorrelation the power spectral density of x(t) can be derived and is denoted as psd = F { Rx (T) I = _= f R:('TJ e-j27Tf7"dT (Power spectral density) 00 Thus: Rx (T) =ro /"': (f)ej2Tfftdf (inverse Fourier) and R CO) = X( t) X( t) x < > = _: /c/>:(f) · dF (average power of X(t)) A table of some Fourier Transforms according to Ziemer (1976), is illustrated on Figure 7. By keeping in mind the nathematical models of the autocorrelation and psd functions and by referring to the 29 A 1. ______...__--1. _ __;t A SINrrFT/1TFT -T/2 T/2 2 2 2. BT SIN7rFT/ (rrFT} -T T Figure 7. Fourier Transform Pairs . 30 properties of the maximal length shift register sequences a, b, and c, described on the previous section, the autocorrelation function of C(t) (assume BPSK modulation +/-1 logic levels) can be derived as follows: C(t + kT ) =< c > by property Cb) by property Ca) In addition: Rc(O) = 2 Rc(Q) = Rc(O) = <<+1>2> Rc(O) = 1 The functions between (-T ,0) and (0, lT ) must be linear due to the c . c fact that C(t) C(t+T) involves areas of rectangles of height +/-1 and width that is linearly related to r . Finally, since C(t) is periodic with a period of (2n-l)T the R (T) is periodic with the same c c period. The autocorrelation function of R (T) is illustrated on Figure 8. c From the autocorrelation function we can derive the psd of C(t} denoted as(F) by taking the Fourier Transform of the autocorrelation c 31 function. ~c(F) is illustrated on Figure 9. according to Ziemer (1976), Where: · '!be envelope is given by: SinnFTci-\ ( nFTc ) The area of the IX'. impulse is: 1 And the separation between impulses is: 1 32 Re(/) Figure 8. Autocorrelation Function of C(t). 33 ¢> (F) c F • ' ..• '•' · 2 n (2 - 1) Tc Figure 9. Power Spectral Density of C(t). ACQUISITION PROBLEM FOR SPREAD SPECTRUM COOMUNICATIONS Once the corrununication signal has been spread and transmitted from the transmitter end of a spread spectrum system, one of the functions of a direct sequence spread spectrum receiver is to despread the received PN sequence. This is achieved by first generating locally the replica of the PN code and then synchronizing this locally generated PN sequence with the incoming {received) sequence. After synchronization is achieved the multiplication of the incoming signal by the synchronized local PN sequence produces the desired despreading operation. The process to bring .the two PN codes into alignment is called the acquisition process. Acquisition is needed to obtain the correct phasing of the received and local PN codes regardless of the fact that the two codes are identical. A. Requirements For PN Sychronization For a spread spectrum receiver to acquire lock, there are three requirements that have to be met in order for the receiver to achieve PN synchronization. It must know or determine: a. the code polynomial b. the code phase c. the approxirrate code clock rate of the transmitter The code polynomial is a given for the receiver design. 34 35 The technical challenge arises in the task to align the phase of the transmitter and receiver code and to avoid phase drifting once the codes are synchronized. The stations cormnunicating must start their codes at the same tine with the same initial loading of the PN generators. The time agreement between the two parties is the hardest task in spread spectrum communications. For a direct sequence system the times must be accurate within microseconds. The propagation delay (i.e., doppler effect) must also be known in the microsecond range. Time uncertainty is a definite problem on any spread spectrum system. B. Methods to Reduce Time Uncertainty Certain coding techniques and the use of special hardware are used to reduce the time uncertainty between the codes. a. use of~llo~ By "short code" it is meant that the order of the polynomial is sma.11 so the entire code can be searched for synchronization in an acceptable time interval. b. Use .of . .co.IJllX)oent corl.e....s..... Component codes are a corrbination of two or more with mutually prime (no corrouon factors) length codes. If the composite codes have a length of IJ., L2 ••••• Ln and they are combined on a bit-by-bit basis to a proper Boolean function then the output component code has a length of IJ., L2 ••• Ln. One of the properties of the component code is that it contains minor cross correlation peaks with each of the composite codes, as a result of this property, the acquisition time is short relative to the code length, i.e., a code having length of IJ.L2 ••• Ln requires a serial search with a length of Ll + L2+ ••• +Ln. 36 c. Use of accurate_.clockfu.. The use of accurate clocks on a spread spectrum system can minimize the search time required for acquisition. Typical clock oscillators used in spread spectrum systems are Cesium, Rubidium, and Quartz. d. Auxil~_ lime .transmissi.on. An example of auxiliary time transmission is a satellite beacon. The "Time of Day" can be sent by an auxiliary transmitter to the participating terminals. This transmission is then used to synchronize the PN sequence of the terminal in a predetermined manner. Reducing the time uncertainty alone does not solve the acquisition problem on a spread spectrum system. There is always some searching that needs to be done for the exact phasing of the codes. The most corrnnon search technique is the serial search in which we correlate the received with the locally generated codes until we find the correlation peak. C. Active and Passive Acquisition Correlators According to the autocorrelation function of the maximal length PN codes as described herein on previous section, the autocorrelation function yields essentially no power if the transmitter and local PN signals are not aligned well within the +/-1 chip modulo the length of the code. Generally, acquisition is done by sliding or stepping the local code past the received code and measuring the autocorrelation function. This is called an active correlator. Another alternative to achieve acquisition is by using "matched filters" which are usually tapped delay lines and they are referred to as passive correlators. A top level block diagram of an active correlator is shown on Figure 10. This is a typical example of an acquisition system where the received 37 signal plus the noise is actively correlated with the local PN sequence and then passed through a bandpass (pre-detection) filter. The filter output is then passed through a square-law envelope detector to remove the unknown information modulation and unknown carrier phase. The output of the square law detector is then integrated for a fixed time duration (dwell-time) in an integrate and dump circuit and then the output is stored. The local code is then updated and a new output of the integrate and dump circuit is stored. The procedure is repeated until locally generated code completely "slides" through the incoming received code. The maximum output value of the integrator corresponds to the correct local code to achieve synchronization. A top level block diagram of a typical passive correlator is given on Figure 11. In this case, the multiply and integrate operation of the "active correlator" has been replaced with a passive device such as a matched filter. This device can be implemented either continuously or discretely in time by using technologies such as charge coupled devices CCCDs) or surface accoustic wave (SAW) convolvers and discrete time correlators. In the continuous time case using the matched filters, the received sequence plus noise is convolved with a fixed segment of the PN wavef orrn. The continuous time output is then tested against a threshold level in order to determine when acquisition has occurred. In this configuration the input continuously slides past the stationary PN segment until the two are in synchronism, at which point the threshold level will be exceeded. Then the acquisition system controller initiates the local PN generator with the chosen value and the despreading operation can take place. YES ..... SQUARE-LAW ... SI GNAL ...... X(t)..... eNELOPE Y(t)....._ Zi ..... 1HRE9-0LD ...... BPF ..... INTEGRATOR ..... COMPARISON DElECTOO -- N) & NOISE H LOCAL PN CODE PHASE UPDATE ....., GENERATOR -- Figure 10. Blk. Diagram of a single dwell time PN acquisition system. w CJ) BASEBAND MATCHED SQUARE-LAW tlLTER DETECTOR 2 COS(W t + BASEBAND MATCHED SQUARE-LAW FILTER DETECTOR Figure 11. Low-Pass version of a matched filter acquisition system. ACQUISITION CIRCUIT HARimARE DESIGN A. Design Definition This hardware design is an implerrentation of the autocorrelation function to achieve acquisition for a spread-spectrum system. The theoretical aspects of a "passive acquisition correlator 11 are linplem ented as described in the previous section. In brief, the hardware is m::mitoring the transmitted PN code until a predefined sequence that initializes the local PN generator is detected. After the local PN initialization is achieved, the transmitted and local PNs are in synchronization and reliable data decoding can be obtained on the receiver side. The design philosophy was to build a general purpose acquisition system that is flexible to accorrrrodate different PN :pJly nornials, easily expandable to meet faster acquisition requirements, and can be easily controllable by an external processor or state machine and that is simple enough to be integrated in a gate array or custom IC. Figure 12 depicts the top level Interface Block diagram. A can bination of nore funda!rental cells can be cascaded together to rreet various system design specifications for acquisition t:irre and tracking requirerrents. The acciiisition hardware design described herein uses only one acquisition cell since the objective of the analysis is to derronstrate the functionality of the funda!rental cell itself. 40 CLOCK u u ACQUISITION .... EXTERNAL .... -- DATA OUT CONTro... - CIRCUIT .... SYNC ...- DATA IN ...... CELL Figure 12. Top Level Interface Block Diagram. 42 B. Interface Signal Description/Requirer7ents The system requirerrents are listed below: a. The system receives a binary signal ·which is the transmitted data rrodulo, the transmitter's PN code. b. The system outputs the data after despreading the input signal (filtering out the PN). c. The ~"stem outputs an In Sync, Out of Sync Signal. d. Po-ver and necessary clocks are provided from the oost system (receiver) • e. PcMer requirarents : +sv oc (TrL IDgic) Clock Rate: 100 KHz - 5 MHz Data Rate .Max: 1200 Baud f. Assumptions: Transmitter PN i;:olynornial knCMn Transmitter PN Clock rate known g. Pararreters: Pol~man.ial: x6 + ~ + 1 Clock ·Hate: 5 I:Iz -4 .l\o;Uisition T.iI:e !~..:<: 1.3 x 10 secs 43 C. Functional Description Referring to the block diagram depicted in Figure 13, the system should be able to detect and extract a predefined PN segment from the input signal. This function is achieved through the PN extractor. The extracted PN signal is continuously compared in real t~ through the digital autocorrelator with a preset expected trigger word. When the selected PN segrrent arrives with the expected trigger word, the "DIGITAL Au:rcx:::ORRELATOR" reaches peak and outputs a pulse. The pulse initializes the "LCX'AL PN GENEPATOR" with the proper sequence. At this rx:>int, assuming an error-free signal, the incoming PN is synchronized with the locally generated PN. Finally, the data is extracted by rrodulo 2 arith:m2tic between the local PN and the input signal through the "DATA EXTRACTOR". In addition, a sync signal indicates whether the local and transmitted PN are out of sync serving as a tracking and error-detector mechanism. The sync signal is exter nally controlled by a processor or a state ma.chine. DATA...... OUT ..- PN ...... DIGITAL ..... LOCAL ..... DATA EXTRACTOR .... AUTOCORREL ,.... PN ,... EXTRACTOR SYNf OUT GENERATOR """'" ~~ 4 ~ H 4 ~ ACQUISITION SEQUENCE & TRIGGER WORD DATA IN Figure 13. Functional Detail Block Diagram 45 D. Detail Design Schema.tics and Functional Description a. Functional Description of Detail Design The detail design is illustrated on page 47. Referring to the scherratic, the acquisition circuit receives the transmitter data through the "DATA IN" line. The data is clocked into the 74LS164 register bit-by-bit and output on the Q outputs. It is assmned that transmitter and receiver clocks operate at the same frequency. The XOR gates 74LS86s are set from one of their inputs at the logic level (1 0 0 0 0 0). This sequence is the PN segrrent expected from the acquisition circuit to achieve synchronization. The combination of the XOR gates with the cascaded 74LS85s perfonn;the logical function ( DATA XOR PN SEGMENT XOR DATA = PN SEGMENT) so when the preset PN segnent arrives, it is extracted and the comparators (74LS85s) will output a pulse to initialize the synchronization process. The pulse loads the 74LS161 counter with the value of 9. At the same tirre the 74LS166 register is loaded with the predefined PN segment which is used at the front end of the design to trigger the comparators. The counter through its RCD output will select the loaded value of the 74LS166 to go through the multiplexer (74LS157) into the PN generator, vvhich is the corribination of the 74LS164 shift register and the 74LS86 XOR gate. This way the PN generator will be initialized with the predefined PN segnent. After all six bits are passed through the M1JX into the 74LS164 then the RCO lirie of the counter at the count 15 of the 74LS161 changes state and selects the PN feedback to go through the 46 7415157 nlultiplexer. At this point the PN sequence is generated on dock by clock basis and is fully synchronized with the transrnitter' s PN cxxle. The data is obtained by XORING the input DATA XOR PN with the synchronized PN that the acquisition circuit generates. The acquisition circuit cell is hardwired in the present configuration to denonstrate its ability to synchronize a spread spectrum receiver. If the variables of the acquisition circuit (i.e.,PN segrrent, load values of 74IS161, 74IS166) are controlled by an outside controller and certain signals (i.e., INIT, PN) are rronitored by the controller, then faster acquisition schen:es can be implerrented and different acquisition requirerrents can be net. Also tracking (synchronization after acquisition) can be implerrented. A multiple number of these cells can be integrated in a gate array or custom integrated circuit. ACQUISITICN CEIL CIRCUIT IYNC '" l HlSH IYNC D L__L_) - C1.t 7•l ••• D-{> ~ HL Sn~ I~ (NI If All l!llTlolN•' J ~HP 14 74L58' II l:I 1111 ,_ \ I J . I:> ..-;- 111 - "' I~ '-f It: . 11(- rl 7 11 r "'' ~() J Ml ._ "i ~ Ill•,__ ,_{ 74L5U 74LHt UT•OUT ~ <.•t A•I o-1. [1j 4 I~ 1>>1...:.- - ,_..!. n · llCO ~ <.H ,,_ tc I IT D-o II L.-..<-- 7•t £8, T~ I< ti I UC \ iz l< I [ 3 rl ~ 74L~BI' ~ ~,_!.HIT Hl PH '-- 7•l~H4 1Htet ~2.. \ "' l llll< QJ-;-. I rl II llC - ] I I ~ l:l· g~ I ~~ \ • I t 01 ,, I~ IT ~ 11£ ---:.... SH1[1j II i:.e Cit. 11r II I Al ~CKIHH 74LSl !- 7 • r. ,!.!.__ I ~ e--- 7•Lfl" -= 11 1 ~ <.2 Ct' -1 .. 7•U8' II'!'- 1 4 I \ l FoJ : 'LR ~II IY- 31tl .::.. .c ~ :. .. tT ~ .l--f " 11~ ~ 7•LHt l 3 \ u --211 IP • 11c..!! J; II -n n- F"::fl rr If I• I -c -H• -Cl er I' 11 I< JI I J Ii )i: .--!..!.. r - ..,. ,__ II'~ I H I t i' .. 74L'9' ~J -Ii I 11;l ... .!.! 11r \ ,. I~ {; ~ ,__. H ~ I ...___ .----} ! ~ 74LSn g c; l \ L} PH EXTRACTOR 7~LS85 QP . 7~LS86 ~T_5______~__. QC D..______T_4 ______~~ ... 74LS164 74LS86 3 QA DATA IN 4 QF 5 A QC 2 6 QD B QD 9 10 Q[ CLK CL GE 8 11 CK QF 12 Q6 QH 13 74LS86 ~D T3 T2 Tl • T0 74LS86 • QF D 7"4LS86 CIRCUIT RECE I VES DAlA + PN AT TRAN SMITT ER CLOCK RAT E THROU GH LS164 49 DIGITAL AUTOCO~ELLATOR ,,,. - 7~LS85 1e Ae 1E A1 12 A2 1~ A3 2 7 74LS00 - i=<B A >'B i--- Ii(' 11- ll l 14- :t2 1 B3 ...... & 74LS85 T3 ~ 10 fi6 12 Al 13 A2 15 A3 2 7 A<:B A<:B i--- -3 6 A=l3 A=:B 4 ..., . A >.B A>:B ~ T c. .... -9 B0 11 B1 1 o4 :B2 1 B3 T 1 ~- ... Te ~ CIRCUIT GENERATES •JNIT• PULSE AT AUTOCORCLLATION PERV - 74LS166 PN FEEDB CK LOOP 9_ CL 1 S' SH-'LD 6 CKHIH 74LS157 7 2 .... 7~LS164 Cl< - lA 1 3 4 3 SER. - 1P lY,__ QA 2 5 4 A QB 3 13 ~2A 7 1 -5 B QH 2B 2Y - A QC ..__ 4 11 1 2 ,___E, c - ~A B QD 74LSB6 s 10 ~ 9 10 D - 3B 3V ~ CL QE .._ 10 1~ - 8 11 E - 4A CK Qf" 11 ..__12 ,__12 JD- F !2 4B ,) ,.. VI Cl~CUIT IHITIALIZES AHD 6EHERATES RECEIVER PH SEQUENCE ~HICH IS SYNCHRONIZED TO TRANSMITTER FN SEQUENCE 0 lHHA EXTRACTOR SYNC lH 7~LS08 SYNC LOCAL PN ____,D--o7~LS86 DATAOUT DATA CIRCUIT DECODES DATA AND PROYIDES AN EXTERNALY GENERATED SYNC SIGNAL INDICATING VALID DATA $ LS86 fILTERS OUT THE PN SEQUENCE TO OUTPUT VALID DATA t LS08 ENABLES THE SYNC IN SIGNAL THROUGH t THE SYNC IN SIGNAL CAN BE SOfT~ARE OR HARD~ARE 6EHERATED TO MEET SPECifIC SYSTEM REQUIRMENTS BEING 6ENERALY A tUHCTION or INTERNAL CIRCUIT SIGNALS SUCH AS ~1NIT•1•Te-TS 11 1AND ~LOCAL PH" \JI ...... 52 E. Design Verification The design was developed and verified using the Daisy Corp. CAD/CAE hardware and provided software. The following results are the output of the Daisy develoµrent tools. a. State Lists The following pages include state lists as simulated by the Daisy simulator. The simulator is designed to accurately reflect the functional logic rrodels of the parts included in the design. The first column on the list represents the state number sampled. The second column is the t.irre at which the sample was taken (tinE units are in nsec. ) . Note that samples are taken every 300 ns which repre sents the period of the simulated clock. This way the list captures the system state at the rising edge of every clock. The rest of the colurrms are the result of the corresponding labeled signals. The signals are also labeled on the schematics for reference. The "Datain" simulated is 16-zeros, followed by 16-ones exclusived or with the given PN sequence. States of interest to system verification are: State 9 - State 15, where the INIT pulse starts up the system. State 38, where a false bit designated in the input is actually detected. State 74 - State 80, repitition of the initialization process. 53 LP.EEL TH£ COLHT CL Kl HUT ~L OYIB5 tLJ>...'O:.JT mTRIN+S PN mT~JT IRS'o_ BIN BIN ElN EIN BIN BIN BIN ElN PO LR-":I TY + ...... + S~Tri CFF OFF 0.-t OFT CH O!T OIT OFT 1:. e El 1 u u u u u u u -+ l 333 0 0 u u u u u u u +2 ffil3 0 0 u u u u u u u 13 9C33 e e L' u u u u u u +'1 1213] 8 e 1 u u u u u u t5 1503 e e 1 u u u u u u .. Et 18\33 0 0 l L' u u u u u +7 2H33 0 0 l u u u u u u +8 24BJ 0 0 l u u u 1 u u +9 270::3 0 0 0 u u u 0 u u +lB 3:B3 8 E3 l 1 0 0 1 u u +11 33B3 0 0 l l 0 0 l u u +12 339'.3 0 0 l l e 0 1 u u -+13 39L13 0 0 1 l 0 0 l u u +l"i 412133 0 e l 1 e 0 1 u u tl5 ~SBJ 0 e 1 1 l l e u u -+15 4i833 0 0 l 0 1 1 e. l 1 +17 51B2 0 0 l El 1 1 0 1 l +18 ~2. {3 0 l 0 1 1 8 1 1 +15 5783 e e 1 0 1 1 e 1 1 .. w 6002' 0 Ei l 0 1 l 0 1 l +21 6333 e 0 1 0 1 0 l 0 1 +22 6933 0 fj l 0 1 1 0 1 1 -+23 69~3 B 0 1 0 l 0 l 0 1 +24 ?ZBJ 0 0 l El 1 1 B 1 1 -+ZS 7513l3 0 0 l 0 1 0 e 0 B -+26 7863 0 0 1 0 1 1 1 1 0 +Z? 8103 0 0 1 E3 1 1 1 1 0 +28 8'103 0 0 1 0 1 B 0 0 0 TOTAL t-UiB::::R or PRitiI Til.£5 • 265 . tD TI MIN::: Ct-ECKS PERFORMi:D 54 .L..AB:L TI 11:: CO.Jt\T CL Kl HITT SEL cril66 ~'D'JT DATRIN+S PN MiFCJT B-R Ern BIN BIN EIN EIN EIN BIN BIN PJL~:J 11' + + + .. + + + + STR::r-G1rl Or'T CH Oi'T Cf'T en CH OFT C>.-'T +29 8783 13 B 1 0 1 fj 0 0 B GJ 9333 0 {3 1 0 1 1 1 1 0 +31 93CB 13 e 1 13 1 1 1 1 e +3.? 93[1~j 0 El 1 0 1 0 0 0 0 +33 933~ 0 e 1 0 1 l 1 l B -+3'1 10Zf32 0 [3 1 0 1 1 1 1 e +35 lBSBJ 13 0 l 0 1 1 1 1 0 +35 1BS3J 0 0 1 0 1 G 0 0 0 +37 111Bi3 0 0 1 0 1 1 1 1 (3 +3E. 1Ml30 0 0 1 0 1 1 0 1 1 +39 11703 B 0 1 0 1 0 0 0 0 +'i(3 12032. (3 0 l 0 1 1 1 l B +'il 1233\3 0 E3 l 0 1 0 l 0 1 +'iZ 12633 0 0 1 0 1 0 1 0 l +'i3 12332 e e l 0 1 1 El l 1 +4<; 13283 0 e 1 e 1 0 l 0 1 +45 13583 0 0 1 0 1 e 1 0 1 +'iS 1383'.5 0 0 1 B 1 1 B 1 1 +'i7 1<1182 0 0 1 0 1 l 0 1 1 +48 144132 0 e 1 0 1 1 0 1 1 +40_, 147iD B 0 l 0 1 0 1 0 1 +5G 151332· 0 e 1 0 1 0 l 0 1 +51 1530~ 0 0 1 0 l 0 1 0 l +52 15.SBJ 0 e 1 0 1 1 e 1 1 +53 1552!2· 0 (3 1 0 1 B 1 0 1 +S"i lEZB\3 0 0 1 0 l l 0 l 1 ... 55 16503 0 0 1 0 1 1 0 1 l +SS 16Bl'.l0 0 0 1 0 1 1 0 1 1 ~ 171BL'., 0 0 1 13 1 1 1 1 0 TOTAL HJiBER OF PPltiI TIIXS • 266 N'.) TitiING Ct-ECKS FU:rORi"ED I 55 Lffi::L ntt: COUNT CLKl HITT SEL 0'-1165 ttWXJT IATAINtS PH DiTA'JJ T lFrS: Elli ElN BIN Brn B1N BIN BJH BIN POLA!:IiY -+ -+ + + + .. + .. Sir +SB 1?4B'a 0 0 1 B 1 8 0 0 E3 +SS 17783 0 (3 1 0 1 El 0 e 0 +ffi iBBaa e B 1 B 1 1 1 1 8 tBl 18333 0 e 1 B 1 0 e ti 0 +62 18&'..D 0 [j 1 0 1 1 1 1 0 +53 189-33 0 0 1 0 1 0 0 e 0 +&1 19Zi3 ~ [3 e 1 e 1 0 B 13 0 +65 1953a 0 0 1 0 1 B B 0 0 +65 19a3J 0 0 1 fj 1 1 1 1 0 +57 2610~. 0 0 1 0 1 1 1 1 0 +58 2ti43J 0 0 1 0 1 0 e 0 e +69 2370!3 0 e 1 B 1 B 0 0 B +7 t1 210a3 0 B 1 0 1 0 0 e 0 t71 213133 El 0 1 13 1 El B {3 E3 +72 216(33 0 ti 1 0 1 1 1 1 0 t73 21933 13 0 1 B 1 B 1 0 1 t7'1 ma2. 0 B 0 0 1 [3 e 0 e +75 22583 B 0 1 1 e 0 1 0 1 +?E ZZ833 0 0 1 1 e (3 1 B 1 -+'77 23102 0 e 1 1 0 0 1 0 1 -+78 Z-.::!4B2. 0 0 1 1 0 [3 1 1 e. -+?S 2370;3 0 0 1 1 0 0 1 0 1 +&3 240tD B 0 l 1 1 l El 0 e +Bl 2~3:E3 0 13 1 0 1 1 0 l 1 +B2 24613 2. 0 0 1 B 1 1 0 1 1 +83 24983 0 0 1 0 1 1 B 1 1 +84 zsai :-:. 0 0 1 B 1 1 0 1 1 +85 25933 0 0 1 0 1 1 ti 1 1 135 258Bl3 0 0 1 0 1 B 1 0 1 iOTfiL liJiBU< OF Pill HI TI LB • 265 HO TIMIN~ 0£CKS PERfORtfll I 56 l.flB:: L Ut"E CO'Jrn CLKl HDT SEL OY166 ~cm DATAINtS Pri DATA'.XJT ~ BIN EiN ETH EHi BIN BIN EIN Brn PJLA:::.I i'l' + + + + + + + + STRi:J·C TH OFF ();"F Ot-'"T OFF ITT ITT OIT ~"T +87 2610tJ 0 0 1 0 1 1 0 1 l +Er3 ~02. 0 E3 1 0 1 0 1 0 1 -+B3 267B3 0 0 1 0 1 1 0 1 1 -t-9'.2 27fB3 0 e 1 0 1 (3 0 0 0 +51 273-32· 0 0 . 1 0 1 1 1 1 8 +52 Z76G0 0 0 l 0 1 1 1 1 0 +93 279t33 0 0 1 0 1 0 0 0 0 +9'1 2a20 ~ 0 0 1 0 1 0 8 8 0 +95 283fB 0 0 1 e l l 1 1 0 19$ za333 e 0 1 B 1 1 1 1 0 -+97 29H3J 0 0 1 0 1 0 0 8 0 +93 29433 0 £3 1 0 l 1 1 1 0 +93 2978~ 0 E3 1 0 1 1 1 1 0 +l.Bi3 33B:33 0 e l 0 1 1 1 1 8 +1131 3l33[12. 8 B 1 0 1 £3 0 0 e +lBZ 3B3S3 13 0 1 0 1 1 1 1 0 +183 3B9:.13 E3 0 1 0 1 1 0 1 1 +10-4 31z.a3 0 0 1 0 l 0 0 0 0 +rn~. 31502: £l 0 l 0 1 1 1 1 E +103 31&32' 0 0 1 8 1 0 1 (3 1 +lG? 3ZIB3 B 0 1 0 1 0 1 [1 1 +103 32402· 0 0 1 0 1 1 0 1 1 +li35 3Z?t3B 0 0 1 0 1 0 1 e 1 +llB 33B6-3 0 0 1 0 1 0 1 8 1 -+111 333EO 0 0 1 0 1 1 8 1 1 +llZ 33602 0 0 1 0 1 1 0 1 1 -+-113 33933 0 0 1 [J 1 1 0 1 1 -tll-1 34202 0 0 1 0 1 0 1 0 1 tus 3 lOTAL H'J.1B::P- OF PKIHI TIUES • 26S t-() TI tiI N:; a-ECKS PERF ORt1ITl I 57 Lre:::L nt£ cwn cu:1 lK! l S!:L ~165 tt..r~OJT !l=.TF\!N tS Pr-I ffiT~JT ~ Elt-: EZN ElN Elli EIH EJN EHi filN P~LR::l 'T~' ...... sTP.LN:;it'! OCT C:-::T 0:-'T O?T ITT" 0:-'T o;:-r 0-'T +f? 26100 ~ 0 1 fj 1 l e l l +8"3 254B'.2· 0 e. 1 0 l e l e 1 +e3 2c:?B~ 0 0 l 0 1 1 0 l 1 .. s:. naJJ e e l 0 l £3 ~ B e •Sl 273.:3: B e . 1 e 1 l l 1 0 •S.:: Z?SG:- e B l 0 l l l 1 0 •93 27S.3J 0 0 1 0 1 0 0 0 0 .. ~ 2Bzt:l~ 0 e l 0 1 e 0 . 0 0 +95 263'33 B e l e l l 1 1 0 .. g:.. 223~~ r. e 1 [1 1 1 l l 0 +S? 23163 e. e 1 e 1 B E3 0 e +SS 2~33 0 (; l 0 1 1 l l 0 •93 297t3J 0 E; l 0 1 l l l e •IB? 33~B3 0 e l 8 l l 1 1 0 tlr-1 333:<3 0 El l 0 1 [3 0 B [; t1£2: 323E.2 8 e l 0 1 1 1 l e. +1£3 323:32 B e l E3 1 1 e l 1 • lt:--1 312t'.(3 E 13 1 0 l E3 E3 0 B •1e:. 31502 fl B 1 ~ 1 1 1 l e tlBS 31&32' e. G 1 fl 1 0 l [3 l +1C?7 3ZIB::. e e 1 e l E: 1 fj 1 -+l.03 32402. 0 e 1 e 1 l B l 1 •1£3 327a3 0 B 1 B l 0 l B l +ilB 33332 El 0 l 0 l 0 1 e 1 tlll 3332.3 [3 0 l e 1 l e. 1 1 •112 333fB 0 E3 1 0 1 1 E l l Hl.3 33933 0 0 l B 1 l e l l tll'1 3-1282 B 0 l 0 l 0 1 e l ,115 3'15e3 0 B l 0 . 1 0 l e 1 TOTA~ NJiB~ ~ P?JHITIIF-S • 255 t-0 n KIN:. 0£~5 PLRrOR:"OJ I 58 b. Timing Diagrams The simulator provided actual timing diagrams of the design taking into account component parameters (i.e., timing delays, fan out). The first of the following pages illustrates the activity of the signals of interest when the acquisition-trigger sequence arrives in the system and the INIT pulse is generated. On the top of the diagrams the time (in nsec) is indicated. The diagrams are compatible with the state lists outputs. The second and third timing diagrams illustrate selected signal activity during the critical time periods of initialization. 59 SCALE 1 :2 TH£ 0 STA~TING TIM[ 0 DIDIN~ Titf:: 698-3 WJGG::R Tlt£ 0 0 603 12-a;::. lffil3 cq0:3 30>33 EB ~203 "t003 540i3 +------+------+------+------+------+------+------+------+------+------ CLKl 0£16:· OC16S QD166 0::165 ~165 CK,;16S lt-0: T 60 ~ALE l :1 TI t£ 0 s rn;: n NC:. TI tt:: 0 mm~ n HE 13958 TRIGGER n t"E 0 0 12013 24L1l3 35Bl3 480iJ 6Bl33 7203 6403 93GJ 10833 +------+------+------+------+------+------+------+------+------+------· CU~ l HITT S:::L (f-1165 t"'tJXO ~JT OOTPlN+S PH MTA:JiJ'f DLS > ~£ » ~'.£> I 61 s:ALE 1:1 nt'E 18888 STARTINc; TH£ l.BBJ3 rnnn-r.; TIHE 3195{3 TRIGG£R Til"E 180(33 1.Bl}Jd 1S283 2B403 21603 22BG3 24BB0 ZS20B 26~03 276GS 28SBB 3Bao +------+------+------+------+------+------+------+------+------+------+--- cu-:1 lulJlJlJUlru It-0 T SEL ~165 tUXO'JT l}qTfiIN+S DLS > '4'i:£ » ~>I 62 c. Critical T:imi.ng The following page includes a t:imi.ng diagram expanded around the t.:i.ln= that the INIT pulse occurs so system delays of critical signals can be easily measured. The timing scale is in nsec. and obviously there are no race conditions indicating that the system can run on much higher speeds than the 3.3 MHz clock rate simulated on the present verification runs. 63 s:ALE 2 :l Tlt£ 2175~· STA= CU~l .. I . I I I I HITT . . I I sa I . ~165 . I Ii I.JLS > ~ lf-!-;:l » £H:>8 DLS > ~:K » ~·..c> '-fiJ[> ~> I OONCLUSION The hardware design developed and verified herein derronstrates the utilization of the theoretical aspects of spread spectrum acquisition analysis (i.e., autocorrelation function of PN sequences) to .implement a practical acquisition circuit. The given design is general purpose and can be easily m:xlified and expanded to generate the sequence of a different [X:)lynomial and to ItEet faster acquisition requirements. The acquisition circuit can be expanded by cascading nBny of the cells to set m::>re than one acquisition trigger word. The acquisition cell can also be controlled by an outside processor (i.e., bit-slice microprocessor). The processor can take control of any variable on the design (i.e., trigger words, PN initialization value, etc.) and optimize the capabilities of the circuit depending on specific system requirerrents. Many of these acquisition cells can be integrated in a gate-array or a custom integrated circuit. 64 BIBLicx;RAPHY Sinon, Marvin K.; Qnura, Jim K.; and Levitt, Barry K. Spread Spectrum Comm.mications. 3 vols. Maryland: Computer Science Press, 1985. Cooper, Goerge R. and McGillem, Clare D. Probabilities Methods and Signals and System Analysis. New York: Holt, Rinehart and Winston, Inc., 1971. Lane, Barry. "Digital Communication System Evaluation." M.S.E. thesis, University of Central Florida, 1983. Shanmugam, Sam K. Digital and Analog Conmunication Systems. New York: John Wiley and Sons, Inc., 1979. Zie:rrer, R.E. and Tranter, W.H. Systems, Modulation, and Noise. Atlanta: Houghton Mifflin Company, 1976. 65