(12) United States Patent (10) Patent No.: US 8,836,700 B2 Goel (45) Date of Patent: Sep
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USOO8836,700B2 (12) United States Patent (10) Patent No.: US 8,836,700 B2 Goel (45) Date of Patent: Sep. 16, 2014 (54) SYSTEM, METHOD, AND COMPUTER (56) References Cited PROGRAMI PRODUCT FORA TESSELLATION ENGINE USINGA U.S. PATENT DOCUMENTS GEOMETRY SHADER 5,261,029 A * 1 1/1993 Abi-EZZi et al. .............. 345/423 6,597,356 B1* 7/2003 Moreton et al. .............. 345/423 (75) Inventor: Vineet Goel, Winter Park, FL (US) 2003. O169269 A1 9, 2003 Sasaki et al. 2005/0243 094 A1 11/2005 Patel et al. (73) Assignee: Advanced Micro Devices, Inc., (Continued) Sunnyvale, CA (US) FOREIGN PATENT DOCUMENTS (*) Notice: Subject to any disclaimer, the term of this patent is extended or adjusted under 35 JP 2001-204957 A T 2001 U.S.C. 154(b) by 942 days. JP 2001-25O128 A 9, 2001 (Continued) (21) Appl. No.: 12/472,709 OTHER PUBLICATIONS Filed: May 27, 2009 Cook R. L., Carpenter L., Catmull E.: The Reyes Image Rendering (22) Architecture. In Computer Graphics (Proceedings of ACM SIG (65) Prior Publication Data GRAPH 87) (1987), pp. 96-102.* US 2009/O295798 A1 Dec. 3, 2009 (Continued) Primary Examiner — Kee MTung Assistant Examiner — Zhengxi Liu Related U.S. Application Data (74) Attorney, Agent, or Firm — Sterne, Kessler, Gold (60) Provisional application No. 61/056,936, filed on May Stein & Fox PL.L.C. 29, 2008. (57) ABSTRACT (51) Int. C. A method, system, and computer program product are dis G06T I5/30 (2011.01) closed for providing tessellated primitive data to a geometry G06F 15/16 (2006.01) shader. The method comprises computing a set of tessellated G06F 12/02 (2006.01) Vertices and a computed set of connectivity databased on an G06T I7/00 (2006.01) original set of vertices and an original set of connectivity data, G06T I5/00 (2011.01) generating computed vertex databased on the original set of G06T I7/20 (2006.01) Vertices and the set of tessellated vertices, receiving the com (52) U.S. C. puted set of connectivity data, requesting a Subset of the CPC ............... G06T 15/005 (2013.01); G06T 17/20 computed vertex databased on the computed set of connec (2013.01) tivity data, and processing primitives defined by the Subset of USPC ............ 345/423: 34.5/502; 34.5/543: 345/420 the computed vertex data. The system and computer program (58) Field of Classification Search product are further disclosed for accomplishing a similar CPC ......................................................... GO6T 1/2O result as the aforementioned method. See application file for complete search history. 21 Claims, 7 Drawing Sheets 400 Tessellation Engine 202 Wertex Shader 12 valuation Shader 204 Geometry Shader 104 Original & Tessellated Wertex Set 402 Computed Wertex Set 404 Computed Connectivity Data 406 Request Wertexes H 408 Return Requested --- Wertexes 410 US 8,836,700 B2 Page 2 (56) References Cited Boubekeur, T., et al., “QAS: Real-Time Quadratic Approximation of Subdivision Surfaces.” Computer Graphics and Applications, 2007. U.S. PATENT DOCUMENTS PG 07.15th Pacific Conference on, vol., No., pp. 453-456, Oct. 29, 2007-Nov. 2, 2007. 2006, OOSOOT2 A1 3, 2006 Goel Lorenz, H. and Döllner, J., “Dynamic Mesh 1-2 Refinement on GPU 2006, O164414 A1 7/2006 Farinelli Using Geometry Shaders.” Feb. 2008, pp. 1-8, XP002690083, 2008/0001952 A1 1/2008 Srinivasan et al. ............ 34.5/5O2 Retrieved from the Internet: URL:http://iason.fav.zcu.czwscg2008/ 2008/0055321 A1 3f2008 Koduri .......................... 345,505 Papers 2008/full/C97-full.pdfretrieved on Jan. 10, 2013). 2009, 0237401 A1* 9, 2009 Wei et al. ...................... 345/423 Extended European Search Report for EP Application No. EP 0975 5252, European Patent Office, Berlin, Germany, mailed on Jan. 23, FOREIGN PATENT DOCUMENTS 2013. International Search Report for PCT application No. PCT/US09/ JP 2005-322224 A 11, 2005 03215, completed Jul. 1, 2009, 11pgs. JP 2007-179563 A 7/2007 First Office Action, dated May 10, 2012, for Chinese Patent Appl. WO WO O2/43011 A1 5, 2002 2009801 19831.8, 9 pages including English translation. WO WO 2008/O53597 A1 5, 2008 Second Office Action, dated Dec. 11, 2012, for Chinese Patent Appl. 2009801 19831.8, 8 pages including English translation. OTHER PUBLICATIONS Supplementary European Search Report, dated Jan. 23, 2013, for European Patent Appl. No. 09755252.5, 7 pages. Tatarinov, A. (Feb. 2008). Instanced tessellation in DirectX10. In Yokomizo Kenji. "Chapter 1 Experience LSI Designing Using HDL GDC 08: Game Developers’ Conference 2008.* (Hardware Description Language), pp. 24 to 38, Issue 4, vol. 10, Tatarchuk, N. (2007). Real-time tessellation on GPU. In Course 28: Apr. 1, 2005, Japan, CQ Publishing Co., Ltd., Design Wave Maga Advanced Real-Time Rendering in 3D Graphics and Games. ACM Ze. SIGGRAPH 2007.* Office Action dispatched Aug. 21, 2013, in Japanese Patent Applica Maxim Kazakov. 2007. Catmull-Clark Subdivision for geometry tion No. 2011-511626, Mr. Hayakawa Yuji et al., drafted Aug. 15, shaders. In Proceedings of the 5th international conference on Com 2013 with English language translation. puter graphics, virtual reality, visualisation and interaction in Africa English language abstract of Japanese Patent No.JP 2001-204957 A (AFRIGRAPH07), Stephen N. Spencer (Ed.). ACM, New York, NY. European Patent Office, espacenet database Worldwide. USA, 77-84.* English language abstract of Japanese Patent No.JP 2001-250128 A “GLSL Geometry Shaders' http://web.engr.oregonstate.edu/~mb? European Patent Office, espacenet database Worldwide. glman/ClassNotest geometry shader.pdf Class Note created on Jan. English language abstract of International Patent Publication No. 15, 2007. Retrieved on Sep. 7, 2013.* WO 2008/053597 A1 European Patent Office, espacenet database– “GLSL Core Tutorial Vertex Shader” http://www.lighthouse3d. Worldwide. com/tutorials/glsl-core-tutorial/vertex-shader? Retrieved on Sep. 7. 2013 * * cited by examiner U.S. Patent Sep. 16, 2014 Sheet 1 of 7 US 8,836,700 B2 O O v a 90]. U.S. Patent Sep. 16, 2014 Sheet 2 of 7 US 8,836,700 B2 Z"SOIH ÅRHLE||NOES) HECTV/HS U.S. Patent Sep. 16, 2014 Sheet 3 of 7 US 8 9 836,700 B2 009 NO|_|\/TTEISSEL ENISONE ZOZ U.S. Patent Sep. 16, 2014 Sheet 4 of 7 US 8,836,700 B2 007 U.S. Patent Sep. 16, 2014 Sheet 5 of 7 US 8,836,700 B2 500 501 502 ls Tessellation Requested? 504 Compute Tessellated Vertexes And New Connectivity Data At Tessellation Engine 506 Compute Modified Vertex Data At Vertex Shader 508 Receive Connectivity Data At Geometry Shader 510 Retrieve Primitives Corresponding To Connectivity Data And Process At Geometry Shader 512 END FIG. 5 U.S. Patent Sep. 16, 2014 Sheet 6 of 7 US 8,836,700 B2 ( ) Processor 604 ( ) Main Memory 608 ( ) Display Interface 602 K- - - - - - Display 630 Secondary Memory 610 Hard Disk Drive Communication 612 Infrastructure 606 Removable Storage Removable Drive 614 Storage Unit 618 Removable Interface 620 Storage Unit 622 Interface 624 Communications Path 626 FIG. 6 U.S. Patent Sep. 16, 2014 Sheet 7 of 7 US 8,836,700 B2 00/ ?ueMpueHSO??de19 US 8,836,700 B2 1. 2 SYSTEM, METHOD, AND COMPUTER whelm the vertex and geometry shaders, and may not result in PROGRAMI PRODUCT FORA a noticeably improved rendering of the object, particularly TESSELLATION ENGINE USINGA when the object being rendered is located at a significant GEOMETRY SHADER distance from the viewing plane. Prior implementations have relied on using a tessellation CROSS-REFERENCE TO RELATED engine to increase the number of primitives immediately prior APPLICATIONS to the vertex shader stage. For example, commonly-owned U.S. Patent Application Publication No. 2004/0085312 to The present application claims the benefit of U.S. Provi Buchner et al. (application Ser. No. 10/287.143), which is sional Application No. 61/056,936, filed on May 29, 2008, 10 herein incorporated by reference in its entirety, discloses a titled “System, Method, and Computer Program Product for a method and apparatus for performing Such tessellation. How Tessellation Engine Using a Geometry Shader', which is ever, previous implementations have simply allowed for out incorporated herein by reference in its entirety. put from the tessellation engine to be processed by the vertex BACKGROUND 15 shader, then transmitted to the rasterizer for rendering to the display. If a developer using a prior implementation wanted to 1. Field of the Invention increase the primitive count by tessellating the primitives, The present invention relates generally to optimizing tes then running the tessellated primitives through the geometry sellation operations in a graphics processing unit. shader, it was necessary to store the tessellated output some 2. Background where in memory. The developer would then need to re-run A graphics processing unit (GPU) is a special-purpose the GPU pipeline on the tessellated data in order to allow the integrated circuit optimized for graphics processing opera geometry shader to perform its computations on the tessel tions. A GPU is often incorporated into computing devices lated data. (e.g., personal computers, rendering farms or servers, hand Accordingly, what are needed are improved techniques to held devices, digital televisions, etc.) used for executing 25 reduce the rendering costs attributed to tessellation when applications with demanding graphics processing needs. Such further processing tessellated data in a geometry shader. as, for example, video game applications. In most modern GPU implementations, the processing of SUMMARY graphics operations is broken into various functional units, each located within a different stage of a processing pipeline. 30 Embodiments of the invention include a method for pro Typically, input to the GPU is in the form of a set of vertices viding tessellated primitive data to a geometry shader. The as well as some connectivity information identifying how the method comprises computing a set of tessellated vertices and vertices are connected to each other.