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Intel® Manycore Platform Software Stack (Intel® MPSS) User's Guide March 2016

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Intel® Manycore Platform Software Stack (Intel® MPSS) User's Guide March 2016 Intel® Manycore Platform Software Stack (Intel® MPSS) User's Guide March 2016 Copyright © 2013-2016 Intel Corporation All Rights Reserved US Revision: 3.7 World Wide Web: http://www.intel.com Disclaimer and Legal Information You may not use or facilitate the use of this document in connection with any infringement or other legal analysis concerning Intel products described herein. You agree to grant Intel a non-exclusive, royalty-free license to any patent claim thereafter drafted which includes subject matter disclosed herein. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document. All information provided here is subject to change without notice. Contact your Intel representative to obtain the latest Intel product specifications and roadmaps. The products described may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Copies of documents which have an order number and are referenced in this document may be obtained by calling 1-800-548- 4725 or by visiting: http://www.intel.com/design/literature.htm Intel, the Intel logo, Intel Xeon Phi, and Xeon are trademarks of Intel Corporation in the U.S. and/or other countries. *Other names and brands may be claimed as the property of others. Copyright © 2016, Intel Corporation. All rights reserved. Intel® Manycore Platform Software Stack (Intel® MPSS) User's Guide March 2016 2 Revision History Revision Description Revision Date Number Version 3.7 Release of the 3.7 Intel® MPSS User’s Guide March 2016 Version 3.7 Initial draft of the 3.7 Intel® MPSS User’s Guide November 2015 Version 3.6 Release of the 3.6 Intel® MPSS User’s Guide September 2015 Version 3.6 Initial draft of the 3.6 Intel® MPSS User’s Guide August 2015 Intel® Manycore Platform Software Stack (Intel® MPSS) March 2016 User's Guide 3 Table of Contents 1 About This Manual ........................................................................................ 10 1.1 Overview of this Document ............................................................................. 10 1.2 Intel® MPSS Release History ............................................................................ 11 1.2.1 Technology Previews in this Release ...................................................... 11 1.3 Notational Conventions ................................................................................... 12 1.3.1 Symbols within Normal Text ................................................................. 12 1.3.2 Code Conventions ............................................................................... 12 1.4 Terminology .................................................................................................. 14 2 Intel® MPSS at a Glance ................................................................................ 16 2.1 Intel® Xeon Phi™ Coprocessor Hardware and System Architecture ....................... 16 2.2 Programming Models and the Intel® MPSS Architecture ...................................... 18 2.2.1 Programming Models ........................................................................... 18 2.2.2 Intel® MPSS Software Architecture and Components ............................... 20 2.2.3 Coprocessor Networking ...................................................................... 23 2.3 Supported Productivity Tools ........................................................................... 27 2.4 Related Documentation ................................................................................... 27 2.4.1 SCIF Documentation ........................................................................... 27 2.4.2 SCIF Tutorials Location ........................................................................ 28 2.4.3 COI Documentation ............................................................................. 28 2.4.4 MYO Documentation ............................................................................ 28 2.4.5 Micperf Documentation ........................................................................ 28 2.4.6 Intel® Xeon Phi™ Coprocessor Collateral ................................................ 28 3 Intel® Xeon Phi™ Coprocessor Installation Process ...................................... 30 3.1 Hardware and Software Prerequisites ............................................................... 30 3.1.1 Host System HW ................................................................................. 30 3.1.2 BIOS Configuration ............................................................................. 30 3.1.3 Supported Host Operating Systems ....................................................... 30 3.1.4 Host Operating System Configuration .................................................... 31 3.1.5 Root Access ....................................................................................... 31 3.1.6 SSH Access to the Coprocessor ............................................................. 31 3.1.7 Init Scripts ......................................................................................... 32 3.1.8 Network Manager ................................................................................ 33 3.2 Intel® Xeon Phi™ Coprocessor Physical Installation ............................................ 34 3.2.1 Workstation Considerations .................................................................. 35 3.2.2 Cluster Considerations ......................................................................... 36 3.3 Validate Coprocessor Physical Installation ......................................................... 38 3.4 Base Intel® MPSS Installation .......................................................................... 39 3.4.1 Obtain the Intel® MPSS Distribution ...................................................... 39 3.4.2 Uninstall Previous Intel® MPSS Installation ............................................. 39 3.4.3 Rebuild Intel® MPSS Host Drivers ......................................................... 40 3.4.4 Update Coprocessor’s Flash & SMC Firmware .......................................... 41 3.4.5 Initialize Intel® MPSS Default Configuration Settings ............................... 44 3.4.6 Start Intel® MPSS ............................................................................... 45 3.4.7 Validate Base Intel® MPSS Installation ................................................... 45 3.5 Basic Workstation Installation is Complete ........................................................ 49 3.6 Network Configuration .................................................................................... 49 3.6.1 MAC Address Assignment ..................................................................... 49 Intel® Manycore Platform Software Stack (Intel® MPSS) User's Guide March 2016 4 3.6.2 IP Address Considerations for External Bridging ...................................... 49 3.6.3 Configuring a Basic External Bridge ....................................................... 50 3.6.4 Defining and Implementing Exported/Mounted File Systems ..................... 51 3.6.5 Configuring the Host Firewall ................................................................ 52 3.6.6 How to Install Lustre* on the Coprocessor ............................................. 53 3.7 Installing OFED with Intel® MPSS Support (optional) .......................................... 54 3.7.1 Supported OFED distros ....................................................................... 55 3.7.2 Install TSR ......................................................................................... 55 3.7.3 Install OFED-3.12-1 ............................................................................ 57 3.7.4 Install OFED 3.18, 3.18-* .................................................................... 57 3.7.5 Install Mellanox* OFED 2.4 .................................................................. 58 3.7.6 Starting OFED .................................................................................... 58 3.7.7 Stopping/restarting OFED .................................................................... 59 3.7.8 Validate OFED Installation .................................................................... 59 4 Configuring and Booting Coprocessor’s Operating System ........................... 61 4.1 Assisted Configuration and Control ................................................................... 62 4.1.1 Configuration Files .............................................................................. 62 4.1.2 Initializing, Updating and Resetting the Configuration Files....................... 67 4.1.3 micctrl Directory Path Modifiers ............................................................ 68 4.1.4 Boot Configuration .............................................................................. 71 4.1.5 Assisted Boot Process .......................................................................... 73 4.2 Manual Configuration and Control .................................................................... 75 4.2.1 Directly Editing (and Persisting) Coprocessor /etc Files ............................ 76 4.2.2 NFS Mounting the Root and Other File Systems ...................................... 77 4.2.3 Driver sysfs Settings ........................................................................... 78 4.2.4 Coprocessor-side Kernel Commandline Parameters ................................
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