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JANUARY/FEBRUARY 2019 electronicdesign.com
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JANUARY/FEBRUARY 2019 VOLUME 67, ISSUE 1 IN THIS ISSUE
FEATURES
12 The Digital World Faces Uncharted Waters, Too Objective Analysis highlights issues facing the industry as a new year begins and gives a glimpse of familiar basics in a market forecast.
20 For Data Centers, It’s All About Cores The one common theme about the data center from AMD, ARM, Intel, NVIDIA, and Xilinx is the more cores, the better. 12 26 Your Next SoC Will Probably Include AI Acceleration It may be possible to get an SoC without AI acceleration, but the trend is to provide mainstream machine-learning support.
28 5G is Almost Here 5G will obviously make an impact in 2019, but how much of one depends on what you’re doing.
30 Don’t Do It: Disabling SELinux Implementing SELinux can defnitely improve the security of a system— 28 but only if you actually use it.
36 Implementing Gas Sensors for Indoor Air-Quality Applications Recent advances in the types of gas sensors available have created new opportunities for engineering smart products that can consider the air quality and smell.
40 Living Without Halogens and Phthalates More restrictive regulations like those from EU’s REACH are pushing companies to produce products free from these substances. What are the implications?
45 Twin DFT and Mission-Critical Safety Apps for Pre-Silicon Design Verification Combining Apps with an emulation environment makes it possible to increase fault coverage, increase production yield, and reduce ATE test time and cost. 40
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4 ON ELECTRONICDESIGN.COM 49 IDEAS FOR DESIGN 8 EDITORIAL 78 COMMUNIQUE 10 NEWS & ANALYSIS 79 AD INDEX 80 EDITORIAL MISSION: LAB BENCH To provide the most current, accurate, and in-depth technical coverage of the key emerging Third Time is a Charm with ELVIS III technologies that engineers need to design tomorrow’s products today.
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Mechanical Marvels Make All Roads Led to CES for the Their Mark at CES Latest Vehicle Tech Te Consumer Electronics Show is all about electronics, but Plenty of new automotive innovations, from thermal imaging sometime devices need to be a bit more creative mechanically. to a robotic suitcase, were on display at this year’s Consumer Senior Technology Editor Bill Wong takes a look at some of Electronics Show, drawing lots of trafc among the attendees. this year’s standouts. https://www.electronicdesign.com/industrial-automation/ https://www.electronicdesign.com/automotive/all-roads-led-ces- mechanical-marvels-make-their-mark-ces latest-vehicle-tech
5 Tech Predictions for 2019: Ion-Driven Model Aircraft Entering the Decade of Flies without Moving Parts Disproving the “it can’t be done” conventional wisdom, an Disruption MIT team has built and fown an aircraf with 5-meter span From AI to healthcare to the unleashing of IoT, Screaming that’s powered by a silent ion-based sonic wind operating at Circuits’ Duane Benson ofers up his take on what will be 40 kV. major technology/market disrupters over the next 10 years. https://www.electronicdesign.com/industrial-automation/5-tech- https://www.electronicdesign.com/power/ion-driven-model- predictions-2019-entering-decade-disruption aircraf-fies-without-moving-parts
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4 JANUARY/FEBRUARY 2019 ELECTRONIC DESIGN PUSH PERFORMANCE TO THE TOP
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6 JANUARY/FEBRUARY 2019 ELECTRONIC DESIGN 10 MHz Distribution Amplifers
• Sine wave outputs (+13dbm) • Amplitude leveling • Low additive phase noise • High channel-to-channel isolation • High return loss
FS730 and FS735 series ... starting at $1250 (U.S. list)
The FS730 and FS735 10 MHz distribution amplifers for other applications. Multiple units can be from SRS provide state-of-the-art solutions to daisy-chained for easy expansion. challenging signal distribution tasks. Please visit www.thinkSRS.com for details. These distribution amplifers use an input limiter design, which removes amplitude modulation from the signal, provides fxed amplitude outputs and blocks input noise. Virtually any 10 MHz waveform with a duty cycle near 50% may be used as an input. AGC based amplifers degrade broadband The FS735 model provides fourteen 10 MHz output noise.
BNC connectors on the rear panel, with status indicators FS730/FS735 uses a limiter to remove on the front panel. The half-rack sized FS730 model spurs and maintain gives seven 10 MHz outputs and is available in both low noise. bench-top and rack-mount forms. Noise (dBc/Hz)Single Sideband Phase
With mix and match capability, the FS735 can also Frequency Ofset from Carrier (Hz) be confgured with 10 MHz, 5 MHz, Broadband, Additive phase noise in 10 MHz Distribution Amplifers: and CMOS Logic distribution amplifers side-by-side Limiter vs. AGC Designs
Stanford Research Systems (408)744-9040 www.thinkSRS.com Editorial
WILLIAM WONG | Senior Technology Editor [email protected] Addressing the Growing Complexity of Embedded Systems
mbedded-system design has design must address them. It means not byte out of storage or use all of a system’s never been more exciting and doing dumb things like putting a back- potential bandwidth is typically a fool’s Echallenging. New technologies door in a device or assuming an end-user errand. ranging from 5G to PCI Express Gen 5 license agreement (EULA) will protect a Developers should also take advan- to the increased use of machine learning company when technology errors occur tage of improvements in simulation, test, (ML) and artificial intelligence (AI) give after products are in the field. and measurement. Many of these new or developers more choice and more deci- Code quality is also becoming critical improved tools will address new tech- sions to make, let alone learn. to all types of embedded systems, not nologies like 5G and PCIe 5, but a host of Dealing with new technologies has just those dealing with safety- and secu- existing tools are becoming more read- always been the bane and allure of rity-related products like military, avion- ily available and economical. Simulation embedded systems. The problem these ics, or medical. There’s increased inter- systems can also expose more debugging days is that other aspects, such as safety, est in programming languages like Rust information that’s not available on physi- security and privacy, are part of the puz- and Ada/SPARK for general embedded cal systems. zle as well and can’t be overlooked. These applications, and C and C++ develop- Platforms like GPGPUs, ML/AI aspects are no longer optional or uncom- ers are using tools like static analysis accelerators, and eFPGAs are chang- mon design issues. Almost every system more frequently to improve code quality. ing the playing field. NVIDIA’s Jetson This is more arduous, though, because C TX2 enables products like Live Plan- actually makes it difficult for these tools et’s virtual-reality video-conferencing to provide the level of checking support- camera that knits together video from ed by other languages. 16 4K cameras (see figure). The newer Program size and performance are Jetson AGX Xavier includes even more still important, but it’s easier and often advanced ML/AI acceleration that more cost-effective to buy more memo- improves performance by a factor of 10. ry or performance for most embedded This represents just one example of the applications. Trying to squeeze the last magnitude of performance increase for new hardware. Live Planet’s virtual-reality 360-degree Performance disruptions aren’t the camera for video conferencing uses NVIDIA’s only trend. The growth of RISC-V is dis- Jetson TX2 to knit video streams from 16 4K rupting Arm’s dominance of the embed- cameras. ded and custom SoC designs even while Arm is pushing into the enterprise and cloud, again. Unfortunately, this industry has other disruptions that aren’t related to techni- cal advances. Political changes, tariffs, and so on are putting a damper on avail- ability and sales. Distribution-chain con- siderations may now be a bigger part of the design process. Then again, if dealing with all of this change was easy, then anyone could do it.
8 JANUARY/FEBRUARY 2019 ELECTRONIC DESIGN
MICRON MOVES AHEAD WITH Plans to Take Over IM Flash Technologies
icron Technology is moving forward with plans Mto take over the IM Flash Technologies business it founded with Intel in 2006. In October, the company said that it planned to spend $1.5 billion to buy Intel’s 49% stake in the joint venture, which is responsible for the development and manufacturing of 3D XPoint memory chips. Micron recently announced that it had exercised its right to take over Intel’s share in IM Flash Technologies, which cur- rently employs around 1,700 people. IM Flash will continue supplying Intel with XPoint memory wafers for a year after the XPoint is designed with thin columns of memory cells deal closes. The terms of the agreement mean that Intel can stacked tightly in a crosshatch pattern, allowing the cells to be close the deal at any point before January 14, 2020. accessed independently, resulting in lower latency and higher “The IM Flash acquisition will enable Micron to acceler- endurance versus NAND flash. The memory is also non- ate our R&D and optimize our manufacturing plan for 3D volatile, meaning that it can save information even after power XPoint,” said Micron chief executive officer Sanjay Mehrotra, is cut. That contrasts with chips based on DRAM, which is adding that it will “provide us with the manufacturing flexibil- erased without constant power but can be altered and accessed ity and highly skilled talent to drive 3D XPoint development faster than XPoint. and innovation, and to deliver on our emerging technology Micron plans to release chips based on 3D XPoint tech- ro a d m ap.” nology in 2019, while Intel introduced its Optane persistent After building the second generation of the XPoint technol- memory product line last year. Intel is building memory con- ogy together in the first half of 2019, Intel and Micron plan to trollers into its latest Cascade Lake and Cooper Lake server stop collaborating on future developments. That also means chips to support Optane, which could challenge DRAM as independently funding future XPoint memory nodes. (Last main memory in data centers. The Santa Clara, California- year, the companies also announced that they would discon- based company has some high-profile customers, including tinue their joint development of NAND flash memory. Google. n
ENERGY-HARVESTING CHIP Startup Funded by Amazon Web Services
WILIOT, WHICH IS building Bluetooth chips that can be powered by The sensors can be used in all sort of devices unconnected to ambient radio frequencies, has raised $30 million in funding from the Internet of Things, ranging from spare parts in a manufactur- Qualcomm Ventures, Samsung Venture Investment, Avery Denni- ing plant to the packaging around consumer goods. The sensors son, and Amazon Web Services, among others, as it moves closer could be pasted on products during production to track them from to entering production. The funding increases the company’s total the factory to the warehouse to the store. They could also replace to $50 million since it was founded in 2017. clothing tags, giving customers the ability to scan for more details. The chips can be slapped on tags as small as a fingernail, as Wiliot, which has around 40 employees and is based in San thin as a sheet of paper and that incorporate sensors. According Diego, Calif., is the second company founded by the team behind to Wiliot, the devices can broadcast data such as location, weight, semiconductor startup Wilocity. The company raised roughly $100 and temperature over Bluetooth. Wiliot’s technology lets them million in investment to build chips based on the next-generation communicate with smartphones or other Bluetooth devices using WiFi standard—more commonly called WiGig—targeting the PC energy harvested from Wi-Fi, cellular, and Bluetooth—no batteries and peripherals markets. Qualcomm bought it for around $400 required. million in 2014. n
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The Digital World Faces Uncharted Waters, Too How should one operate in the current political, social, and economic climate while keeping pace with technological change? Objective Analysis highlights issues facing the industry as a new year begins and gives a glimpse of familiar basics in a market forecast.
s 2018 came to a close, off now. For Europe and much of the rest to “Brexit” the European Union (that the economy in the of the world, some countries have good doesn’t sound very “united”), but that United States contin- economies while others are struggling. may or may not take place smoothly. ued to be strong (the While the authors’ previous annual Separately, the Executive branch of roller-coasterA stock market withstand- outlooks have noted politics (see “How the United States is deep-sixing existing ing). Employment is officially high, but Will Politics Impact the Semiconductor alliances and trade agreements, putting many people are under-employed and Industry and Overall Business Climate?” up walls against neighboring countries, salaries and wages generally haven’t ris- and “IoT Security Getting Well-Deserved and threatening stiff tariffs on certain en with the cost of living. The U.S. Fed- Attention” on www.electronicdesign. goods from specific countries. This is eral Reserve kept the prime lending rate com), in 2018 executive action and initiated by someone who fancies him- near zero for seven years to stimulate the policy influences intensified, with vari- self to be a master negotiator, but may economy with low-cost lending, only ous forms of “social responsibility” also not have a good understanding of how raising it in December 2015. Through causing unforeseen disruption in the normal business—or Washington—is 2017 and 2018, the rate rose to 2.25%, digital world. run. Other countries, many with author- pushing residential mortgage rates to A surge of “nationalism” has citizens itarian heads of state, are responding in nearly 5% from a prior low of near 3.5%. and politicians wanting to topple the kind. At least Japan—very important in In China, the economy has been strong established world order. Part of the the electronics world—seems to be stay- and growing, although it may be leveling United Kingdom decided it wanted ing low-key.
12 JANUARY/FEBRUARY 2019 ELECTRONIC DESIGN From Concept to Reality
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for Connectivity One signal of the economy’s strength or beliefs, and personal attacks (“sham- is the stock market, which in the U.S. ing”) over social networks has revealed Anytime, has surged on the order of 30% over a new dark side of the wide-open inter- the last two years. However, volatility of net, (electronic) social networks, and the stock market has increased signifi- the press/media. Anywhere cantly, with huge, almost-daily swings, This has subjected many companies reflective of dramatic changes initi- and their executives to a good grill- ated in the political arena that greatly ing by lawmakers/government bodies, alter the business environment, espe- the wrath of the public, the initiation cially with trade wars between nations of monitoring systems to detect and arising in a way not seen for decades. control nefarious activities, and poten- With no resolution of these tensions tial revenue downsides from users and in sight, corporate leaders must craft advertisers. On one hand, some govern- their business strategies factoring in ments or corporations might want to greater risk—risk that’s outside of their restrict—or capitalize on—the content control. their citizens or users can access over its wires—for good and for bad. On anoth- TECHNOLOGY WILL ADVANCE er hand, there’s little agreement on who High Tech continues to march for- should say what qualifies as acceptable ward, dependably, as it always has: fast- content. Assuring small cell and DAS er, better, cheaper, higher integration. Since the internet is expected to be Network reliability Today, the advance of technology is one a real-time network with content that of the few things that can be counted on can be anything from simple ASCII text in a positive light. to encoded streaming high-definition The protection of intellectual-proper- video, computers running sophisti- ty (IP) rights remains vital to the ongo- cated algorithms are the only systems ing investment in research and develop- that could possibly monitor all of the ment in high tech. However, IP abuse is traffic, at speed. “Artificial intelligence” contentious and an impediment to fair would have to be something more than and open markets. a marketing term for such computers to Corporate consolidation is slowing stay ahead of the moment-by-moment a bit, with a number of companies in trends, let alone the social media bots SX Series the electronics industry having already that may flood the network. RF Surge Protection availaible merged. Some acquisitions have been The exploitation of consumers’ for online purchase blocked, slowed, or otherwise with- rights and privacy has been questioned drawn. The global nature of our indus- as more and more data on these end- Reliable surge solutions in-stock try can make government approval users has been surreptitiously collected for same-day shipping. difficult. Alliances and partnerships for vague purposes. In May 2018, the • DC Block and DC Pass versions between companies are vital, with tech- European Union’s (EU) General Data • Frequency ranges from DC to 11 GHz nology standards benefitting all who Protection Regulation (GDPR) became make use of them. The reach of Android effective, requiring more than a tacit • 4.3-10, 7/16" DIN, N-Type, TNC and SMA connectors has grown tremendously. While some “your use of this site implies…” caution parts of the business have disaggregated, but an explicit agreement by the per- • Up to 40 kA surge rating many companies pursue further verti- son on whom the data is collected. The • Ultra-low PIM (-130 dBm typically) cal integration, with nearly all engaging EU acted but few other countries have • Weatherproof when installed more heavily in software. followed suit. Moreover, corporations drag their feet embracing such policies BE RESPONSIBLE because of the revenue and marketing It may seem far upstream from semi- value they can derive from the data. conductors and most electronic hard- Consumers young enough to under- ware, but the proliferation of “fake stand what the word means, might just Learn more at PolyPhaser.com or call us at +1.208.635.6400. news,” hate speech directed at groups shrug, “meh.”
14 JANUARY/FEBRUARY 2019 ELECTRONIC DESIGN Meeting demand for connectivity anytime, anywhere!
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This chart shows the lowest weekly DRAM and NAND flash spot market prices for the past two years, making it clear that NAND flash prices (red line, right axis) have already declined significantly and that DRAM prices (black line, left axis) have just begun their downturn.
A POUND OF FLESH matching and quirks of human behavior Ultimately, most of these new social- and therefore could increase demand for imposed issues layering over the normal computing resources (good for semis). market-driven supply-and-demand fac- But this isn’t likely to support a new fab tors that impact the next few years’ out- and is far more nuisance than energizing. look place new burdens on the compa- nies providing the services sought by the MEMORY LOSSES Reliable Surge user. They consume additional resourc- An Objective Analysis of the DRAM Protection Solutions es, software, and computing power to and NAND flash-memory markets mitigate this new noise and distraction. gives valuable insight to how the greater Transtector Systems specializes The effort and cost add to the overhead semiconductor market will fare in 2019. in protection of highly sensitive, of a business, much like the need for a When revenues from these two tech- low voltage equipment through legal team, building maintenance, or an nologies grow or collapse, the rest of its patented, non-degrading accounting department. However, it also the semiconductor market reacts the silicon diode technology and joins issues like security that are likely to same, only more modestly, without the custom filters. become ever-more sophisticated as bad extraordinary gyrations suffered by • AC | DC Surge Protection actors try to overcome the defenses that NAND and DRAM. • Data Signal Surge Protection are erected. Because DRAM and NAND flash are • EMP | EMI Hardened Devices It would be hard to say these issues undifferentiated commodities, systems • Integrated Cabinets make companies or society more pro- can replace any provider’s product with • Available for SAME-DAY ductive, although they will take more any other provider’s product, so buyers SHIPPING manpower (peoplepower) and com- largely choose suppliers based on price. putational bandwidth to detect and In a commodity market, an oversup- manage infractions. Perhaps these are ply results in a price collapse, and that’s opportunities for services offered by where the market was going late in 2018. third parties to handle. However, like The figure shows the lowest weekly security, it’s just one more moving target DRAM and NAND flash spot market that’s difficult to assign an effectiveness prices for the past two years. Thus, it’s Ensure Network Performance or quality number to. clear that NAND flash prices (red line, with Transtector The defense mechanisms likely involve right axis) have already declined sig- www.Transtector.com sophisticated algorithms for pattern- nificantly and that DRAM prices (black +1.208.635.6400
16 JANUARY/FEBRUARY 2019 ELECTRONIC DESIGN QUALITY | RELIABILITY | SAFETY I2R 75K SERIES – AC Surge Protection
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DC-DC CONVERTERS line, left axis) have just begun their produce more flash than the market 2V to 10,000 VDC Outputs downturn. needed, so prices started to fall. The Spot market prices always have great- chart shows a 78% drop from $0.29/ 1-300 Watt Modules er price swings than the contract mar- GB down to $0.06/GB. Remember Regulated/Proportional/Programmable ket. The spot market is only a very small that this is the spot market, and con- Isolated/Single/Dual Outputs (<5%) portion of the overall market, tract prices react far less dramatically. High Reliability though, so these numbers need to be • Once NAND contract prices fell Greater than 1,000,000 hrs. considered with some caution. below the production cost of planar Mil Hbk 217F Some industry participants have NAND (about $0.15/GB), eligible • hypothesized that the DRAM market’s vendors converted excess planar Military Upgrades consolidation will create an “oligopoly” NAND capacity to DRAM manu- Expanded operating temperature that will cause prices to “normalize,” facture. This accelerated the onset of -55˚ to +85˚ C, no derating required e.g. stop gyrating the way they always a DRAM glut that would have hap- • have in the past. While this is a com- pened in early 2019 anyway, thanks Environmental Screening forting thought for memory makers, to an overabundance of capital Selected Screening, Mil Std 883 there’s no evidence that normalization spending in late 2016. • is likely to occur. A reduction in the ULTRA Miniature number of suppliers doesn’t naturally The price collapse may not really help From 0.5" x 0.5" x 0.2" • lead to a change in price behavior unless OEMs. These companies have been suf- Surface Mount/Thru-Hole only a single company remains, creat- fering from chip shortages and high ing a monopoly. Two or more compet- prices for a couple of years, making it • C stom Models • US Man fact red ing commodity suppliers will see price a challenge to remain profitable. While • AS 9100 Approved gyrations, known as the “Commodity a price reduction will lower the OEM’s Cycle.” cost of goods, which can lead to higher High Reliability AC/DC Power S pplies, Transformers Collusion between sellers offers an profits, the wider availability of supply and Ind ctors alternate way to prevent a price collapse, might motivate them all to overproduce, VISIT OUR EXCITING but this is illegal so it seldom occurs, which will hurt their prices. NEW WEBSITE and when it does it triggers trade sanc- Another phenomenon that results www.picoelectronics.com tions and even imprisonment for the from a price collapse is the possibility Featuring our easy-to-use offenders. that OEMs who haven’t managed their product Search Wizard! Thus, the current price downturn will inventory in anticipation of a price become just as severe of a collapse as any reduction, may need to take an inven- that have occurred before, so the next tory write-down against their profits. two years are most likely to be profitless It’s only natural for a company to build for DRAM and NAND flash makers. a larger inventory than normal during This is why Objective Analysis expects a shortage. If that shortage rapidly shifts a semiconductor revenue decline of 5% to an oversupply, prices collapse and or more in 2019. A full explanation of the inventory holder will suddenly find our outlook for 2019 appears in a video their multi-million-dollar inventory is See PICO’s full line catalog at found here: https://www.wesrch.com/ soon worth half as much. www.picoelectronics.com electronics/wevision-EL1J9YM-mem- Objective Analysis clients have been ory-market-forecast-2019-with-jim- ready for this, so they should be in good YOUR PROVEN SOURCE. handy-of-objective-analysis. shape. Others might be in trouble. Over 50 years providing There are two reasons the memory How will this play out over the longer reliable products. Over 2,500 Standard Modules. market got to this state: term? Most semiconductor cycles follow • NAND flash became oversupplied a pattern of “Two Years Up, Two Years 800-431-1064 once NAND makers found a way to Down” as long as there are no external efficiently produce 3D NAND. Until factors (like the 2008 Global Financial PICO ELECTRONICS, Inc. early this year, 3D NAND was more Collapse or the 2001 Internet Bubble 143 Sparks Ave., Pelham, New York 10803 Call Toll Free 800-431-1064 • FAX 914-738-8225 costly to produce than older planar Burst) to influence the cycle. But this E Mail: [email protected] NAND. Once NAND fabs started time, other factors are at play that might to be used efficiently, they started to prolong the downturn.
18 JANUARY/FEBRUARY 2019 ELECTRONIC DESIGN GOING UP?
DOWN?
STRAIGHT AHEAD?
M P D BAT T E RY H O L DE R S CA N B E F O U N D I N B U I L D I N G T R A N S P O RTAT I O N SYST E M S W W W. BAT T E RY H O L DE R S . C O M Industry Trends WILLIAM WONG | Senior Technology Editor
For Data Centers, It’s All About Cores
The one common theme about the data center from AMD, ARM, Intel, NVIDIA, and Xilinx is the more cores, the better.
he new and old data center may look similar from a rack standpoint, but inside it has radically changed. Multicore CPUs with dozens of cores are now the norm and they often sit side by side with TGPUs, FPGAs, and even custom accelerators. The rush to meet the machine-learning (ML) demand has fueled the migration for CPU-only configurations, though that’s only part of the drive. It also involves better development and deployment tools and allowing easier use of GPUs and FPGAs for non-ML applications that can take advantage of these architectures. One should not overlook how the data center is being mir- rored in the embedded space, albeit in a smaller, more tar- geted, low-power solution. Embedded developers have taken up hypervisors and virtual-machine (VM) support common in the data center to tackle the growing complexity of system- on-chips (SoCs) being used in everything from self-driving cars to process control systems.
CPUs IN THE DATA CENTER Intel remains the dominant player in the data center with its Xeon family, but AMD’s EPYC is giving Intel some stiff com- petition. Both processor families include versions that target the embedded space as well. AMD’s EPYC “ROME” uses TSMC’s 7-nm transistor tech- nology to double its performance per socket and quadruple its floating-point performance. Architectural advances for the Zen 2 cores include improved branch prediction, better instruction prefetch, an optimized instruction cache, and a larger op-cache. The floating-point support is now built around 256-bit data. EPYC also supports runtime Secure Memory Encryption (SME) and Secure Encrypted Virtualization (SEC). With SME, data in RAM is encrypted and decrypted when inside the 1. AMD’s “ROME” EPYC consists of a “chiplet” collection of 7-nm CPU. Data is encrypted before being written to RAM. CPU cluster (top) and a 14-nm I/O cluster (bottom) tied together with SME provides each VM with its own encryption keys. This a multi-die interposer.
20 JANUARY/FEBRUARY 2019 ELECTRONIC DESIGN allows an encrypted VM to be managed ing solutions that challenge the entry- GPUs IN THE DATA CENTER by a hypervisor that doesn’t have direct level and mid-range platforms. Its 7-nm Though 64 cores are a lot for CPUs, access to data within the VM. As with “Ares” Neoverse infrastructure, which the number pales in comparison to the SME, the support is transparent to the targets the cloud and IoT solutions, amount of cores in a GPU. Granted, operating systems and applications. builds on the Cortex-A76 architecture. GPU cores are simpler and target more I did mention more cores as being The challenge is that AMD and Intel are specific applications, but general-pur- important, and this EPYC chip will have established players with solutions that pose GPUs (GPGPUs) are becoming up to 64 of them. These are actually built include the high end. more flexible. Programming platforms from eight “chiplets” with eight cores each (Fig. 1). The I/O support is built using 14-nm technology. EPYC also has 128 PCI Express (PCIe) Gen 4 lanes, plus eight DDR4 memory channels to feed the cores. Intel’s Cascade Lake packs in 48 cores built from a pair of 24-core chips in a multichip package connected together using Intel’s Ultra Path Interconnect (UPI). Its dozen DDR4 memory chan- nels are designed to support Intel’s Optane DC persistent memory DIMMs in a hierarchical storage configuration (Fig. 2). A two-chip configuration con- nected by UPI provides 24 DDR4 mem- ory channels. Versions of this Xeon fam- ily will also support Intel’s Omni Path 2. Intel’s server storage hierarchy includes Optane DC, which involves DIMMs connected to Fabric. Current versions of Cascade memory channels along with DRAM. Lake use PCIe Gen 3, but PCIe Gen 4 is on the roadmap. AVX-512, the 512-bit version of Intel’s Advanced Vector Extensions, will likely be a determining factor for many developers. It packs 32, double precision floating-point numbers in a 512-bit vector that can be processed in a clock cycle. The system includes a pair of fused-multiply-add (FMA) units. Both AMD and Intel are tailor- ing their server support to address AI and ML. Intel’s Vector Neural Network Instructions (VNNI) that are part of the AVX-512 support represents just one example. These can be especially impor- tant in embedded applications where other ML accelerators may not be avail- 3. NVIDIA’s DGX2 combines (1) 16 TESLA V100 GPU modules with (2) a total of 512 GB of able. HBM2 memory using a (3) dozen NVSwitch chips. It also has (4) eight EDR InfiniBand or 100- ARM has been helping its partners Gb Ethernet ports, (5) a PCIe switch complex, (6) two Intel Xeon Platinum processors, (7) 1.7 push into the data-center space, offer- TB of system memory, (8) dual 10/25-Gb Ethernet ports and (9) 30 TB of NVMe SSD storage.
GO TO ELECTRONICDESIGN.COM 21 Cores in the Data Center
MD’s Radeon Instinct MI60 compute card (Fig. 4) uses AMD’s Infinity Fabric, which can connect up to two GPU hives that consist of four MI60 GPUs in a single server. The MI60 is also built on 7-nm Atechnology that takes of advantage of AMD’s Vega GPU architecture with 64 compute units and 4096 stream processors.
half-length card has only 4 GB of mem- ory and foregoes the compute units to target embedded applications that need floating-point acceleration. NVIDIA’s Volta and AMD’s Vega, like most GPGPUs these days, incorpo- rate deep-learning support. This usu- ally includes the ability to munch 8-bit integers (INT8) along with 16-, 32- and 64-bit floating point. The INT8 support is typically used with neural-network training and inference while floating point is used for more conventional computation.
4. AMD’s Radeon Instinct MI60 compute card is based on AMD’s Vega GPU architecture. FPGAs IN THE DATA CENTER One of the biggest changes coming in like OpenCL have pulled GPGPUs into The Tesla V100 GPU uses the Volta the data center is the use of FPGAs like the programming mainstream and they architecture that’s also found in the Jet- Intel’s PSG Stratix 10 (Fig. 5) and Xilinx’s were the initial workhorses in the rise of son AGX Xavier. Targeting embedded Alveo (Fig. 6). Part of the change is due AI/ML applications. They remain the applications, this single-chip solution to hardware, but the biggest change is in preferred training platform in the cloud. incorporates multiple ARMv8 cores the software. NVIDIA and AMD are the main play- and accelerators, including two NVID- The PSG Stratix 10 is a member of ers when it comes to high-performance IA deep-learning accelerators (NVD- Intel’s Programmable Acceleration Card GPGPUs, with ARM, Imagination, and LAs). (PAC) series. It has an FPGA with 2.8 Intel providing integrated offerings that AMD’s Radeon Instinct MI60 com- million logic elements, 32 GB of DDR4 show up in CPU/GPU SoCs. pute card (Fig. 4) uses AMD’s Infinity using four memory channels, and x16 NVIDIA has taken the high ground Fabric, which can connect up to two GPU PCIe Gen 3. The Stratix 10 FPGA is when it comes to GPUs. Its NVLink hives that consist of four MI60 GPUs in a based on Intel’s Hyperflex FPGA archi- connection is supported by its 16-port single server. The MI60 is also built on tecture using Intel’s 14-nm Tri-Gate pro- NVLink NVSwitch and Tesla V100 GPUs 7-nm technology that takes of advantage cess. It has a pair of QSFP28 network that have a half-dozen NVLink con- of AMD’s Vega GPU architecture with interface sockets. nections. This allows them to build the 64 compute units and 4096 stream pro- Xilinx’s Alveo U280 is the top-end DGX2 (Fig. 3) with 12 NVSwitch chips cessors. The chip incorporates 32 GB of board with a 16-nm Xilinx UltraScale and 16 GPUs that act like a single system HBM2 memory with ECC. The HBM2 FPGA. It has 8 GB of HBMS2 mem- in much the same fashion as a CPUs. It has a bandwidth of 1 TB/s. In addition, ory with a 460-GB/s bandwidth. The has 512 GB of HBM2 high bandwidth a x16 PCIe Gen 4 interface supports the boards have a x16 PCIe Gen 4 interface memory, 1.7 TB of system memory, and ROCm Open Ecosystem. A single board that supports CCIX. CCIX is a cache- 32 TB of NVMe SSDs; a pair of Intel Xeon delivers 59 TOPS of INT8, 29.5 TFLOPS coherent protocol that runs atop PCIe CPUs provide management support. The of FP16, 14.7 TFLOPS of FP32 and 7.4 hardware in parallel with the PCIe pro- DGX2 is designed for the data center TFLOPS of FP64. tocol. where multiple DGX2s are likely to reside The Instinct family includes the FPGA boards have been available for side-by-side. MI60, MI50, MI25, and M8. The M8 is a decades, although mostly for embed-
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onsemi.com/IoT Cores in the Data Center
ilinx and Intel are adding a standard system software layer between the application and the hardware. This allows developers to treat the FPGA more like a black box with a standard API. XDevelopers can build or buy the IP that’s used in the black, making the hardware more independent of the application.
ded applications. The tools for creating the IP that works with an FPGA have improved significantly, and it’s even pos- sible to turn software written for frame- works like OpenCL directly into FPGA IP. Embedded developers typically han- dle the loading of this IP onto the FPGA, and it’s often tightly integrated with the application software. Xilinx and Intel are adding a standard system software layer between the appli- cation and the hardware. This allows developers to treat the FPGA more like a black box with a standard API. Develop- ers can build or buy the IP that’s used in
5. Intel’s PSG Stratix 10 employs a Stratix 10 FPGA based on the company’s Hyperflex FPGA architecture.
6. Xilinx’s Alveo U280 can deliver 24.5 INT8 TOPS and has one million LUTs.
24 JANUARY/FEBRUARY 2019 ELECTRONIC DESIGN the black, making the hardware more configuration and data movement to change over time as new applications are independent of the application. and from the FPGA and application. It started. For example, Intel’s Open Program- needn’t be concerned with the hardware Other major factors are affecting the mable Acceleration Engine (OPAE) configuration as long as the IP fits in data center and embedded servers from runs on top of the FPGA Interface Man- the FPGA available to the system. The persistent memory technology to the ager (FIM) to manage its PAC FPGAs OPAE is responsible for managing the upcoming PCIe Gen 5 and CCIX. But (Fig. 7). The software manages FPGA use of the FPGAs in the system that can that’s for another article.
7. The Open Programmable Acceleration Engine (OPAE) runs on top of the FPGA Interface Manager (FIM) to manage Programmable Accel- eration Cards (PACs).
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www.harwin.com/m225 Product Trends WILLIAM WONG | Senior Technology Editor Your Next SoC Will Probably Include AI Acceleration
It may be possible to get an SoC without AI acceleration, but the trend is to provide mainstream machine-learning support.
ystem-on-chip (SoC) solu- Seth DeLand, Product Marketing tions continue to get more Manager of Data Analytics at Math- complex as more special- Works, notes that “Companies will ized hardware is added to increasingly use machine learning algo- Soptimize the SoC for new applications. rithms to enable products and services Qualcomm’s latest Snapdragon 855 to ‘learn’ from data and improve per- (Fig. 1) highlights this change. The 855 formance. Machine learning is already includes a number of blocks including present in some areas: image process- the Snapdragon X24 cellular modem ing and computer vision for facial rec- and wireless Wi-Fi, Bluetooth, and GPS ognition, price and load forecasting for support from the Adreno 640 GPU, the energy production, predicting failures Hexagon 690 DSP, the Kryo 485 proces- in industrial equipment, and more. In sor cluster, and the Spectra 380 image the coming year, it can be expected that signal processor (ISP). 1. Qualcomm’s Snapdragon 855 SoC machine learning will be increasingly EThe 64-bit Kyro 485 includes one includes the Adreno 640 GPU, the Hexagon present as more companies are inspired high-performance “Gold Prime” 2.84- 690 DSP, the octal core Kryo 485 processor to integrate machine-learning algo- GHz core with a 512-kB L2 cache, three cluster, and the Spectra 380 image signal rithms into their products and services 2.42-GHz cores with 256-kB L2 cach- processor, along with wireless communica- by using scalable software tools, includ- es, and four 1.8-GHz cores with 128- tion and security support. ing MATLAB.” kB L2 caches designed for low-power operation. The Gold Prime core targets applications. Many chip designers are MORE MACHINE LEARNING single-threaded, user-interface applica- enhancing the DSP with ML support ML support is showing up at all levels. tions like web browsers. since DSP architectures already lend MediaTek’s Helio P70 is built around The Hexagon 690 DSP is where the themselves to ML applications. an octal core big.LITTLE configura- most change has occurred. It includes The 855 targets premium smart- tion with four 2.1-GHz Arm Cortex- a Tensor accelerator and new vector phones and other high-end applica- A73s and four power-efficient, 2-GHz extensions with support for INT8 and tions while its sibling, the Snapdragon Cortex-A53s. There’s also a 900-MHz INT16 datatypes. The enhancements 8cx, targets laptops with a higher-per- Arm Mali-G72 GPU and a dual-core highlight the machine-learning (ML) formance GPU. ML is playing a part in AI processing unit (APU). The APU is support of the 855. The Kyro 485 also applications like image processing and designed to handle chores like human includes new dot product instructions computer vision for facial-recognition pose recognition in real-time as well as with INT8 and single precision floating support. The ISP is designed to provide augmentation to still images and video. point that can also be useful with ML data to ML image applications. It can deliver 280 GMACs.
26 JANUARY/FEBRUARY 2019 ELECTRONIC DESIGN Moving further down the scale is Renesas’ RZ/A2M with DRP. It’s designed to support human machine interfaces (HMIs) including systems with cameras. It has an Arm Cortex- A9 along with Renesas’ Dynamically Recon- figurable Processor (DRP) that provides ML support. The DRP is programmable in C and has optimized DMA support to minimize data movement (Fig. 2). The DRP is designed to be reconfigured every clock cycle, allowing for implementation of innovate algorithms. ML hardware acceleration is becoming the norm. However, it’s possible to run more functionally constrained ML applications on microcontrollers like the Cortex-M7 that have no ML hardware acceleration. It helps to have DSP-style support. Many platforms, like Renesas’ RZ family, include incarnations without ML accelera- tion. More often than not, though, ML will be an option available to developers. Much of 2. Renesas’ Dynamically Reconfigurable Processor this support targets image and video process- includes an array of processing elements, MACs, and ing, but the hardware tends to be applicable to memory blocks. Streams of data are moved to and from almost any ML inference application. main memory by the DMA controller.
GO TO ELECTRONICDESIGN.COM 27 5G Trends WILLIAM WONG | Senior Technology Editor
is Almost Here
5G will obviously make an impact in 2019, but how much of one depends on what you’re doing.
igher bandwidth…low- high-band. In sub-6-GHz, the cover- performance is driving the growing use er power…sub-10-ms age layer will be built on massive MIMO of MEMS resonators in automotive, latency—these are the using existing infrastructure followed by where systems must operate depend- promises of 5G wire- densification. Small-cell deployments ably in challenging conditions. In IoT, Hless. Its smaller cell size is a challenge, will be more critical to 5G rollout taking MEMS timing provides small size, low though, since more cells and matching advantage of the higher frequencies.” weight, and low power.” equipment are required to cover an area. Piyush Sevalia, Executive Vice Presi- While 5G offers opportunities and Piggybacking 5G on 4G towers requires dent of Marketing for SiTime, notes “In new features, it will be existing 3G and additional nodes throughout the area. 2019, we will see growing interest in 5G 4G/LTE technology that will drive IoT, 5G smartphones will be the driving timing advances in tandem with the IIoT, and Industry 4.0 solutions in the factor for technology. However, IoT growth of 5G deployment. Therefore, coming year. LTE-M and NB-IoT sup- devices and other applications such as MEMS timing solutions will proliferate port is available now with modems augmented and virtual reality (AR/VR) as they bring unique benefits that are that handle multiple protocols. Cellular will be taking advantage of 5G’s features. not offered by traditional timing solu- licensing is also becoming more flexible. Test tools and precision timing mea- tions. In particular, the 5G and com- Cellular solutions provide many surement and support will be key to cre- munications, automotive, and IoT mar- benefits, including wide coverage, but ating 5G products. Many of these tools kets will greatly benefit from the size, there are many alternatives that may be are already available, but refinement and reliability, and performance of SiTime’s more suitable for a range of applications. updates will bring about compliance for MEMS timing solutions. These include long-range, low-power, the final standards. “In networking and communications, unlicensed band wireless solutions like Sean D’Arcy, Director of Aerospace timing and synchronization is essential LoRaWAN and Sigfox. and Defense at Analog Devices, says to the entire system. The resiliency of The majority of IoT applications don’t “Before 5G becomes available on a MEMS timing provides unfailing per- require high-speed connectivity. LTE-M global scale, RF technologies will meet formance that is critical for the deploy- can deliver 1 Mb/s while the other avail- critical checkpoints in performance. Of ment of 5G as it rolls out into less- able options are much slower. 5G will great importance is the availability of controlled, harsher environments. The allow significantly higher throughput, spectrum, whether it be low-, mid-, or same need for reliability and dynamic opening up new applications.
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©2019 Pico Technology. All rights reserved. Pico Technology, PicoScope and FlexRes are registered trademarks of Pico Technology. DonÕt Do It! WILLIAM WONG | Senior Technology Editor
Disabling SELinux Implementing SELinux can definitely improve the security of a systemÑbut only if you actually use it.
hese days, security is one of It’s usually because they’re too lazy to ing; the excuse for not reading them is those things everyone talks figure out why. While this will typically that security is not important, not my about and in this arena, get an application to run also turns a job, etc. many actually do something relatively secure system to a relatively Unfortunately, getting things to work Tabout it. Using mandatory-access-con- insecure system. under SELinux is actually not that hard. trol (MAC) systems like SELinux and The reason most of these tips arise is Still, there are many cases where it can AppArmor can significantly improve that there are few good presentations of be more challenging. More on that later. the security of a system, but only if SELinux, or other access-control sys- So, before you disable SELinux com- they’re used. For this discussion, we tems, that can be easily found and read- pletely, take a look at some of the less concentrate on SELinux. However, the ily available. Some of the good books on severe changes that will likely get your ideas are applicable to most access-con- SELinux also tend to be rather daunt- application to run. trol systems. Security-Enhanced Linux or SELinux # ls -Z /etc/*.conf -rw------. root root system_u:object_r:etc_t:s0 /etc/aide.conf was initially developed by the US -rw-r--r--. root root system_u:object_r:etc_t:s0 /etc/asound.conf National Security Agency (NSA). It’s -rw-r--r--. root root system_u:object_r:etc_t:s0 /etc/chrony.conf -rw-r--r--. root root system_u:object_r:dnsmasq_etc_t:s0 /etc/dnsmasq.conf standard fare on Red Hat Enterprise -rw-r--r--. root root system_u:object_r:kdump_etc_t:s0 /etc/kdump.conf Linux (RHEL), the community ver- -rw-r--r--. root root system_u:object_r:krb5_conf_t:s0 /etc/krb5.conf -rw-r--r--. root root system_u:object_r:etc_t:s0 /etc/ld.so.conf sion called CentOS, and Fedora Linux. -rw-r-----. root root system_u:object_r:etc_t:s0 /etc/libaudit.conf -rw-r--r--. root root system_u:object_r:etc_t:s0 /etc/libuser.conf It works many other incarnations, -rw-r--r--. root root system_u:object_r:locale_t:s0 /etc/locale.conf although it’s not always installed or -rw-r--r--. root root system_u:object_r:etc_t:s0 /etc/logrotate.conf -rw-r--r--. root root system_u:object_r:etc_t:s0 /etc/nsswitch.conf turned on by default. -rw-r--r--. root root system_u:object_r:net_conf_t:s0 /etc/ntp.conf Disabling SELinux is easy. Just run -rw-r--r--. root root system_u:object_r:net_conf_t:s0 /etc/resolv.conf -rw-r--r--. root root system_u:object_r:rsync_etc_t:s0 /etc/rsyncd.conf setenforce 0. Turning it off permanently -rw-r--r--. root root system_u:object_r:syslog_conf_t:s0 /etc/rsyslog.conf is done by setting SELINUX=disabled in the /etc/selinux/config file for CentOS 1. The ls -Z command lists SELinux labels for files and directories. or Fedora. JUST DON’T DO IT. # semanage fcontext -a -t my_app_var_t '/etc/test(/.*)?' # restorecon -R -v /etc/test Too many “tips” on the web tell read- ers to do just this when a particular 2. The restorecon application changes file and directory labels based on the saved file con- application will not run with SELinux. text (fcontext). The semange program is used to manipulate SELinux contexts.
30 JANUARY/FEBRUARY 2019 ELECTRONIC DESIGN First off, one needs to understand contexts that define how labels will be on files and directories where errors what SELinux is up to. Really providing set for files, directories, etc. used by the occur should be the first step to getting a good SELinux overview does take at application. an application to run properly under least a chapter or two of a book, so this What often happens is that a user SELinux. will be a bit abbreviated. will create or edit files associated with Essentially all items that SELinux is an application such that the labels are SELinux AUDIT TRAIL protecting, including files, directories, incorrect. Of course, SELinux then pre- The file /var/log/audit/audit.log ports, etc., have a label for the form vents the application from using these (Fig. 3) in CentOS and Fedora is where user:role:type. Listing the labels for files files, as it should. Running restorecon SELinux errors and actions are logged. and directories is built into ls (Fig. 1). # grep denied /var/log/audit/audit.log The labels are used by SELinux to deter- type=AVC msg=audit(1544038090.937:59987): avc: denied { getattr } for pid=26327 comm="bconsole" path="/root/.bconsole_history" dev="vda3" ino=1394009 mine what security profiles apply to the scontext=system_u:system_r:httpd_t:s0 tcontext=unconfined_u:object_r:admin_home_t:s0 item. tclass=file type=AVC msg=audit(1544038090.978:59988): avc: denied { write } for pid=26327 The label can be changed using the comm="bconsole" name=".bconsole_history" dev="vda3" ino=1394009 scontext=system_u:system_r:httpd_t:s0 tcontext=unconfined_u:object_r:admin_home_t:s0 chcon program, but it’s better to use tclass=file type=AVC msg=audit(1544038090.978:59989): avc: denied { append } for pid=26327 an SELinux context managed using comm="bconsole" name=".bconsole_history" dev="vda3" ino=1394009 the semanage program along with the scontext=system_u:system_r:httpd_t:s0 tcontext=unconfined_u:object_r:admin_home_t:s0 tclass=file restorecon program (Fig. 2). Typically, an application that has been configured 3. The file /var/log/audit/audit.log can be filtered using tools like grep to display actions that for SELinux will include a profile with have been denied by SELinux.
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GO TO ELECTRONICDESIGN.COM 31 Disabling SELinux
Actions that are denied can be found by # ausearch -c 'httpd' --raw | audit2allow -M my-httpd filtering the file using tools like grep. The # semodule -i my-httpd.pp log entries tend to be cryptic, but they 4. The ausearch application can filter the audit log so that audit2allow is able to generate a provide information that can be used to profile that’s added to SELinux using semodule. address applications that aren’t working with SELinux. # getsebool -a | grep httpd Keep in mind that SELinux can run allow_httpd_anon_write --> off in one of three modes: off, permissive, allow_httpd_bugzilla_script_anon_write --> off and enforcing. The former has SELinux allow_httpd_mod_auth_pam --> off allow_httpd_nagios_script_anon_write --> off doing nothing. Permissive and enforc- allow_httpd_squid_script_anon_write --> off ing have SELinux watching the sys- allow_httpd_sys_script_anon_write --> off tem. However, permissive simply adds httpd_builtin_scripting --> on httpd_can_network_connect --> off entries to the audit log file while enforc- httpd_can_network_connect_db --> off ing prevents applications from using httpd_can_network_relay --> off an item. We always want SELinux to be httpd_disable_trans --> off httpd_enable_cgi --> on enforcing, but we also want applications httpd_enable_ftp_server --> off to run. httpd_enable_homedirs --> on The typical recommendation after httpd_rotatelogs_disable_trans --> off httpd_ssi_exec --> off setenforce 0 is to run SELinux in per- 5. A list of SELinux variables and httpd_suexec_disable_trans --> off missive mode so that it will hopefully httpd_tty_comm --> on their values can be obtained using generate an audit trail with denial that httpd_unified --> on getsebool. can then be used to generate a secu- rity profile that allows an application ing actions that weren’t tested. Running have SELinux profiles already defined, to run. The profile can be generated SELinux in permissive mode again but many applications come with pro- using the log entries and the audit2al- would allow the new denied actions to files that include SELinux variables. low program. be recorded so that a new profile could These variables can be used to change While grep and similar tools are use- be created. the security limits in a controlled fash- ful for filtering the audit log, SELinux Using an audit2allow generated pro- ion. They’re often handy when trying comes with the ausearch program that’s file may provide an application with to get two SELinux-enabled programs often preferable for use with audit2al- more access than one may prefer, but to work together, such as the Samba low (Fig. 4). It can filter entries based this is still better from a security stand- file server and the Apache web server on many criteria from hosts to process point than allowing all applications free (httpd). ids. Check out the main pages for ause- reign within a system. It’s true that the SELinux variables are manipulated arch and audit2allow as with most of the basic Linux security mechanism would using setsebool and getsebool (Fig. 5). SELinux-related programs mentioned still be in play; still, these are more lib- Typically, these booleans greatly expand here, since they have many options not eral than the confinement provided by the limits of particular aspects of the covered in this article. SELinux. As noted, the challenge with associated security profile. For example, The challenge with audit2allow is the audit2allow approach is knowing the Apache web server will normally be that it will create a profile that enables whether the generated profile is suffi- limited to what ports it can use. Setting an application to do more than it could cient. the httpd_can_network_connect variable without the profile. However, it may not I do recommend that you examine the on essentially lets the application use be sufficient to allow the application to filtered audit log that will be used with any port. This is often done if the port run all of the time. This is because the audit2allow first to see whether chang- required is unknown or would change in audit log will only have problems relat- ing labels will fix the problem. Often an unknown fashion. It would be better ed to what the application did during setting a file or directory context using to create a profile that allowed a spe- the period of the log. The profile may semanage, mentioned earlier, will let a cific port or range of ports. Nonetheless, be sufficient if all of the application’s program run. at least using the variable doesn’t open actions were tested. However, if some other areas where the web server may be were not, then it’s possible that the gen- SELinux VARIABLES limited to. erated profile would let the application Expanding the security limits of an As noted, these variables are some- run for some time but then fail or have application using audit2allow may be times employed to allow two SELinux- errors at some point when encounter- necessary for applications that don’t enabled programs to work together. This
32 JANUARY/FEBRUARY 2019 ELECTRONIC DESIGN Design Note One IC for Multiple DC/DC Topologies: Dual Output Step-Down IC can also be used in SEPIC and Boost Applications Victor Khasiev Introduction Industrial systems designers and automotive manufacturers tested and verified IC on the shelf that can be used in are significant consumers of power electronics, requiring the multiple topologies, allowing it to be reused across a variety full array of available DC/DC converter topologies, including of applications. As an example, this article will show how to buck, boost and SEPIC in a variety of combinations. In use the LTC3892 step-down controller for SEPIC (step-up an ideal world, each new project would be performance- and down) and boost applications. optimized with its own specialized controller or monolithic Circuit Description and Functionality converter IC, but this is unrealistic. The LTC3892 [1] is designed as a dual output synchronous The reality is that each new chip used in an industrial or buck controller with input-output voltage range 4.5V to automotive setting must be qualified via extensive testing 60V—covering the requirements for most automotive and before it can be utilized in these demanding environments. industrial applications. In these environments, the voltage Implementing a different IC for each application is time input to the converter can vary significantly, such as those consuming and cost prohibitive. It is far better to have a resulting from cold cranking and load dumps in automotive
VIN 6V-40V VIN V I IN LIM VIN 0.1μF + 3x10μF VPRG1 47μF 4.7μF DRVUV DRVCC 1M DRVSET 1M RUN PGOOD1 43.2k FREQ INTV 1M CC 100k 237k PGOOD2 PLLIN/MODE 0.1μF EXTVCC INTVCC 0.1μF INTVCC 100k LTC3892EUH-2 VFB2 VFB1 0.1μF 0.1μF TRACK/SS2 7.15k TRACK/SS1 10nF 7.5k 4.7nF 4.75k ITH2 ITH1 RUN 100pF RUN1 330pF RUN RUN2 – L3 SENSE1 SW2 1nF V 18μF IN + 0.1μF SENSE1 BOOST2 VIN 10μF Q1 TG2 10μF 10μF D1 x3 Q3 OUT2 150k TG1 L1 VOUT2, + 2.2μH SENSE2 2m V , 12V AT 3A SW1 OUT1 3.3V AT 10A + 5m 1nF + L2 0.1μF 150μF 10μF BOOST1 10μF 470μF 18μH SENSE2– Q2 BG2 BG1 GND
DN576 F01 D1: SBR8U60P5 L1: 74439369022 WURTH Q1, Q2: BSC028N06LS3 L2, L3: PG0936.183NL PULSE Q3: BSC100N06LS3 ALL 10μF 50V, 12105C106KAT2A AVX
Figure 1. Electrical Schematic of LTC3892 in SEPIC and Buck Applications
All registered trademarks and trademarks are the property of their respective owners. Design Note 576 applications, or brownouts and voltage spikes in industrial 24V systems when plant machinery is turned off and on. The VIN native step-down topology of the LTC3892 cannot regulate output voltages when the input drops below the output, but a SEPIC topology can. 14V VOUT2 12V Figure 1 shows a SEPIC solution that supports two outputs: 3.3V VOUT1 VOUT1 is 3.3V at 10A and VOUT2 is 12V at 3A. The input voltage range is 6V to 40V. VOUT1 is implemented as a straightforward step-down converter with a power train including L1, Q1, DN576 F03 Q2. To reduce number of components, the VPRG1 pin is Figure 3. Load Dump Event. The Rail Voltage Rises from 14V to 24V, connected to GND, internally programming VOUT1 to 3.3V. However, Both VOUT1 and VOUT2 Stay in Regulation. (CH1 VIN, 5V/DIV; CH2 VOUT2, 5V/DIV; CH3 VOUT1, 2V/DIV; 1ms/DIV). The second output of the LTC3892 is a SEPIC converter. The SEPIC power train includes L2, L3, Q3 and D1. A non- coupled SEPIC, with two discrete inductors, is employed here, expanding the range of the available inductors, an important consideration for cost-sensitive devices. Figure 2 shows how the converter functions when faced with voltage drops, such as during cold cranking. The rail voltage VIN drops far below nominal 12V, but both VOUT1 and VOUT2 remain in regulation, providing a stable power supply to the critical loads. Figure 3 shows how the converter functions when experiencing voltage spikes, such as load dumps. VOUT1 and VOUT2 remain regulated, even as VIN flies far above the nominal 12V input.
Figure 4. Demonstration Circuit DC2727A. The LTC3892 Controls Two 14V Outputs, a Non-Coupled SEPIC and a Step-Down Converter. [[VIN 6V-40V, VOUT1 3.3V at 10A and 12V at 3.0A.]]
VIN Conclusion 7V VOUT2 The LTC3892 is a flexible controller that can serve a variety 12V 3.3V of DC/DC converter needs in automotive and industrial VOUT1 environments. Although it is primarily designed for employment in synchronous buck converters, it can also be used in SEPIC
DN576 F02 and boost converter applications, simplifying the qualification testing process when these topologies are needed. Figure 2. Shows a Cold Cranking Event. The Rail Voltage Drops from 14V to 7V, but Both VOUT1 and VOUT2 Remain in Regulation. [[CH1 VIN, References 2V/DIV; CH2 V , 5V/DIV; CH3 V , 2V/DIV; 1ms/DIV.]] OUT2 OUT1 1. Data sheet, LTC3892/LTC3892-1/LTC3892-2, 60V Low IQ, Dual, 2-Phase Synchronous Step-Down Figure 4 is the demonstration circuit DC2727A [2], a dual DC/DC Controller output converter described herein. The SEPIC portion of 2. Demo board, DC2727A, the DC2727A can be easily rewired to a boost topology by 3. LTC3892-2 Demo Circuit - Automotive SEPIC removing one inductor L2 and replacing second L3 to an Converter using Single (Non-Coupled) Inductors appropriate boost choke. (10V-18V to 12V at 3A & 3.3V at 10A)
Data Sheet Download www.mouser.com/LTC3892
DN576-48-11/18 © ANALOG DEVICES, INC. 2018 sing an audit2allow generated profile may provide an application with more access than one may prefer, but this is still better from a security standpoint than allowing all applications free reign Uwithin a system. It’s true that the basic Linux security mechanism would still be in play; still, these are more liberal than the confinement provided by SELinux. is because profiles are often designed to PERMISSIVE DOMAINS Again, using this approach expands give an application access to its resourc- Running SELinux in permissive mode the security limits, though it’s in a es but prevent other programs from allows all applications to run without known fashion where a user, manager, accessing them. That would not be the generating SELinux. However, the prob- or developer can determine whether this case if a Samba file share was being used lems are still logged in the audit trail. scope is sufficient for a system. Like- for a website. It’s possible to provide this support on wise, it’s more limited than turning off There are other ways to enable such a more limited basis using permissive SELinux completely. sharing to occur, but examining even domains (Fig. 6). In this case, SELinux # semanage permissive -a httpd_t basic examples is beyond the scope of runs in enforcing mode, limiting most # semodule -l | grep permissive this article. Suffice it to say that you applications, though ones within a permissive_httpd_t (null) permissivedomains (null) don’t want to disable SELinux and allow permissive domain will not have these for expanded security boundaries using restrictions causing errors. Any denials 6. Permissive domains provide a selective SELinux variables; it’s much preferred to will still be logged, but the applications way of expanding a domain’s security having no SELinux support. will be allowed to continue unimpeded. limitations.
PRoHS
GO TO ELECTRONICDESIGN.COM 33 Disabling SELinux
roviding an application without SELinux support if that application is targeted at platforms where it would be available should be verboten. Security has become critical to the proper operation of PCs, Pservers, and embedded systems, and not providing this type of security is just poor development practice.
SOME MORE SELinux TOOLS • findcon – searches for files or direc- Here are some useful links for more Other tools come in handy when tories with a desired SELinux con- information on SELinux and other secu- using SELinux. These include: tenxt rity modules: • aureport – provides a filtered and • https://github.com/SELinuxProject formatted report of the audit log Most of these aren’t installed when • http://selinuxproject.org (replaced • avcstat – shows access vector cache SELinux is running, as they’re often used by https://github.com/SELinuxPro- statistics for status, development, or debugging ject) • sealart – part of the GUI monitoring chores. A system secured using SELinux • NSA SELinux documentation system doesn’t require them, but they’re invalu- • SELinux User’s and Administrator’s • seinfo – sdf able when trying to get an application Guide • sesearch – searches for SELinux pol- working under SELinux. For example, • Fedora Project SELinux icies for a rule try sesearch -s httpd_t --allow -d. It lists • Kernel.org Linux Security Module • sediff – displays differences between all of the rules that are associated with Usage SELinux policies files labeled with, or based on, the type • AppArmor • sechecker – checks SELinux policies httpd_t. • Simplified Mandatory Access Con- trol Kernel (SMACK) – used by Tizen Linux • TOMOYO Linux
SELinux AND DEVELOPERS Providing an application without SELinux support if that application is targeted at platforms where it would be available should be verboten. Secu- rity has become critical to the proper operation of PCs, servers, and embed- ded systems, and not providing this type of security is just poor develop- ment practice. It’s also something that’s significantly easier for a developer to include rather than having something attempt to shoehorn an application into an SELinux system after the fact. Providing support for SELinux, or other access-control systems, requires some understanding of the security environment, which is actually much simpler than most developers might think. Unfortunately, that’s an article for another day. Hopefully this article provided enough impetus to prevent you from disabling SELinux. https://www.yuden.co.jp/ut/solutions/ble/
34 JANUARY/FEBRUARY 2019 ELECTRONIC DESIGN " ( ! . 31 1