Design of Fractional-Order Circuits with Reduced Spread of Element Values

Home , Order of approximation

Stavroula Kapoulea

(RN: 1058034) Department of Physics University of Patras

This dissertation is submitted for the degree of Master of Science

Supervisor: Costas Psychalinos, Professor

Electronics Laboratory March 2018

Design of Fractional-Order Circuits with Reduced Spread of Element Values

MSc Thesis

Stavroula Kapoulea R.N. 1058034

Examination Committee: C.Psychalinos G.Economou S.Vlassis

Approved by the three-member examination committee on March 29, 2018

C.Psychalinos G.Economou S.Vlassis Professor Professor Associate Professor

Acknowledgements

The present Master Thesis has been performed within the MSc curriculum in “Electronics and Communications (Radioelectrology)”, offered by the Department of Physics of the University of Patras,Greece, during the academic year 2017-2018. This work is a result, not only of personal effort and dedication, but also enormous support from my family, friends and especially my supervisor and the laboratory staff. Therefore, I would like to thank the people who, each one in their own special way, contributed to the process of achieving my goals. First of all, I would like to express my sincere gratitude to the man who believed in me and provided me with the necessary qualifications in order to accomplish my goals, my supervisor Pro- fessor Costas Psychalinos. He gave me the opportunity to deal with an interesting and novel subject, encouraging also the personal research and intervention during the whole process. Most important of all, I consider, his influence on my way of thinking as he taught me to set high goals, believing in myself and leaving the fear of failure in the background. Besides my supervisor, I would also like to thank the rest of my thesis committee: Professors S. Vlassis and G. Economou, for their encouragement, insightful comments and guidance through all these years. A special reference worth my colleagues Costas Vastarouchas and Panagiotis Bertsias for their invaluable help and suggestions throughout the whole process. They were by my side all these months sharing their knowledge and ideas with me, but most of all their love for research which leads to new paths in science. In addition, I would like to thank Professor Ahmed Elwakil for his collaboration during the framework of this Thesis. The most heartfelt thanks I owe to my parents and my entire family environment, that contributed to the development of my character and the cognitive background which led me to complete my advanced studies. Their spiritual, psychological and economical support helped me make my ambitions and dreams come true, always having a family by my side. Last but not least, I could not help but mention my second family, my friends. All together and each one separately stood beside me in easy and difficult moments, in successes and failures, a factthat makes me feel very lucky.

Stavroula Kapoulea Patras, March 2018

Abstract

This MSc Thesis deals with a novel concept that suggests a new way of constructing a fractional-order differentiator/integrator. This approach offers several benefits, with the most important being the apparent reduced spread of time-constants and scaling factors. This leads into differentiator/integrator realizations with capability for implementation in fully integrated form. The approximations of fractional-order differentiator/integrator transfer functions are currently performed using integer-order rational functions, which are in general implemented through appropriate multi-feedback topologies. The spread of the values of time-constants as well of scaling factors in these topologies increase as the order of the differentiator/integrator and/or the order of the approximation increases. This could lead to non-practical values of capacitances and resistances/transconductances needed for the implementation. A possible solution to overcome this obstacle is introduced in this thesis and is based on the employment of a combination of fractional- and integer-order integrators and differentiators for implementing the desired function. The main concept is to construct a fractional-order integrator/differentiator that, even for high orders, will present low values of spreads. This could be achieved by com- bining a fractional-order part of low order with an integer-order part, a connection that leads to the implementation of a fractional-order integrator/differentiator of high order. Two methods of approximation are used for this purpose; 2nd− to 5th− order Continued Fraction Expansion and 3rd− and 5th− order of Oustaloup approximation. The performance of the proposed scheme is verified through post-layout simulations using Cadence and the Design Kit provided by the Austria Mikro Systems (AMS) 0.35µm CMOS technology process.

Keywords: Fractional-order circuits, Fractional-order integrators, Fractional-order differentiators, Operational Transconductance Amplifiers, CMOS analog integrated circuits

Περίληψη

Η παρούσvα Μεταπτυχιακή Διπλωμτική Εργασvία πραγματεύεται μια καινοτόμο ιδέα σvτον τρόπο υλοποίησvης ενός διαφορισvτή/ολοκληρωτή κλασvματικής τάξης. Αυτή η νέα προσvέγγισvη παρουσvιάζει πολλά πλεονεκτήματα, καθώς προσvφέρει ένα πλήρως ολοκληρωμένο κύκλωμα, κοινό για την υλοποίησvη ολοκληρωτή και διαφορισvτή, όπου η διασvπορά των τιμών των σvτοιχείων (spread) είναι χαμηλή τόσvο για τις σvταθερές χρόνου όσvο και για τους παράγοντες κέρδους. Οι προσvεγγίσvεις των σvυναρτήσvεων μεταφοράς των ολοκληρωτών/διαφορισvτών κλασv- ματικής τάξης πραγματοποιούνται μέσvω της χρήσvης σvυναρτήσvεων ακέραιας τάξης, οι οποίες υλοποιούνται μέσvω κατάλληλων τοπολογιών πολλαπλής ανάδρασvης. Η διασvπορά των τιμών (spread) των σvταθερών χρόνου και των παραγόντων κέρδους σvτις σvυγκεκριμένες τοπολογίες αυξάνεται με την αύξησvη της τάξης του διαφορισvτή/ολοκληρωτή, αλλά και με την αύξησvη της τάξης προσvέγγισvης. Αυτό οδηγεί σvε μη πρακτικές τιμές χωρητικότη- τας και αντίσvτασvης/διαγωγιμότητας κατά την υλοποίησvη. Στην παρούσvα Εργασvία προ- τείνεται μια λύσvη σvτο πρόβλημα αυτό, η οποία βασvίζεται σvτη χρήσvη ενός σvυνδυασvμού ολοκληρωτών και διαφορισvτών κλασvματικης και ακέραιας τάξης με σvκοπό την υλοποίησvη της επιθυμητής σvυνάρτησvης. Η βασvική ιδέα είναι η κατασvκευή ενός διαφορισvτή/ολοκληρωτή κλασvματικής τάξης, ο οποίος, ακόμα και για μεγάλες τάξεις, θα παρουσvιάζει χαμηλές τιμές spread. Η δεδομένη λειτουργία μπορεί να επιτευχθεί μέσvω του σvυνδυασvμού ενός σv- τοιχείου κλασvματικής, μικρής τάξης κι ενός ακέραιας τάξης, μια σvύνδεσvη που οδηγεί ατην υλοποίησvη ενός διαφορισvτή/ολοκληρωτή μεγάλης, κλασvματικής τάξης. Χρησvιμοποιούν- ται δυο μέθοδοι προσvέγγισvης του σvυσvτήματος: Continued Fraction Expansion 2ης − έως 5ης − τάξης και Oustaloup 3ης − και 5ης − τάξης. Η ορθή λειτουργία του προτεινόμενου κυκλώματος επαληθεύεται μέσvω εξομοιώσvεων μετά από σvχεδιασvμό σvε επίπεδο layout, με τη βοήθεια λογισvμικού Cadence και Design Kit που προσvφέρονται από την τεχνολογία Austria Mikro Systems (AMS) 0.35µm CMOS.

Λέξεις κλεδιά: Κυκλώματα κλασvματικής τάξης, Ολοκληρωτές κλασvματικής τάξης, Διαφορισvτές κλασvματικής τάξης, Τελεσvτικοί Ενισvχυτές Διαγωγιμότητας, CMOS αναλογικά ολοκληρωμένα κυκλώματα

vii

Contents

Contents ix

List of Figures xi

List of Tables xv

1 Introduction1 1.1 Fractional-order calculus ...... 1 1.2 Fractional-order integrators/differentiators ...... 2 1.3 Thesis objectives ...... 3 1.4 Thesis overview ...... 3

2 Approximation of fractional-order integrators/differentiators5 2.1 Introduction ...... 5 2.2 Approximation tools ...... 5 2.2.1 Continued Fraction Expansion approximation ...... 5 2.2.2 Oustaloup approximation ...... 6 2.2.3 Spread of time-constants and scaling factors ...... 14 2.3 Fractional-order integrator/differentiator designs ...... 18 2.4 Simulation results ...... 20 2.4.1 Fractional-order integrator/differentiator using 2nd−order CFE approximation ...... 22 2.4.2 Fractional-order integrator/differentiator using 5th−order Oustaloup approximation ...... 25 2.5 Comparison results ...... 28

3 Proposed method for reducing the spread of element values in fractional- order circuits 29 3.1 Introduction ...... 29 Contents

3.2 Proposed concept ...... 29 3.3 Fractional-order integrator/differentiator designs ...... 31 3.4 Simulation results ...... 33 3.4.1 Fractional-order integrator/differentiator using 2nd−order CFE approximation ...... 34 3.4.2 Fractional-order integrator/differentiator using 5th−order Oustaloup approximation ...... 36 3.5 Comparison results ...... 43

4 Layout design of the proposed fractional-order integrator/differentiator topologies 49 4.1 Introduction ...... 49 4.2 Basic building blocks ...... 50 4.3 Post-layout simulation results ...... 53

5 Conclusions and future work 61 5.1 Conclusions ...... 61 5.2 Proposals for future work ...... 62

References 63

A Matlab Codes 69

B Transfer Functions 93

x List of Figures

2.1 Functional Block Diagrams of (a) Follow-the-Leader, (b) Inverse-Follow- the-Leader Feedback structures ...... 14 2.2 Spread of time-constants for variable order fractional-order differentiators (q > 0)and integrators (q < 0) derived using the CFE and Oustaloup’s approximations ...... 15 2.3 Spread of scaling factors of the FLF structure in Fig.2.1, for variable order fractional-order differentiators (q > 0) and integrators (q < 0) derived using the CFE and Oustaloup approximations ...... 16 2.4 Spread of scaling factors of the IFLF structure in Fig.2.1 versus q using (a) 2nd−, (b) 3rd−, (c) 4th−, and (d) 5th−order CFE approximation . . 17 2.5 Spread of scaling factors of the IFLF structure in Fig.2.1 versus q using (a) 3rd−, (b) 5th−order Oustaloup approximation ...... 18 2.6 IFLF OTA-C structure for approximating fractional-order integrators/d- ifferentiators ...... 19 2.7 OTA structure employed in simulations ...... 21 2.8 Frequency responses of (a) gain and (b) phase of fractional-order integrator/differentiator for 2nd−order CFE approximation in the case of equal capacitance design ...... 24 2.9 Frequency responses of (a) gain and (b) phase of fractional-order integrator/differentiator for 5th−order Oustaloup approximation ...... 27

3.1 Proposed concept for reducing the spread in fractional-order integrators/differentiators ...... 30 3.2 OTA-C implementation of integer-order (a) integrator and (b) differentiator ...... 32 3.3 OTA-C implementation of the proposed concept ...... 33

xi List of Figures

3.4 Frequency responses of (a) gain and (b) phase of fractional-order integrator/differentiator for 2nd−order CFE approximation in the case of equal capacitance design ...... 35 3.5 Frequency responses of (a) gain and (b) phase of fractional-order integrator/differentiator for 2nd−order CFE approximation in the case of equal bias currents design ...... 37 3.6 Frequency responses of (a) gain and (b) phase of fractional-order integrator/differentiator for 5th−order Oustaloup approximation in the case of equal capacitance design ...... 41 3.7 Frequency responses of (a) gain and (b) phase of fractional-order integrator/differentiator for 5th−order Oustaloup approximation in the case of equal bias currents design ...... 42

4.1 Layout design of the OTA used in the fractional-order part and the integer order integrator ...... 50 4.2 Layout design of the OTA used in the integer order differentiator . . . 51 4.3 Layout design of the integer order differentiator ...... 51 4.4 Layout design of the fractional-order integrator/differentiator ...... 52 4.6 Layout design of the fractional-order integrator/differentiator for 2nd−order CFE approximation in the case of equal capacitance design ...... 53 4.5 Layout design of the active core of the proposed model ...... 54 4.7 Post-layout frequency responses of the (a) magnitude and (b) phase of differentiator/integrator in the case of equal capacitance design . 56 4.8 Post-layout frequency responses of the (a) gain and (b) phase of differentiator/integrator in the case of equal bias current design ...... 57 4.9 Input and output waveforms of a fractional-order integrator α = 0.8 (post-layout results) ...... 58 4.10 Post-layout Monte-Carlo statistical plots about the (a) gain and (b) phase of the differentiator α = 0.8 ...... 59 4.11 Post-layout Monte-Carlo statistical plots about the (a) gain and (b) phase of the integrator α = 0.8 ...... 60

B.1 Transfer functions of differentiator for 3rd−, 5th− order Oustaloup approximation ...... 93 B.2 Transfer functions of integrator for 3rd−, 5th− order Oustaloup approximation ...... 94

xii List of Figures

B.3 Transfer functions of differentiator for 2nd−, 3rd−, 4th−, 5th− order CFE approximation ...... 95 B.4 Transfer functions of integrator for 2nd−, 3rd−, 4th−, 5th− order CFE approximation ...... 96

xiii

List of Tables

2.1 Coefficient values of the Continued Fraction Expansion approximation for 2 ≤ n ≤ 5 ...... 7 2.2 Spreads in 2nd−order CFE approximation ...... 7 2.3 Spreads in 3rd−order CFE approximation ...... 8 2.4 Spreads in 4th−order CFE approximation ...... 9 2.5 Spreads in 5th−order CFE approximation ...... 10 2.6 Spreads in 3rd−order Oustaloup approximation ...... 12 2.7 Spreads in 5th−order Oustaloup approximation ...... 13

2.8 Design expressions of time-constants τi and scaling factors Kj for approximating fractional-order integrator/differentiator with unity-gain

frequency (ω0 = 1/τ) ...... 20 2.9 Aspect ratios of the MOS transistors of OTA in Fig.2.7...... 20 2.10 Values of dc bias currents of the topology in Fig.3.3 for 2nd−order CFE approximation in the case of equal capacitance design ...... 23 2.11 Values of dc bias currents of the topology in Fig.3.3 for 5th−order Oustaloup approximation ...... 26 2.12 Comparison of spreads between 2nd− order CFE and 5th−order Oustaloup approximation ...... 28

3.1 Maximum spreads of time-constants and scaling factors using the proposed method ...... 31 3.2 Aspect ratios of the MOS transistors of OTAs in Fig.3.2(a)-(b) . . . . . 33 3.3 Values of dc bias currents of the topology in Fig.3.3 for 2nd−order CFE approximation in the case of equal capacitance design ...... 36 3.4 Values of capacitors of the topology in Fig.3.3 for 2nd−order CFE approximation in the case of equal resistance/transconductance design . . 38 3.5 Values of dc bias currents of the topology in Fig.3.3 for 5th−order Oustaloup approximation in the case of equal capacitance design . . . . 39

xv List of Tables

3.6 Values of capacitors of the topology in Fig.3.3 for 5th−order Oustaloup approximation in the case of equal bias currents design ...... 43 3.7 Comparison of spreads of time-constants and scaling factors using the conventional and proposed methods ...... 44 3.8 Values of the dc bias currents of the topology in Fig.3.3 in the case of equal capacitance design ...... 45 3.9 Values of the dc bias currents of the topology in Fig.3.3 in the case of equal capacitance design ...... 45 3.10 Values of the dc bias currents of the topology in Fig.3.3 in the case of equal bias current design ...... 46 3.11 Values of the dc bias currents of the topology in Fig.3.3 in the case of equal bias current design ...... 46 3.12 Values of capacitors of the topology in Fig.3.3 in the case of equal bias current design ...... 47

xvi Chapter 1

Introduction

1.1 Fractional-order calculus

dny Fractional-order calculus constitutes a wider approach of the differential operator dxn within the context of the range of values that can be assigned to term n. The conser- vative integer order calculus define n as an integer variable (n ∈ Z); on the other hand fractional-order calculus inserts real number powers of n (n ∈ R), extending the range of possible values that n can take. Therefore, fractional-order calculus is actually a generalization of integer order calculus. The first reference in this theory is dated back to 1695 when Gottfried Wilhelm Leibniz wrote to Guillaume de L’ Hôpital raising a question about what would accrue 1 in the special case that n = 2 . De L’ Hôpital’s response refers to this concept as a “paradox” which can lead to useful conclusions. And he was right as this concept, eventually, turned out to offer the capability of describing nature more efficiently. It was many years later in 1832 that the French mathematician Joseph Liouville laid the foundations of fractional-order calculus, but only the last few years this idea has attracted several applied fields of science such as materials theory, diffusion theory, engineering, bio-medicine, economics, control theory, electromagnetic, robotics, and signal and image processing. The main idea of this calculus is the proper exploitation of the fractional Laplacian operator sα. It is common knowledge that Laplace transform is an efficient tool in the design and analysis of electronic circuits, as it transforms them from time-domain to frequency domain. This variable, sα, exactly offers the capability of designing and analyzing systems using concepts from fractional calculus with no demand for time-domain representations, where complicated differential equations are involved. Moreover, as fractional order calculus is a new field of interest, there are no com-

1 Introduction mercially available devices with these characteristics. So, in order to approach this behavior of sα, several methods of integer-order approximation are used.

1.2 Fractional-order integrators/differentiators

Fractional-order integrators and differentiators are very useful building blocks forim- plementing fractional-order controllers, biomedical systems etc [1],[2],[3],[4],[5],[6],[7],[8]. The transfer function of these circuits is described by the general Eq.1.1 as:

H(s) = (τs)q (1.1) where q = ±α , with α being the order of differentiator/integrator, restricted into the range 0 < α < 1. In particular, for q = +α Eq.1.1 represents a differentiator, while for q = −α an integrator. Also, the variable τ represents the time-constant of the integrator/differentiator, related with its unity-gain frequency ω0 according to the formula: τ = 1 . ω0 The straight-forward way for implementing fractional-order differentiators and integrators would be the substitution of integer-order capacitors by their fractional-order counterparts in the corresponding conventional (i.e. integer-order) structures. But, as it has already been mentioned, fractional-order capacitors are not yet commercially available, although significant research efforts towards this goal have been performed [9],[10],[11],[12],[13],[14]. Approximating fractional-order capacitors by appropriately configured RC networks is the easiest way for implementing emulators of theseel- ements, but this solution suffers from the absence of the on-the-fly adjustment of the characteristics of the element, in the sense that the whole RC network must be changed in order to adjust the characteristics of the fractional-order capacitor [15],[16],[17],[18],[19],[20],[21],[22],[23],[24],[25],[26] . An alternative solution that offers design flexibility is based on the employment of integer-order multi-feedback structures in order to implement the rational transfer functions that are derived through the transposition of the transfer function in Eq.1.1 using suitable approximation tools [27]. Following that, active topologies where the building blocks were operational amplifiers (op-amps), second generation Current Conveyors (CCIIs), Current Feedback Opera- tional Amplifiers (CFOAs), Operational Transconductance Amplifiers (OTAs), and Current-Mirrors (CMs) have been utilized [28],[29],[30],[31],[32],[33],[34]. The tuning of the characteristics of the differentiator/integrator is performed through the tuning of the formed time-constants and scaling factors.

2 1.3 Thesis objectives

1.3 Thesis objectives

The most important keyword in this thesis is spread. Spread is defined as the variance between the minimum and maximum value of a variable Υ . max(Υ ) More specifically: spread = min(Υ ) . The problem that arises in fractional-order integrators/differentiators is the fact that for orders α > 0.5 the spread of time-constants and scaling factors in these topologies increases to extremely high values. This also occurs as the order of approximation increases. A proposed concept to overcome this obstacle, so as to approximate high orders of fractional-order integrators/differentiators with reasonable values of spread though, is the basic object of this thesis. The main idea is the construction of fractional- order integrators/differentiators through the combination of fractional- and integer- order parts, with the fractional-order parts present low orders (α < 0.5). In this way, fractional-order integrators/differentiators of high orders (α > 0.5) with reduced spread can be achieved. An additional advantage of this concept is the capability of realizing integrators and differentiators using the same fully integratable topology.

1.4 Thesis overview

This thesis is organized as follows: Two methods of approximation and the possible versions of a fractional-order integrator/differentiator design are presented in Chapter 2. The designs are implemented using OTAs as active elements. In this Chapter the problem with the increased spread of the design parameters is also discussed. The proposed concept and an implementation using OTAs as active elements are given in Chapter 3. The behavior of the derived structure is evaluated, through post-layout simulation results, in Chapter 4, using the Cadence IC design suite and MOS transistor models provided by the AMS (Austria Mikro Systems) 0.35μm CMOS process.

Chapter 2

Approximation of fractional-order integrators/differentiators

2.1 Introduction

The approximation of a fractional-order element is actually based on the approach of the term sq. Typical and efficient methods for this purpose is the Continued Frac- tion Expansion (CFE) and Oustaloup approximation [35],[36]. A general view of CFE q method is that the variable s is approached around a central frequency ω0 with no specified frequency interval. In the case of Oustaloup method the approximation of the term sq performed over a pre-defined band of frequencies. Applying these methods on the fractional-order transfer functions, which describe the design, the result is an integer-order transfer function that approximates a fractional-order integrator/differentiator. The accuracy, that can be achieved, depends on the order of the approximation. As a matter of fact, higher orders of approximation offer more accurate results. On the other hand, more complex circuits with large number of active elements are demanded in this case.

2.2 Approximation tools

2.2.1 Continued Fraction Expansion approximation

Continued Fraction Expansion approximation owes its name to the development presented in the expression 2.1, which is called continued fraction.

5 Approximation of fractional-order integrators/differentiators

b1 a0 + a1+ b2 b a + 3 2 a3+ · (2.1) · ·

bn + an + ···

Using the CFE tool, the n-th order approximation of the variable sq (i.e the fractional integro-differential operator in the Laplace domain), considering that ω0 = 1 rad/sec, is expressed by a rational function defined by the quotient of two polynomials of the variable s:

a0 sn + α1 sn−1 + ... + αn−1 s + 1 sq ∼= an an an (2.2) sn αn−1 sn−1 ... α1 s α0 + an + + an + an where ai (i = 0. . . n) are positive real coefficients. The values of the coefficients ai, for orders of approximation 2 < n < 5, are summarized in Table 2.1. In the range of 0 < q < 1 the expression in Eq.2.2 represents a fractional-order differentiator, while for −1 < q < 0 a fractional-order integrator both with unity- gain frequency ω0 = 1 rad/sec. The values of time constants, scaling factors and their spreads in the range of −1 < q < 1 for 2nd−,3rd−,4th−, and 5th−order CFE approximation are presented in Tables 2.2, 2.3, 2.4 and 2.5, respectively.

2.2.2 Oustaloup approximation

In the case of Oustaloup’s approximation method, the function that approaches the variable sq is the following:

Ν / n n−1 q ∼ Y s + ωk ∼ Bns + Bn−1s + ... + B1s + B0 s = C = n n−1 (2.3) k=−Ν s + ωk s + An−1s + ... + A1s + A0 where Ai,Bi (i = 0. . . n) are positive real coefficients.

Eq.2.3 applies to geometrically distributed frequencies over the band [ωb, ωh] and the √ unity-gain frequency is calculated according to the formula ω0 = ωb · ωh .

6 2.2 Approximation tools

Coefficients n=2 n=3 n=4 2 3 2 4 3 2 a0 q + 3q + 2 q + 6q + 11q + 6 q + 10q + 35q + 50q + 24 2 3 2 4 3 2 a1 8 − 2q −3q − 6q + 27q + 54 −4q − 20q + 40q + 320q + 384 2 3 2 4 2 a2 q − 3q + 2 3q − 6q − 27q + 54 6q − 150q + 864 3 2 4 3 2 a3 ––– −q + 6q − 11q + 6 −4q + 20q + 40q + 320q + 384 4 3 2 a4 ––– ––– q − 10q + 35q − 50q + 24 a5 ––– ––– –––

Coefficients n=5 5 4 3 2 a0 −q − 15q − 85q − 225q − 274q − 120 5 4 3 2 a1 5q + 45q + 5q − 1005q − 3250q − 3000 5 4 3 2 a2 −10q − 30q + 410q + 1230q − 4000q − 12000 5 4 3 2 a3 10q − 30q − 410q + 1230q + 4000q − 12000 5 4 3 2 a4 −5q + 45q − 5q − 1005q + 3250q − 3000 5 4 3 2 a5 q − 15q + 85q − 225q + 274q − 120

Table 2.1: Coefficient values of the Continued Fraction Expansion approximation for 2 ≤ n ≤ 5

n = 2

q τ1 τ2 K2 K1 K0 spread τ spread K -0.9 0.86 58 0.02 1 50.1 67.16 2509 -0.8 0.75 28 0.05 1 21 37.33 441 -0.7 0.65 18 0.08 1 11.77 27.53 138.5 -0.6 0.57 13 0.13 1 7.43 22.75 55.18 -0.5 0.5 10 0.2 1 5 20 25 -0.4 0.44 8 0.29 1 3.5 18.29 12.25 -0.3 0.38 6.57 0.4 1 2.51 17.19 6.31 -0.2 0.33 5.5 0.54 1 1.83 16.5 3.36 -0.1 0.29 4.67 0.74 1 1.35 16.12 1.82 0.1 0.21 3.45 1.4 1 0.74 16.12 1.82 0.2 0.18 3 1.8 1 0.54 16.5 3.36 0.3 0.15 2.62 2.5 1 0.4 17.19 6.31 0.4 0.12 2.29 3.5 1 0.29 18.29 12.25 0.5 0.1 2 5 1 0.2 20 25 0.6 0.08 1.75 7.4 1 0.13 22.75 55.18 0.7 0.05 1.53 11.8 1 0.08 27.53 138.5 0.8 0.04 1.33 21 1 0.05 37.33 441 0.9 0.02 1.16 50.1 1 0.02 67.16 2509

Table 2.2: Spreads in 2nd−order CFE approximation

7 Approximation of fractional-order integrators/differentiators -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 q 0.0085 0.018 0.027 0.037 0.048 0.059 0.071 0.083 0.097 0.252 0.13 0.14 0.16 0.18 0.25 0.28 0.2 0.3 τ 1 al .:Srasin Spreads 2.3: Table 0.38 0.53 0.48 0.54 0.67 0.74 0.82 1.22 1.35 1.67 1.86 2.08 2.33 2.64 0.6 0.9 1.1 1.5 τ 2 10.33 14.14 3.32 3.67 4.06 5.57 6.23 7.91 117 4.5 12 17 21 27 37 57 τ 5 7 3 93.03 36.27 18.93 11.14 4.58 3.07 1.44 0.69 0.48 0.33 0.22 0.14 0.09 0.05 0.03 0.01 K 2.1 7 3 3 3 = n rd 2.64 2.33 2.08 1.86 1.67 1.35 1.22 0.82 0.74 0.67 0.54 0.48 0.43 0.38 K 1.5 1.1 0.9 0.6 − 2 re F approximation CFE order 0.38 0.43 0.48 0.54 0.67 0.74 0.82 1.22 1.35 1.67 1.86 2.08 2.33 2.64 K 0.6 0.9 1.1 1.5 1 11.14 18.93 36.28 0.01 0.03 0.05 0.09 0.14 0.22 0.33 0.48 0.69 1.44 3.07 4.58 K 2.1 93 7 0 spread 150.2 121.5 94.71 88.12 81.73 81.73 88.12 94.74 121.5 150.2 388 209 105 105 209 388 84 84 τ pedK spread 358.5 124.2 20.95 20.95 124.2 358.5 8654 1316 1316 8654 9.43 4.39 2.08 2.08 4.39 9.43 49 49

8 2.2 Approximation tools 81 81 2.3 2.3 5.36 5.36 2960 2960 727.1 227.3 31.29 12.74 12.74 31.29 227.3 727.1 21621 21621 spread K τ 391 336 266 266 336 391 1279 1279 682.7 486.6 301.7 279.7 258.4 258.4 279.7 301.7 486.6 682.7 spread 0 9 K 147 5.59 3.57 2.32 1.52 0.66 0.43 0.28 0.18 0.11 54.41 26.96 15.08 0.066 0.037 0.018 0.007 1 4.9 1.4 0.6 0.3 0.2 K 4.03 3.34 2.79 2.33 1.96 1.65 1.18 0.85 0.72 0.51 0.43 0.36 0.25 2 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 K order CFE approximation 3 − 0.2 0.3 0.6 1.4 4.9 K 0.25 0.36 0.43 0.51 0.72 0.85 1.18 1.65 1.96 2.33 2.79 3.34 4.03 th n = 4 4 4 9 K 147 0.11 0.18 0.28 0.43 0.66 1.52 2.32 3.57 5.59 0.007 0.018 0.037 0.066 15.08 26.96 54.41 4 τ 96 46 36 21 8.5 196 9.33 7.76 7.11 6.53 62.67 29.33 24.57 18.22 14.18 12.67 11.38 10.29 3 τ 3.5 1.5 5.32 4.75 4.27 3.86 3.19 2.91 2.67 2.45 2.07 1.91 1.76 1.62 1.38 1.28 1.18 1.09 Table 2.4: Spreads in 2 τ 0.92 0.85 0.78 0.72 0.67 0.62 0.57 0.52 0.18 0.41 0.38 0.34 0.31 0.29 0.26 0.23 0.21 0.19 1 τ 0.1 0.15 0.14 0.13 0.12 0.11 0.09 0.08 0.07 0.01 0.055 0.048 0.041 0.034 0.028 0.022 0.016 0.005 q 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1

9 Approximation of fractional-order integrators/differentiators -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 q 0.003 0.007 0.014 0.018 0.022 0.026 0.031 0.035 0.045 0.055 0.061 0.067 0.073 0.079 0.086 0.093 0.01 0.05 τ 1 0.11 0.12 0.14 0.15 0.17 0.18 0.21 0.23 0.27 0.29 0.31 0.33 0.36 0.38 0.41 0.44 0.47 0.2 τ 2 0.54 0.58 0.62 0.67 0.71 0.76 0.82 0.88 0.94 1.07 1.14 1.22 1.31 1.61 1.73 1.86 1.4 1.5 τ 3 al .:Srasin Spreads 2.5: Table 2.14 2.29 2.44 2.62 3.22 3.45 3.71 4.32 4.67 5.06 6.57 7.23 8.91 2.8 5.5 τ 3 6 8 4 10.79 11.67 12.65 13.75 16.43 18.08 22.27 28.33 37.86 32.5 145 295 15 20 45 55 70 95 τ 5 211.6 75.14 35.74 19.19 0.005 6.57 4.02 2.51 1.58 0.63 0.25 0.15 0.09 0.05 0.03 0.01 K 0.4 11 5 5 7.74 6.04 4.76 3.77 1.92 1.54 1.24 0.65 0.52 0.42 0.33 0.26 0.21 0.16 0.13 5 = n th K 2.4 0.8 3 − 4 re F approximation CFE order 1.86 1.73 1.61 1.31 1.22 1.14 1.07 0.94 0.87 0.82 0.76 0.71 0.67 0.62 0.58 0.54 K 1.5 1.4 3 0.54 0.58 0.62 0.67 0.71 0.76 0.82 0.88 0.94 1.07 1.14 1.22 1.31 1.61 1.83 1.86 K 1.4 1.5 2 0.13 0.16 0.21 0.26 0.33 0.42 0.52 0.65 1.24 1.54 1.92 3.77 4.76 6.04 7.74 K 0.8 2.4 3 1 0.005 19.19 35.74 75.14 211.6 0.01 0.03 0.05 0.09 0.15 0.25 0.63 1.58 2.51 4.02 6.57 K 0.4 11 0 spread 962.5 739.3 684.3 631.1 631.1 684.3 739.3 962.5 3183 1692 1202 1202 1692 3183 825 650 650 825 τ pedK spread 44773 44773 368.2 368.2 5645 1278 1278 5645 43.1 16.2 3.29 3.29 16.2 43.1 121 121 2.5 2.5

10 2.2 Approximation tools

/ The variables ωk, ωk, C are defined as:

k+N+ 1 ·(1+q) k+N+ 1 ·(1−q) [ ( 2 ) ] / ωh [ ( 2 ) ] ωh 2N+1 q 2N+1 ωk = ωb · ( ) , ωk = ωb · ( ) ,C = ωh (2.4) ωb ωb

It should also be mentioned that the order of the transfer function is n = 2N+1 and, therefore, this method approaches only odd order approximations (n = 3, 5, ...). In this Thesis, the 3rd− and 5th− order Oustaloup approximations are showcased. The values of time constants, gain factors and their spreads in the range considered (−1 < q < 0 corresponds to an integrator while 0 < q < 1 to a differentiator) over the band [10−2, 10+2] rad/sec for 3rd− and 5th− order approximation are presented in Tables 2.6 and 2.7, respectively. At this point it should be mentioned that the spread of time-constants in Oustaloup approximation is independent from the order of differentiator/integrator, while the spread of gain factors is the same for each order in both cases. Inspecting Eq.2.2& 2.3, it is readily obtained that both have same form and, therefore, they could be implemented by the same topology. This form can be expressed by one single transfer function:

n Kn−1 n−1 K1 Ko Kns + τ s + ··· + τ τ ...τ s + τ τ ...τ H(s) = 1 1 2 n−1 1 2 n (2.5) sn + 1 sn−1 + ··· + 1 s + 1 τ1 τ1τ2...τn−1 τ1τ2...τn

This transfer function can be realized by a Follow-the-Leader Feedback (FLF) or Inverse Follow-the-Leader Feedback (IFLF) structures, both depicted in Fig.2.1.

The calculation of the time-constants τi, (i = 1, 2...n), and scaling factors Kj, (j = 0, 1...n) is performed by equating the coefficients of polynomials in Eqs.2.2& 2.3 with those in Eq.2.5. Therefore in the case of CFE the derived design equations are the following:

an + 1 − i τi = , i = 1, 2...n (2.6) an−i

n−j an−j Y Kj = × τi, j = 0, 1...n (2.7) an i−1 The corresponding expressions in the case of Oustaloup’s approximation are:

An + 1 − i τi = , i = 1, 2...n (2.8) An−i

11 Approximation of fractional-order integrators/differentiators -0.1 -0.2 -0.3 -0.4 -0.5 -0.6 -0.7 -0.8 -0.9 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 q 0.01 0.01 0.01 0.02 0.02 0.02 0.03 0.03 0.04 0.05 0.06 0.07 0.08 0.13 0.15 al .:Srasin Spreads 2.6: Table 0.1 0.1 0.2 τ 1 0.2 0.3 0.3 0.4 0.5 0.5 0.6 0.7 0.9 1.2 1.4 1.6 1.8 2.2 2.5 2.9 3.4 τ 4 2 10.5 12.2 14.2 16.6 19.4 26.3 30.7 35.8 41.7 48.7 56.7 66.2 77.1 5.7 6.6 7.7 90 τ 9 3 63.1 39.8 25.1 15.8 0.25 0.06 0.04 0.02 0.02 K 6.3 2.5 1.6 0.6 0.4 0.2 0.1 10 4 3 3 rd 0.25 − K 3.4 2.9 2.5 2.2 1.8 1.6 1.4 1.2 0.9 0.7 0.6 0.5 0.5 0.4 0.3 0.3 3 = n 4 re utlu approximation Oustaloup order 2 K 0.2 0.3 0.3 0.4 0.5 0.5 0.6 0.7 0.9 1.2 1.4 1.6 1.8 2.2 2.5 2.9 3.4 4 1 0.02 0.02 0.04 0.06 15.8 25.1 39.8 63.1 K 0.1 0.2 0.2 0.4 0.6 1.6 2.5 6.3 10 4 0 spread 510.3 510.3 510.3 510.3 510.3 510.3 510.3 510.3 510.3 510.3 510.3 510.3 510.3 510.3 510.3 510.3 510.3 510.3 τ pedK spread 251.2 251.2 3981 1585 1585 3981 39.8 15.8 15.8 39.8 631 100 100 631 6.3 2.5 2.5 6.3

12 2.2 Approximation tools 6.3 2.5 2.5 6.3 631 100 100 631 39.8 15.8 15.8 39.8 3981 1585 1585 3981 251.2 251.2 spread K τ 2238 2238 2238 2238 2238 2238 2238 2238 2238 2238 2238 2238 2238 2238 2238 2238 2238 2238 spread 0 4 10 2.5 6.3 0.6 0.4 0.1 K 1.58 15.8 25.1 39.8 63.1 0.25 0.16 0.06 0.04 0.025 0.015 1 3 4 12 1.3 1.7 2.3 5.2 6.9 9.1 0.1 K 0.76 0.58 0.44 0.33 0.25 0.19 0.14 0.08 2 1.1 1.2 1.3 1.4 1.6 1.7 1.9 2.1 2.3 K 0.91 0.83 0.76 0.69 0.63 0.57 0.52 0.48 0.44 3 1.1 1.2 1.3 1.4 1.6 1.7 1.9 2.1 2.3 K 0.91 0.83 0.76 0.69 0.63 0.58 0.52 0.48 0.44 4 3 4 12 1.3 1.7 2.3 5.2 6.9 9.1 K order Oustaloup approximation 0.76 0.57 0.44 0.33 0.25 0.19 0.14 0.11 0.08 n = 5 − th 5 5 4 10 0.4 0.1 1.6 2.5 6.3 K 0.63 0.25 0.16 0.06 0.04 0.05 0.02 15.8 25.1 39.8 63.1 5 τ 75 98.8 90.1 82.2 68.4 62.3 56.9 51.9 43.1 39.3 35.9 32.7 29.8 27.2 24.8 22.6 20.6 108.4 4 τ 9.3 8.5 7.8 7.1 5.9 5.4 4.9 4.5 4.1 3.7 3.4 3.1 2.8 14.8 13.5 12.3 11.2 10.2 3 Table 2.7: Spreads in τ 2.3 2.1 1.9 1.7 1.6 1.4 1.3 1.2 1.1 0.912 0.832 0.759 0.692 0.631 0.575 0.525 0.479 0.436 2 τ 0.2 0.35 0.32 0.29 0.27 0.24 0.22 0.19 0.17 0.141 0.129 0.117 0.107 0.097 0.089 0.081 0.074 0.067 1 τ 0.04 0.01 0.048 0.044 0.037 0.033 0.031 0.028 0.025 0.023 0.019 0.018 0.016 0.014 0.013 0.012 0.011 0.009 q 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1

13 Approximation of fractional-order integrators/differentiators

in 1 2 n K Kn Kn-1 Kn-2 o

out

(a) FLF

✁

✁ ✁

✂✁

✂✁ ✂✁

✂✁ ✂ ✁

✂ ✁ ✂ ✁ +Ko ✂✁ in out n n-1 1 +K +K1 2 +Kn-1 +Kn

(b) IFLF

Figure 2.1: Functional Block Diagrams of (a) Follow-the-Leader, (b) Inverse-Follow- the-Leader Feedback structures

n−j Y Kj = Bj × τi, j = 0, 1...n (2.9) i−1

2.2.3 Spread of time-constants and scaling factors

The spread of time-constants is defined as the ratio (spread) = max(τ1,τ2,...τn) . τ min(τ1,τ2,...τn) Inspecting the two methods of approximation, Fig.2.2 present the spread of time constants for 2nd−, 3rd−, 4th−, 5th− order CFE and 3rd−, 5th− order Oustaloup approximation. The conclusions derived from these plots are the following:

• The spread of time-constants in the case of the Oustaloup’s approximation is independent from the order q.

• For a given order of approximation, in both CFE and Oustaloup’s approximations, the spreads of time-constants in the case of differentiators are the same with those of integrators of the same order.

14 2.2 Approximation tools

105 2nd-order CFE 3rd-order CFE 4th-order CFE 5th-order CFE 4 10 3rd-order OUST 5th-order OUST

103 spread of time-constants 102

101 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 order (q)

Figure 2.2: Spread of time-constants for variable order fractional-order differentiators (q > 0)and integrators (q < 0) derived using the CFE and Oustaloup’s approximations

• The spread of time-constants increases as the order of approximation q increases. More specifically, for| q |= 0.99, the spreads of time-constants were 607, 3627, 12080, 30180 for 2nd− ,3rd−, 4th−, 5th− order CFE approximation. In the case of Oustaloup approximation, for 3rd-, 5th- order, the corresponding values were 510, 2238.

• For the 3rd- order approximation, the spread of time-constants in Oustaloup approximation is smaller than that in CFE approximation for | q |> 0.7, while in the case of the 5th- order approximation this is fulfilled for | q |> 0.85.

The spread of scaling factors is expressed in a different way in the case of FLF structure than in IFLF structure. In the case of the FLF in Fig.2.1, the scaling factors are all associated with the summation stage at the output. Therefore, the spread of scaling factors is defined as (spread) = max(1,K0,...Kn) . K min(1,K0,...Kn) The derived plots for all the orders of both approximations are given in Fig.2.3, where the following conclusions are obtained:

• The spread of scaling factors is the same for both the 3rd− and 5th− order in the case of the Oustaloup’s approximation.

• For a given order of approximation, in both CFE and Oustaloup approximations,

15 Approximation of fractional-order integrators/differentiators

107 2nd-order CFE 3rd-order CFE 6 10 4th-order CFE 5th-order CFE rd 105 3 -order OUST 5th-order OUST

104

103

spread of scaling factors 10

101

100 -1 -0.5 0 0.5 1 order (q)

Figure 2.3: Spread of scaling factors of the FLF structure in Fig.2.1, for variable order fractional-order differentiators (q > 0) and integrators (q < 0) derived using the CFE and Oustaloup approximations

the spreads of scaling factors of the differentiators are the same with those of the integrators of the same order.

• The spread of time-constants increases with the order q. More specifically, for| q |= 0.99, the spreads of scaling factors were 0.35 × 106, 1.37 × 106, 3.76 × 106, 8.39 × 106 for 2nd−, 3rd−, 4th−, 5th− order CFE approximation. In the case of the Oustaloup approximation for both 3rd− and 5th− the corresponding value was 9.12 × 106.

• For the 3rd− order approximation, the spread of scaling factors in Oustaloup approximation is smaller than that of the CFE for | q |> 0.85, while in the case of 5th−order approximation this is fulfilled for | q |> 0.40.

In the case of of the IFLF structure in Fig.2.1, it is observed that the scaling factors K0,K1, ... , Kn−1 are associated with the integration stages, while the scaling factor Kn is associated with the summation stage at the output of the topology. The implementation of these scaling factors is performed by employing a resistance/- transconductance which is Kj (j = 0, 1...n) times the resistance/transconductance

16 2.2 Approximation tools

4 10 3 10 integ #2 integ #3 integ #1 integ #2 summation integ #1 summation 10 3

10 2

10 1 10 1 spread of scaling factors of scaling spread spread of scaling factors of scaling spread

10 0 10 0 -1 -0.5 0 0.5 1 -1 -0.5 0 0.5 1 q q (a) (b)

4 10 4 integ #4 10 integ #5 integ #3 integ #4 integ #2 integ #3 integ #1 integ #2 10 3 summation 10 3 integ #1 summation

10 2 10 2

10 1 10 1 spread of scaling factors of scaling spread spread of scaling factors of scaling spread

0 10 0 -1 -0.5 0 0.5 1 10 -1 -0.5 0 0.5 1 q q (c) (d)

Figure 2.4: Spread of scaling factors of the IFLF structure in Fig.2.1 versus q using (a) 2nd−, (b) 3rd−, (c) 4th−, and (d) 5th−order CFE approximation of the integration or the summation stage. Therefore, the local spread of the m-th integration stage is defined as:

max {1,Kn−m} (spread)m = , m = 1, 2, ...n (2.10) min {1,Kn−m} The corresponding expression for the summation stage is:

max {1,Kn} (spread)sum = (2.11) min {1,Kn}

The plots of scaling factors spreads obtained for 2nd−, 3rd−, 4th−, 5th− order CFE approximation are provided in Fig.2.4, while the corresponding plots for 3rd−, 5th− order Oustaloup approximations are depicted in Fig.2.5. The derivations, observed by these plots, are the following:

• The maximum spread is observed in the summation stage for both CFE and

17 Approximation of fractional-order integrators/differentiators

2 10 2 10 integ #3 integ #5 integ #2 integ #4 integ #1 integ #3 summation integ #2 integ #1 summation

10 1 10 1 spread of scaling factors of scaling spread spread of scaling factors of scaling spread

10 0 10 0 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 -1 -0.8 -0.6 -0.4 -0.2 0 0.2 0.4 0.6 0.8 1 q q (a) (b)

Figure 2.5: Spread of scaling factors of the IFLF structure in Fig.2.1 versus q using (a) 3rd−, (b) 5th−order Oustaloup approximation

Oustaloup’s approximations.

• for | q |= 0.99 and considering the CFE approximation, the maximum spreads for 2nd−, 3rd−, 4th−, 5th− order are 589, 1169, 1949, 2896, respectively, while for 3rd−, 5th− order Oustaloup approximation the maximum spread is 95.5 for both cases.

Comparing CFE and Oustaloup approximation, the most accurate method for each order is:

• CFE for 2nd− and 4th− order approximations, as Oustaloup can only approach odd order approximations.

• CFE for 3rd− order approximation

• Oustaloup for 5th− order approximation, as it is more effective in magnitude though CFE offers more accuracy in phase.

2.3 Fractional-order integrator/differentiator designs

A fractional-order integrator/differentiator can be implemented through the typical Follow-the-Leader (FLF) and Inverse – Follow-the-Leader (IFLF) Feedback structures given by the Functional Block Diagrams (FBDs) in Fig.2.1. The realization of the IFLF topology with the use of OTAs as active elements leads to the best option in order to minimize the number of required Operational Transconductance Amplifiers

18 2.3 Fractional-order integrator/differentiator designs

integration stages summation stage

vout

vin

Figure 2.6: IFLF OTA-C structure for approximating fractional-order integrators/d- ifferentiators

(OTAs) and this is originated from the operation of OTA [37]. The topology for implementing such a fractional-order integrator/differentiator is presented in Fig.3.3. As it has already been mentioned, the general transfer function for implementing such a fractional order integrator/differentiator is:

n Kn−1 n−1 K1 Ko Kns + τ s + ··· + τ τ ...τ s + τ τ ...τ H(s) = 1 1 2 n−1 1 2 n sn + 1 sn−1 + ··· + 1 s + 1 τ1 τ1τ2...τn−1 τ1τ2...τn

The exact transfer function of each order(−1 < q < 1) is given in Appendix B.

The realized time-constants of the topology in Fig.3.3 are given by the following expression:

Ci τi = , i = 1, 2, ...n (2.12) gmi while the scaling factors Kj (j = 0, 1...n) are implemented through appropriate adjustment of the dc bias current of the OTAs associated with the corresponding integration or summation stages. Inspecting Table 2.1, Eqs.2.6& 2.7, and performing de-normalization into a unity-gain frequency ω0 = 1/τ, the derived expressions of time-constants τi and scaling factors

Kj as a function of the order (q) are summarized in Tables 2.8(a) & (b), respectively.

19 Approximation of fractional-order integrators/differentiators

τi n=2 n=3 n=4 n=5 a2 a3 a4 a5 τ1 τ · τ · τ · τ · a1 a2 a3 a4 a1 a2 a3 a4 τ2 τ · τ · τ · τ · a0 a1 a2 a3 a1 a2 a3 τ3 ––– τ · τ · τ · a0 a1 a2 a1 a2 τ4 ––– ––– τ · τ · a0 a1 a1 τ5 ––– ––– ––– τ · a0 (a)

Kj n=2 n=3 n=4 n=5 a2 a3 a4 a5 K0 k · k · k · k · a0 a0 a0 a0 a2 a3 a4 K1 k · 1 k · k · k · a1 a1 a1 a0 a1 a3 K2 k · k · k · 1 k · a2 a2 a2 a0 a1 a2 K3 ––– k · k · k · a3 a3 a3 a0 a1 K4 ––– ––– k · k · a4 a4 a0 K5 ––– ––– ––– k · a5 (b)

Table 2.8: Design expressions of time-constants τi and scaling factors Kj for approximating fractional-order integrator/differentiator with unity-gain frequency (ω0 = 1/τ)

2.4 Simulation results

Fractional-order differentiators and integrators of orders 0.1 < q < 0.9 are designed using MOS transistor models provided by the AMS 0.35µm CMOS process. The OTA structure employed in simulations is that shown in Fig.2.7, with aspect ratios of the MOS transistors presented in Table 2.9.

Transistors W/L

Mb1 − Mb3 50µm/1µm

Mn1 − Mn2 5µm/1µm

Mn3 − Mn4 25µm/1µm

Mp1 − Mp2 1µm/10µm

Table 2.9: Aspect ratios of the MOS transistors of OTA in Fig.2.7

Assuming that the MOS transistors operate in the sub-threshold region, the transconductance of the OTA in Fig.2.7 is given by Eq.2.13:

5 Ibias gm = · (2.13) 9 n · VT

20 2.4 Simulation results

VDD

✆✄ ✆ ✂ iout

✠ 5 ✡

5 ✠

✡

✟ ✂

☎

☎ ✞ ✄ ✟

☎ in+ ☎ ✝ in-

Ibias

✁ ✄

✁ ✂

✁ ✝

VSS

Figure 2.7: OTA structure employed in simulations

where n is the slope factor of a MOS transistor in sub-threshold region (1 < n < 2) and o VT is the thermal voltage (26mV @ 27 C) and Ibias the dc bias current. The electronic adjustment of transconductance gm through the dc bias current Ibias is demonstrated by Eq.2.13[38]. Obviously, the required scaled versions of the transconductance are implemented through the multiplication of the current Ibias by the corresponding factor. Hence, the spreads of transconductances will be also equal to the spread of bias currents.

The power supply voltages were chosen as VDD = −VSS = 0.75V , while each OTA is supplied with dc bias current calculated by the expression:

9 · n · VT · Ci I0i = , i = 1, 2, ...5 (2.14) 5 · τi

where the expressions of time-constant τi are given in Table 2.8(a). The dc bias current

I0 of the summation stage can be arbitrary chosen. As this thesis focuses on a low frequency design, the unity-gain frequency of the integrator/differentiator is selected as f0 = 10Hz; such design is suitable for control [3] or biomedical applications [35].

21 Approximation of fractional-order integrators/differentiators

2.4.1 Fractional-order integrator/differentiator using 2nd−order CFE approximation

The capacitors are selected to be equal to 100pF (C1 = C2 = 100pF ), while bias currents, inspecting Table 2.1 and Eq.2.14, are:

2 9n · VT · C1 8 − 2q I0 = · (2.15) 1 5 q2 − 3q + 2

2 9 · n · VT · C2 q + 3q + 2 I0 = · (2.16) 2 5 8 − 2q2

A reasonable value for the bias current I0 of the summation stage is 170pA.

According to Eq.3.3 and Table 2.2, the values of dc bias currents for all the OTAs of the fractional-order integrator/differentiator are presented in Table 2.10. The gain and phase responses of fractional-order integrator/differentiator for 2nd−order CFE approximation, obtained using the aforementioned data, are presented in Figs.2.8(a) & (b). The thick lines correspond to the experimental plots, while the doted lines to the theoretical ones. In both cases of gain and phase responses the experimental plots approach sufficiently the theoretical ones, confirming the efficient operationof the system.

22 2.4 Simulation results

n = 2 Differentiator (q = α)

α I0 K2I0 I01 K1I01 I02 K0I02 0.1 170pA 229.6pA 1.65nA 1.65nA 102.1pA 75.6pA 0.2 170pA 311.7pA 1.94nA 1.94nA 117.6pA 64.2pA 0.3 170pA 427.1pA 2.32nA 2.32nA 134.9pA 53.7pA 0.4 170pA 595pA 2.82nA 2.82nA 154.4pA 44.1pA 0.5 170pA 850pA 3.53nA 3.53nA 176.4pA 35.3pA 0.6 170pA 1.2nA 4.59nA 4.59nA 201.6pA 27.1pA 0.7 170pA 2nA 6.35nA 6.35nA 230.7pA 19.6pA 0.8 170pA 3.57nA 9.88nA 9.88nA 264.6pA 12.6pA 0.9 170pA 8.52nA 20.5nA 20.5nA 304.7pA 6.1pA (a)

n = 2 Integrator (q = −α)

α I0 K2I0 I01 K1I01 I02 K0I02 0.1 170pA 125.9pA 1.22nA 1.22nA 75.6pA 102.1pA 0.2 170pA 92.7pA 1.06nA 1.06nA 64.2pA 117.6pA 0.3 170pA 67.7pA 922.9pA 922.9pA 53.7pA 134.9pA 0.4 170pA 48.6pA 806.5pA 806.5pA 44.1pA 154.4pA 0.5 170pA 34pA 705.7pA 705.7pA 35.3pA 176.4pA 0.6 170pA 22.9pA 617.5pA 617.5pA 27.1pA 201.6pA 0.7 170pA 14.4pA 539.7pA 539.7pA 19.6pA 230.7pA 0.8 170pA 8.1pA 470.5pA 470.5pA 12.6pA 264.6pA 0.9 170pA 3.4pA 408.6pA 408.6pA 6.1pA 304.7pA (b)

Table 2.10: Values of dc bias currents of the topology in Fig.3.3 for 2nd−order CFE approximation in the case of equal capacitance design

23 Approximation of fractional-order integrators/differentiators

20.0 0.9 0.9

0.8 0.8

0.7 0.7

0.6 0.6 10.0 0.5 0.5 0.4 0.4 0.3 0.3 0.2 0.2 0.1 0.1

0.0 Gain (dB) Gain

-10.0

-20.0

0 1 2 10 10 10 freq (Hz) (a)

90.0 0.9 0.8 70.0 0.7 0.6 0.5 50.0 0.4 0.3

30.0 0.2 0.1 10.0

0.1

-10.0 0.2 Phase (deg) Phase 0.3

-30.0 0.4 0.5 -50.0 0.6 0.7 -70.0 0.8 0.9

-90.0

0 1 2 10 10 10 freq (Hz) (b)

Figure 2.8: Frequency responses of (a) gain and (b) phase of fractional-order integrator/differentiator for 2nd−order CFE approximation in the case of equal capacitance design

24 2.4 Simulation results

2.4.2 Fractional-order integrator/differentiator using 5th−order Oustaloup approximation

The capacitors are chosen to be equal C1 = C2 = C3 = C4 = 100pF while C5 was equal to 1nF . Inspecting Table 2.1 and Eq.3.7, the bias currents are calculated as:

5 4 3 2 9 · n · VT · C1 −5q + 45q − 5q − 1005q + 3250q − 3000 I0 = · 1 5 q5 − 15q4 + 85q3 − 225q2 + 274q − 120

5 4 3 2 9 · n · VT · C2 10q − 30q − 410q + 1230q + 4000q − 12000 I0 = · 2 5 −5q5 + 45q4 − 5q3 − 1005q2 + 3250q − 3000

5 4 3 2 9 · n · VT · C3 −10q − 30q + 410q + 1230q − 4000q − 12000 I0 = · (2.17) 3 5 10q5 − 30q4 − 410q3 + 1230q2 + 4000q − 12000

5 4 3 2 9 · n · VT · C4 5q + 45q + 5q − 1005q − 3250q − 3000 I0 = · 4 5 −10q5 − 30q4 + 410q3 + 1230q2 − 4000q − 12000

5 4 3 2 9 · n · VT · C5 −q − 15q − 85q − 225q − 274q − 120 I0 = · 5 5 5q5 + 45q4 + 5q3 − 1005q2 − 3250q − 3000

while I0 is selected to be equal to 170pA in this case too.

According to Eq.3.7 and Table 2.7, the values of dc bias currents for all the OTAs of the fractional-order integrator/differentiator are presented in Table 2.11.

Inspecting the data provided by the previous tables, the gain and phase responses of fractional-order integrator/differentiator for 5th−order Oustaloup approximation are showcased in Figs.2.9(a) & (b). The experimental plots are presented as thick lines, while the theoretical plots as doted lines. In both cases of gain and phase responses the experimental plots approach sufficiently the theoretical ones, confirming the efficient operation of the system.

25 Approximation of fractional-order integrators/differentiators 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 α α 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 170 for Fig. 3.3 in topology the of currents bias dc of Values 2.11: Table I I 0 0 pA pA pA pA pA pA pA pA pA pA pA pA pA pA pA pA pA pA 10 26 67 107 10 676 269 2 4 6 42 6 4 2 1 427 1 17 K K ...... 69 27 77 77 27 69 07 . 73 94 68 73 7 . 7 5 . . 5 pA 3 nA 8 4 pA I I pA pA pA pA nA nA nA nA pA pA pA pA nA pA pA 0 0 10 11 12 13 15 31 26 24 20 18 7 8 3 3 29 22 9 . . . . 8 ...... 29 76 I . . . . . 8 5 I 53 55 66 88 22 6 8 4 1 1 3 nA 0 nA nA nA nA 0 nA 1 nA nA nA nA nA 1 nA nA nA nA nA nA nA 459 152 105 72 50 34 24 318 220 11 K 1 1 2 3 5 606 876 K ...... 86 41 87 13 8 4 . 27 83 64 82 53 . . . 55 7 2 3 nA 4 I nA nA I 0 nA nA nA nA nA nA nA pA pA nA nA nA nA nA 1 0 nA 1 5 4 4 3 2 3 2 996 . . . . . 1 1 1 1 1 2 4 3 . . 23 77 35 62 74 1 1 I 3 5 ...... nA nA . . 0 09 31 44 58 73 08 nA nA I 2 9 2 nA nA nA nA nA . 0 nA nA 3 2 nA nA nA nA nA nA Differentiator pA Integrator 11 9 8 6 5 4 2 3 K ...... 434 522 628 755 908 4 . . 1 1 1 96 29 89 73 77 74 1 98 3 K nA 3 . . . . nA 09 31 58 I nA nA nA nA nA nA 9 5 = n 3 0 nA . . . . . 5 = n nA 9 8 6 8 6 I 2 nA nA nA 0 pA pA pA pA pA (a) 2 (b) ( 808 737 672 613 559 465 424 386 q 510 185 222 244 267 293 321 ( = 154 169 203 I q ...... 0 4 2 4 2 3 2 2 9 I pA = 3 − ...... pA pA pA pA pA pA pA pA 0 2 6 1 7 5 8 pA pA pA 3 α α pA pA pA pA pA pA ) ) 352 352 352 352 352 352 352 352 352 K 352 352 352 352 352 352 352 352 352 K 2 ...... 5 9 9 9 9 9 9 9 9 9 I 2 th ...... 0 pA pA pA pA pA pA pA pA pA 9 9 9 9 9 9 9 9 9 I 3 − 0 pA pA pA pA pA pA pA pA pA 3 re utlu approximation Oustaloup order 94 86 78 71 65 59 125 114 104 23 26 28 31 34 37 41 45 49 ...... I 81 46 86 92 59 82 0 ...... I pA pA pA 4 81 11 63 39 42 74 38 38 75 pA pA pA pA pA pA 0 4 pA pA pA pA pA pA pA pA pA 15 18 21 26 31 37 45 10 12 K 286 238 198 164 78 65 94 ...... 137 114 K . . 02 06 72 11 39 74 38 1 4 5 . . I . 85 59 pA pA 1 . . . . 0 8 pA pA pA pA pA pA pA 3 1 1 8 I pA pA 4 pA 0 pA pA pA pA pA pA 4 170 155 142 129 118 107 98 89 81 32 39 42 47 51 56 62 68 35 . . I . 34 68 ...... 8 0 ...... 9 9 1 6 2 8 I . 5 56 15 92 07 61 59 04 03 pA 7 pA pA pA pA pA pA pA pA 0 5 pA pA pA pA pA pA pA pA pA 11 51 2 3 5 8 17 24 35 K 983 680 470 325 225 155 107 . . . . 2 1 . . 71 91 66 18 K . . . 82 61 0 . . 1 7 7 05 42 I pA pA pA pA pA pA pA 0 ...... 0 pA pA 3 3 7 6 3 8 8 I 5 nA nA 0 pA pA pA pA pA pA pA 5

26 2.4 Simulation results

40.0 0.9 0.9 0.8 30.0 0.8 0.7 0.7 0.6 20.0 0.6 0.5 0.5 0.4 0.4 0.3 0.3 0.2 10.0 0.2 0.1 0.1

0.0 Gain (dB) Gain

-10.0

-20.0

-30.0

-40.0

-1 0 1 2 3 10 10 10 10 10 freq (Hz) (a)

90.0

0.9 70.0 0.8 0.7 0.6 50.0 0.5 0.4 30.0 0.3 0.2 0.1 10.0 0.1 -10.0 0.2 Phase (deg) Phase 0.3 0.4 -30.0 0.5 0.6 -50.0 0.7 0.8 0.9 -70.0

-90.0

-1 0 1 2 3 10 10 10 10 10 freq (Hz) (b)

Figure 2.9: Frequency responses of (a) gain and (b) phase of fractional-order integrator/differentiator for 5th−order Oustaloup approximation

27 Approximation of fractional-order integrators/differentiators

2.5 Comparison results

In both cases of approximation the results are positive, as the experimental values approach the corresponding theoretical ones. Though, 2nd− order CFE approximation provides high accuracy combined with small number of active elements, low circuit complexity and low demand of bias current, compared to the corresponding demands in the case of 5th−order Oustaloup approximation. In addition, inspecting that the value of spread increases as the order of approximation increases, it is readily obtained that 2nd− order CFE offers low spread instead of 5th−order Oustaloup approximation. The comparison between the two cases in the terms of spread is clearly showcased in Table 2.12. Considering the above mentioned, 2nd− order CFE approximation is proved to be a more appropriate tool for the utilization of a fractional-order integrator/differentiator.

n = 2 n = 5 q spread τ spread K spread τ spread K -0.9 67.16 2509 3183 44773 -0.8 37.33 441 1692 5645 -0.7 27.53 138.5 1202 1278 -0.6 22.75 55.18 962.5 368.2 -0.5 20 25 825 121 -0.4 18.29 12.25 739.3 43.1 -0.3 17.19 6.31 684.3 16.2 -0.2 16.5 3.36 650 3.29 -0.1 16.12 1.82 631.1 2.5 0.1 16.12 1.82 631.1 2.5 0.2 16.5 3.36 650 3.29 0.3 17.19 6.31 684.3 16.2 0.4 18.29 12.25 739.3 43.1 0.5 20 25 825 121 0.6 22.75 55.18 962.5 368.2 0.7 27.53 138.5 1202 1278 0.8 37.33 441 1692 5645 0.9 67.16 2509 3183 44773

Table 2.12: Comparison of spreads between 2nd− order CFE and 5th−order Oustaloup approximation

28 Chapter 3

Proposed method for reducing the spread of element values in fractional-order circuits

3.1 Introduction

The problem of the undesirable increase that occurs at spread of time-constants and scaling factors, discussed in Chapter 2, can be minimized by following a new concept for the implementation of a fractional-order integrator/differentiator. The main point of this idea is the appropriate combination of integer- and fractional-order parts of integrators and differentiators, in order to compose a fractional-order integrator/differentiator with reduced values of spread, compared to those obtained by the conventional design, which has been presented in Chapter 3. This concept offers a considerable reduction of spread of time-constants and scaling factors in the band of high fractional orders, where the problem is intense. The foundations of this new formula, as well as the novel design are described in this Chapter.

3.2 Proposed concept

The proposed concept suggests the utilization of an integer-order part connected with a fractional-order part which, eventually, constitute a fractional-order integrator/differentiator. The Functional Block Diagram that represents this concept is demonstrated in Fig.3.1. The first part of the block corresponds to a fractional-order integrator/d- ifferentiator whose transfer function is given by the expression (τs)q (q = α denotes a

29 Proposed method for reducing the spread of element values in fractional-order circuits differentiator while q = −α an integrator). The second part of the block, with transfer function given by the expression 1/ (τs)r, corresponds to an integer-order differentiator (for r = −1) or an integrator (for r = 1). So the realized transfer function of Functional Block Diagram is:

υout q 1 q−r H (s) ≡ = (τs) · r = (τs) (3.1) υin (τs)

q ✁

✂ ✂ in s r out

Figure 3.1: Proposed concept for reducing the spread in fractional-order integrators/d- ifferentiators

For q = α (FO differentiator) and r = 1 (integer-order integrator) the derived transfer function is: H (s) = (τs)α−1. Inspecting that 0 < α < 1 ⇔ α − 1 < 0 this transfer function corresponds to a fractional-order integrator. For q = −α (FO integrator) and r = −1 (integer-order differentiator) the derived transfer function is: H (s) = (τs)1−α. Inspecting that 0 < α < 1 ⇔ 1 − α > 0 this transfer function corresponds to a fractional-order differentiator. The main idea of the concept is the approach of high orders (0.6 < α < 0.9) through the implementation of a fractional-order integrator/differentiator using a fractional- order differentiator/integrator of orders 0.1 < α < 0.4 and an integer-order integrator/differentiator. For instance, a fractional-order integrator of order α = 0.7 can be implemented by a fractional-order differentiator of order α = 0.3 connected with an integer-order integrator. In this way, despite the fact that the derived integrator has an order equal to 0.7, the values of spread are those of an order equal to 0.3. As a result, the maximum observed spread of values of time-constants and scaling factors will be that of order equal to 0.5. These maximum values of spread for 2nd− to 5th−order CFE and 3rd−& 5th−order Oustaloup approximation in both cases of FLF and IFLF structures are presented in Table 3.1.

30 3.3 Fractional-order integrator/differentiator designs

FLF IFLF Approximation time-constant scaling factor time-constant scaling factor 2nd−order CFE 20.22 23.21 20.22 4.8 3rd−order CFE 103.7 44.87 103.7 6.7 4th−order CFE 331.8 73.43 331.8 8.57 5th−order CFE 814.2 108.8 814.2 10.43 3rd−order Oust 510.3 91.2 510.3 9.55 5th−order Oust 2238 91.2 2238 9.55

Table 3.1: Maximum spreads of time-constants and scaling factors using the proposed method

Two possible cases of a fractional-order integrator/differentiator design that will be considered in the proposed concept are:

• equal capacitance design

• equal resistance/transconductance design or, alternatively, equal dc bias currents design

In the case of equal capacitance design (C1,C2, ... , Cn), the spread of time-constants will determine the spread of resistances/transconductances used for realizing the cor-

max(gm1 ,gm2 ,...gmn ) responding time-constants ((spread)τ = ), while in the case of equal min(gm1 ,gm2 ,...gmn ) resistance/transconductance design (gm1 , gm2 , ... , gmn ), the spread of time-constants will determine the spread of capacitances ((spread) = Cmax ). τ Cmin

3.3 Fractional-order integrator/differentiator designs

As it has been already mentioned in Chapter 2, and is also obtained from Table 3.1, IFLF topology is a more appropriate structure from the spread, circuit complexity and number of active elements point of view for implementing a fractional-order integrator/differentiator. Consequently, in the case of the proposed method the topology of the fractional-order part is selected to be the same one to that of the conventional method, given in Fig.3.3. For the integer-order part, in both cases of differentiator and integrator, OTAs are used as active elements. The corresponding structures are presented in Fig.3.2, while the realized time-constants in both cases are given by the

31 Proposed method for reducing the spread of element values in fractional-order circuits

(a)

(b)

Figure 3.2: OTA-C implementation of integer-order (a) integrator and (b) differentiator

expression 3.2:

Cio τ = (3.2) gmio

Hence, according the proposed method, the implementation of fractional-order differentiators/integrators of orders q > 0.5 will be performed through the cascade connection of the core depicted in Fig. structure with one of the blocks given in Fig.3.2. This is very important from the design flexibility point of view, in the sense that the scheme is re-configurable and could be easily implemented through programmability of some switches. The final, complete topology of the proposed concept is showcased in Fig.3.3.

In the case that the fractional-order part operates as an integrator and is connected to the integer-order differentiator the final output corresponds to a fractional-order differentiator, while the coalescence of the fractional-order differentiator withthe integer-order integrator has as a result the configuration of a fractional-order integrator. The most important fact, obtained from this figure, is the acquisition of both fractional-order differentiator and integrator of all orders just from a single, compact construction.

32 3.4 Simulation results

Figure 3.3: OTA-C implementation of the proposed concept

3.4 Simulation results

Fractional-order differentiators and integrators of orders 0.6 < q < 0.9 are designed using MOS transistor models provided by the AMS 0.35µm CMOS process. The OTA structure employed in simulations is that shown in Fig.2.7, the same as in the conventional way, with aspect ratios of the MOS transistors presented in Table 2.9. These OTAs are also used for implementing the integer-order integrator. However, the integer-order differentiator needs different values of aspect ratios of theMOS transistors, in order to achieve efficient operation of the system. These values are demonstrated in Table 3.2. The two cases, that will be examined, are (a) equal capacitance design and (b) equal bias current design for 2nd−order CFE and 5th−order Oustaloup approximation.

W/L Transistors OTA Fig. 3.2(a) Fig. 3.2(b)

Mb1 − Mb3 50µm/1µm 1.5µm/15µm

Mn1 − Mn2 5µm/1µm 5µm/1µm

Mn3 − Mn4 25µm/1µm 25µm/1µm

Mp1 − Mp2 1µm/10µm 50µm/5µm

Table 3.2: Aspect ratios of the MOS transistors of OTAs in Fig.3.2(a)-(b)

33 Proposed method for reducing the spread of element values in fractional-order circuits 3.4.1 Fractional-order integrator/differentiator using 2nd−order CFE approximation

The proposed concept is focused on a low frequency design where the unity-gain frequency of the differentiator/ integrator is fo = 10Hz; such design is suitable for control [3] or biomedical applications [39]. In the case of equal capacitance design the values of capacitors are selected to be equal to 100pF (C1 = C2 = 100pF ), while the values of bias current, that supply the two OTAs of the integration stages, are calculated by (2.14).

2 9 · n · VT · C1 8 − 2q I0 = · (3.3) 1 5 q2 − 3q + 2

2 9 · n · VT · C2 q + 3q + 2 I0 = · (3.4) 2 5 8 − 2q2

The bias current of the summation stage I0 is chosen to be equal to the minimum possible value that offers correct operation of the circuit, which is 170pA. For the integer-order parts, the capacitors are also equal to 100pF , while the value of bias current, calculated by Eq.2.14, is equal to 353.2pA. The calculated values of dc bias currents for all the OTAs of the fractional-order integrator/differentiator, implemented through the proposed concept, are presented in Table 3.3. The derived plots of gain and phase responses for the values of the above tables are demonstrated in Figs.3.4(a)-(b). The experimental plots are presented as thick lines, while the theoretical plots as doted lines. In both cases of gain and phase responses the experimental plots almost coincide with the theoretical ones, confirming the efficient operation of the system. Inspecting Fig.3.4(a), it is obvious that all the plots for every order approach the value of 0dB at the unity-gain frequency of fo = 10Hz. Similarly, in the case of phase response the plots of both integrator and differentiator o o o o at fo = 10Hz have values very close to the theoretical ones which are (54 , 63 , 72 , 81 ) for α = 0.6, 0.7, 0.8, 0.9, respectively. In the case of equal bias current design the value of bias current is selected to be equal to 800pA (I02 = I01 = I0 = 800pA), while the values of capacitors are calculated by (3.5):

2 5 · I01 q − 3q + 2 C1 = · 2 (3.5) 9 · n · VT 8 − 2q

34 3.4 Simulation results

20.0 0.9 0.9

0.8 0.8

0.7 0.7

10.0 0.6 0.6

0.0 Gain (dB) Gain

-10.0

-20.0

0 1 2 10 10 10 freq (Hz) (a)

90.0 0.9 0.8 70.0 0.7 0.6 50.0

30.0

10.0

-10.0 Phase (deg) Phase

-30.0

0.6

-50.0 0.7

0.8 -70.0 0.9

-90.0

0 1 2 10 10 10 freq (Hz) (b)

Figure 3.4: Frequency responses of (a) gain and (b) phase of fractional-order integrator/differentiator for 2nd−order CFE approximation in the case of equal capacitance design

35 Proposed method for reducing the spread of element values in fractional-order circuits n = 2 Differentiator (q = α)

α I0 K2I0 I01 K1I01 I02 K0I02 0.6 170pA 48.6pA 806.5pA 806.5pA 44.1pA 154.4pA 0.7 170pA 67.6pA 923pA 923pA 53.7pA 134.9pA 0.8 170pA 92.7pA 1nA 1nA 64.2pA 117.6pA 0.9 170pA 125.8pA 1.2nA 1.2nA 75.6pA 102.1pA (a)

n = 2 Integrator (q = −α)

α I0 K2I0 I01 K1I01 I02 K0I02 0.6 170pA 595pA 2.8nA 2.8nA 154.4pA 44.1pA 0.7 170pA 427.1pA 2.3nA 2.3nA 135pA 53.7pA 0.8 170pA 311.7pA 1.9nA 1.9nA 117.6pA 64.2pA 0.9 170pA 229.6pA 1.6nA 1.6nA 102.1pA 75.6pA (b)

Table 3.3: Values of dc bias currents of the topology in Fig.3.3 for 2nd−order CFE approximation in the case of equal capacitance design

2 5 · I02 8 − 2q C2 = · 2 (3.6) 9 · n · VT q + 3q + 2

The values of capacitors for all the orders of the integrator/differentiator are provided in Table 3.4, while the corresponding gain and phase responses in Fig.3.5(a)-(b), respectively. The thick lines correspond to the experimental plots, while the doted lines to the theoretical ones. In both cases of gain and phase responses the experimental plots approach sufficiently the theoretical ones, confirming the efficient operation ofthe system in this case too. At the critical point of unity-gain frequency f0 = 10Hz the plots present values of gain almost equal to 0dB and phase close to the theoretical ones (54o, 63o, 72o, 81o) for the corresponding orders.

3.4.2 Fractional-order integrator/differentiator using 5th−order Oustaloup approximation

Both cases of equal capacitance and equal bias current design are examined for the 5th−order Oustaloup approximation too. To start with the first case, four of the five

36 3.4 Simulation results

20.0 0.9 0.9 0.8 0.8 0.7 0.7 0.6 10.0 0.6

0.0 Gain (dB) Gain

-10.0

-20.0

0 1 2 10 10 10 freq (Hz) (a)

90.0 0.9 0.8

70.0 0.7 0.6 50.0

30.0

10.0

-10.0 Phase (deg) Phase

-30.0

0.6 -50.0 0.7

0.8 -70.0 0.9

-90.0

0 1 2 10 10 10 freq (Hz) (b)

Figure 3.5: Frequency responses of (a) gain and (b) phase of fractional-order integrator/differentiator for 2nd−order CFE approximation in the case of equal bias currents design

37 Proposed method for reducing the spread of element values in fractional-order circuits

n = 2 n = 2 Differentiator (q = α) Integrator (q = −α) α C1 C2 α C1 C2 0.6 99.2pF 1.8nF 0.6 28.3pF 518.2pF 0.7 86.7pF 1.5nF 0.7 34.5pF 593pF 0.8 75.6pF 1.25nF 0.8 41.2pF 680.1pF 0.9 65.6pF 1.1nF 0.9 48.6pF 783.2pF (a) (b)

Table 3.4: Values of capacitors of the topology in Fig.3.3 for 2nd−order CFE approximation in the case of equal resistance/transconductance design

capacitors are chosen to be equal C1 = C2 = C3 = C4 = 100pF while C5 was equal to 1nF . Inspecting Table 2.1 and Eq.3.7, the values of bias current, that supply the 5 OTAs of the integration stages, are calculated as:

5 4 3 2 9 · n · VT · C1 −5q + 45q − 5q − 1005q + 3250q − 3000 I0 = · 1 5 q5 − 15q4 + 85q3 − 225q2 + 274q − 120

5 4 3 2 9 · n · VT · C2 10q − 30q − 410q + 1230q + 4000q − 12000 I0 = · 2 5 −5q5 + 45q4 − 5q3 − 1005q2 + 3250q − 3000

5 4 3 2 9·n · VT · C3 −10q − 30q + 410q + 1230q − 4000q − 12000 I0 = · (3.7) 3 5 10q5 − 30q4 − 410q3 + 1230q2 + 4000q − 12000

5 4 3 2 9 · n · VT · C4 5q + 45q + 5q − 1005q − 3250q − 3000 I0 = · 4 5 −10q5 − 30q4 + 410q3 + 1230q2 − 4000q − 12000

5 4 3 2 9 · n · VT · C5 −q − 15q − 85q − 225q − 274q − 120 I0 = · 5 5 5q5 + 45q4 + 5q3 − 1005q2 − 3250q − 3000

while a reasonable value for the bias current of the summation stage I0 is 170pA. According to Eq.3.7 and Table 2.7, the values of dc bias currents for all the OTAs of the fractional-order integrator/differentiator are presented in Table 3.5. Applying the above values to the OTAs of the topology, the provided gain and phase responses have the form presented in Figs.3.6(a)-(b). The thick lines correspond to the experimental plots, while the doted lines to the theoretical ones. In both cases of gain and phase responses the experimental plots approach sufficiently the theoretical

38 3.4 Simulation results 5 pA pA pA pA 0 5 I 6 3 8 8 0 pA pA pA pA . . . . 0 I 1 7 7 6 0 . . . . K K 325 225 155 107 17 24 35 51 pA pA pA pA pA 5 pA pA pA 5 0 8 0 3 7 8 . 61 59 04 03 I ...... I 98 89 81 51 56 62 68 107 4 4 pA pA 0 pA pA pA pA pA 0 pA I I 8 1 85 59 . 1 11 39 74 38 ...... K 114 K 94 78 65 26 31 37 45 pA pA pA pA pA pA pA pA 4 4 0 0 74 38 38 75 I 86 92 59 82 . . . . I . . . . 37 41 45 49 78 71 65 59 3 3 pA pA pA pA 0 pA pA pA pA 0 I 9 9 9 9 I 9 9 9 9 . . . . 2 . . . . 2 K K 352 352 352 352 352 352 352 352 ) order Oustaloup approximation in the case of equal α ) − α pA pA pA pA pA pA 3 = th 1 7 5 8 3 pA pA 0 2 2 − . . . . 0 5 . . q I I ( = 510 387 244 267 293 321 465 424 q ( (a) (b) 2 2 0 0 nA nA nA n = 5 I nA nA nA nA n = 5 I nA 3 9 3 3 09 31 58 . 77 97 74 ...... K 1 K 3 1 1 1 4 3 2 Integrator Differentiator nA nA nA 2 nA 2 nA 0 pA nA 0 9 nA I 5 3 58 73 08 . I . 74 . . . . 3 . 1 2 3 1 1 2 2 1 1 nA 0 nA nA nA nA 0 nA nA I I 4 nA 55 4 86 41 87 13 82 53 . 8 ...... K K 3 5 11 72 50 34 24 nA nA nA nA nA nA nA 1 1 nA 0 0 1 1 3 . . . 55 66 88 22 I I . . . . 22 24 20 18 11 12 13 15 0 pA pA 0 nA pA pA pA I pA 8 4 pA I 5 . . 3 5 7 . 07 94 68 . . . . K 427 K 1 676 269 42 26 67 107 pA pA pA pA 0 pA pA pA pA 0 I I 170 170 170 170 170 170 170 170 α α 0.6 0.7 0.8 0.9 0.6 0.7 0.8 0.9 Table 3.5: Values ofcapacitance dc design bias currents of the topology in Fig. 3.3 for

39 Proposed method for reducing the spread of element values in fractional-order circuits ones. At the unity-gain frequency f0 = 10Hz the plots, which correspond to the gain response, have values almost equal to 0dB, while the phase response’s plots are close to the theoretical values of (54o, 63o, 72o, 81o) for α = 0.6, 0.7, 0.8, 0.9, respectively. The only part of the responses that do not seem to follow the theoretical way is the edges. Fig.3.6(a) shows that for values of frequency higher than 400Hz the experimental plots of all the orders (0.6, 0.7, 0.8, 0.9) diverge from the corresponding theoretical ones. The declination between experimental and theoretical responses is more intense in Fig.3.6(b) for a range lower than 0.8Hz and higher than 400Hz. In the case of equal bias currents design the value of bias current is chosen to be equal to 1.3nA (I05 = I04 = I03 = I02 = I01 = I0 = 1.3nA), while the values of capacitors are calculated by Eq.3.8.

5 4 3 2 5 · I011 q − 15q + 85q − 225q + 274q − 120 C1 = · 5 4 3 2 9 · n · VT −5q + 45q − 5q − 1005q + 3250q − 3000

5 4 3 2 5 · I02 −5q + 45q − 5q − 1005q + 3250q − 3000 C2 = · 5 4 3 2 9 · n · VT 10q − 30q − 410q + 1230q + 4000q − 12000

5 4 3 2 5 · I03 10q − 30q − 410q + 1230q + 4000q − 12000 C3 = · 5 4 3 2 (3.8) 9 · n · VT −10q − 30q + 410q + 1230q − 4000q − 12000

5 4 3 2 5 · I04 −10q − 30q + 410q + 1230q − 4000q − 12000 C4 = · 5 4 3 2 9 · n · VT 5q + 45q + 5q − 1005q − 3250q − 3000

5 4 3 2 5 · I05 5q + 45q + 5q − 1005q − 3250q − 3000 C5 = · 5 4 3 2 9 · n · VT −q − 15q − 85q − 225q − 274q − 120

The results of the above calculations are gathered in Tables 3.6(a)-(b), while the corresponding plots of gain and phase responses are showcased in Fig.3.7. The form of gain and phase responses have the same form as in the case of equal capacitance design. The area around the unity-gain frequency f0 = 10Hz shows that experimental and theoretical plots almost coincide with each other, while in the range of very high and very low frequencies, especially in phase response, the experimental plots diverge from the corresponding theoretical at a quite high rate.

40 3.4 Simulation results

40.0 0.9

0.8 0.9 0.8 0.7 0.7 0.6 0.6 20.0

0.0 Gain (dB) Gain

-20.0

-40.0

-1 0 1 2 3 10 10 10 10 10 freq (Hz) (a)

90.0 0.9 0.8 70.0 0.7 0.6 50.0

30.0

10.0

-10.0 Phase (deg) Phase

-30.0

-50.0 0.6 0.7

0.8 -70.0 0.9

-90.0

-1 0 1 2 3 10 10 10 10 10 freq (Hz) (b)

Figure 3.6: Frequency responses of (a) gain and (b) phase of fractional-order integrator/differentiator for 5th−order Oustaloup approximation in the case of equal capacitance design

41 Proposed method for reducing the spread of element values in fractional-order circuits

40.0 0.9 0.9 0.8 0.8 0.7 0.7 0.6 0.6 20.0

0.0 Gain (dB) Gain

-20.0

-40.0

-1 0 1 2 3 10 10 10 10 10 freq (Hz) (a)

90.0 0.9

0.8 70.0 0.7 0.6 50.0

30.0

10.0

-10.0 Phase (deg) Phase

-30.0

-50.0 0.6 0.7 0.8 -70.0 0.9

-90.0

-1 0 1 2 3 10 10 10 10 10 freq (Hz) (b)

Figure 3.7: Frequency responses of (a) gain and (b) phase of fractional-order integrator/differentiator for 5th−order Oustaloup approximation in the case of equal bias currents design

42 3.5 Comparison results

n = 5 Differentiator (q = α) α C1 C2 C3 C4 C5 0.6 11.3pF 82.3pF 532.5pF 3.4nF 25.2nF 0.7 10.3pF 75.1pF 485.7pF 3.1nF 23nF 0.8 9.4pF 68.5pF 442.9pF 2.9nF 21nF 0.9 8.5pF 62.4pF 404pF 2.6nF 19.1nF (a)

n = 5 Integrator (q = −α) α C1 C2 C3 C4 C5 0.6 5.4pF 39.4pF 254.9pF 1.65nF 12nF 0.7 5.9pF 43.2pF 279.5pF 1.8nF 13.2nF 0.8 6.5pF 47.4pF 306.4pF 2nF 14.5nF 0.9 7.1pF 52pF 336pF 2.2nF 15.9nF (b)

Table 3.6: Values of capacitors of the topology in Fig.3.3 for 5th−order Oustaloup approximation in the case of equal bias currents design

3.5 Comparison results

The comparison between the proposed and the conventional method indicates the significant reduction in the spread values of both time-constants and scaling factors. In particular, the reduction is evidently clear in all cases of CFE approximation. However, in the case of the Oustaloup approximation, the reduction is only achieved in the spread of scaling factors since the spread of time-constants is independent of the order α of integrators/differentiators. All the aforementioned are summarized in Table 3.7. The derivations from this table indicate as the most appropriate option the IFLF topology and the 2nd− order CFE approximation. Inspecting the two design methods that have been applied the derived conclusions discriminate the equal capacitance design as the best option. An important feature of this design is that the scheme is fully electronically controlled, in the sense that the adjustment of the order and the type of the realized transfer function (i.e. fractional-order differentiator or integrator) can be performed through the appropriate selection of the dc bias currents which is important from the design flexibility point of view. Moreover, the capacitance isfixed and equal to a low value, a fact that offers a compact circuit in comparison with the equal bias current design. The values of bias current for the conventional and the

43 Proposed method for reducing the spread of element values in fractional-order circuits proposed method in the case that the capacitors are equal to 100pF are presented in Tables 3.8 and 3.9. The corresponding values for the case of equal bias current design are showcased in Tables 3.10 and 3.11, while Table 3.12 summarizes the values of capacitors.

FLF Approximation time-constant scaling factor proposed conventional proposed conventional 2nd−order CFE 20.22 607 23.21 0.35 · 106 3rd−order CFE 103.7 3627 44.87 1.37 · 106 4th−order CFE 331.8 12080 73.43 3.76 · 106 5th−order CFE 814.2 30180 108.8 8.39 · 106 3rd−order Oust 510.3 510.3 91.2 9.12 · 103 5th−order Oust 2238 2238 91.2 9.12 · 103 (a)

IFLF Approximation time-constant scaling factor proposed conventional proposed conventional 2nd−order CFE 20.22 607 4.8 589 3rd−order CFE 103.7 3627 6.7 1169 4th−order CFE 331.8 12080 8.57 1949 5th−order CFE 814.2 30180 10.43 2846 3rd−order Oust 510.3 510.3 9.55 95.5 5th−order Oust 2238 2238 9.55 95.5 (b)

Table 3.7: Comparison of spreads of time-constants and scaling factors using the conventional and proposed methods

44 3.5 Comparison results

n = 2 Differentiator (q = α)

I0 K2I0 I01 α proposed conventional proposed conventional proposed conventional 0.6 170pA 170pA 48.6pA 1.3nA 806.5pA 4.6nA 0.7 170pA 170pA 67.6pA 2nA 923pA 6.4nA 0.8 170pA 170pA 92.7pA 3.6nA 1nA 9.9nA 0.9 170pA 170pA 125.8pA 8.5pA 1.2nA 20.5nA

n = 2 Differentiator (q = α)

K1I01 I02 K0I02 α proposed conventional proposed conventional proposed conventional 0.6 806.5pA 4.6nA 44.1pA 201.6pA 154.4pA 27.1pA 0.7 923pA 6.4nA 53.7pA 230.7pA 134.9pA 19.6pA 0.8 1nA 9.9nA 64.2pA 264.6pA 117.6pA 12.6pA 0.9 1.2nA 20.5nA 75.6pA 304.7pA 102.1pA 6.1pA

Table 3.8: Values of the dc bias currents of the topology in Fig.3.3 in the case of equal capacitance design

n = 2 Integrator (q = −α)

I0 K2I0 I01 α proposed conventional proposed conventional proposed conventional 0.6 170pA 170pA 595pA 22.9pA 2.8nA 617.5pA 0.7 170pA 170pA 427.1pA 14.4pA 2.3nA 539.7pA 0.8 170pA 170pA 311.7pA 8.1pA 1.9nA 470.5pA 0.9 170pA 170pA 229.6pA 3.4pA 1.6nA 408.6pA

n = 2 Integrator (q = −α)

K1I01 I02 K0I02 α proposed conventional proposed conventional proposed conventional 0.6 2.8nA 617.5pA 154.4pA 27.1pA 44.1pA 201.6pA 0.7 2.3nA 539.7pA 135pA 19.6pA 53.7pA 230.7pA 0.8 1.9nA 470.5pA 117.6pA 12.6pA 64.2pA 264.6pA 0.9 1.6nA 408.6pA 102.1pA 6.1pA 75.6pA 304.7pA

Table 3.9: Values of the dc bias currents of the topology in Fig.3.3 in the case of equal capacitance design

45 Proposed method for reducing the spread of element values in fractional-order circuits

n = 2 Differentiator (q = α)

I0 K2I0 I01 α proposed conventional proposed conventional proposed conventional 0.6 800pA 800pA 228.6pA 5.9nA 800pA 800pA 0.7 800pA 800pA 67.6pA 2nA 800pA 800pA 0.8 800pA 800pA 436.4pA 16.8nA 800pA 800pA 0.9 800pA 800pA 592.2pA 40nA 800pA 800pA

n = 2 Differentiator (q = α)

K1I01 I02 K0I02 α proposed conventional proposed conventional proposed conventional 0.6 800pA 800pA 800pA 800pA 2.8nA 107.7pA 0.7 800pA 800pA 800pA 800pA 2nA 68pA 0.8 800pA 800pA 800pA 800pA 1.5nA 38.1pA 0.9 800pA 800pA 800pA 800pA 1.1nA 16pA

Table 3.10: Values of the dc bias currents of the topology in Fig.3.3 in the case of equal bias current design

n = 2 Integrator (q = −α)

I0 K2I0 I01 α proposed conventional proposed conventional proposed conventional 0.6 800pA 800pA 2.8nA 107.7pA 800pA 800pA 0.7 800pA 800pA 2nA 68pA 800pA 800pA 0.8 800pA 800pA 1.5nA 38.1pA 800pA 800pA 0.9 800pA 800pA 1.1nA 16pA 800pA 800pA

n = 2 Integrator (q = −α)

K1I01 I02 K0I02 α proposed conventional proposed conventional proposed conventional 0.6 800pA 800pA 800pA 800pA 228.6pA 5.9nA 0.7 800pA 800pA 800pA 800pA 318.4pA 9.4nA 0.8 800pA 800pA 800pA 800pA 436.4pA 16.8nA 0.9 800pA 800pA 800pA 800pA 592.2pA 40nA

Table 3.11: Values of the dc bias currents of the topology in Fig.3.3 in the case of equal bias current design

46 3.5 Comparison results

n = 2 Differentiator (q = α) C1 C2 α proposed conventional proposed conventional 0.6 9.9pF 17.4pF 1.8nF 397pF 0.7 867pF 12.6pF 1.5nF 347pF 0.8 755.7pF 8.1pF 1.2nF 302.3pF 0.9 65.6pF 3.9pF 1nF 262.5pF (a)

n = 2 Integrator (q = −α) C1 C2 α proposed conventional proposed conventional 0.6 28.3pF 129.6pF 518.2pF 3nF 0.7 34.5pF 148.2pF 593pF 4.1nF 0.8 41.2pF 170pF 680pF 6.3nF 0.9 48.6pF 195.8pF 783.2pF 13.1nF (b)

Table 3.12: Values of capacitors of the topology in Fig.3.3 in the case of equal bias current design

Chapter 4

Layout design of the proposed fractional-order integrator/differentiator topologies

4.1 Introduction

The layout design of an integrated circuit is the three-dimensional character of the elements and interconnections of the circuit. This design is actually the exact repre- sentation of the circuit, considering the physical dimensions and the position of the components, the distance between the same and different materials, all set according to the layout design rules with a view to be appropriate for industrial construction. The layout tool offers the capability of physical verification in order to check themain criteria that the design should meet. These main evaluation criteria are: Design Rule Checking (DRC), Layout versus Schematic (LVS), parasitic extraction, antenna rule checking and electrical rule checking (ERC).

In this Chapter, it is showcased the layout design, as well as the post-layout simulation results, of the fractional-order integrator/differentiator for 2nd−order CFE approximation. The evaluation of the proposed system has been conducted using the Analog Design Environment of the Cadence software and the Design Kit provided by the AMS 0.35μm CMOS process.

49 Layout design of the proposed fractional-order integrator/differentiator topologies 4.2 Basic building blocks

The basic building blocks of the system are the OTAs and the active core of the fractional-order integrator/differentiator. As it has already been mentioned inthe previous Chapters, this system demands two different OTAs; one for the fractional- order part and the integer order integrator and a second one for the integer order differentiator. Their difference lies in the sizing ratio W/L of the transistors, afactthat leads to a different approach of the layout design of each one. The corresponding layout designs of these OTAs are presented in Figs.4.1 and 4.2, with sizes 39.5µm x 63.1µm and 67µm x 74.5µm, respectively.

Figure 4.1: Layout design of the OTA used in the fractional-order part and the integer order integrator

50 4.2 Basic building blocks

Figure 4.2: Layout design of the OTA used in the integer order differentiator

Figure 4.3: Layout design of the integer order differentiator

51 Layout design of the proposed fractional-order integrator/differentiator topologies The integer order integrator is actually just a single OTA, so the layout design will be the same as that in Fig.4.1. This OTA is also used in the layout design of Fig.4.4, which represents the fractional-order part of the system. In the case of the integer order differentiator three OTAs of the kind of Fig.4.2 are used, and the total layout design is that presented in Fig.4.3. Finally, the whole system including the fractional- order integrator/differentiator connected to the integer order parts composes the active core of the proposed model and is showcased in Fig.4.5 with size 313µm x 204µm. The different parts of the system have been framed by different colors, with the yellowone corresponding to the integer order differentiator, the green one to the integer order integrator and the red one to the fractional-order integrator/differentiator. In the last figure, Fig.4.6, the active core is connected to the capacitors and the final version of the layout design is eventually formed. The dimensions of the whole design are 718µm x 872.5µm. This design represents the special case of the equal capacitance design; the case of equal bias current design corresponds to the same layout design but with different values of capacitors and, therefore, different sizes and positions of capacitors area.

Figure 4.4: Layout design of the fractional-order integrator/differentiator

52 4.3 Post-layout simulation results

Figure 4.6: Layout design of the fractional-order integrator/differentiator for 2nd−order CFE approximation in the case of equal capacitance design

4.3 Post-layout simulation results

Post-layout simulation results of the gain and phase frequency responses of the fractional- order differentiators in the case of equal capacitance design are demonstrated in Fig.4.7, with the plots corresponding to the ideal case given as dotted lines. The gains at 10Hz are about -0.5dB, a value close to the theoretical one of 0dB. The values of phase at 10Hz are (55.4o, 64.2o, 72.9o, 81.5o), while the theoretically pre-

53 Layout design of the proposed fractional-order integrator/differentiator topologies iue45 aotdsg fteatv oeo h rpsdmodel proposed the of core active the of design Layout 4.5: Figure

54 4.3 Post-layout simulation results dicted values are (54o, 63o, 72o, 81o). In the case of integrators, the gains at 10Hz are (0.1dB, 0.1dB, 0.08dB, 0.05dB) for α = 0.6, 0.7, 0.8, 0.9 respectively, while the values of phase are (55.5o, 64.2o, 72.8o, 81.4o) with the corresponding theoretical ones being (54o, 63o, 72o, 81o). The case of equal dc bias current design has not been completely layout designed as the case of equal capacitance design. So the post-layout simulation results correspond to the layout design that includes only the active core of the system without the capacitors. As it is obtained from the plots in Fig.4.8, the realized differentiators have gain at 10Hz equal to 0.1dB and (56.2o, 64.8o, 73.3o, 81.8o) phase angles, while in the case of integrators the gains are (0.2dB, 0.15dB, 0.1dB, 0.1dB) and the phase angles (56.1o, 64.6o, 73.1o, 81.5o) for α = 0.6, 0.7, 0.8, 0.9 , respectively. Therefore, the behavior of both designs is very close to the theoretically predicted one, a fact that confirms the efficiency of the layout design. The time-domain behavior of the proposed topology has also been evaluated in the case of a fractional-order integrator of order equal to 0.8, by applying a sinusoidal input signal with 30mV amplitude and frequency 10Hz. The input and output waveforms are demonstrated in Fig.4.9, where the phase difference was measured− as 76o, with the theoretically predicted phase equal to −72o. The sensitivity performance of the proposed topology has been evaluated using the Monte-Carlo analysis tool, for N = 100 runs. The obtained statistical plots about the gain and phase responses confirm that the system has reasonable sensitivity characteristics. Specifically, in the case of the differentiator for α = 0.8 at 10Hz the results, demonstrated in Fig.4.10, showcase that the mean value of the gain is -0.44dB with a standard deviation of 0.44dB, while the mean value and standard deviation of the phase are −73.04o and 0.4o, respectively. The corresponding plots in the case of integrator are presented in Fig.4.11 and the results show that the mean values of the gain and phase responses are equal to∼0dB and −72.75o , while the standard deviations are 0.46dB and 0.45o, respectively.

55 Layout design of the proposed fractional-order integrator/differentiator topologies

20.0 0.9

0.8

0.7 10.0 0.6

0.0 Gain (dB) Gain

0.6

-10.0 0.7

0.8

0.9

-20.0

0 1 2 10 10 10 freq (Hz) (a)

90.0 0.9 0.8

70.0 0.7

0.6 50.0

30.0

10.0

-10.0 Phase (deg) Phase

-30.0

0.6 -50.0 0.7

0.8 -70.0 0.9

-90.0

0 1 2 10 10 10 freq (Hz) (b)

Figure 4.7: Post-layout frequency responses of the (a) magnitude and (b) phase of differentiator/integrator in the case of equal capacitance design

56 4.3 Post-layout simulation results

20.0 0.9

0.8

0.7

10.0 0.6

0.0 Gain (dB) Gain

0.6

0.7 -10.0 0.8

0.9

-20.0

0 1 2 10 10 10 freq (Hz) (a)

90.0 0.9

0.8 70.0 0.7 0.6 50.0

30.0

10.0

-10.0 phase (deg) phase

-30.0

0.6

-50.0 0.7

0.8 -70.0 0.9

-90.0

0 1 2 10 10 10 freq (Hz) (b)

Figure 4.8: Post-layout frequency responses of the (a) gain and (b) phase of differentiator/integrator in the case of equal bias current design

57 Layout design of the proposed fractional-order integrator/differentiator topologies

40 .0

30. 0 vin vout

20. 0

10. 0

0.0

Voltage (V) Voltage -10. 0

-20. 0

-30. 0

-40. 0

0.5 0.6 0.7 0.8 0.9 1.0 time (sec)

Figure 4.9: Input and output waveforms of a fractional-order integrator α = 0.8 (post- layout results)

58 4.3 Post-layout simulation results

20.0

16.0

12.0

8.0 No. of Samples of No.

4.0

0.0

-1.6 -1.2 -0.8 -0.4 0.0 0.4 0.8 Gain (dB) (a)

70.0

60.0

50.0

40.0

30.0 No. of Samples of No.

20.0

10.0

0.0

71 72 73 74 75 Phase (deg) (b)

Figure 4.10: Post-layout Monte-Carlo statistical plots about the (a) gain and (b) phase of the differentiator α = 0.8

59 Layout design of the proposed fractional-order integrator/differentiator topologies

20.0

16.0

12.0

8.0 No. of Samples of No.

4.0

0.0

-1.4 -1.0 -0.6 -0.2 0.2 0.6 1.0 1.4 Gain (dB) (a)

50.0

40.0

30.0

20.0 No. of Samples of No.

10.0

0.0

-75 -74 -73 -72 -71 Phase (deg) (b)

Figure 4.11: Post-layout Monte-Carlo statistical plots about the (a) gain and (b) phase of the integrator α = 0.8

60 Chapter 5

Conclusions and future work

5.1 Conclusions

A novel scheme for reducing the spread of time-constants and scaling factors in fractional-order differentiators and integrators was introduced in this thesis. The concept is based on the combination of a fractional-order part of appropriate order with an integer order integrator or differentiator; the result of this connection is a fractional-order integrator/differentiator of high orders (α > 0.5), but with values of spread that correspond to low orders (α < 0.5). The performed numerical study shows that the maximum achievable spread veritably corresponds to that of the order 0.5, which is significantly less than that achieved using only fractional-order parts. The system is approximated using 2nd− to 5th−order CFE and 3rd− and 5th− order Oustaloup approximations. 2nd− order CFE approximation is, eventually, proved to be the best option, as it offers lower values of spread combined with a compact and less complicated circuit. The provided post-layout simulation results confirm the correct operation of the proposed scheme. Ιn conclusion, the proposed concept offers the following advantages:

• a compact topology that can concurrently implement both fractional-order integrators and differentiators

• reduced values of spread even for high fractional-orders and/or orders of approximation

• employment exclusively of grounded capacitors

• versatility, in the sense that it is applicable in all types of implementations without any restriction on the employed active cell and/or design technique.

61 Conclusions and future work

5.2 Proposals for future work

The efficiency of the system, which was confirmed in the previous chapters, makesit a useful tool in a series of applications. Some proposals for future research work are the following:

• Fractional-order elements (i.e fractional-order capacitor and inductor) emulators

• Fractional-order control systems

• Fractional-order filters

• Fractional-order biological tissues models

• Neuromorphic fractional-order systems

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Appendix A

Matlab Codes

% Calculation of spreads % CFE approximation c l c c l e a r a l l ;

k=1; %fo =10; %wo=2∗pi ∗ fo ; wo=1; tc=1/wo ;

K=0.02; %change the step 0.1 or 0.05 length=(9:(K∗10)) Results_G_spread=zeros(length ,18); Results_tc_spread=zeros(length ,5);

cnt=0; %counter f o r a=−0.99:K:0.99 cnt=cnt +1; %% 2nd−order CFE %Expression for coefficients of s^a a0=((a^2)+3∗a +2);

69 Matlab Codes

a1=(8−2∗(a ^ 2 ) ) ; a2=((a^2)−3∗a +2);

% Calculation of time−constants and gain factors tc_1=(a2/a1)∗ tc ; tc_2=(a1/a0)∗ tc ; G2=k ∗( a0/a2 ) ; G1=k ∗1; G0=k ∗( a2/a0 ) ; num2=G2 ; num1=G1/( tc_1 ) ; num0=G0/( tc_1∗tc_2 ) ; den2=1; den1=1/(tc_1 ); den0=1/(tc_1∗tc_2 ) ;

num = [ num2 num1 num0 ] ; den = [den2 den1 den0];

tf_diff_2=tf (num,den)

%spread of Gain factors G0_2nd=[1 G0 ] ; G0_max_2nd=max(G0_2nd ) ; G0_min_2nd=min (G0_2nd ) ; G0_spread_2nd=G0_max_2nd/G0_min_2nd G1_2nd=[1 G1 ] ; G1_max_2nd=max(G1_2nd ) ; G1_min_2nd=min (G1_2nd ) ; G1_spread_2nd=G1_max_2nd/G1_min_2nd G2_2nd=[1 G2 ] ; G2_max_2nd=max(G2_2nd ) ; G2_min_2nd=min (G2_2nd ) ; G2_spread_2nd=G2_max_2nd/G2_min_2nd

70 %spread of time−constant tc_2nd=[tc_1 tc_2 ]; tc_max_2nd=max(tc_2nd ); tc_min_2nd=min(tc_2nd ); tc_spread_2nd=tc_max_2nd/tc_min_2nd

%% 3rd−order CFE %Expression for coefficients of s^a a0=(a^3)+(6∗a^2)+(11∗a ^1)+6; a1=(−3∗a^3)+(−6∗a^2)+(27∗a ^1)+54; a2=(3∗a^3)+(−6∗a^2)+(−27∗a ^1)+54; a3=(−a^3)+(6∗a^2)+(−11∗a ^1)+6;

% Calculation of time−constants and gain factors tc_1=(a3/a2)∗ tc ; tc_2=(a2/a1)∗ tc ; tc_3=(a1/a0)∗ tc ; G3=k ∗( a0/a3 ) ; G2=k ∗( a1/a2 ) ; G1=k ∗( a2/a1 ) ; G0=k ∗( a3/a0 ) ; num3=G3 ; num2=G2/( tc_1 ) ; num1=G1/( tc_1∗tc_2 ) ; num0=G0/( tc_1∗tc_2∗tc_3 ) ; den3=1; den2=1/tc_1 ; den1=1/(tc_1∗tc_2 ) ; den0=1/(tc_1∗tc_2∗tc_3 ) ;

num = [ num3 num2 num1 num0 ] ; den = [den3 den2 den1 den0];

tf_diff_3=tf (num,den)

%spread of Gain factors

71 Matlab Codes

G0_3rd=[1 G0]; G0_max_3rd=max(G0_3rd ) ; G0_min_3rd=min(G0_3rd ) ; G0_spread_3rd=G0_max_3rd/G0_min_3rd

G1_3rd=[1 G1]; G1_max_3rd=max(G1_3rd ) ; G1_min_3rd=min(G1_3rd ) ; G1_spread_3rd=G1_max_3rd/G1_min_3rd

G2_3rd=[1 G2]; G2_max_3rd=max(G2_3rd ) ; G2_min_3rd=min(G2_3rd ) ; G2_spread_3rd=G2_max_3rd/G2_min_3rd

G3_3rd=[1 G3]; G3_max_3rd=max(G3_3rd ) ; G3_min_3rd=min(G3_3rd ) ; G3_spread_3rd=G3_max_3rd/G3_min_3rd

%spread of time−constant tc_3rd=[tc_1 tc_2 tc_3]; tc_max_3rd=max(tc_3rd ); tc_min_3rd=min(tc_3rd ); tc_spread_3rd=tc_max_3rd/tc_min_3rd

%% 4th−order CFE %Expression for coefficients of s^a a0=(a^4)+(10∗a^3)+(35∗a^2)+(50∗a ^1)+24; a1=(−4∗a^4)+(−20∗a^3)+(40∗a^2)+(320∗a ^1)+384; a2=(6∗a^4)+(−150∗a ^2)+864; a3=(−4∗a^4)+(20∗a^3)+(40∗a^2)+(−320∗a ^1)+384; a4=(a^4)+(−10∗a^3)+(35∗a^2)+(−50∗a ^1)+24;

% Calculation of time−constants and gain factors tc_1=(a4/a3)∗ tc ;

72 tc_2=(a3/a2)∗ tc ; tc_3=(a2/a1)∗ tc ; tc_4=(a1/a0)∗ tc ; G4=k ∗( a0/a4 ) ; G3=k ∗( a1/a3 ) ; G2=k ∗1; G1=k ∗( a3/a1 ) ; G0=k ∗( a4/a0 ) ; num4=G4 ; num3=G3/( tc_1 ) ; num2=G2/( tc_1∗tc_2 ) ; num1=G1/( tc_1∗tc_2∗tc_3 ) ; num0=G0/( tc_1∗tc_2∗tc_3∗tc_4 ) ; den4=1; den3=1/tc_1 ; den2=1/(tc_1∗tc_2 ) ; den1=1/(tc_1∗tc_2∗tc_3 ) ; den0=1/(tc_1∗tc_2∗tc_3∗tc_4 ) ;

num = [ num4 num3 num2 num1 num0 ] ; den = [den4 den3 den2 den1 den0];

tf_diff_4=tf (num,den)

%spread of Gain factors G0_4th=[1 G0]; G0_max_4th=max(G0_4th ) ; G0_min_4th=min(G0_4th ) ; G0_spread_4th=G0_max_4th/G0_min_4th

G1_4th=[1 G1]; G1_max_4th=max(G1_4th ) ; G1_min_4th=min(G1_4th ) ; G1_spread_4th=G1_max_4th/G1_min_4th

G2_4th=[1 G2];

73 Matlab Codes

G2_max_4th=max(G2_4th ) ; G2_min_4th=min(G2_4th ) ; G2_spread_4th=G2_max_4th/G2_min_4th

G3_4th=[1 G3]; G3_max_4th=max(G3_4th ) ; G3_min_4th=min(G3_4th ) ; G3_spread_4th=G3_max_4th/G3_min_4th

G4_4th=[1 G4]; G4_max_4th=max(G4_4th ) ; G4_min_4th=min(G4_4th ) ; G4_spread_4th=G4_max_4th/G4_min_4th

%spread of time−constant tc_4th =[tc_1 tc_2 tc_3 tc_4]; tc_max_4th=max(tc_4th ); tc_min_4th=min(tc_4th ); tc_spread_4th=tc_max_4th/tc_min_4th

%% 5th−order CFE %Expression for coefficients of s^a a0=(−a^5)+(−15∗a^4)+(−85∗a^3)+(−225∗a^2)+(−274∗a^1) −120; a1=(5∗a^5)+(45∗a^4)+(5∗a^3)+(−1005∗a^2)+(−3250∗a^1) −3000; a2=(−10∗a^5)+(−30∗a^4)+(410∗a^3)+(1230∗a^2)+(−4000∗a^1) −12000; a3=(10∗a^5)+(−30∗a^4)+(−410∗a^3)+(1230∗a^2)+(4000∗a^1) −12000; a4=(−5∗a^5)+(45∗a^4)+(−5∗a^3)+(−1005∗a^2)+(3250∗a^1) −3000; a5=(a^5)+(−15∗a^4)+(85∗a^3)+(−225∗a^2)+(274∗a^1) −120;

% Calculation of time−constants and gain factors tc_1=(a5/a4)∗ tc ; tc_2=(a4/a3)∗ tc ; tc_3=(a3/a2)∗ tc ; tc_4=(a2/a1)∗ tc ; tc_5=(a1/a0)∗ tc ;

74 G5=k ∗( a0/a5 ) ; G4=k ∗( a1/a4 ) ; G3=k ∗( a2/a3 ) ; G2=k ∗( a3/a2 ) ; G1=k ∗( a4/a1 ) ; G0=k ∗( a5/a0 ) ; num5=G5 ; num4=G4/tc_1 ; num3=G3/( tc_1∗tc_2 ) ; num2=G2/( tc_1∗tc_2∗tc_3 ) ; num1=G1/( tc_1∗tc_2∗tc_3∗tc_4 ) ; num0=G0/( tc_1∗tc_2∗tc_3∗tc_4∗tc_5 ) ; den5=1; den4=1/tc_1 ; den3=1/(tc_1∗tc_2 ) ; den2=1/(tc_1∗tc_2∗tc_3 ) ; den1=1/(tc_1∗tc_2∗tc_3∗tc_4 ) ; den0=1/(tc_1∗tc_2∗tc_3∗tc_4∗tc_5 ) ; num = [ num5 num4 num3 num2 num1 num0 ] ; den = [den5 den4 den3 den2 den1 den0];

tf_diff_5=tf (num,den)

%spread of Gain factors G0_5th=[1 G0]; G0_max_5th=max(G0_5th ) ; G0_min_5th=min(G0_5th ) ; G0_spread_5th=G0_max_5th/G0_min_5th

G1_5th=[1 G1]; G1_max_5th=max(G1_5th ) ; G1_min_5th=min(G1_5th ) ; G1_spread_5th=G1_max_5th/G1_min_5th

G2_5th=[1 G2]; G2_max_5th=max(G2_5th ) ;

75 Matlab Codes

G2_min_5th=min(G2_5th ) ; G2_spread_5th=G2_max_5th/G2_min_5th

G3_5th=[1 G3]; G3_max_5th=max(G3_5th ) ; G3_min_5th=min(G3_5th ) ; G3_spread_5th=G3_max_5th/G3_min_5th

G4_5th=[1 G4]; G4_max_5th=max(G4_5th ) ; G4_min_5th=min(G4_5th ) ; G4_spread_5th=G4_max_5th/G4_min_5th

G5_5th=[1 G5]; G5_max_5th=max(G5_5th ) ; G5_min_5th=min(G5_5th ) ; G5_spread_5th=G5_max_5th/G5_min_5th

%spread of time−constant tc_5th=[tc_1 tc_2 tc_3 tc_4 tc_5]; tc_max_5th=max(tc_5th ); tc_min_5th=min(tc_5th ); tc_spread_5th=tc_max_5th/tc_min_5th %% Results_G0_spread(cnt ,1)=G0_spread_2nd; Results_G1_spread(cnt ,2)=G1_spread_2nd; Results_G2_spread(cnt ,3)=G2_spread_2nd;

Results_G0_spread(cnt ,4)=G0_spread_3rd; Results_G1_spread(cnt ,5)=G1_spread_3rd; Results_G2_spread(cnt ,6)=G2_spread_3rd; Results_G3_spread(cnt ,7)=G3_spread_3rd;

Results_G0_spread(cnt ,8)=G0_spread_4th; Results_G1_spread(cnt ,9)=G1_spread_4th; Results_G2_spread(cnt ,10)=G2_spread_4th;

76 Results_G3_spread(cnt ,11)=G3_spread_4th; Results_G4_spread(cnt ,12)=G4_spread_4th;

Results_G0_spread(cnt ,13)=G0_spread_5th; Results_G1_spread(cnt ,14)=G1_spread_5th; Results_G2_spread(cnt ,15)=G2_spread_5th; Results_G3_spread(cnt ,16)=G3_spread_5th; Results_G4_spread(cnt ,17)=G4_spread_5th; Results_G5_spread(cnt ,18)=G5_spread_5th; % Coeff_A(cnt,1)=a; CFE_2nd_order_G0(cnt ,1)=G0_spread_2nd ; CFE_2nd_order_G1(cnt ,1)=G1_spread_2nd ; CFE_2nd_order_G2(cnt ,1)=G2_spread_2nd ;

CFE_3rd_order_G0(cnt ,1)=G0_spread_3rd ; CFE_3rd_order_G1(cnt ,1)=G1_spread_3rd ; CFE_3rd_order_G2(cnt ,1)=G2_spread_3rd ; CFE_3rd_order_G3(cnt ,1)=G3_spread_3rd ;

CFE_4th_order_G0(cnt ,1)=G0_spread_4th ; CFE_4th_order_G1(cnt ,1)=G1_spread_4th ; CFE_4th_order_G2(cnt ,1)=G2_spread_4th ; CFE_4th_order_G3(cnt ,1)=G3_spread_4th ; CFE_4th_order_G4(cnt ,1)=G4_spread_4th ;

CFE_5th_order_G0(cnt ,1)=G0_spread_5th ; CFE_5th_order_G1(cnt ,1)=G1_spread_5th ; CFE_5th_order_G2(cnt ,1)=G2_spread_5th ; CFE_5th_order_G3(cnt ,1)=G3_spread_5th ; CFE_5th_order_G4(cnt ,1)=G4_spread_5th ; CFE_5th_order_G5(cnt ,1)=G5_spread_5th ; % Results_tc_spread(cnt ,1)=tc_spread_2nd; Results_tc_spread(cnt,2)=tc_spread_3rd; Results_tc_spread(cnt,3)=tc_spread_4th;

77 Matlab Codes

Results_tc_spread(cnt,4)=tc_spread_5th; % Coeff_A(cnt,1)=a; CFE_2nd_order_tc(cnt ,1)=tc_spread_2nd ; CFE_3rd_order_tc(cnt ,1)=tc_spread_3rd ; CFE_4th_order_tc(cnt ,1)=tc_spread_4th ; CFE_5th_order_tc(cnt ,1)=tc_spread_5th ; end

%table for spread of Gain factors T1=table (Coeff_A ,CFE_2nd_order_G0,CFE_2nd_order_G1,CFE_2nd_order_G2, CFE_3rd_order_G0 , CFE_3rd_order_G1 , CFE_3rd_order_G2 , CFE_3rd_order_G3 , CFE_4th_order_G0 , CFE_4th_order_G1 , CFE_4th_order_G2 , CFE_4th_order_G3 , CFE_4th_order_G4 , CFE_5th_order_G0 , CFE_5th_order_G1 , CFE_5th_order_G2 , CFE_5th_order_G3 ,CFE_5th_order_G4 , CFE_5th_order_G5 );

%table for spread of time−constants T2=table (Coeff_A , CFE_2nd_order_tc ,CFE_3rd_order_tc , CFE_4th_order_tc , CFE_5th_order_tc ); K1=table2array(T1); K2=table2array(T2);

%%plot Spread of Gain factors col1 = K1(:, 1); %alpha col2 = K1(:, 2); %2nd G0 col3 = K1(:, 3); % 2nd G1 col4 = K1(:, 4); % 2nd G2

col5 = K1(:, 5); % 3rd G0 col6 = K1(:, 6); % 3rd G1 col7 = K1(:, 7); % 3rd G2 col8 = K1(:, 8); % 3rd G3

col9 = K1(:, 9); % 4th G0 col10 = K1(:, 10); % 4th G1

78 col11 = K1(:, 11); % 4th G2 col12 = K1(:, 12); % 4th G3 col13 = K1(:, 13); % 4th G4 col14 = K1(:, 14); % 5th G0 col15 = K1(:, 15); % 5th G1 col16 = K1(:, 16); % 5th G2 col17 = K1(:, 17); % 5th G3 col18 = K1(:, 18); % 5th G4 col19 = K1(:, 19); % 5th G5 a=c o l 1 ; %x−a x i s %% f i g u r e h1=plot(a,col2 , ’b’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h2=plot(a,col3 , ’g’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h3=plot(a,col4 ,’r’,’MarkerSize ’,18,’LineWidth’ ,2); g r i d on xlim ( [ − 1 , 1 ] ) ; xlabel(’order (q)’,’Fontsize ’,16); ylabel(’spread of scaling factors ’,’Fontsize ’,16); set(gca, ’Yscale’ , ’log’); set(gca,’fontsize ’,16) %title(’\fontsize{16} Spread of Gain factors ’,’Fontsize ’,16) legend([h1 h2 h3 ],{’integ #2’,’integ #1’,’summation’}); %% f i g u r e h4=plot(a,col5 , ’m’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h5=plot(a,col6 , ’b’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h6=plot(a,col7 , ’g’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h7=plot(a,col8 ,’r’,’MarkerSize ’,18,’LineWidth’ ,2);

79 Matlab Codes

g r i d on xlim ( [ − 1 , 1 ] ) ; xlabel(’order (q)’,’Fontsize ’,16); ylabel(’spread of scaling factors ’,’Fontsize ’,16); set(gca, ’Yscale’ , ’log’); set(gca,’fontsize ’,16) %title(’\fontsize{16} Spread of Gain factors ’,’Fontsize ’,16) legend([h4 h5 h6 h7],{’integ #3’,’integ #2’, ’integ #1’,’summation’}); %% f i g u r e h8=plot(a,col9 , ’k’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h9=plot(a,col10 , ’m’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h10=plot(a,col11 , ’b’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h11=plot(a,col12 , ’g’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h12=plot(a,col13 , ’r’ , ’MarkerSize ’,18,’LineWidth’ ,2);

g r i d on xlim ( [ − 1 , 1 ] ) ; xlabel(’order (q)’,’Fontsize ’,16); ylabel(’spread of scaling factors ’,’Fontsize ’,16); set(gca, ’Yscale’ , ’log’); set(gca,’fontsize ’,16) %title(’\fontsize{16} Spread of Gain factors ’,’Fontsize ’,16) legend([h8 h9 h10 h11 h12],{’integ #4’,’integ #3’,’integ #2’, ’integ #1’, ’summation’}); %% f i g u r e h13=plot(a,col14 , ’c’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h14=plot(a,col15 , ’k’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on

80 h15=plot(a,col16 , ’m’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h16=plot(a,col17 , ’b’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h17=plot(a,col18 , ’g’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h18=plot(a,col19 , ’r’ , ’MarkerSize ’,18,’LineWidth’ ,2); g r i d on xlim ( [ − 1 , 1 ] ) ; xlabel(’order (q)’,’Fontsize ’,16); ylabel(’spread of scaling factors ’,’Fontsize ’,16); set(gca, ’Yscale’ , ’log’); set(gca,’fontsize ’,16) %title(’\fontsize{16} Spread of Gain factors ’,’Fontsize ’,16) legend([h13 h14 h15 h16 h17 h18],{’integ #5’,’integ #4’,’integ #3’, ’integ #2’,’integ #1’,’summation’}); %% %%plot Spread of time constants col1 = K2(:, 1); %alpha col2 = K2(:, 2); %2nd col3 = K2(:, 3); %3rd col4 = K2(:, 4); %4th col5 = K2(:, 5); %5th a=c o l 1 ; %x−axes %% f i g u r e h1=plot(a,col2 ,’r’,’MarkerSize ’,18,’LineWidth’ ,2); hold on h2=plot(a,col3 , ’b’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h3=plot(a,col4 , ’g’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h4=plot(a,col5 , ’m’ , ’MarkerSize ’,18,’LineWidth’ ,2); g r i d on xlim ( [ − 1 , 1 ] ) ;

81 Matlab Codes

xlabel(’order (q)’,’Fontsize ’,16); ylabel(’ spread of time−constants ’,’Fontsize ’,16); set(gca, ’Yscale’ , ’log’); set(gca,’fontsize ’,16) %title(’\fontsize{16} Spread of time−constants ’,’Fontsize ’,16) legend([h1 h2 h3 h4],{’2^n^d−order CFE’,’3^r^d−order CFE’ , ’4^ t^h−order CFE’,’5^t^h−order CFE’});

82 % Calculation of spreads % Oustaloup approximation c l c ; c l e a r a l l ;

%fo =10; %wo=2∗pi ∗ fo ; wo=1; tc=1/wo ; w=logspace( −3,3,1000); %limits for plots

% limits for oustaloop wl=1E−02; wh=1E+02;

K=0.02; %change the step 0.1 or 0.05 length=(9:(K∗10)) Results_G_spread=zeros(length ,10); Results_tc_spread=zeros(length ,5); cnt=0; %counter f o r a=−0.99:K:0.99; cnt=cnt +1; %% 3rd−order approximation N= 1 ; % n=2∗N+1=3 oustaloup_3=oustafod(a,N,wl,wh); oustaloup_3=minreal(oustaloup_3 ); [num,den] = tfdata(oustaloup_3 ,’v’); a3=num( 1 , 1 ) ; a2=(wo^1)∗num( 1 , 2 ) ; a1=(wo^2)∗num( 1 , 3 ) ;

83 Matlab Codes a0=(wo^3)∗num( 1 , 4 ) ; b3=den(1 ,1); b2=(wo^1)∗ den ( 1 , 2 ) ; b1=(wo^2)∗ den ( 1 , 3 ) ; b0=(wo^3)∗ den ( 1 , 4 ) ;

tc_1=1/b2 ; tc_2=1/(tc_1∗b1 ) ; tc_3=1/(tc_1∗tc_2∗b0 ) ; tc_3rd_oust = [tc_3 tc_2 tc_1];

G3=a3 ; G2=a2∗tc_1 ; G1=a1 ∗( tc_1∗tc_2 ) ; G0=a0 ∗( tc_1∗tc_2∗tc_3 ) ;

%spread of time−constants tc_max_3rd_oust = max(tc_3rd_oust ); tc_min_3rd_oust = min(tc_3rd_oust); tc_spread_3rd_oust = tc_max_3rd_oust/tc_min_3rd_oust;

%spread of Gain factors G0_3rd=[1 G0]; G0_max_3rd=max(G0_3rd ) ; G0_min_3rd=min(G0_3rd ) ; G0_spread_3rd=G0_max_3rd/G0_min_3rd

G1_3rd=[1 G1]; G1_max_3rd=max(G1_3rd ) ; G1_min_3rd=min(G1_3rd ) ; G1_spread_3rd=G1_max_3rd/G1_min_3rd

G2_3rd=[1 G2]; G2_max_3rd=max(G2_3rd ) ;

84 G2_min_3rd=min(G2_3rd ) ; G2_spread_3rd=G2_max_3rd/G2_min_3rd

G3_3rd=[1 G3]; G3_max_3rd=max(G3_3rd ) ; G3_min_3rd=min(G3_3rd ) ; G3_spread_3rd=G3_max_3rd/G3_min_3rd ;

%% 5th−order approximation N = 2;% n=2∗N+1=5 oustaloup_5=oustafod(a,N,wl,wh); oustaloup_5=minreal(oustaloup_5 ); [num,den] = tfdata(oustaloup_5 ,’v’); a5=num( 1 , 1 ) ; a4=(wo^1)∗num( 1 , 2 ) ; a3=(wo^2)∗num( 1 , 3 ) ; a2=(wo^3)∗num( 1 , 4 ) ; a1=(wo^4)∗num( 1 , 5 ) ; a0=(wo^5)∗num( 1 , 6 ) ; b5=den(1 ,1); b4=(wo^1)∗ den ( 1 , 2 ) ; b3=(wo^2)∗ den ( 1 , 3 ) ; b2=(wo^3)∗ den ( 1 , 4 ) ; b1=(wo^4)∗ den ( 1 , 5 ) ; b0=(wo^5)∗ den ( 1 , 6 ) ; tc_1=1/b4 ; tc_2=1/(tc_1∗b3 ) ; tc_3=1/(tc_1∗tc_2∗b2 ) ; tc_4=1/(tc_1∗tc_2∗tc_3∗b1 ) ; tc_5=1/(tc_1∗tc_2∗tc_3∗tc_4∗b0 ) ; tc_5th_oust = [tc_5 tc_4 tc_3 tc_2 tc_1];

G5=a5 ;

85 Matlab Codes

G4=a4∗tc_1 ; G3=a3 ∗( tc_1∗tc_2 ) ; G2=a2 ∗( tc_1∗tc_2∗tc_3 ) ; G1=a1 ∗( tc_1∗tc_2∗tc_3∗tc_4 ) ; G0=a0 ∗( tc_1∗tc_2∗tc_3∗tc_4∗tc_5 ) ;

%spread of time−constant tc_max_5th_oust = max(tc_5th_oust ); tc_min_5th_oust = min(tc_5th_oust); tc_spread_5th_oust = tc_max_5th_oust/tc_min_5th_oust;

%spread of Gain factors G0_5th=[1 G0]; G0_max_5th=max(G0_5th ) ; G0_min_5th=min(G0_5th ) ; G0_spread_5th=G0_max_5th/G0_min_5th

G1_5th=[1 G1]; G1_max_5th=max(G1_5th ) ; G1_min_5th=min(G1_5th ) ; G1_spread_5th=G1_max_5th/G1_min_5th

G2_5th=[1 G2]; G2_max_5th=max(G2_5th ) ; G2_min_5th=min(G2_5th ) ; G2_spread_5th=G2_max_5th/G2_min_5th

G3_5th=[1 G3]; G3_max_5th=max(G3_5th ) ; G3_min_5th=min(G3_5th ) ; G3_spread_5th=G3_max_5th/G3_min_5th

G4_5th=[1 G4]; G4_max_5th=max(G4_5th ) ; G4_min_5th=min(G4_5th ) ; G4_spread_5th=G4_max_5th/G4_min_5th

86 G5_5th=[1 G5]; G5_max_5th=max(G5_5th ) ; G5_min_5th=min(G5_5th ) ; G5_spread_5th=G5_max_5th/G5_min_5th

%% Results_G0_spread(cnt ,1)=G0_spread_3rd; Results_G1_spread(cnt ,2)=G1_spread_3rd; Results_G2_spread(cnt ,3)=G2_spread_3rd; Results_G3_spread(cnt ,4)=G3_spread_3rd;

Results_G0_spread(cnt ,5)=G0_spread_5th; Results_G1_spread(cnt ,6)=G1_spread_5th; Results_G2_spread(cnt ,7)=G2_spread_5th; Results_G3_spread(cnt ,8)=G3_spread_5th; Results_G4_spread(cnt ,9)=G4_spread_5th; Results_G5_spread(cnt ,10)=G5_spread_5th;

% Coeff_A(cnt,1)=a; OUST_3rd_order_G0(cnt ,1)=G0_spread_3rd ; OUST_3rd_order_G1(cnt ,1)=G1_spread_3rd ; OUST_3rd_order_G2(cnt ,1)=G2_spread_3rd ; OUST_3rd_order_G3(cnt ,1)=G3_spread_3rd ;

OUST_5th_order_G0(cnt ,1)=G0_spread_5th ; OUST_5th_order_G1(cnt ,1)=G1_spread_5th ; OUST_5th_order_G2(cnt ,1)=G2_spread_5th ; OUST_5th_order_G3(cnt ,1)=G3_spread_5th ; OUST_5th_order_G4(cnt ,1)=G4_spread_5th ; OUST_5th_order_G5(cnt ,1)=G5_spread_5th ;

% Results_tc_spread(cnt ,1)=tc_spread_3rd_oust;

87 Matlab Codes

Results_tc_spread(cnt ,2)=tc_spread_5th_oust;

% Coeff_A(cnt,1)=a; Oust_3rd_order_tc(cnt ,1)=tc_spread_3rd_oust ; Oust_5th_order_tc(cnt ,1)=tc_spread_5th_oust ;

end

%table for spread of Gain factors T1=table (Coeff_A ,OUST_3rd_order_G0,OUST_3rd_order_G1, OUST_3rd_order_G2 ,OUST_3rd_order_G3 , OUST_5th_order_G0 , OUST_5th_order_G1 , OUST_5th_order_G2 , OUST_5th_order_G3 , OUST_5th_order_G4 , OUST_5th_order_G5 ) ;

%table for spread of time−constants T2=table(Coeff_A, Oust_3rd_order_tc , Oust_5th_order_tc); K1=table2array(T1); K2=table2array(T2);

%% %%plot Spread of Gain factors col1 = K1(:, 1); %alpha col2 = K1(:, 2); %3rd G0 col3 = K1(:, 3); %3rd G1 col4 = K1(:, 4); %3rd G2 col5 = K1(:, 5); %3rd G3

col6 = K1(:, 6); %5th G0 col7 = K1(:, 7); %5th G1 col8 = K1(:, 8); %5th G2 col9 = K1(:, 9); %5th G3 col10 = K1(:, 10); %5th G4 col11 = K1(:,11); %5th G5

a=c o l 1 ; %x−a x i s

88 %% f i g u r e h1=plot(a,col2 , ’m’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h2=plot(a,col3 , ’b’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h3=plot(a,col4 , ’g’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h4=plot(a,col5 ,’r’,’MarkerSize ’,18,’LineWidth’ ,2); g r i d on xlim ( [ − 1 , 1 ] ) ; xlabel(’order (q)’,’Fontsize ’,16); ylabel(’spread of scaling factors ’,’Fontsize ’,16); set(gca, ’Yscale’ , ’log’); set(gca,’fontsize ’,16) %title(’\fontsize{16} Spread of Gain factors ’,’Fontsize ’,16) legend([h1 h2 h3 h4],{’integ #3’,’integ #2’, ’integ #1’, ’summation’}); %% f i g u r e h5=plot(a,col6 , ’c’ ,’MarkerSize ’,18,’LineWidth’ ,2); hold on h6=plot(a,col7 , ’k’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h7=plot(a,col8 , ’m’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h8=plot(a,col9 , ’b’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h9=plot(a,col10 , ’g’ , ’MarkerSize ’,18,’LineWidth’ ,2); hold on h10=plot(a,col11 , ’r’ , ’MarkerSize ’,18,’LineWidth’ ,2); g r i d on xlim ( [ − 1 , 1 ] ) ; xlabel(’order (q)’,’Fontsize ’,16);

89 Matlab Codes

ylabel(’spread of scaling factors ’,’Fontsize ’,16); set(gca, ’Yscale’ , ’log’); set(gca,’fontsize ’,16) %title(’\fontsize{16} Spread of Gain factors ’,’Fontsize ’,16) legend([h5 h6 h7 h8 h9 h10],{’integ #5’,’integ #4’,’integ #3’, ’integ #2’,’integ #1’,’summation’});

%% %%plot Spread of time constants col1 = K2(:, 1); %alpha col2 = K2(:, 2); %3rd col3 = K2(:, 3); %5th

a=c o l 1 ; %x−axes

f i g u r e h1=plot(a,col2 , ’c’ ,’MarkerSize ’,18,’LineWidth’ ,2); hold on h2=plot(a,col3 , ’k’ , ’MarkerSize ’,18,’LineWidth’ ,2);

g r i d on xlim ( [ − 1 , 1 ] ) ; xlabel(’order (q)’,’Fontsize ’,16); ylabel(’ spread of time−constants ’,’Fontsize ’ ,16); set(gca, ’Yscale’ , ’log’); set(gca,’fontsize ’,16) %title(’\fontsize{16} Spread of time−constants ’,’Fontsize ’,16) legend([h1 h2],{’3^r^d−order OUST’,’5^t^h−order OUST’});

Appendix B

Transfer Functions

Figure B.1: Transfer functions of differentiator for 3rd−, 5th− order Oustaloup approximation

93 Transfer Functions

Figure B.2: Transfer functions of integrator for 3rd−, 5th− order Oustaloup approximation

94 95

Figure B.3: Transfer functions of differentiator for 2nd−, 3rd−, 4th−, 5th− order CFE approximation Transfer Functions iueB4 rnfrfntoso nertrfor integrator of functions Transfer B.4: Figure 2 nd − , 3 rd − , 4 th − , 5 th − re F approximation CFE order