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The Essential Guide to Data Conversion

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The Essential Guide to Data Conversion THE ESSENTIAL GUIDE TO DATA CONVERSION “Real-World” Sampled Data Systems Consist of ADCs and DACs ANALOG DIGITAL ADC Analog-to-Digital Converters (ADC) and Digital-to-Analog Converters (DAC) SENSOR CHANNEL DSP MEMORY allow DSPs to interact with real-world signals. Real-world signals are continuous (analog) signals. Pressure sensor DAC Temperaturese sensoensorre, ettcc. DE G Real-world signal processing allows for efficient and cost effective E AL U U O T L GI extraction of information from a signal. VA DI ANAL AMPLIT Signal amplitude TIME TIME Phase, etc. ADC SAMPLEDSAMPLED AND DAC RECONSTRUCTED QUANTIZED WAVEFORM WAVEFORM Digital information differs from real-world information in two important respects…it is sampled, and it is quantized. Both of these restrict how muchih inftformatiidon a diiigittlal silignal can contitain. Converter Resolution, INL, and DNL Converter resolutionr epresentst he analog signal at an umbero fd iscrete levels IDEAL or steps. The smallest resolvable signal is 1 Least Significant Bit (LSB), which is equal FS to FS/8 in this example. 7/8 IDEAL ItIntegralNl Nonlinearity (INL)i) is a measure oftf thhe maximum dideviation iLin LSSBBs, from 6/8 INL a straight line passing through negative full-scale and positive full-scale. Good INL is required for open-loop systems and many closed-loop systems. 5/8 G DNL G Differential Nonlinearityy( (DNL) is the difference between the actual step size and 4/8 the ideal 1 LSB change between two adjacent codes. ACTUAL 1 LSB ANALO DNLerror results in: ANALO 3/8 QUANTIZATION Smaller or larger step sizes than the ideal 2/8 UNCERTAINTY Additive noise/spursb eyondt he effectso fq uantization NON-MONOTONIC 1/8 A DAC is monotonic if its output increases or remains the same for an increment in the digital code, i.e., DNL > –1 LSB(a key requirement in a control system). Conversely, a DAC is nonmonotonic if the output decreases for an increment 000 001 010 011 100 101 11 0 111 000 001010 011100 101110 111 in theed digitaigitall code. DIGITAL INPUT An ADC has no missing codes if the input voltage is swept over the entire input DIGITAL range and all output code combinations appear at the converter output. A DNL error of > –0.99 LSB guarantees that the converter will have no missing codes. Converter Errors (Unipolar) DAC Definitions POSITIVE GAIN AND GAIN ERROR FULL-SCALE OFFSET Zero-Code Error is the measured output voltage from VOUT of the DAC ERROR NEGATIVE ERROR when zero code (all zeros) is loaded to the DAC register. GAIN ERROR Zero-Code Error is typically expressed in LSBs. DAC Offset Error is a measure of the difference between the actual VOUT OUTPUT VOLTA GE OUTPUT and the ideal VOUT in the linear region of the transfer function. Offset error ACTUAL VOLTA GE can be negative or positive in the DAC and output amplifier. IDEAL ACTUAL Offset Errorir isst typicallyypically expressedexpressed in mV or mA. IDEAL ZERO-CODE DAC Gain Error is a measure of the span error of the DAC. It is the deviation ERROR in slope of the actual DAC transfer characteristic from the ideal. POSITIVE Gain Errosor is usuallyey expressedessed as aap peecrceetntageageo of tethe full-scaaele raagngee. DAC CODE OFFSET DAC CODE Full-Scale Erroris a measure of the output error when full-scale code (0xFFFF) is loaded into the DAC register. Ideally, the output should be VREF − 1 LSB. (Full-Scale Error = Offset Error + Gain Error) Full-Scale Error is typically expressed as a percentage of the full-scale range. GAIN AND Deadband Errors, DACs with integrated output amplifiers will have OFFSET ERROR DEADBAND CODES performance degradation, deadbands, at codes outside of the linear region of thethe output amplifier. AMPLIFIER FULL-SCALE FOOTROOM The number of deadband codes depends on the DAC output voltage span, the OUTPUT ERROR headroom and footroom of the amplifier, and the power supply rails used. VOLTA GE ZERO-CODE ACTUAL NEGATIVE ERROR OFFSET IDEAL ADCCe Definitotions ADC Offset Error is the deviation of the first code transition, for example (000…000) to (000…001) from the ideal (AGND + 1 LSB). Offset error is NEGATIVE typically expressed in LSBs. OFFSET DAC CODE ADC Gain Error is the deviation of the last code transition, for example (111…110) to (111…111) from the ideal (VREF –1 LSB) after the offset error is adjusted out. Gain error for an ADC does not include the reference error andid isst typicallyypically expressedexpressedi inn LSBs. www.analog.com/DataConverters THE ESSENTIAL GUIDE TO DATA CONVERSION Time Domain DAC Output OVERSHOOT CLOCK / DATA GLITCH FEEDTHROUGH IMPULSE Clock to output delay ENERGY Group delay due to DAC propagation delay NON-IDEAL RESPONSE Settling time SETTLING DNL ERROR 1LSB Measured relative to output signal alone ERROR T BAND Time between when signal leaves ±0.5 LSB error band to when it PU IDEAL T remains within ±0.5 LSB error band of final value RESPONSE NONLINEAR OU SLEWING OG Slew rate AL Defined as maximum rate of change of voltage or current at output AN C CLOCK / DATA Specifiedad assV V/se/secc or A/sec dependingdependingo onnD DACAC outpuoutputts stagtagee DA FEEDTHROUGH Typically measured for full-scale step size with 10% to 90% error band CLOCK TO Glitch impulse energy OUTPUT DELAY CdCaused by unequal propagation dldelays within DAC CODE = CODE = CODE = CODE = CODE = ZEROSCALE ZEROSCALE MIDSCALE MIDSCALE MIDSCALE + 1 Often measured for midscale LSB transition (011..111 to 100..000) TIME T1 T2 T3 T4 T5 Measured as “area” of glitch impulse with units p/nV-s or p/nA-s Frequency Domain DAC Output FULL-SCALE Sinc(x) –x dB FROM FULL-SCALE (dBFS) SINC ATTENUATION DAC’s time domain step response (zero-order hold) modifies DAC –3.9dBc @ FDAC/2 frequency response FUNDAMENTA L DAC output signals are attenuated by sin(πf/f )/(π f/f ) envelope SIGNAL DESIRED SIGNAL IMAGES dac dac Harmonics Created by DAC’s static and dynamic nonlinearities SFDR (dBc) Images (dB) B) DAC CLOCK FEEDTHROUGH (d nd rd 2 AND 3 Duplicate of the desired signal (and its DAC induced harmonics) at de tu li ITUDE HARMONICS p higher Nyquist zones Am DESIRED SIGNAL AMPL 2nd AND 3rd IMAGE HARMONICS Images are predicted by sampling theory SFDR NSDD( (dBm/HzdBm/Hz) Measured with single-tone output in first Nyquist band (unit is dBc) Difference between single-tone amplitude to the next highest spurious tone FDAC/2 FDAC Noise Spectral Density (NSD) FREQUENCFrequency Y Integration of the noise floor in a small frequency band (unit is dBm/Hz or nV/rtHz) Nyquist’s Criteria AMPLITUDE fa IMAGE NYQUISTZONE1 (BASEBAND) Undersampledanalog signal fa sampled @ Fs has images (l(alii)ases) at|t | ± KFs ± fa|K|, K = 050.5, 111, 1.5 … FREQUENCY 0 NYQUISTZONE2 0.5Fs A signal with a maximum frequency fa must be sampled at a rate Fs > 2fa or information about the signal will be lost because of aliasing. Aliasing occurs whenever Fs < 2fa. Fs NYQUISTZONE3 The concept of aliasing is widely used in communications fa applications such as direct IF-to-digital conversion. A signal that has frequency components between fa and fb must NYQUISTZONE4 1.5Fs be sampled at a rate Fs > 2 (fb –fa) in order to prevent alias components from overlapping the signal frequencies. 2Fs www.analog.com/DataConverters THE ESSENTIAL GUIDE TO DATA CONVERSION Analog-to-Digital Converter AC Performance Specifications SNR (Signal-to-Noise Ratio, dB or dBFS) FULL-SCALE (()FS) The ratio of the RMS value of the measured output signal (peak or full scale) to the RMS sum of all other spectral components excluding the first 6 harmonics and DC. INPUT SIGNAL LEVEL (CARRIER) RMSSignal = (FSR / 2) / √(2), RMSNoise = Qn = q / √(12) SNR(dB) = RMSSignal / RMSNoise = 20 ×log(2(n –1) × √6)) = 6.02 ×n + 1.76 SFDR (dBFS) SINAD (Signal-to-Noise Ratio and Distortion, dB) SFDR (dBc) dB The ratio of the RMS signal amplitude to the RMS value of the sum of all other spectral components including harmonics, but excluding DC. SINAD (dB) = –20 ×log (√(10(–SNRW/O DIST/10) + 10(THD/10))) WORST SPUR LEVEL ENOB (BITS) = (SINAD –1.76 + 20 ×log (FSR/Actual FSR)) / 6.02 THD (Total Harmonic Distortion, dBc) The ratio of the RMS sum of the first 6 harmonics to the RMS value of the measured fundamental. THD (–dB)=) = 20 × log(g (√((√((10(–2ND HAR/20))2 +(+ (1100(–3RD HAR/20))2 +(+… (1100(–6TH HAR/20))2 ) SFDR (Spurious-Free Dynamic Range, dB or dBFS) f The ratio of the RMS value of the peak signal amplitude (or full-scale) to 0, DC FREQUENCY s 2 the RMS value of the amplitude of the peak spurious spectral component. The peak spurious component may or may not be a harmonic. Oversampling Relaxes Requirements on Baseband Antialiasing Filter Oversampling Relaxes Requirements on Baseband Antialiasing Filter A B f a fs – fa fa Kfs– fa Generally an antialiasing filter is required on the analog front end of an ADC. If the sampling frequency is not much greater than the max input frequency fa, then the requirements on an antialiasing filter can be severe, as in (A). The dotted regions indicate where the dynamic range can be limited by signals DR outside the bandwidth of interest. Oversampling relaxes the requirements of the analog antialiasing filter as shown in (B). Sigma-deltaca convertersonvertersa arree aag goodood example. Outputs of DACs need filtering also, and these are called “anti-imaging” filters. They serve essentially the same purpose as the antialiasing filter f f s s Kfs Kfs ahead of an ADC. 2 2 STOPBAND AT TENUATION = DR STOPBANDATTENUATION = DR TRANSITION BAND: fa to fs – fa TRANSITION BAND: fa to Kfs – fa CORNER FREQUENCY: fa CORNER FREQUENCY: fa Theoretical SNR and ENOB Due to Jitter vs.
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