Oversampling Analog to Digital Converters 21st International Conference on VLSI Design, Hyderabad
Shanthi Pavan Nagendra Krishnapura
Department of Electrical Engineering Indian Institute of Technology, Madras Chennai, 600036, India
4 January 2008
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Outline
Introduction to sampling and quantization Quantization noise spectral density Oversampling Noise shaping-∆Σ modulation High order multi bit ∆Σ modulators Stability of ∆Σ A/D converters Implementation of ∆Σ A/D converters Loop filter design Multi bit quantizer design Excess delay compensation Clock jitter effects Mitigation of feedback DAC mismatch Dynamic element matching DAC calibration Case study 15 bit continuous-time ∆Σ ADC for digital audio 2
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Signal processing systems
Sensor(s) Digital Processing Actuator(s) .
. DSP ...0100011011... .
Continuous-time Discrete -time Continuous-time Continuous-amplitude Discrete -amplitude Continuous-amplitude Interface Electronics (Signal Conditioning) (A-D and D-A Conversion)
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Signal processing systems
Natural world: continuous-time analog signals Storage and processing: discrete-time digital signals Data conversion circuits interface between the two Wide variety of precision and speed
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Continuous time signals
Continuous−time analog signal
7V LSB
6V LSB
5V LSB
4V LSB
3V LSB
2V LSB
V LSB
0 0 T 2T 3T 4T 5T 6T 7T 8T 9T 10T s s s s s s s s s s Signals defined for all t Signals can take any value in a given range
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Discrete time signals
Discrete time signal
7V LSB
6V LSB
5V LSB
4V LSB
3V LSB
2V LSB
V LSB
0 0 1 2 3 4 5 6 7 8 9 10 Signals defined for discrete instants n Signals can take any value in a given range
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Digital signals
Sampled quantized(digital) signal
7V LSB
6V LSB
5V LSB
4V LSB
3V LSB
2V LSB
V LSB
0 0 1 2 3 4 5 6 7 8 9 10 Signals defined for discrete instants n
Signals can take discrete values kVLSB
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Sampling and quantization
A segment of a continuous-time signal has an infinite number of points of infinite precision Discretization of time (sampling) and amplitude (quantization) results in a finite number of points of finite precision Sampling and quantization = Analog to digital conversion Errors in the process?
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Signals in time and frequency domains
Continuous time signal xct (t) Frequency domain representation using its Fourier transform Xct (f )
∞ Xct (f ) = xct (t) exp( j2πft)dt Z − −∞
Discrete time signal xd [n] Frequency domain representation using its Fourier transform Xd (ν)
∞ X [ν] = x [n] exp( j2πνn) d d − n=X −∞
Xd [ν] periodic with a period of 1 9
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Signals in time and frequency domains
Continuous−time analog signal Fourier transform of a continuous−time signal
7V LSB
6V LSB
5V LSB 1.0
4V LSB
3V LSB
2V LSB
V LSB f b 0 0 0 0 T 2T 3T 4T 5T 6T 7T 8T 9T 10T f 2f s s s s s s s s s s s s
∞ =Xct (f ) xct (t) exp( j2πft)dt Z − −∞
Signal bandwidth f : Xct (f ) = 0 for f > f b | | b 10
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Signals in time and frequency domains
Discrete time signal Fourier transform of a discrete time signal
7V LSB
6V LSB
5V LSB 1.0
4V LSB
3V LSB
2V LSB
V LSB
0 0 0 1 2 3 4 5 6 7 8 9 10 0 0.5 1 1.5 2
∞ X [ν] = x [n] exp( j2πνn) d d − n=X −∞
Xd [ν] periodic with a period of 1 X [ν], 0 ν 0.5 completely defines real x [n] d ≤ ≤ d 11
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Sampling an analog signal
Sampled analog signal
7V LSB
6V LSB
5V LSB
4V LSB
3V LSB
2V LSB
V LSB
0 0 T 2T 3T 4T 5T 6T 7T 8T 9T 10T s s s s s s s s s s
xd [n] = xct (nTs)
Analog signal sampled to obtain a discrete-time signal 12
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Sampling
Fourier transform of a sampled signal with f =2f Sampled analog signal s b 7V LSB
6V LSB
5V LSB 1.0
4V LSB
3V LSB
2V LSB
V LSB f b 0 0 0 0 T 2T 3T 4T 5T 6T 7T 8T 9T 10T f 2f s s s s s s s s s s s s
1 ∞ X [ν] = Xct (νfs n) d T − s n=X −∞
Copies of signal spectrum at nfs = n/Ts
Perfect reconstruction possible for fs 2f ≥ b 13
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Sampling without aliasing
Fourier transform of a sampled signal with f =2f s b
1.0
f b 0 0 f 2f 14 s s
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Reconstruction from sampled signal
Fourier transform of a sampled signal with f =2f s b
Reconstruction filter 1.0
f b 0 0 f 2f 15 s s
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Aliasing during sampling
Fourier transform of a sampled signal with f =f s b
1.0
f b 0 0 f 2f 16 s s
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Sampling followed by quantization
Quantized Sampled analog signal
7V LSB
6V LSB
5V LSB
4V LSB
3V LSB
2V LSB
V LSB
0 0 T 2T 3T 4T 5T 6T 7T 8T 9T17 10T s s s s s s s s s s
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Quantization followed by sampling
Sampled continuous−time quantized signal
7V LSB
6V LSB
5V LSB
4V LSB
3V LSB
2V LSB
V LSB
0 0 T 2T 3T 4T 5T 6T 7T 8T 9T18 10T s s s s s s s s s s
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Quantization
Quantizer characteristics Quantized sine wave 7V LSB
6V LSB
5V LSB
4V LSB
3V LSB
2V LSB
V LSB
0 0 V 2V 3V 4V 5V 6V 7V LSB LSB LSB LSB LSB LSB LSB Nonlinearity results in harmonic distortion Harmonics folded about the sampling frequency
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Sampling and Quantization-Spectral density
Spectra of quantized sinewave before and after sampling Quantized sampled sinewave spectrum 0 0
−5 −5
−10 −10
−15 dB −15 dB
−20 −20
−25 −25
−30 −30 0 0.5 1 1.5 2 2.5 3 3.5 4 0 0.2 0.4 0.6 0.8 1 f/f f/f s s
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Sampling and Quantization-Spectral density
Spectra of quantized sinewave before and after sampling Quantized sampled sinewave spectrum 0 0
−5 −5
−10 −10
−15 dB −15 dB
−20 −20
−25 −25
−30 −30 0 0.5 1 1.5 2 2.5 3 3.5 4 0 0.2 0.4 0.6 0.8 1 f/f f/f s s
fs/f = p/q, large p, q: Closely spaced tones noise in ∼ fs/fin irrational: Continuous spectrum Approximated by a constant spectral density
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Quantization error model
e
y v y Σ v
e = v-y
Modelled as an additive error
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Quantization error distribution
Quantization error V LSB pe area=1 V /2 LSB
0
-VLSB/2 VLSB/2
V /2 LSB
−V LSB 0 V 2V 3V 4V 5V 6V 7V LSB LSB LSB LSB LSB LSB LSB
Quantization error in the range [ V /2, V /2] − LSB LSB Uniform distribution Mean squared value of V 2 /12 LSB 23
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Sampling and Quantization-Error
Se(f) 2 area=V LSB/12 2 V LSB/6fs
f
0 fs/2 ν Se( ) 2 area=V LSB/12 2 V LSB/6
ν 0 1/2 Fully correlated to the input signal Statistics independent of the input signal 2 Uniform distribution; mean = 0; variance = VLSB/12 White spectral density Modelled as uncorrelated additive white noise 24
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Sampling and Quantization- SNR
N 2 level quantizer with VLSB spacing N 1 Full scale sinewave input—amplitude (2 − VLSB) N 1 2 Mean squared signal: 2 − VLSB /2 2 Mean squared noise: VLSB/12 3 2N SNR = 2 2 = 6.02 N + 1.78 dB
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Sampling and Quantization
Fourier transform of a continuous−time signal
1.0
f b 0 0 f 2f 26 s s
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Sampling and Quantization
Fourier transform of a sampled signal with f =2f s b
1.0
f b 0 0 f 2f 27 s s
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Sampling and Quantization
Signal and quantization noise
1.0
V2 /6f LSB s
f b 0 0 f 2f 28 s s
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Oversampling and Quantization
Fourier transform of a sampled signal with f =4f s b
1.0
f b 0 0 f /2 f 29 s s
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Oversampling and Quantization
Signal and quantization noise
1.0
V2 /6f LSB s f b 0 0 f /2 f 30 s s
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Oversampling
Sample at fs 2f ≫ in Oversampling ratio OSR = fs/2fin
Filter the noise using a filter of bandwidth fb 2 Mean squared value of error = VLSB/12/OSR Increased signal to quantization noise ratio
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Oversampling and Quantization- SNR
N 2 level quantizer with VLSB spacing N 1 Full scale sinewave input—amplitude = 2 − VLSB Oversampling ratio OSR N 1 2 Mean squared signal: 2 − VLSB /2 2 Mean squared noise: VLSB/12/OSR 3 2N SNR = 2 2 OSR = 6.02 N + 10 log OSR + 1.76 dB
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Oversampling and Quantization
Signal and quantization noise
1.0
V2 /6f LSB s f b 0 0 f /2 f s s Move quantization error to filter stopband?
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Quantizer
e
y v y Σ v
e = v-y
Hard nonlinearity Modelled as additive error
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Linearization of soft nonlinearity
u Σ high y v + gain -
Negative feedback loop Loop gain Error u v 0 → ∞ ⇒ − →
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Linearization of hardnonlinearity
u Σ high y v + gain -
Quantizer output cannot equal the input Loop gain Error u v → ∞ ⇒ | − | → ∞
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Reduce error to zero only in the signal band
u Σ high gain y v + at low freq. -
Negative feedback loop with dc loop gain → ∞ Small loop gain at high frequencies Error u v 0 at low frequencies | − | →
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters First order ∆Σ modulator
-1 u Σ z y v + 1-z-1 -
Loop filter is an accumulator Error u v 0 at low frequencies | − | → Differencing followed by accumulation–∆Σ modulator
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Noise and Signal transfer functions
e u z-1 y + v Σ + Σ + 1-z-1 -
1 1 V z− /1 z− STF = = 1 − 1 U 1 + z− /1 z− 1 − = z− V 1 NTF = = 1 1 E 1 + z− /1 z− 1 − = 1 z− − 39
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Noise transfer function
First order noise transfer function 2.0
1.0
0 0 f /2 40 s
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Output noise spectral density
1.0 1.0
shaped quantization noise
shaped quantization noise
2 V2 /6f V /6f LSB s f LSB s f b b 0 0 0 0 f /4 f /2 f /4 s s s
2 Sve (ν) = Se(ν) 1 exp( j2πν) | − 2 − | = 4Se(ν) sin (πν) 2 Sve (f ) = 4Se(f ) sin (πf /fs)
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Output noise in the signal band
fb 2 ve = Sve (f )df Z0 2 fb VLSB 2 = 4 sin (πf /fs)df 6fs Z0 2 fb VLSB 2 4 (πf /fs) df ≈ 6fs Z0 V 2 π2 2f 3 = LSB b 12 3 fs V 2 π2 1 3 = LSB 12 3 OSR
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Oversampling with noise shaping
3 Output noise OSR− with first order noise shaping ∝ 1 Output noise OSR− with no noise shaping ∝ (2L+1) th Output noise OSR− with L order noise shaping ∝ Tremendous increase in signal to noise ratio with oversampling
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Oversampling, Noise shaping, and Quantization- SNR
N 2 level quantizer with VLSB spacing N 1 Full scale sinewave input—amplitude = 2 − VLSB Oversampling ratio OSR First order noise shaping N 1 2 Mean squared signal: 2 − VLSB /2 2 2 3 Mean squared noise: (VLSB/12)(π /3)1/OSR SNR = 9 22N OSR3 = 6.02 N + 30 log OSR 3.4 dB 2π2 −
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Noise transfer functions
1 1 z− for a first order ∆Σ modulator − N Higer order differencing ( 1 z 1 ) in higher order ∼ − − modulators Crucial quantity in the design of delta sigma modulators
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters ∆Σ analog to digital converter
u v Σ + H(z) A/D - Loop filter
D/A
Analog to digital converter (Flash) in the forward path Digital to analog converter in the feedback path Output noise in signal band suppressed by noise shaping Output of the analog to digital converter is the oversampled digital output v 46
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Summary
Sampling preserves the signal if fs 2fb 2 ≥ Quantization adds an error VLSB/12 Quantization error modelled as additive white noise Oversampling and filtering reduces quantization error in the signal band Oversampling, noise shaping, and filtering provides a much higher reduction of quantization error in the signal band
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters High Order NTFs E
X z VY - z-1
z-1
For the first order loop V (z) = X(z) + (1 z 1) E(z) − − STF = 1, NTF = 1 z 1 − − Can we do better ?
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters High Order NTFs E
X z Y1 z VY - z-1 - z-1
z-1 E(1-z-1)
X z Y1 V - z-1
z-1
V (z) = X(z) + (1 z 1)2 E(z) − − Second Order Noise Shaping Can be extended to higher orders 49
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters High Order NTFs
In-band quantization noise for a first order NTF is π OSR 2 3 ∆2 2 ∆ π Q 12π ω dω = ≈ Z0 36π OSR
1 N What if the NTF was of the form (1 z− ) ? π − OSR 2 2N+1 ∆2 2N ∆ π Q 12π ω dω = ≈ Z0 12(2N + 1)π OSR
Increasing order can dramatically reduce in-band quantization noise.
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters High Order NTFs 20 Signal Band 10 0 −10 −20 −30
20 log |NTF| −40 −50 −60 −70 0 0.2 0.4 0.6 0.8 1 ω/π Higher order Reduced in-band noise ⇒ NTF gain increases at high frequencies (around ω π). ≈ Why cant one go on increasing order ? 51
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Stability of ∆Σ Modulators
U L0 Y V
L1
Y (z) = L0(z)U(z) + L1(z)V (z) v is the quantized version of y.
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Stability of ∆Σ Modulators
U. STF(z) E U. STF(z) U L 0 E.(NTF(z) -1) Y E. NTF(z) V
L1
Quantizer is modeled as an additive noise source. V (z) = U(z)STF(z) + E(z)NTF(z) Y (z) = U(z)STF(z) + E(z)(NTF(z) 1) − In the signal band, STF(z) 1 ≈ Quantizer Input (ADC input) + (Shaped Noise) ≈ 53
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Stability of ∆Σ Modulators 20 20
15 15
10 10
5 5
0 0
−5 −5
−10 −10
−15 −15
−20 −20 0 100 200 0 100 200 Quantizer input for OBG=1.5 and OBG=3.5 54
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Gain of a Nonlinear Characteristic
Y V
Gain = ?
Assume an infinite precision quantizer with saturation. What is its gain ? Gain depends on signal. Black sinewave : Gain = 1 Red sinewave : Gain < 1 55
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Gain of a Nonlinear Characteristic
Y V
Gain = ?
E(v.y) Gain = E(y.y) . Makes intuitive sense. E(v.y) is the average value of v.y. E(v.y) is a measure of how much the output “resembles” the input. 56
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Gain of a Nonlinear Characteristic
Y V
Gain = ?
If input to the quantizer exceeds the quantizer range Quantizer gain falls. If quantizer gain falls, system poles can move out of the unit circle. Modulator will become unstable. Signal level dependent loop stability has to be expected. 57
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Intuition about Loop Stability Loop becomes unstable if the quantizer saturates. Saturation occurs if the quantizer input exceeds the quantizer range. Quantizer Input = ADC Input + Shaped Noise. Conclusions - The maximum ADC input must be smaller than the quantizer range. (called the Maximum Stable Amplitude (MSA)). More “shaped” noise More likelihood of instability. → More shaped noise Lesser in-band noise. → An aggressive NTF will have a reduced MSA.
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Estimating Maximum Stable Amplitude (MSA) Simulation is the best way. Keep stepping up the input sinewave amplitude. For every amplitude, compute in-band SNR. Beyond the MSA, the closed loop poles move out of the unit-circle. Noise shaping is lost In-band SNR falls. Quantizer input tends⇒ to infinity. Time consuming.
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Estimating MSA Without Sinewave Inputs Originally proposed by Lars Risbo. Put a slowly increasing ramp into the ADC. Beyond the MSA, the closed loop poles move out of the unit-circle. Quantizer input tends to infinity very rapidly. The value of the ADC input when the quantizer input blows up is the MSA. Found (empirically) to result in an MSA close to that predicted by the sinewave method. Much quicker than the sinewave technique.
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Estimating MSA Without Sinewave Inputs
Vq
1 fs Vin Vout 0 L t Very Slow Ramp VDAC (0 to 1 over 1 second)
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Estimating MSA Without Sinewave Inputs
20
15
10
5
0 log(Quantizer Input) −5
−10 MSA
−15 0 0.2 0.4 0.6 0.8 1 ADC Input
log(Quantizer Input) versus ADC Input MSA is about 90% of the quantizer range 62
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters MSA vs OBG for a Third Order NTF
0.9
0.8 4−bit quantizer
0.7
0.6 3−bit quantizer
0.5 Maximum Stable Amplitude
0.4 2 3 4 5 6 7 8 Out of Band Gain
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A Systematic NTF Design Procedure NTFs of the form (1 z 1)N have stability problems. − − Why ? The OBG is too high (2N ). This saturates the quantizer even for small inputs, causing instability. The MSA is small. Worse for low quantizer resolutions.
64
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A Systematic NTF Design Procedure Solution Introduce poles into the NTF. 1 N (1 z− ) NTF(z) = − 1 . D(z− ) Recall that NTF( ) = 1. ∞ D(z = ) = 1. ⇒ ∞
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Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Why do poles help ? 8
7
6
5
4 |NTF| 3
2
1
0 0 0.2 0.4 0.6 0.8 1 ω/π Properly chosen poles reduce OBG of the NTF, enhancing stability. However, stability comes at the expense of increased in-band noise. 66
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A Systematic NTF Design Procedure Commonly used pole positions : Butterworth, Chebyshev, Inv. Chebyshev etc. Coefficients for these approximations readily gotten from MATLAB. Schreier’s Delta-Sigma Toolbox is an invaluable design aid. One should understand what the toolbox does.
67
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A Systematic NTF Design Procedure Choose the order of the NTF. OSR, number of levels (n) and desired SNR are known. Example : Order = 3, OSR = 64, n = 16, SNR = 115 dB. Basically, the NTF is a high-pass filter transfer function. Example : Choose a Butterworth Highpass. Choose the 3 dB corner of the high pass filter - π Example : ω3dB = 8 . For a Butterworth NTF, specifying the cutoff specifies the complete transfer function.
68
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A Systematic NTF Design Procedure Get the transfer function from MATLAB [b,a]=butter(3,1/8,'high') 0.6735 2.0204z−1 + 2.0204z−2 0.6735z−3 H(z) = − − 1 2.2192z−1 + 1.7151z−2 0.4535z−3 MATLAB sets− H(ejπ) = 1. − | | Recall that for H(z) to be a valid NTF, H( ) = 1. ∞
69
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A Systematic NTF Design Procedure 1 Scale H(z) by 0.6735 to obtain NTF(z). (1 3z−1 + 3z−2 z−3) NTF(z) = − − 1 2.2192z−1 + 1.7151z−2 0.4535z−3 − − 1.5 NTF
1 H |H|
0.5
0 0 0.2 0.4 0.6 0.8 1 ω/π 70
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A Systematic NTF Design Procedure 1 Find loop filter using 1+L(z) = NTF(z). Simulate the equations describing the modulator. Compute the peak SNR. In our example, we obtain SNR=102 dB after simulation. MSA = 0.85.
71
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A Systematic NTF Design Procedure If SNR is not enough, repeat the entire procedure above with a higher cutoff frequency for the Butterworth high pass filter. This will increase the OBG (intuition on this later). The MSA will reduce.
If SNR is too high, repeat the entire procedure above with a lower cutoff frequency for the Butterworth high pass filter. This will decrease the OBG (intuition on this later). The MSA will increase.
72
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A Systematic NTF Design Procedure π SNR obtained with 3 dB cutoff of 8 is inadequate. π So, we increase the cutoff frequency to 4 . The peak SNR is around 116 dB. OBG = 2.25, MSA = 0.8. We are done. This iterative process is coded into synthesizeNTF in Schreier’s toolbox.
73
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A Systematic NTF Design Procedure : Remarks Butterworth is one of several candidate high pass filters. All the zeros of transmission are at the origin. Another useful family is the inverse Chebyshev approximation. Has complex zeros (on the unit circle).
−40
Butterworth −60
−80 Inverse Chebyshev |NTF| −100
−120
−140 0 0.01 0.02 0.03 0.04 ω/π 74
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Sensitivity of a Feedback Loop
E(z)
X (z) V(z) in + L(z) + -
E is a disturbance injected into the feedback loop. L(z) 1 V (z) = X(z) 1+L(z) + E(z) 1+L(z) . If L(z) = , V (z) = X(z). ∞ The loop rejects E(z), or the loop is insensitive to E(z).
75
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Sensitivity of a Feedback Loop
E(z)
X (z) V(z) in + L(z) + -
L(z) cannot be at all frequencies. ∞ L(z) 1 V (z) = X(z) 1+L(z) + E(z) 1+L(z) . The loop rejects E at frequencies where the loop gain is high. How effectively this is done is called the sensitivity function. 1 Sensitivity is ω 1+L(ej ) 76
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Sensitivity of a Feedback Loop In a ∆Σ loop, sensitivity is the same as the NTF. Recall : The first sample of the NTF impulse response is 1. Equivalent to NTF( ) = 1 ∞ −1 −1 −2 (1+a1z )(1+a2z +a3z ) The NTF can be written as − − − ··· (1+b z 1)(1+b z 1+b z 3) 1 2 3 ··· Poles must be within the unit circle (for a stable loop). The zeroes are on the unit circle (or inside).
77
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Sensitivity of a Feedback Loop π jω It can be shown that log( 1 + a1e− ) dω = 0, if Z0 | | a 1. | 1| ≤
0.6
0.4
0.2
| C ω j 1 0
−0.2 C
log(|1 + ae 2 −0.4
−0.6
−0.8 0 0.2 0.4 0.6 0.8 1 ω/π
The area above the 0 dB in the log magnitude plot is equal to the area below the 0 dB line. 78
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Sensitivity of a Feedback Loop π jω j2ω log( 1 + a2e− + a3e− ) dω = 0 Z0 | | 1 2 if the roots of 1 + a2z− + a3z− lie within (or on) the unit circle. Straightforward to derive, if one accepts the previous result.
79
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Sensitivity of a Feedback Loop π log NTF(ejω) dω = Z0 | | π (1 + a e jω)(1 + a e jω + a e 2jω) log 1 − 2 − 3 − jω jω 3jω ··· = Z0 (1 + b1e− )(1 + b2e− + b3e− ) · ·· π π jω jω j2ω log( 1 + a1e− ) dω + log( 1 + a2e− + a3e− ) dω Z0 | | Z0 | | − π π jω jω j2ω log( 1+b1e− ) dω log( 1+b2e− +b3e− ) dω+ Z0 | | −Z0 | | ···
80
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Sensitivity of a Feedback Loop π log NTF(ejω) dω = Z0 | | π (1 + a e jω)(1 + a e jω + a e 2jω) log 1 − 2 − 3 − jω jω 3jω ··· = Z0 (1 + b1e− )(1 + b2e− + b3e− ) · ·· π π jω jω j2ω log( 1 + a1e− ) dω + log( 1 + a2e− + a3e− ) dω Z0 | | Z0 | | − π π jω jω j2ω log( 1+b1e− ) dω log( 1+b2e− +b3e− ) dω+ Z0 | | −Z0 | | ··· = Zero
81
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Bode Sensitivity Integral π log NTF(ejω) dω = 0 Z0 | | The Integral of the Log Magnitude of an NTF is 0
20
10
0
−10 C 2 −20
−30
10 log |NTF| C 1 −40
−50
−60
−70 0 0.2 0.4 0.6 0.8 1 ω/π 82
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Bode Sensitivity Integral
20
10
0
−10
−20
−30 20 log |NTF| −40
−50
−60
−70 0 0.2 0.4 0.6 0.8 1 ω/π
Good inband performance at the expense of poor out-of-band performance. 83
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Bode Sensitivity Integral
20
10
0
−10
−20
−30 20 log |NTF| −40
−50
−60
−70 0 0.2 0.4 0.6 0.8 1 ω/π
Complex zeros better than choosing all NTF zeros at the origin. 84
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Bode Sensitivity Integral
10
0
−10
−20
−30
20 log |NTF| −40
−50
−60
−70 0 0.05 0.1 0.15 0.2 0.25 0.3 ω/π
Complex zeros better than choosing all NTF zeros at the origin. 85
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Bode Sensitivity Integral
20
10
0
−10
−20
−30 20 log |NTF|
−40
−50
−60
−70 0 0.2 0.4 0.6 0.8 1 ω/π
Higher order less in-band noise. ⇒ 86
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Loop Filter Architectures
k2
1 1 k1 Y V U + + - z-1 z-1
Remember : A quantizer = ADC + DAC. Needs ONE DAC. Loop filter gain goes to infinity at DC, with order 2. Both NTF zeros at DC (z = 1). Called CIFF (Cascade of Integrators Feed Forward)
87
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Loop Filter Architectures
1 1 k1 U + + - z-1 - z-1
k2/k1
Remember : A quantizer = ADC + DAC. Needs TWO DACs. Loop filter gain goes to infinity at DC, with order 2. Both NTF zeros at DC (z = 1). Called CIFB (Cascade of Integrators Feed Back).
88
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Loop Filter Architectures
k2
1 1 k1 Y V U + + - - z-1 z-1 γ
CIFF loop with complex zeros. NTF zeros are at 1 j√γ. ±
89
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Loop Filter Architectures γ
- 1 1 k1 U + + - z-1 - z-1
k2/k1
CIFB loop with complex zeros. NTF zeros are at 1 j√γ. ±
90
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Loop Filter Implementation Traditionally done in discrete-time. Implemented using switched-capacitor techniques. Switched capacitor circuits have several advantages. Exact nature of settling is irrelevant, only the settled value matters. Pole-zero locations of the loop filter are set by capacitor ratios, which are exteremely accurate. Insensitive to clock jitter, as long as complete settling occurs. Easier to simulate.
91
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Loop Filter Implementation Switched capacitor loop filters have disadvantages too - Difficult to drive from external sources due to the large spike currents drawn. Upfront sampling : requires an anti-alias filter. Integrator opamps consume more power than continuous-time counterparts. Require large capacitors to lower kT /C noise.
92
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Continuous-time Loop Filters
V (t) Vout [n] in Σ L(s) ADC -
DAC Vdac(t)
What is the NTF ? How does one design such a loop ? How does this compare with a discrete-time loop filter ?
93
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters DAC Modeling
Out
In Out In Out DAC n t t NRZ DAC RZ DAC
The input to the DAC is a digital code ak that changes every Ts. The DAC output is an analog waveform.
Output = a p(t kTs) k k − p(t) is calledP the pulse-shape. Commonly used shapes are the Non-Return to Zero (NRZ) and Return-to-Zero (RZ) pulses. 94
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Loop Modeling
Vout [n] L(s) ADC -
DAC Vdac(t) e[n]
L(s) -
p(t) Vdac(t) 1 NRZ DAC
Set input to zero. Ts Replace ADC-DAC with quantization noise e(n). DAC is modeled as a filter with impulse response p(t). 95
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Loop Modeling
e[n]
L(s) -
p(t) Vdac(t) 1 NRZ DAC
Ts
p(t) L(s) l[n] = p(t)*l(t) Break the loop after the sampler. kTs Apply a discrete time impulse. What comes back is l[n] = p(t) l(t) . ∗ |kTs The z-transform of l[n] is the equivalent discrete time loop filter. 96
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A First Order Example
e(n)
Ts= 1 Vin 1 Vout + s + -
1 1 1 s 1 t 1 t
Discrete-time equivalent impulse response of the loop filter 0, 1, 1, 1, 1 z−1 ··· L(z) = 1 z−1 − NTF(z) = 1 = 1 z 1 1+L(z) − − 97
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A Second Order Example
e(n) k1
Ts= 1 Vin 1 1 k2 Vout + s s + + -
k1
Ts= 1 1 1 k2 s s +
Say we need NTF(z) = (1 z 1)2. − − Discrete-time impulse response through k1 k (r (t) r (t 1)) = {0, k , k , k , k } 1 1 − 1 − 1 1 1 1 · ·· Discrete-time impulse response through k2 k (r (t) r (t 1)) = 1 {0, k , 3k , 5k } 98 2 2 − 2 − 2 2 2 2 ···
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A Second Order Example
Discrete-time impulse response through k1 k z 1 k (r (t) r (t 1)) = {0, k , k , k , k } 1 − . 1 1 − 1 − 1 1 1 1 · ·· ⇒ 1 z 1 − − Discrete-time impulse response through k2 k (r (t) r (t 1)) 2 2 − 2 − k z 1 0.5k z 1 = 1 {0, k , 3k , 5k , 7k } 2 − 2 − . 2 2 2 2 2 ··· ⇒ (1 z 1)2 − 1 z 1 − − − − (k + 0.5k )z 1 + ( k + 0.5k )z 2 L(z) = 1 2 − − 1 2 − . (1 z 1)2 − −
99
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A Second Order Example 1 2 (k1 + 0.5k2)z− + ( k1 + 0.5k2)z− L(z) = −1 2 . (1 z− ) − 1 2 To achieve NTF(z) = (1 z− ) , we need 2z 1 z 2 − L(z) = − − − . (1 z 1)2 − − k = 1.5, k = 1. ⇒ 1 2
1.5 Ts=1 V [n] Vin (t) 1 1 1 out s s + ADC -
DAC Vdac(t) 100
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Continuous-time Sigma-Delta Summary It is possible to “emulate” a D-T loop filter with a C-T one. The equivalence depends on the DAC pulse shape. The technique can be extended to high order NTFs - From the desired NTF(z), find L(z) Convert L(z) into L(s) using the DAC pulse shape The MATLAB command d2c will do it for you, for an NRZ DAC. Implement L(s) using any one of the loop filter topologies. A CT loop filter has several other advantages ... listen on.
101
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Anti-Aliasing Feature of CT ∆Σ Modulators
V (t) Vout [n] in Σ L(s) ADC -
DAC Vdac(t)
V (t) Vout [n] in L(s) Σ ADC -
L(s) DAC
Vdac(t)
Move L(s) outside the loop 102
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Anti-Aliasing Feature of CT ∆Σ Modulators
V (t) Vout [n] in L(s) Σ ADC -
L(s) DAC
Vdac(t)
V (t) Vout [n] in L(s) Σ ADC -
L(s) DAC
Vdac(t)
Move the sampler outside the loop 103
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Anti-Aliasing Feature of CT ∆Σ Modulators
V (t) Vout [n] in L(s) Σ ADC -
L(s) DAC
Vdac(t) e[n] V (t) Vout [n] in L(s) Σ + -
L(z)
Replace the cascade of the DAC and L(s) by the equivalent discrete-time filter L(z). 104
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Anti-Aliasing Feature of CT ∆Σ Modulators
e[n] V (t) Vout [n] in L(s) Σ + -
L(z)
V (t) 1 Vout [n] in L(s) 1 + L(z) NTF(z)
NTF(z) = 1/(1 + L(z))
105
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Anti-Aliasing Feature of CT ∆Σ Modulators
V (t) 1 Vout [n] in L(s) 1 + L(z) NTF(z)
Consider a tone at frequency ∆f in the signal band. Response to frequency ∆f is L(∆f )NTF(∆f ).
In a general ADC, a tone (∆f + fs) can alias as ∆f . What about a CTDSM ?
Response to frequency (∆f + fs) is L(∆f + fs)NTF(∆f )
106
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Anti-Aliasing Feature of CT ∆Σ Modulators
|L|(dB)
Alias Rejection
∆ ∆f f + fs f Signal band
Alias rejection is L(∆f ) | L(∆f +fs) | Implicit anti-aliasing without an explicit filter ! Valuable feature of CT Delta-Sigma modulators. 107
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect of Time-Constant Variations in the Loop Filter On-chip RC’s vary with process and temperature. On an integrated circuit, ratios of like elements are tightly controlled. We need to only worry only about quantities with “dimensions”. What happens due to absolute variation of RC time constants ?
108
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect of RC Variations : Intuitive explanation
If all RC time-constants decrease
Loop filter bandwidth |L|(dB) increases.
In-band loop gain Nominal increases. Lower in-band RC smaller quantization noise - better in-band NTF. NTF must be worse out-of-band - higher log (f) OBG. Signal band
109
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect of RC Variations : Intuitive explanation
If all RC time-constants decrease
|L|(dB)
Nominal Higher OBG for the NTF. Reduced maximum RC smaller stable amplitude. Closer to instability.
log (f) Signal band
110
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect of RC Variations : Intuitive explanation
If all RC time-constants increase
Loop filter bandwidth |L|(dB) decreases.
In-band loop gain RC larger decreases. Higher in-band Nominal quantization noise - poorer in-band NTF. NTF must be better out-of-band - lower log (f) OBG. Signal band
111
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect of RC Variations : Intuitive explanation
If all RC time-constants increase
|L|(dB)
RC larger Lower OBG for the NTF. Increased maximum Nominal stable amplitude. “More” stable.
log (f) Signal band
112
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect of RC Variations on the NTF
Nominal NTF : Maximally flat with an OBG=3
20 k =0.7 p
0
k =1 −20 p k =1.3 p )| (dB) ω j −40
|NTF (e −60
−80
−100 0.2 0.4 0.6 0.8 1 ω/π 113
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect of RC Variations: Time Domain Intuition Nominal NTF : Maximally flat with an OBG=3 |NTF|
NOMINAL ω π |NTF|
FAST LOOP ω π
114
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect of RC Variations: Time Domain Intuition Nominal NTF : Maximally flat with an OBG=3 |NTF|
NOMINAL ω π |NTF|
SLOW LOOP ω π
115
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Excess Delay in CT ∆Σ Modulators
Why is there excess loop delay ?
Quantizer needs time to make a decision. Finite operational amplifier gain-bandwidth product. DEM logic delay in multibit converters.
116
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Excess Delay in CT ∆Σ Modulators
A First Order Example
e(n)
Ts= 1 Vin 1 Vout + s + -
1 1 1 s 1 t 1 t
Loop filter is an integrator. An NRZ DAC is used. Sampling Rate = 1 Hz 117
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Excess Delay in CT ∆Σ Modulators
e(n)
Ts= 1 Vin 1 Vout + s + -
1 1 1 s 1 t 1 t
Discrete-time equivalent impulse response of the loop filter 0, 1, 1, 1, 1 z−1 ··· L(z) = 1 z−1 − NTF(z) = L(z) = 1 z 1 1+L(z) − − 118
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Excess Delay in CT ∆Σ Modulators
e(n)
Ts= 1 Vin 1 Vout + s + td -
1 1 1 s td 1 t td 1 2 t
In practice, the quantizer needs time to make a decision.
Equivalent to a delay td in the loop. What happens to the NTF of the loop ?
119
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Excess Delay in CT ∆Σ Modulators
1 1 1 s td 1 t td 1 2 t
Discrete-time equivalent impulse response of the loop filter {0, 1 td , 1, 1, 1 } = {0, 1, 1, 1, 1 } + {0,-td , 0, 0, 0 } − z−1 ··· 1 ··· ··· L(z) = 1 z−1 td z− − − L(z) 1 z−1 NTF z − − ( ) = 1+L(z) = 1 t z−1+t z 2 − d d
120
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Excess Delay in CT ∆Σ Modulators
td=1
td=0.5 td=0 1
td=0.5
td=1
The order of the system is increased.
Becomes unstable for td = 1 Not surprising - a delay in a feedback loop is always problematic. Aggressive NTF designs are more sensitive to excess delay. 121
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Fix for Excess Delay : Basic Idea
1
1 t 1 2 3 t 1 1 + d s + td 1 t 1 2 3 t 1 td
? 1 2 3 t
Impulse response of the loop filter with delay {0, t , 1, 1, 1 } = {0, 1, 1, 1, 1 } + {0,-t , 0, 0, 0 } d ··· ··· d ··· Add a path with discrete-time response 0, td , 0, 0, 0 to the loop filter. { ·· · } 122
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Fix for Excess Delay : Basic Idea
e(n)
Ts= 1 Vin 1 Vout + s + + td - k
Implementation of feedforward path in the loop.
123
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Fix for Excess Delay : Basic Idea
k e(n)
Ts= 1 Vin 1 Vout + s + + td - -k
Equivalent implementation of loop filter feedforward.
124
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Fix for Excess Delay : Basic Idea
e(n)
Ts= 1 Vin 1 Vout + s + + td - -k
Eliminate path from the input (small compared to the integrator output). Excess delay can be compensated by adding a direct path around the quantizer.
125
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Excess Delay Compensation : Summary
e(n) T = 1 Vin s Vout + H(s) + + td - -k
Direct path around the quantizer. Modification of H(s) (coefficient tuning). General approach valid even for high order modulators. Determining coefficients and k best done numerically.
126
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Clock Jitter in Discrete-time ∆Σ ADCs
Jittery Sampling
V (t) V [n] Vout [n] in in Σ L(z) ADC -
DAC Vdac[n]
The input is sampled outside the modulator
127
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Clock Jitter in Discrete-time ∆Σ ADCs Error due to jitter
∆t t
Treat the input as a sinusoid with maximum amplitude A.
dA sin(2πfint) Error due to jitter at the sampling instant is ∆t dt Assume white clock jitter with RMS value σj . RMS value of noise due to jitter in the signal bandwidth is σj √2Aπfin/OSR 128
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Clock Jitter in Continuous-time ∆Σ ADCs
V (t) Vout [n] in Σ L(s) ADC -
DAC Vdac(t)
The input is sampled inside the modulator.
129
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Ideal Sampler/Quantizer
vx vy
v v x ADC DAC y
Clock
Input is sampled in the ADC. ADC output code is sampled by the DAC. 130
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Ideal Sampler/Quantizer
vx vy
v v x ADC DAC y
Clock
DAC output analog waveform - fedback into the loopfilter. No delay in the quantizer, no clock jitter. ADC output code is the modulator output. 131
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters The Real Sampler/Quantizer
vx vy
v v x ADC DAC y
tdel Clock
ADC needs a finite time for conversion.
DAC is clocked tdel later. The clock is jittery. 132
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect of ADC Sampling Jitter
e(n)
v v x ADC x + ADC
Clock Clock e(n)
V (t) Vout [n] in Σ L(s) + ADC -
DAC Vdac(t)
Modelled as an error preceding the ADC. Noise shaped by the loop.
133
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect of DAC Reconstruction Jitter
e1(t)
v v DAC x DAC + y
Clock Clock
V (t) Vout [n] in Σ L(s) ADC - Vdac(t) + DAC
e1(t)
Modelled as an error following the DAC. Equivalent to an error at the modulator input. Degrades performance. 134
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Types of DACs : NRZ versus RZ
NRZ DAC RZ DAC DAC INPUT CODE OUTPUT OUTPUT
135
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Modeling Clock Jitter in NRZ DACs
y(n)
JITTERY DAC IDEAL y(n+1) OUTPUT OUTPUT y(n) y(n-1)
y(n+1) y(n-1) = +
ERROR ∆ [y(n)-y(n-1)] tn
∆ [y(n+1)-y(n)] tn+1 136
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Modeling Clock Jitter in RZ DACs
y(n)
JITTERY DAC IDEAL y(n+1) OUTPUT OUTPUT y(n) y(n-1)
y(n+1) y(n-1) = +
∆ 2y(n+1) tn+1
ERROR
∆ 2y(n-1) tn-1
∆ 2y(n-1) tn-1/2 ∆ 2y(n+1) tn+1 137
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Clock Jitter in NRZ versus RZ DACs Error depends on the height & number of transisitions in the DAC output waveform. NRZ DACs have a transition height y(n) y(n 1), one − − transistion every Ts. RZ DACs have a transition height 2y(n), two transistions every Ts. RZ DACs are MUCH more sensitive to clock jitter !
138
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Clock Jitter in Modulators with NRZ DACs
y(n+1)
y(n) ∆Τ ∆Τ n n+2
139
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect of Jitter on SNR ∆t(n) e (n) = [y(n) y(n 1)] j − − T σ2 σ2 = σ2 ∆t ej dy T 2
y(n) = v (n) + eq(n) h(n) in ∗
vin is the input.
eq is the quantization noise sequence. h(n) is the impulse response corresponding to the NTF.
y(n) y(n 1) = v (n) v (n 1) + (eq(n) eq(n 1)) h(n) − − in − in − − − ∗ Due to oversampling, v (n) v (n 1) in ≈ in − 140
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters y(n) y(n 1) (eq(n) eq(n 1)) h(n) − − ≈ − − ∗ 2 eq(n) is a white sequence with mean square value σlsb.
2 π 2 σlsb jω jω 2 σdy (1 e− ) NTF(e ) dω ≈ π Z0 | − | The in-band noise due to jitter (J) is
σ2 2 π ∆Ts σlsb jω jω 2 J 2 (1 e− ) NTF(e ) dω ≈ T πOSR Z0 | − |
141
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect of Jitter on SNR
σ2 2 π ∆Ts σlsb jω jω 2 J = 2 (1 e− ) NTF(e ) dω (1) T πOSR Z0 | − |
Observation : The NTF at high frequencies (close to ω = π) contributes the most to J. NTFs with high OBG result in more jitter noise. ⇒ Smaller LSB, less jitter noise multibit modulator less sensitive to jitter. →
142
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Example Calculation Audio modulator, 24 kHz bandwidth.
OSR = 64 (fs = 3.072 MHz), 4-bit quantizer. Quantizer input range is 2 V. 2 LSB size is 2/16 σ2 = (2/16) → lsb 12 Assume 100 ps RMS jitter. J = (1.28 µV)2. Maximum Signal Amplitude is 0.83 V peak. 0.83/√2 Signal to Jitter Noise Ratio is 20 log( 1.28 µV ) = 113 dB Conclusion : 100 ps RMS Jitter is not an issue for 15 bit resolution.
143
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Feedback DAC nonlinearity
144
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters ∆Σ analog to digital converter
u v Σ + H(z) A/D - Loop filter
D/A
Typically 4 bits (16 levels) or less in the quantizer
145
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Feedback DAC architecture
quantizer output v = d2-0 [binary] = b1-7 [thermometer]
d0*ILSB d1*2ILSB d2*4ILSB b1*ILSB b2*ILSB b7*ILSB
IDAC IDAC
IDAC = kILSB, k={0,1,...,7} Flash quantizer gives a thermometer coded output Thermometer coded DAC: high accuracy and small loop delay
146
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Switched capacitor (discrete-time) ∆Σ modulator
φ b1 2 C
φ φ b’1 2+ 1 b φ 2 2 C Cf φ 2 Vref b’ φ +φ 2 2 1 − v φ A/D 1 +
φ Loop filter H(z) b8 2 C
φ φ b’8 2+ 1
b1-8 = thermometer coded v
Array of M capacitors for M + 1 levels Flash quantizer output v v capacitors charged to V and M v to zero volts ref − 147
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Continuous-time ∆Σ modulator
b 1 R
b’1 b 2 R Cf
Vref b’ 2 − v A/D +
b Loop filter H(s) 8 R
b’8
b1-8 = thermometer coded v
Array of M resistors for M + 1 levels Flash quantizer output v v resistors connected to V and M v to ground ref − 148
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Continuous-time ∆Σ modulator
b1ILSB
b2ILSB Cf
− v A/D +
Loop filter H(s) b8ILSB
b1-8 = thermometer coded v
Array of M current sources for M + 1 levels Flash quantizer output v v current sources turned on and M v turned off − 149
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Multi bit versus single bit quantizer
VLSB VLSB
Multi bit: smaller LSB lower quantization noise ⇒ Single bit: larger LSB higher quantization noise ⇒
150
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Multi bit versus single bit quantizer
straight line fit which one?
Multi bit quantizer Clearly defined gain Conforms to prediction using linear models Single bit quantizer Signal dependent quantizer gain Deviates from prediction using linear models 151
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Multi bit versus single bit quantizer ∆ Ik=ILSB+ Ik
b1*I1 b2*I2 b8*I8 DAC I
IDAC
0 1 2 3 4 5 6 7 8 quantizer output v
Σ ∆ Itot=8ILSB+ k Ik
b1*Itot DAC I
IDAC
0 1 quantizer output v 152
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Multi bit versus single bit quantizer
Multi bit quantizer Characteristics not linear due to mismatch Single bit quantizer Characteristics always linear
153
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect of DAC nonlinearity
large gain in the signal band ~~zero in the signal band
u v Σ + H(z) A/D - Loop filter nonlinearly related ~ u in the to u in the signal band signal band D/A
(nonlinear)
DAC output equals the input u v related to the input u by inverse nonlinearity of the DAC 154
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Modeling the effect of DAC nonlinearity
u v w Σ + H(z) A/D D/A - Loop filter (nonlinear)
D/A
(ideal)
Nonlinear DAC driven by an ideal ∆Σ modulator and its output w analyzed
155
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Multi bit feedback DAC nonlinearity
∆ Ik=ILSB+ Ik full scale
b1*I1 b2*I2 b8*I8 DAC I
IDAC
0 1 2 3 4 5 6 7 8 quantizer output v INL
quantizer output v 156
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Multi bit feedback DAC nonlinearity
Iout [0] = 0 8 Iout [8] = n=1 In P 8 ILSB = 1/8 n=1 In DNL ∆Ik =PIk ILSB k − k INL I = In nI = ∆I ek n=1 − LSB n=1 k P P
157
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effects of DAC nonlinearity
σ /I = 0.001 (0.1%) I LSB 8
6
4
Ideal output 2
0
−3 x 10 3 2 1 0
DAC error −1 −2 158 −3
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effects of DAC nonlinearity
σ /I = 0.001 (0.1%) I LSB 40 Ideal output DAC error 20
0
−20
−40
−60
−80
−100
−120 f 2f 3f 1594f 0 b b b b
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effects of DAC nonlinearity
Distortion Increased in band quantization noise
160
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Reducing DAC nonlinearity
Reduce relative mismatch of DAC elements σ /I , σ /C, σ /R 1/√WL I LSB C R ∝ 100 area increase to reduce relative mismatch by 10 × × Sizing alone cannot help
161
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Representing v using a thermometer DAC
I8
I7
I6
I5
I4
I3
I2
I1 1 1 1 1 3 3 3 3 v current sources must be on—multiple possibilities M!/M!(M v)! combinations can represent v − Only one possibility for v = 0 (all off) and v = 8 (all on)
162
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Different combinations of unit cells for a given input
v = 1 can be represented by turning on any one of I1 8 − Average of all possibilities
1 8 I = I 8 n LSB Xn=1 is the ideal output! For all v, averaging all possible combinations produces the ideal output Use different combinations to represent a given code
163
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Different combinations of unit cells for a given input
σ = 0.3 LSB 8
7
6
5 LSB
/I 4 DAC I 3
2
1
0 0 1 2 3 4 5 6 7 8 v 164
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Randomization
b1 b1 b1 b2 b2 b2 b3 b3 b3 b4 b4 b4 b5 b5 b5 b6 b6 b6 b7 b7 b7 b8 b8 b8
c1 c2 c3 c4 c5 c6 c7 c8 c1 c2 c3 c4 c5 c6 c7 c8 c1 c2 c3 c4 c5 c6 c7 c8 cycle 1 cycle 2
b1-8: Thermometer coded v b1 b1 c1-8: Control signals to b2 b2 DAC unit elements b3 b3 b4 b4 b5 b5 b6 b6 b7 b7 b8 b8
c1 c2 c3 c4 c5 c6 c7 c8 c1 c2 c3 c4 c5 c6 c7 c8 cycle 3 cycle 4 Fixed connections Randomized connections 165
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Randomization
M M switching matrix × In each cycle, randomly choose a set of connections Converts distortion to white noise M! possible connections in the switch matrix (9! = 362880)—use a smaller subset Switch matrix introduces delay in the loop
166
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Randomization-Butterfly scrambler
b1 c1 b2 c2 s0 b3 c3 s0 b4 c4 s1 s4 b5 c5 b6 c6 s2 MUX b7 c7 b8 s s s c8 3 5 6 s0 {s } 0: blue path 0-6 1: red path
Each stage flips across 1, 2, or 4 positions 7 switches instead of 64 Only 128 combinations used—but good enough in practice 167
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Randomization-results
σ /I = 0.001 (0.1%) I LSB 40 Ideal output with DAC error 20 with randomization
0
−20
−40
−60
−80
−100
−120 f 2f 3f 1684f 0 b b b b
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters ∆Σ modulator with randomization
u v Σ + H(z) A/D - Loop filter
butterfly D/A scrambler
pseudo random sequence Extra delay in the loop
169
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Randomization-summary
Distortion components converted to noise Increased noise floor Additional loop delay
170
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Data weighted averaging
I8
I7
I6
I5
I4
I3
I2
I1 1 2 2 3 3 0 4 7 3 5 3 2 Cycle through all the current sources as rapidly as possible
171
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters DAC nonlinearity INL
DAC 0 1 2 3 4 5 6 7 8 quantizer output v dac output I DNL
0 1 2 3 4 5 6 7 8 0 1 2 3 4 5 6 7 8 quantizer output v quantizer output v
172
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Data weighted averaging—dc input v
1
time
dac output error time
pattern repeats after 8 cycles 173
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Data weighted averaging—dc input
Accumulated error is zero after a small number of cycles Pattern repeats every M cycles for an M + 1 level DAC
Tones at fs/M and its harmonics for v = 1
174
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Data weighted averaging—arbitrary inputs
v rotator D/A
v 1 D/A 1-z-1 1-z-1
175
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Data weighted averaging—arbitrary inputs
D/A
∆ extended Ik=ILSB+ Ik
I1 I2 I8 I1 I2 I8
IDAC INL
D/A input
176
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Data weighted averaging—arbitrary inputs
I8 I8
I7 I7
I6 I6
I5 I5
I4 I4
I3 I3
I2 I2
I1 I1
I8 I8
I7 I7
I6 I6
I5 I5
I4 I4
I3 I3
I2 I2
I1 I1 accumulated v 1 3 5 8 11 difference of successive outputs quantizer output v 1 2 2 3 3 177
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Data weighted averaging—mismatch shaping
INL(v’)
v 1 v’ D/A Σ 1-z-1 1-z-1 INL
D/A input
D/A output error bounded by INLmax ∞ Finite power at all frequencies 1 z 1 at the output provides first order shaping − −
178
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Data weighted averaging—implementation
b1-8 thermometer /4 s3-0 to binary accumulator converter
b1 c1 b2 c2 b3 c3 s0 b4 c4 b5 c5
b6 c6 MUX b7 c7
= thermometer coded v b8 c8
1-8 s s s s0 b 0 1 2 {s ,s ,s } 0: blue path 0 1 2 1: red path M input barrel shifter driven by accumulated ADC output Loop delays from thermometer-binary converter, accumulator, barrel shifter 179
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Data weighted averaging—results
σ = 0.001 (0.1%) 40 Ideal no DWA 20 DWA
0
−20
−40
−60
−80
−100
−120 f 2f 3f 1804f 0 b b b b
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters ∆Σ modulator with data weighted averaging
u v Σ + H(z) A/D - Loop filter
barrel D/A shifter
thermometer accumulator to binary
Extra delay in the loop
181
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Data weighted averaging-summary
Provides first order mismatch shaping
Potential for tones at fs/M with an M + 1 level quantizer ≈ For low OSR, tones can be close to the signal band Additional loop delay
182
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Individual level averaging
I8 I7 I6 I5 I4 I3 I2 I1 1 2 2 3 3 0 4 7 3 5 3 2 Cycle through all current sources for each input code Separate pointer for each input code Lesser potential for tones than DWA More noise than DWA
183
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Data weighted averaging—variants
I8 I7 I6 Double I Index 5 Averaging I4 I3 I2 I1 1 2 2 3 3 0 4 7 3 5 3 2
I8 I7 I6 Bidirectional I Data 5 Weighted I4 Averaging I3 I2 I1 1 2 2 3 3 0 4 7 3 5 3 2 184
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Data weighted averaging—variants
Bidirectional DWA: Opposite directions in each cycle Double index averaging: Separate pointers for v > M/2 and v M/2 ≤ DWA with randomization: Randomize the shifts once in every few cycles to break up tones
185
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Higher order mismatch shaping
v
su sy vector Σ quantizer
-min() M bits - se + Σ H2-1 sv
Mismatch shaped by the transfer function Hmismatch Deviation from exact shaping due to the constraint sv = v | | | | Complex hardware 186
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Dynamic element matching: tradeoffs
Mismatch error reduction High order noise shaping (highest) DWA ILA Randomization (lowest) Potential for tones Randomization (lowest) High order noise shaping ILA DWA (highest) Complexity High order noise shaping (highest) ILA, Randomization DWA (lowest) Excess loop delay High order noise shaping (highest) ILA DWA 187 Randomization (lowest)
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Dynamic element matching: summary
Data weighted averaging Best compromise between complexity and performance Works very well with high OSR Potential for tones at low OSR ILA, other DWA variants More complex, less potential for tones Randomization Can also be used for DACs without noise shaping
188
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Calibration
large gain in the signal band ~ u in the ~~zero in the ~ signal band signal band
u v v’ Σ + H(z) A/D f(v) - Loop filter look up table
~ u in the~ nonlinearly related signal band to u in the signal band D/A
(nonlinearity f(v)) Measure DAC characteristics Duplicate its characteristics in the digital path v = v + ǫ; ǫ v; Lot more bits in v than v ′ ≪ ′
189
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Calibration
/4 /18 ∆Σ ADC f(v)
/4 /18 ∆Σ ADC 214 Σ
f(v)-1 /10
/4 /10 /10 /4 ∆Σ ADC 26 Σ ∆Σ mod.
/10 /3 f(v)-1 ∆Σ mod. 190
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Calibration
Store only the error to reduce register width Noise shaped quantization (digital ∆Σ modulator) to reduce decimator input width
191
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Analog calibration
I0 Iout
φ φ φ φ
φ φ
Calibrate all current sources against a master source Use M + 1 current sources and calibrate one at a time
192
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Calibration: summary
No additional components in the loop no excess delay ⇒ Measuring DAC characteristics inline is challenging Additional digital or analog complexity
193
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters References
Randomization: L. R. Carley, “A noise-shaping coder topology for 15+ bit converters,” IEEE Journal of Solid-State Circuits, vol. 24, pp. 267 - 273, April 1989. Data weighted averaging: R. T. Baird and T. S. Fiez, “Linearity enhancement of multibit δΣ A/D and D/A converters using data weighted averaging,” IEEE Transactions on circuits and systems-II, vol. 42, pp. 753 - 762, December 1995. Individual level averaging: B. H. Leung and S. Sutarja, “Multibit Σ-∆ A/D converter incorporating a novel class of dynamic element matching techniques,” IEEE Transactions on circuits and systems-II, vol. 39, pp. 35-51, January 1992. Theoretical analysis: O. J. A. P. Nys and R. K. Henderson, “An analysis of dynamic element matching techniques in sigma-delta modulation,” Proceedings of the 1996 IEEE International symposium on circuits and systems, vol. 1, pp. 231-234, May 1996. Comparison through simulation: Zhimin Li, T. S. Fiez, “Dynamic element matching in low oversampling delta sigma ADCs,” Proceedings of the 2002 IEEE International symposium on circuits and systems, vol. 4, pp. 683-686, May 2002. Digitally calibrated ∆Σ modulator: M. Sarhang-Nejad and G. C. Temes, “A high-resolution multibit Σ ∆ ADC with digital correction and relaxed amplifier requirements,” IEEE Journal of Solid-State Circuits, vol. 28, pp. 648 - 660, June 1993. Analog calibrated DAC: D. Wouter J. Groeneveld et al., “A self-calibration technique for monolithic high-resolution D/A converters,” IEEE Journal of Solid-State Circuits, vol. 24, pp. 1517 - 1522, December 1989. Higher order mismatch shaping: R. Schreier and B. Zhang, “Noise-shaped multibit D/A convertor employing unit elements” Electronics letters, vol. 31, No. 20, pp. 1712-1713, 28th September 1995. Additional filtering of DEM errors: M. H. Adams and C. Toumazou, “A Novel Architecture for Reducing the Sensitivity of Multibit Sigma-Delta ADCs to DAC Nonlinearity,” Proceedings of 1995 IEEE International symposium on circuits and systems, vol. 1, pp. 17-20, May 1995. Additional filtering of DEM errors: J. Chen and Y. P. Xu, “A Novel Noise Shaping DAC for Multi-bit Sigma-Delta Modulator,”IEEE Transactions on Circuits and Systems II-Express Briefs194, vol. 53, no. 5, pp. 344-348, May 2006.
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters CASE STUDY
195
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters A 15-bit Continuous-time ∆Σ ADC for Digital Audio Design Targets Audio ADC (24 kHz Bandwidth) 15 bit resolution
OSR = 64 (fs = 3.072 MHz) 0.18µm CMOS process, 1.8 V supply
196
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Continuous-time versus Discrete-time A continuous-time implementation was chosen Implicit anti-aliasing Resistive input impedance Low power dissipation
197
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Architectural Choices Single-bit versus multibit quantization ? Single loop versus MASH ? NTF ? Loop Filter Architecture ?
198
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Architecture : Single-bit vs Multibit
Single bit quantizer Multibit quantizer
Simple hardware Complex hardware Gentle NTF Aggressive NTF High jitter sensitivity Low jitter sensitivity Metastability Metastability : no issue Opamp slew rate Reduced slew rate
A 4-bit quantizer is used.
199
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Architecture : Single Loop vs MASH
Matching of transfer functions are needed in a MASH design
More complicated Might require calibration
A single loop design is chosen.
200
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Architecture : Choice of the NTF
A maximally flat NTF is chosen
Small OBG Large OBG
High in-band Low in-band quantization noise quantization noise Low jitter noise High jitter noise Increased Maximum Reduced Maximum Stable Amplitude (MSA) Stable Amplitude (MSA)
An OBG of 2.5 is chosen as a compromise
201
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect Of OBG On Jitter And Quantization Noise
125
120
Peak SQNR
115
110 Peak SJNR (50ps jitter) SNR (dB)
105
100 Peak SJNR (100ps jitter)
95 1.5 2 2.5 3 3.5 Out of Band Gain 202
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect Of Systematic RC Time Constant Variations On The NTF
4.5
4 30 % Lower
3.5
3 )| ω
j 2.5 Nominal 2 |NTF(e 30 % Higher 1.5
1
0.5
0 0 0.1 0.2 0.3 0.4 0.5 ω/π 203
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters MSA And SQNR With Systematic RC Time Constant Variations
130 −0.6
125 −0.8
120 −1
115 −1.2 Peak SNR (dB)
110 −1.4 Maximum Stable Amplitude (dBFS)
105 −1.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 [RC] /[RC] nom
204
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Simulated Output Bit Stream
10
5
0
Quantizer Output −5
−10
100 200 300 400 500 n 205
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Feedfoward versus Distributed Feedback Loopfilters
k ω ω ω 1 + 1 2 3 k2 - s s s k3
(a) ω1= 2.67, ω2= 2.08, ω3= 0.059
ω ω ω + 1 2 3 s s s - - -
(b) ω1= 0.34, ω2= 0.71, ω3= 1.225
206
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Feedfoward versus Distributed Feedback Loopfilters
Feedforward Distributed Feedback
First integrator is fasest. Third integrator is Third integrator is fastest. slowest. First integrator is First opamp is power slowest. hungry (for noise First opamp is power reasons). hungry (for noise). Third opamp is low Third opamp is power power (slowest hungry (fastest integrator). integrator). Small capacitor area. Large capacitor area.
A feedforward loop filter is used. 207
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Loop Filter
C1 C2 C3 idacm
R1 vom1 R2 vop2 R3 vip + + + vom3 - - - 100K A1 400K A2 500K A2 vim + + + - vop1 - vom2 - vop3
idacp 1.05346pF 730fF 8.6264pF Cs
R11 Rf vop1
R21 vop2 R11 = 337 K
R31 R21 = 506 K vop3 + - vom R = 112 K A2 31 vom3 + R = 200K - vop f vom2 Cs = 172fF
vom1
208
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Excess Delay Compensation : Conventional
C1
R Vi i − Rest of Loop Filter
+ . . . . Rf
−
+
Excess Delay Compensation DAC2
DAC1
209
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Excess Delay Compensation : Proposed
C1
R Vi i − Rest of Loop Filter
+ . . . . Cx Rf
−
+
DAC1
210
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters First Opamp vdda
Vtail M7 M4 M9 M41 M71 I Q IQ
vom vip vim vop Cc M5 M1 M11 M51
1.5IQ 1.5IQ Rz o1p o1m M8 M81
M6 M2 M21 M61
biasn2
M3 M31 cmfbn1
gnda
(a) 211
vdda Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Second Opamp
CMFB First Stage Second Stage vdda
Vcmfb v1m v1m v1p v1p M4 M4 M5 M9
Rz
Vbiasp Vbiasp M3 M3 M6 Cc Vcmfb v1m v1p vop vom Cc2
M7 v1m Vbiasp M2 Vcmref C M11 c2
v1p Vip Vim M1 M8 M10
Vcm M16
Vtail Vtail M17 M11
gnda
212
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Flash ADC Block Diagram
Vtop
Vbot Vref<0> d<15> ip DIGITAL BACK END im 4-bit data Vref<15> db<15> (ADC output) . . .
Vref<15> d<0> ip 15 im to DEM/DAC Vref<0> db<0> Vbot
Vtop 213
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Comparator Vdda Vrefp Vcm Lb
C2MOS L C La M1 M4 LC b LC ip op X LR im Y om LC LC L Cb La M2 M3 Ld Vrefm Vcm L (a) gnda
Ld
L , La (b) LC
LR 214
Td Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Effect of Random Offset in the Comparators
125
120
115
110 SNR (dB)
105
100
95 0 0.1 0.2 0.3 0.4 σ (in LSB) offset 215
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Digital Backend
4 - Bit Adder Therm. to 4 Binary S<0:3> A<0:3> Converter DQ 4 +
B<0:3> DQ Cout 4 Ci n dem_clk
4
in<0:14>15 15 Latch 15 Barrel Shifter (FLASH <0:14> O/P ) DAC_in<0:14> EN ( DAC I/P )
dem_clkd
216
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Unit DAC Resistor dacp 1.6 MΩ Vrefp
From Reference To input terminals Generator of first opamp
1.6 MΩ Vrefm
dacm
217
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Reference Generation Circuitry Vdda Vref − I +
R1 I (a)
gnd Vdda (b) R
(Vrefp - Vcm)(15/R) I R gnd − x Vrefp + C C vdd + - 1 ext Vrefm I Rx (Vcm - Vrefm)(15/R) R gnd 218
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Test Setup and Die Layout
REFERENCES
FLASH ADC/DEM/DAC
LOOP FILTER
219
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Test Setup Schematic
Vdd Clock (3.072 MHz) Ibias 500 nA
Vip Σ∆ 4 bits Vcm Converter To Logic Analyzer Vim Differential Audio Source Vrefp Vrefm 1 µF Vcmref 0.9 V 0.1 nF
220
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Measured Dynamic Range
100
80
60
40 SNR (dB)
20
SNR SNDR 0 93.5 dB
−20 −100 −80 −60 −40 −20 0 Input Power (dB FS) 221
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters In Band Spectrum
0
−20
−40
PSD (dB) −60
−80
−100
0 5 10 15 20 Frequency (kHz) 222
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Out of Band Spectrum
0
−20
−40
PSD (dB) −60
−80
−100
0 1 2 10 10 10 Frequency (kHz) 223
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Performance Summary
Table: Summary of Measured ADC performance.
Signal Bandwidth/Clock Rate 24 kHz / 3.072 MHz Quantizer Range 3 Vpp,diff Input Swing for peak SNR -1 dBFS Dynamic Range/SNR/SNDR 93.5 dB/92.5 dB/90.8 dB Active Area 0.72 mm2 Process/Supply Voltage 0.18 µm CMOS/1.8 V Power Dissipation (Modulator) 90 µW Power Dissipation (Modulator and 121 µW Reference Buffers) Figure of Merit(DR/SNR) 0.049 pJ/level, 0.054 pJ/level 224
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Some References ... Delta-Sigma Data Converters: Theory, Design and Simulation S. Norsworthy, R. Schreier and G. Temes, IEEE Press The Yellow Bible of ∆Σ ADCs Understanding Delta-Sigma Data Converters R. Schreier and G. Temes, IEEE Press The Green Bible of ∆Σ ADCs Both the above are essential reading !
225
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters Some References ... Theory, Practice, and Fundamental Performance Limits of High-Speed Data Conversion Using Continuous-Time Delta-Sigma Modulators J. Cherry, Ph.D Dissertation, Carleton University. Excellent reading on continuous-time Delta-Sigma modulator design. A Power Optimized Continuous-time ∆Σ ADC for Audio Applications S. Pavan, N. Krishnapura et. al, IEEE Journal of Solid State Circuits, February 2008. Detailed description of the case study discussed in this tutorial.
226
Shanthi Pavan Nagendra Krishnapura Oversampling Analog to Digital Converters