Agilex F-Series FPGA Development

5 4 3 2 1 REV DATE PAGES DESCRIPTION A 11 / 12 / 2017 All Initial

D PAGE DESCRIPTION PAGE DESCRIPTION D 1 Title, Notes, Rev. History 39 Clock 2 2 Block Diagram 40 I2C and PMBUS 3 Power Tree 41 LEDs and PushButtons 4 Power Sequence Timing 42 LEDs for QSFPDD 5 Clock Tree Diagram 43 MAX10 - USB Blaster II -1 Board BOM : K57065 Rev01 6 I2C Diagram 44 MAX10 - USB Blaster II -2 7 JTAG Diagram 45 BLANK 8 DDR4_DDR4 Pin Map 46 MAX10 Power Control -1 9 DDR4/DDRT Single DIMM CH0 47 MAX10 Power Control -2 10 FPGA BANK 3A 48 Power inputs 11 FPGA BANK 3B 49 PWR 12V to 5V

C 12 DDR4 Single DIMM CH1 50 PWR 12V to 3.3V C 13 FPGA BANK 3C 51 PWR VCC - 1 14 FPGA BANK 3D 52 PWR VCC - 2 15 DDR4/DDRT Single DIMM CH2 53 PWR 1p8V 16 FPGA BANK 2A 54 PWR - 0p8V_VCCL_SDM 17 FPGA BANK 2B 55 PWR - 0p8V_VCCL_HPS 18 DDR4/DDRT Single DIMM CH3 56 BLANK 19 FPGA BANK 2C 57 PWR - IO_1p8V 20 FPGA BANK 2D 58 PWR - VCC_HSSI 21 FPGA BANK 9A 59 PWR - 1p2V_VCCR 22 FPGA BANK 10A 60 PWR - 1p2V_DDR4_CH01 23 QSFPDD0 61 PWR - 1p2V_DDR4_CH23 B 24 QSFPDD1 62 PWR - 0p6V_VTT/VREF B 25 PCIe End Point Edge Connector 63 PWR - 2p5V 26 FPGA Config SDM 64 PWR - 1p1V_VCCH_GXER1 27 FPGA BANK HPS 65 PWR - Decouping Caps 1 28 ETH PHY 66 PWR - Decouping Caps 2 29 UART 30 Micro SD 31 eMMC 32 FPGA BANK NC DNU 33 FPGA Power 1 34 FPGA Power 2 35 FPGA Gnd 1 A 36 FPGA Gnd 2 A 37 FPGA Gnd 3 Intel Corporation,101 innovation Dr, San Jose, CA 95134 38 Clock 1 Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Thursday, May 07, 2020 Sheet 1of 66 5 4 3 2 1 5 4 3 2 1 System Block Diagram

D D

C C

B B

A A

D D

C C

B B

A A

POWER SEQUENCE

12V_PCIe Slot (Grp2) D 12V_AUX (Grp1) D

5V 12V 1p2V_PRE 1p8V_STBY POWER_ON 3p3V_STBY

Group 1 power

FM6_VCC/VCCP VCCPLLDIG VCCH VCRTPLL_GXER1/L1 VCCFUSE VCCH_SDM VCC_HSSI_GXER1/L1 C 0p8V_VCCL_SDM C VCCPLLDIG_SDM 0p9V_VCCL_HPS Group1_PG

Group 2 power 1p8 VCCCLK_GXPL1 VCCPT VCCBAT VCCA_PLL VCCADC VCCH_GXPL1 VCCPLL_HPS VCCPLL_SDM 1p1V_VCCH_GXER1 2p5V VCCCLK_GXER1 Group2_PG VDDSPD/VPP Group 3 power

B B IO_1p8V VCCIO_SDM IO_3p3V VCCFUSEWR_SDM QSFPDD0_VCC/VCCR QSFPDD1_VCC/VCCR 1p2V_DDR4_CH01 1p2V_DDR4_CH23 0p6V_VREF_DDR4_CH01 0p6V_VREF_DDR4_CH23 0p6V_VTT_DDR4_CH01 0p6V_VTT_DDR4_CH23

A A

D D

C C

B B

A A

I2C Diagram

D D

C C

B B

A A

JTAG Block Diagrram

D D

C C

B B

A A

DDR4/DDR-T DIMM Pin Map

D D

DDR-T DIMM Pin Map is Identical to standard DDR4 DIMM Pin Map except the DDR-T protocol repurposes five of these pins:

CS1# (pin 89) : Grant, GNT# <0> Input CKE1 (pin 203) : Request, REQ# <0> Output ODT1 (pin 91) : Error, ERR# Output C C CLK1 (pin 218):Early Read ID, ERID<0> Output CLK1# (pin 219):Early Read ID, ERID<1> Output

B B

A A

12V_G1 R1 0 J1A 1p2V_DDR4_CH01 0p6V_VREF_DDR4_CH01 J1B DDR4/DDRT Single DIMM CH0 R2 0 1 145 2 12V/NC 12V/NC 146 x72bit DIMM Only DDR4_DIMM_CH0_DQ4 3 Vss Vrefca 147 DDR4_DIMM0_EVENT_N 78 222 DDR4_DIMM_CH0_PAR 1p2V_DDR4_CH01 4 DQ4 Vss 148 DDR4_DIMM_CH0_DQ5 DDR4_DIMM_CH0_A0 79 EVENT_n PARITY 223 DDR4_DIMM_CH0_DQ0 5 Vss DQ5 149 80 A0 Vdd 224 DDR4_DIMM_CH0_BA1 DQ0 Vss Vdd BA1 6 150 DDR4_DIMM_CH0_DQ1 DDR4_DIMM_CH0_BA0 81 225 DDR4_DIMM_CH0_A10 2p5V 1p2V_DDR4_CH01 DDR4_DIMM_CH0_DBI_N0 7 Vss DQ1 151 DDR4_DIMM_CH0_A16 82 BA0 A10/AP 226 DDR4_DIMM_CH0_TDQS_N9 8 DQS9_t/DM0_n/DBI0_n Vss 152 DDR4_DIMM_CH0_DQS_N0 83 RAS_n/A16 Vdd 227 DQS9_c DQS0_c Vdd RFU3 D 9 153 DDR4_DIMM_CH0_DQS_P0 DDR4_DIMM_CH0_CS_N0 84 228 DDR4_DIMM_CH0_A14 C1 C2 C3 D DDR4_DIMM_CH0_DQ6 10 Vss DQS0_t 154 85 S0_n WE_n/A14 229 11 DQ6 Vss 155 DDR4_DIMM_CH0_DQ7 DDR4_DIMM_CH0_A15 86 Vdd Vdd 230 DDR4_DIMM0_SAVE_N 1uF 0.1uF 0.1uF DDR4_DIMM_CH0_DQ2 12 Vss DQ7 156 DDR4_DIMM_CH0_ODT0 87 CAS_n/A15 SAVE_n/NC 231 13 DQ2 Vss 157 DDR4_DIMM_CH0_DQ3 88 ODT0 Vdd 232 DDR4_DIMM_CH0_A13 U1 DDR4_DIMM_CH0_DQ12 14 Vss DQ3 158 DDR4_DIMM_CH0_CS_N1 89 Vdd A13 233 14 1 15 DQ12 Vss 159 DDR4_DIMM_CH0_DQ13 90 S1_n Vdd 234 DDR4_DIMM_CH0_A17 DDR4_DIMM0_EVENT_N 13 VCC VL 2 DDR4_CH0_EVENT_N DDR4_DIMM_CH0_DQ8 16 Vss DQ13 160 DDR4_DIMM_CH0_ODT1 91 Vdd A17/NC 235 DDR4_DIMM_CH0_C2 DDR4_DIMM0_SAVE_N 12 IOVCC1IOVL1 3 DDR4_CH0_SAVE_N 17 DQ8 Vss 161 DDR4_DIMM_CH0_DQ9 92 ODT1 C2/NC 236 DDR4D_SCL 11 IOVCC2IOVL2 4 DDR4_DIMM_SCL DDR4_DIMM_CH0_DBI_N1 18 Vss DQ9 162 DDR4_DIMM_CH0_CS_N2 93 Vdd Vdd 237 DDR4_DIMM_CH0_CS_N3 DDR4D_SDA 10 IOVCC3IOVL3 5 DDR4_DIMM_SDA DQS10_t/DM1_n/DBI1_n Vss S2_n/C0 S3_n/C1 IOVCC4IOVL4 DDR4_DIMM_CH0_TDQS_N10 19 163 DDR4_DIMM_CH0_DQS_N1 94 238 DDR4_DIMM_CH0_SA2 1p2V_DDR4_CH01 9 6 20 DQS10_c DQS1_c 164 DDR4_DIMM_CH0_DQS_P1 DDR4_DIMM_CH0_DQ36 95 Vss SA2/RFU 239 8 NC1 NC0 7 DDR4_DIMM_CH0_DQ14 21 Vss DQS1_t 165 96 DQ36 Vss 240 DDR4_DIMM_CH0_DQ37 TSn GND DQ14 Vss DDR4_DIMM_CH0_DQ15 DDR4_DIMM_CH0_DQ32 Vss DQ37 22 166 97 241 MAX3378E DDR4_DIMM_CH0_DQ10 23 Vss DQ15 167 98 DQ32 Vss 242 DDR4_DIMM_CH0_DQ33 24 DQ10 Vss 168 DDR4_DIMM_CH0_DQ11 DDR4_DIMM_CH0_DBI_N4 99 Vss DQ33 243 DDR4_DIMM_CH0_DQ20 25 Vss DQ11 169 DDR4_DIMM_CH0_TDQS_N13100 DQS13_t/DM4_n/DBI4_n Vss 244 DDR4_DIMM_CH0_DQS_N4 26 DQ20 Vss 170 DDR4_DIMM_CH0_DQ21 101 DQS13_c DQS4_c 245 DDR4_DIMM_CH0_DQS_P4 DDR4_DIMM_CH0_DQ16 27 Vss DQ21 171 DDR4_DIMM_CH0_DQ38 102 Vss DQS4_t 246 28 DQ16 Vss 172 DDR4_DIMM_CH0_DQ17 103 DQ38 Vss 247 DDR4_DIMM_CH0_DQ39 DDR4_DIMM_CH0_DBI_N2 29 Vss DQ17 173 DDR4_DIMM_CH0_DQ34 104 Vss DQ39 248 DDR4_DIMM_CH0_TDQS_N11 30 DQS11_t/DM2_n/DBI2_n Vss 174 DDR4_DIMM_CH0_DQS_N2 105 DQ34 Vss 249 DDR4_DIMM_CH0_DQ35 31 DQS11_c DQS2_c 175 DDR4_DIMM_CH0_DQS_P2 DDR4_DIMM_CH0_DQ44 106 Vss DQ35 250 DDR4_DIMM_CH0_DQ22 32 Vss DQS2_t 176 107 DQ44 Vss 251 DDR4_DIMM_CH0_DQ45 C DDR4 DIMM IF C 33 DQ22 Vss 177 DDR4_DIMM_CH0_DQ23 DDR4_DIMM_CH0_DQ40 108 Vss DQ45 252 DDR4_DIMM_CH0_DQ18 34 Vss DQ23 178 109 DQ40 Vss 253 DDR4_DIMM_CH0_DQ41 11 DDR4_DIMM_CH0_A[17:0] 35 DQ18 Vss 179 DDR4_DIMM_CH0_DQ19 DDR4_DIMM_CH0_DBI_N5 110 Vss DQ41 254 2p5V DDR4_DIMM_CH0_DQ28 36 Vss DQ19 180 DDR4_DIMM_CH0_TDQS_N14111 DQS14_t/DM5_n/DBI5_n Vss 255 DDR4_DIMM_CH0_DQS_N5 11 DDR4_DIMM_CH0_CK_P[1:0] 37 DQ28 Vss 181 DDR4_DIMM_CH0_DQ29 112 DQS14_c DQS5_c 256 DDR4_DIMM_CH0_DQS_P5 DDR4_DIMM0_SAVE_N R3 DNI 11 DDR4_DIMM_CH0_CK_N[1:0] DDR4_DIMM_CH0_DQ24 38 Vss DQ29 182 DDR4_DIMM_CH0_DQ46 113 Vss DQS5_t 257 DDR4_DIMM0_EVENT_N R4 10.0K 11 DDR4_DIMM_CH0_CKE[1:0] 39 DQ24 Vss 183 DDR4_DIMM_CH0_DQ25 114 DQ46 Vss 258 DDR4_DIMM_CH0_DQ47 DDR4D_SCL R5 10.0K DDR4_DIMM_CH0_DBI_N3 40 Vss DQ25 184 DDR4_DIMM_CH0_DQ42 115 Vss DQ47 259 DDR4D_SDA R6 10.0K 11 DDR4_DIMM_CH0_RESET_N DDR4_DIMM_CH0_TDQS_N12 41 DQS12_t/DM3_n/DBI3_n Vss 185 DDR4_DIMM_CH0_DQS_N3 116 DQ42 Vss 260 DDR4_DIMM_CH0_DQ43 DDR4_DIMM_CH0_SA0 R7 0 11 DDR4_DIMM_CH0_ACT_N 42 DQS12_c DQS3_c 186 DDR4_DIMM_CH0_DQS_P3 DDR4_DIMM_CH0_DQ52 117 Vss DQ43 261 DDR4_DIMM_CH0_SA1 R8 0 11 DDR4_DIMM_CH0_ODT[1:0] DDR4_DIMM_CH0_DQ30 43 Vss DQS3_t 187 118 DQ52 Vss 262 DDR4_DIMM_CH0_DQ53 DDR4_DIMM_CH0_SA2 R9 0 11 DDR4_DIMM_CH0_BG[1:0] 44 DQ30 Vss 188 DDR4_DIMM_CH0_DQ31 DDR4_DIMM_CH0_DQ48 119 Vss DQ53 263 11 DDR4_DIMM_CH0_BA[1:0] DDR4_DIMM_CH0_DQ26 45 Vss DQ31 189 120 DQ48 Vss 264 DDR4_DIMM_CH0_DQ49 I2C Addr: 0xA0 11 DDR4_DIMM_CH0_CS_N[3:0] 46 DQ26 Vss 190 DDR4_DIMM_CH0_DQ27 DDR4_DIMM_CH0_DBI_N6 121 Vss DQ49 265 11 DDR4_DIMM_CH0_PAR DDR4_DIMM_CH0_DQ68 47 Vss DQ27 191 DDR4_DIMM_CH0_TDQS_N15122 DQS15_t/DM6_n/DBI6_n Vss 266 DDR4_DIMM_CH0_DQS_N6 1p2V_DDR4_CH01 11 DDR4_DIMM_CH0_ALERT_N 48 CB4/NC Vss 192 DDR4_DIMM_CH0_DQ69 123 DQS15_c DQS6_c 267 DDR4_DIMM_CH0_DQS_P6 DDR4_DIMM_CH0_DQ64 49 Vss CB5/NC 193 DDR4_DIMM_CH0_DQ54 124 Vss DQS6_t 268 DDR4_DIMM_CH0_RESET_N R10 10.0K 10,11 DDR4_DIMM_CH0_DBI_N[8:0] 50 CB0/NC Vss 194 DDR4_DIMM_CH0_DQ65 125 DQ54 Vss 269 DDR4_DIMM_CH0_DQ55 R11 DNI DDR4_DIMM_CH0_DBI_N8 51 Vss CB1/NC 195 DDR4_DIMM_CH0_DQ50 126 Vss DQ55 270 10,11 DDR4_DIMM_CH0_DQ[71:0] DDR4_DIMM_CH0_TDQS_N17 52 DQS17_t/DM8_n/DBI8_n Vss 196 DDR4_DIMM_CH0_DQS_N8 127 DQ50 Vss 271 DDR4_DIMM_CH0_DQ51 53 DQS17_c DQS8_c 197 DDR4_DIMM_CH0_DQS_P8 DDR4_DIMM_CH0_DQ60 128 Vss DQ51 272 DDR4_DIMM_CH0_CKE0 R12 DNI 10,11 DDR4_DIMM_CH0_DQS_P[8:0] DDR4_DIMM_CH0_DQ70 54 Vss DQS8_t 198 129 DQ60 Vss 273 DDR4_DIMM_CH0_DQ61 55 CB6/NC Vss 199 DDR4_DIMM_CH0_DQ71 DDR4_DIMM_CH0_DQ56 130 Vss DQ61 274 DDR4_DIMM_CH0_CKE1 R13 DNI 10,11 DDR4_DIMM_CH0_DQS_N[8:0] Vss CB7/NC DQ56 Vss B DDR4_DIMM_CH0_DQ66 56 200 131 275 DDR4_DIMM_CH0_DQ57 B 57 CB2/NC Vss 201 DDR4_DIMM_CH0_DQ67 DDR4_DIMM_CH0_DBI_N7 132 Vss DQ57 276 10,11 DDR4_DIMM_CH0_TDQS_N[17:9] DDR4_DIMM_CH0_RESET_N 58 Vss CB3/NC 202 DDR4_DIMM_CH0_TDQS_N16133 DQS16_t/DM7_n/DBI7_n Vss 277 DDR4_DIMM_CH0_DQS_N7 59 RESET_n Vss 203 DDR4_DIMM_CH0_CKE1 134 DQS16_c DQS7_c 278 DDR4_DIMM_CH0_DQS_P7 1p2V_DDR4_CH01 13 DDR4_DIMM_SCL DDR4_DIMM_CH0_CKE0 60 Vdd CKE1 204 DDR4_DIMM_CH0_DQ62 135 Vss DQS7_t 279 13 DDR4_DIMM_SDA 61 CKE0 Vdd 205 136 DQ62 Vss 280 DDR4_DIMM_CH0_DQ63 DDR4_DIMM_CH0_ALERT_N R789 13 DDR4_CH0_EVENT_N DDR4_DIMM_CH0_ACT_N 62 Vdd RFU2 206 DDR4_DIMM_CH0_DQ58 137 Vss DQ63 281 10.0K 13 DDR4_CH0_SAVE_N DDR4_DIMM_CH0_BG0 63 ACT_n Vdd 207 DDR4_DIMM_CH0_BG1 138 DQ58 Vss 282 DDR4_DIMM_CH0_DQ59 64 BG0 BG1 208 DDR4_DIMM_CH0_ALERT_N DDR4_DIMM_CH0_SA0 139 Vss DQ59 283 2p5V 11 DDR4_DIMM_CH0_C2 DDR4_DIMM_CH0_A12 65 Vdd ALERT_n 209 DDR4_DIMM_CH0_SA1 140 SA0 Vss 284 DDR4_DIMM_CH0_A9 66 A12 Vdd 210 DDR4_DIMM_CH0_A11 DDR4D_SCL 141 SA1 Vddspd 285 DDR4D_SDA 12,15,18 DDR4D_SCL 67 A9 A11 211 DDR4_DIMM_CH0_A7 2p5V 142 SCL SDA 286 12,15,18 DDR4D_SDA DDR4_DIMM_CH0_A8 68 Vdd A7 212 143 Vpp Vpp 287 2p5V DDR4_DIMM_CH0_A6 69 A8 Vdd 213 DDR4_DIMM_CH0_A5 144 Vpp Vpp 288 R14 0 70 A6 A5 214 DDR4_DIMM_CH0_A4 RFU1 Vpp DDR4_DIMM_CH0_A3 71 Vdd A4 215 1p2V_DDR4_CH01 1p2V_DDR4_CH01 0p6V_VTT_DDR4_CH01 DDR4_DIMM_CH0_A1 72 A3 Vdd 216 DDR4_DIMM_CH0_A2 73 A1 A2 217 DDR4x72x288 DDR4_DIMM_CH0_CK_P0 74 Vdd Vdd 218 DDR4_DIMM_CH0_CK_P1 CK0_t CK1_t 1p2V_DDR4_CH01 DDR4_DIMM_CH0_CK_N0 75 219 DDR4_DIMM_CH0_CK_N1 C4 C5 C6 C7 C8 C9 C10 C11 C12 C13 C14 C15 C16 C17 76 CK0_c CK1_c 220 0p6V_VTT_DDR4_CH01 0p6V_VTT_DDR4_CH01 77 Vdd Vdd 221 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 100uF 1uF Vtt Vtt

DDR4x72x288 Put caps on VDD pins which are close to DIMM A/C pins A 1p2V_DDR4_CH01 0p6V_VREF_DDR4_CH01 0p6V_VTT_DDR4_CH01 A 2p5V C18 0.1uF C19 0.1uF C20 C21 Intel Corporation,101 innovation Dr, San Jose, CA 95134 100uF 100uF C22 C23 C25 C26 C27 C28 C24 0.1uF C29 10nF C32 1206 1206 100uF C33 C34 C35 Title 6.3V 6.3V 10uF 10uF 0.1uF 0.1uF 10nF 10nF C31 0.1uF 1206 AgileX F-Series FPGA Dev Kit X6T X6T 6.3V 10uF 0.1uF 10nF Copyright (c) 2014, Intel Corporation. All Rights Reserved. X6T Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 9of 66 5 4 3 2 1 5 4 3 2 1 DDR4/T CH0 INTERFACE -- FPGA SIDE 3A

U2I

D D

DDR4_DIMM_CH0_DQ63 V59 H59 DDR4_DIMM_CH0_DQ47 DDR4_DIMM_CH0_DQ61 T59 IO, LVDS3A_25N, DQ60 IO, LVDS3A_1N, DQ56 F59 DDR4_DIMM_CH0_DQ45 DDR4_DIMM_CH0_DQ60 W58 IO, LVDS3A_25P, DQ60 IO, LVDS3A_1P, DQ56 J58 DDR4_DIMM_CH0_DQ44 DDR4_DIMM_CH0_DQ62 U58 IO, LVDS3A_26N, DQ60 IO, LVDS3A_2N, DQ56 G58 DDR4_DIMM_CH0_DQ46 DDR4_DIMM_CH0_TDQS_N16 V57 IO, LVDS3A_26P, DQ60 IO, LVDS3A_2P, DQ56 H57 DDR4_DIMM_CH0_TDQS_N14 DDR4_DIMM_CH0_DBI_N7 T57 IO, LVDS3A_27N, DQ60 IO, LVDS3A_3N, DQ56 F57 DDR4_DIMM_CH0_DBI_N5 DDR4_DIMM_CH0_DQS_N7 W56 IO, LVDS3A_27P, DQ60 IO, LVDS3A_3P, DQ56, AVST_READY J56 DDR4_DIMM_CH0_DQS_N5 DDR4_DIMM_CH0_DQS_P7 U56 IO, LVDS3A_28N, DQSN60 IO, LVDS3A_4N, DQSN56, SDM_MISSION_DATA31 G56 DDR4_DIMM_CH0_DQS_P5 DDR4_DIMM_CH0_DQ56 V55 IO, LVDS3A_28P, DQS60 IO, LVDS3A_4P, DQS56, SDM_MISSION_DATA30 H55 DDR4_DIMM_CH0_DQ42 DDR4_DIMM_CH0_DQ57 T55 IO, LVDS3A_29N, DQ60 IO, LVDS3A_5N, DQ56, SDM_MISSION_DATA29 F55 DDR4_DIMM_CH0_DQ40 DDR4_DIMM_CH0_DQ58 W54 IO, LVDS3A_29P, DQ60 IO, LVDS3A_5P, DQ56, SDM_MISSION_DATA28 J54 DDR4_DIMM_CH0_DQ43 DDR4_DIMM_CH0_DQ59 U54 IO, LVDS3A_30N, DQ60 IO, LVDS3A_6N, DQ56, SDM_MISSION_DATA27 G54 DDR4_DIMM_CH0_DQ41 P59 IO, LVDS3A_30P, DQ60 IO, LVDS3A_6P, DQ56, SDM_MISSION_DATA26 H61 DDR4_DIMM_CH0_DQ55 M59 IO, LVDS3A_31N, DQ61 IO, LVDS3A_7N, DQ57, SDM_MISSION_DATA25 F61 DDR4_DIMM_CH0_DQ54 N58 IO, LVDS3A_31P, DQ61 IO, LVDS3A_7P, DQ57, SDM_MISSION_DATA24 D59 DDR4_DIMM_CH0_DQ52 L58 IO, LVDS3A_32N, DQ61 IO, LVDS3A_8N, DQ57, SDM_MISSION_DATA23 C58 DDR4_DIMM_CH0_DQ53 P57 IO, LVDS3A_32P, DQ61 IO, LVDS3A_8P, DQ57, SDM_MISSION_DATA22 D57 DDR4_DIMM_CH0_TDQS_N15 M57 IO, LVDS3A_33N, DQ61 IO, LVDS3A_9N, DQ57, SDM_MISSION_DATA21 B57 DDR4_DIMM_CH0_DBI_N6 N56 IO, LVDS3A_33P, DQ61 IO, LVDS3A_9P, DQ57, SDM_MISSION_DATA20 C56 DDR4_DIMM_CH0_DQS_N6 L56 IO, PLL_3A_B_CLKOUT1N, LVDS3A_34N, DQSN61 IO, PLL_3A_T_CLKOUT1N, LVDS3A_10N, DQSN57, SDM_MISSION_DATA19 A56 DDR4_DIMM_CH0_DQS_P6 P55 IO, PLL_3A_B_CLKOUT1P, PLL_3A_B_CLKOUT1, PLL_3A_B_FB1, LVDS3A_34P, DQS61 IO, PLL_3A_T_CLKOUT1P, PLL_3A_T_CLKOUT1, PLL_3A_T_FB1, LVDS3A_10P, DQS57, SDM_MISSION_DATA18 D55 DDR4_DIMM_CH0_DQ50 M55 IO, LVDS3A_35N, DQ61 IO, LVDS3A_11N, DQ57, SDM_MISSION_DATA17 B55 DDR4_DIMM_CH0_DQ48 C C N54 IO, RZQ_B_3A, LVDS3A_35P, DQ61 IO, RZQ_T_3A, LVDS3A_11P, DQ57, SDM_MISSION_DATA16 C54 DDR4_DIMM_CH0_DQ51 L54 IO, CLK_B_3A_1N, LVDS3A_36N, DQ61 IO, CLK_T_3A_1N, LVDS3A_12N, DQ57 A54 DDR4_DIMM_CH0_DQ49 W52 IO, CLK_B_3A_1P, LVDS3A_36P, DQ61 IO, CLK_T_3A_1P, LVDS3A_12P, DQ57 J52 DDR4_DIMM_CH0_DQ39 U52 IO, CLK_B_3A_0N, LVDS3A_37N, DQ62 IO, CLK_T_3A_0N, LVDS3A_13N, DQ58 G52 DDR4_DIMM_CH0_DQ38 V51 IO, CLK_B_3A_0P, LVDS3A_37P, DQ62 IO, CLK_T_3A_0P, LVDS3A_13P, DQ58 H51 DDR4_DIMM_CH0_DQ37 T51 IO, LVDS3A_38N, DQ62 IO, LVDS3A_14N, DQ58 F51 DDR4_DIMM_CH0_DQ36 W50 IO, LVDS3A_38P, DQ62 IO, LVDS3A_14P, DQ58 J50 DDR4_DIMM_CH0_TDQS_N13 U50 IO, PLL_3A_B_CLKOUT0N, LVDS3A_39N, DQ62 IO, PLL_3A_T_CLKOUT0N, LVDS3A_15N, DQ58 G50 DDR4_DIMM_CH0_DBI_N4 V49 IO, PLL_3A_B_CLKOUT0P, PLL_3A_B_CLKOUT0, PLL_3A_B_FB0, LVDS3A_39P, DQ62 IO, PLL_3A_T_CLKOUT0P, PLL_3A_T_CLKOUT0, PLL_3A_T_FB0, LVDS3A_15P, DQ58 H49 DDR4_DIMM_CH0_DQS_N4 T49 IO, LVDS3A_40N, DQSN62 IO, LVDS3A_16N, DQSN58, SDM_MISSION_CLK F49 DDR4_DIMM_CH0_DQS_P4 W48 IO, LVDS3A_40P, DQS62 IO, LVDS3A_16P, DQS58, SDM_MISSION_DATA15 J48 DDR4_DIMM_CH0_DQ34 U48 IO, LVDS3A_41N, DQ62 IO, LVDS3A_17N, DQ58, SDM_MISSION_DATA14 G48 DDR4_DIMM_CH0_DQ32 V47 IO, LVDS3A_41P, DQ62 IO, LVDS3A_17P, DQ58, SDM_MISSION_DATA13 H47 DDR4_DIMM_CH0_DQ35 T47 IO, LVDS3A_42N, DQ62 IO, LVDS3A_18N, DQ58, SDM_MISSION_DATA12 F47 DDR4_DIMM_CH0_DQ33 N52 IO, LVDS3A_42P, DQ62 IO, LVDS3A_18P, DQ58, SDM_MISSION_DATA11 C52 DDR4_DIMM_CH0_DQ68 L52 IO, LVDS3A_43N, DQ63 IO, LVDS3A_19N, DQ59, SDM_MISSION_DATA10 A52 DDR4_DIMM_CH0_DQ71 P51 IO, LVDS3A_43P, DQ63 IO, LVDS3A_19P, DQ59, SDM_MISSION_DATA9 D51 DDR4_DIMM_CH0_DQ69 M51 IO, LVDS3A_44N, DQ63 IO, LVDS3A_20N, DQ59, SDM_MISSION_DATA8 B51 DDR4_DIMM_CH0_DQ70 N50 IO, LVDS3A_44P, DQ63 IO, LVDS3A_20P, DQ59, SDM_MISSION_DATA_VALID C50 DDR4_DIMM_CH0_TDQS_N17 L50 IO, LVDS3A_45N, DQ63 IO, LVDS3A_21N, DQ59, SDM_MISSION_DATA7 A50 DDR4_DIMM_CH0_DBI_N8 P49 IO, LVDS3A_45P, DQ63 IO, LVDS3A_21P, DQ59, SDM_MISSION_DATA6 D49 DDR4_DIMM_CH0_DQS_N8 M49 IO, LVDS3A_46N, DQSN63 IO, LVDS3A_22N, DQSN59, SDM_MISSION_DATA5 B49 DDR4_DIMM_CH0_DQS_P8 N48 IO, LVDS3A_46P, DQS63 IO, LVDS3A_22P, DQS59, SDM_MISSION_DATA4 C48 DDR4_DIMM_CH0_DQ66 IO, LVDS3A_47N, DQ63 IO, LVDS3A_23N, DQ59, SDM_MISSION_DATA3 B L48 A48 DDR4_DIMM_CH0_DQ64 B P47 IO, LVDS3A_47P, DQ63 IO, LVDS3A_23P, DQ59, SDM_MISSION_DATA2 D47 DDR4_DIMM_CH0_DQ67 M47 IO, LVDS3A_48N, DQ63 IO, LVDS3A_24N, DQ59, SDM_MISSION_DATA1 B47 DDR4_DIMM_CH0_DQ65 IO, LVDS3A_48P, DQ63 IO, LVDS3A_24P, DQ59, SDM_MISSION_DATA0

BOT TOP Bank 3A

AGFB014R24_2486A

9,11 DDR4_DIMM_CH0_DBI_N[8:0]

9,11 DDR4_DIMM_CH0_DQ[71:0]

9,11 DDR4_DIMM_CH0_DQS_P[8:0] A A 9,11 DDR4_DIMM_CH0_DQS_N[8:0]

9,11 DDR4_DIMM_CH0_TDQS_N[17:9] Intel Corporation,101 innovation Dr, San Jose, CA 95134 Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 10of 66 5 4 3 2 1 5 4 3 2 1 DDR4/T CH1 INTERFACE -- FPGA SIDE 3B

U2H

DDRT:ERID2 DDR4_DIMM_CH0_CK_N1 V45 H45 DDR4_DIMM_CH0_DQ29 DDRT:ERID0 DDR4_DIMM_CH0_CK_P1 T45 IO, LVDS3B_25N, DQ52 IO, LVDS3B_1N, DQ48 F45 DDR4_DIMM_CH0_DQ31 D W44 IO, LVDS3B_25P, DQ52 IO, LVDS3B_1P, DQ48 J44 DDR4_DIMM_CH0_DQ28 D DDRT:NC DDR4_DIMM_CH0_ALERT_N U44 IO, LVDS3B_26N, DQ52 IO, LVDS3B_2N, DQ48 G44 DDR4_DIMM_CH0_DQ30 V43 IO, LVDS3B_26P, DQ52 IO, LVDS3B_2P, DQ48 H43 DDR4_DIMM_CH0_TDQS_N12 T43 IO, LVDS3B_27N, DQ52 IO, LVDS3B_3N, DQ48 F43 DDR4_DIMM_CH0_DBI_N3 W42 IO, LVDS3B_27P, DQ52 IO, LVDS3B_3P, DQ48 J42 DDR4_DIMM_CH0_DQS_N3 U42 IO, LVDS3B_28N, DQSN52 IO, LVDS3B_4N, DQSN48 G42 DDR4_DIMM_CH0_DQS_P3 V41 IO, LVDS3B_28P, DQS52 IO, LVDS3B_4P, DQS48 H41 DDR4_DIMM_CH0_DQ27 DDRT:C3 DDR4_DIMM_CH0_C2 T41 IO, LVDS3B_29N, DQ52 IO, LVDS3B_5N, DQ48 F41 DDR4_DIMM_CH0_DQ26 DDRT:C2 DDR4_DIMM_CH0_CS_N3 W40 IO, LVDS3B_29P, DQ52 IO, LVDS3B_5P, DQ48 J40 DDR4_DIMM_CH0_DQ25 DDRT:C1 DDR4_DIMM_CH0_CS_N2 U40 IO, LVDS3B_30N, DQ52 IO, LVDS3B_6N, DQ48 G40 DDR4_DIMM_CH0_DQ24 DDR4_DIMM_CH0_BG0 P45 IO, LVDS3B_30P, DQ52 IO, LVDS3B_6P, DQ48 D45 DDR4_DIMM_CH0_DQ20 DDR4_DIMM_CH0_BA1 M45 IO, LVDS3B_31N, DQ53 IO, LVDS3B_7N, DQ49 B45 DDR4_DIMM_CH0_DQ21 DDR4_DIMM_CH0_BA0 N44 IO, LVDS3B_31P, DQ53 IO, LVDS3B_7P, DQ49 C44 DDR4_DIMM_CH0_DQ23 DDR4_DIMM_CH0_A17 L44 IO, LVDS3B_32N, DQ53 IO, LVDS3B_8N, DQ49 A44 DDR4_DIMM_CH0_DQ22 DDR4_DIMM_CH0_A16 P43 IO, LVDS3B_32P, DQ53 IO, LVDS3B_8P, DQ49 D43 DDR4_DIMM_CH0_TDQS_N11 DDR4_DIMM_CH0_A15 M43 IO, LVDS3B_33N, DQ53 IO, LVDS3B_9N, DQ49 B43 DDR4_DIMM_CH0_DBI_N2 DDR4_DIMM_CH0_A14 N42 IO, LVDS3B_33P, DQ53 IO, LVDS3B_9P, DQ49 C42 DDR4_DIMM_CH0_DQS_N2 DDR4_DIMM_CH0_A13 L42 IO, PLL_3B_B_CLKOUT1N, LVDS3B_34N, DQSN53 IO, PLL_3B_T_CLKOUT1N, LVDS3B_10N, DQSN49 A42 DDR4_DIMM_CH0_DQS_P2 DDR4_DIMM_CH0_A12 P41 IO, PLL_3B_B_CLKOUT1P, PLL_3B_B_CLKOUT1, PLL_3B_B_FB1, LVDS3B_34P, DQS53 IO, PLL_3B_T_CLKOUT1P, PLL_3B_T_CLKOUT1, PLL_3B_T_FB1, LVDS3B_10P, DQS49 D41 DDR4_DIMM_CH0_DQ19 240 R15 DDR4_DIMM_CH0_RZQ M41 IO, LVDS3B_35N, DQ53 IO, LVDS3B_11N, DQ49 B41 DDR4_DIMM_CH0_DQ18 IO, RZQ_B_3B, LVDS3B_35P, DQ53 IO, RZQ_T_3B, LVDS3B_11P, DQ49 CLK_DDR4_CH0_N 38 N40 C40 DDR4_DIMM_CH0_DQ17 CLK_DDR4_CH0_P 38 L40 IO, CLK_B_3B_1N, LVDS3B_36N, DQ53 IO, CLK_T_3B_1N, LVDS3B_12N, DQ49 A40 DDR4_DIMM_CH0_DQ16 DDR4_DIMM_CH0_A11 W38 IO, CLK_B_3B_1P, LVDS3B_36P, DQ53 IO, CLK_T_3B_1P, LVDS3B_12P, DQ49 J38 DDR4_DIMM_CH0_DQ4 DDR4_DIMM_CH0_A10 U38 IO, CLK_B_3B_0N, LVDS3B_37N, DQ54 IO, CLK_T_3B_0N, LVDS3B_13N, DQ50 G38 DDR4_DIMM_CH0_DQ5 C C DDR4_DIMM_CH0_A9 V37 IO, CLK_B_3B_0P, LVDS3B_37P, DQ54 IO, CLK_T_3B_0P, LVDS3B_13P, DQ50 H37 DDR4_DIMM_CH0_DQ7 DDR4_DIMM_CH0_A8 T37 IO, LVDS3B_38N, DQ54 IO, LVDS3B_14N, DQ50 F37 DDR4_DIMM_CH0_DQ6 DDR4_DIMM_CH0_A7 W36 IO, LVDS3B_38P, DQ54 IO, LVDS3B_14P, DQ50 J36 DDR4_DIMM_CH0_TDQS_N9 DDR4_DIMM_CH0_A6 U36 IO, PLL_3B_B_CLKOUT0N, LVDS3B_39N, DQ54 IO, PLL_3B_T_CLKOUT0N, LVDS3B_15N, DQ50 G36 DDR4_DIMM_CH0_DBI_N0 DDR4_DIMM_CH0_A5 V35 IO, PLL_3B_B_CLKOUT0P, PLL_3B_B_CLKOUT0, PLL_3B_B_FB0, LVDS3B_39P, DQ54 IO, PLL_3B_T_CLKOUT0P, PLL_3B_T_CLKOUT0, PLL_3B_T_FB0, LVDS3B_15P, DQ50 H35 DDR4_DIMM_CH0_DQS_N0 DDR4_DIMM_CH0_A4 T35 IO, LVDS3B_40N, DQSN54 IO, LVDS3B_16N, DQSN50 F35 DDR4_DIMM_CH0_DQS_P0 DDR4_DIMM_CH0_A3 W34 IO, LVDS3B_40P, DQS54 IO, LVDS3B_16P, DQS50 J34 DDR4_DIMM_CH0_DQ3 DDR4_DIMM_CH0_A2 U34 IO, LVDS3B_41N, DQ54 IO, LVDS3B_17N, DQ50 G34 DDR4_DIMM_CH0_DQ2 DDR4_DIMM_CH0_A1 V33 IO, LVDS3B_41P, DQ54 IO, LVDS3B_17P, DQ50 H33 DDR4_DIMM_CH0_DQ1 DDR4_DIMM_CH0_A0 T33 IO, LVDS3B_42N, DQ54 IO, LVDS3B_18N, DQ50 F33 DDR4_DIMM_CH0_DQ0 DDR4_DIMM_CH0_PAR N38 IO, LVDS3B_42P, DQ54 IO, LVDS3B_18P, DQ50 C38 DDR4_DIMM_CH0_DQ15 DDRT:GNT0 DDR4_DIMM_CH0_CS_N1 L38 IO, LVDS3B_43N, DQ55 IO, LVDS3B_19N, DQ51 A38 DDR4_DIMM_CH0_DQ13 DDR4_DIMM_CH0_CK_N0 P37 IO, LVDS3B_43P, DQ55 IO, LVDS3B_19P, DQ51 D37 DDR4_DIMM_CH0_DQ12 DDR4_DIMM_CH0_CK_P0 M37 IO, LVDS3B_44N, DQ55 IO, LVDS3B_20N, DQ51 B37 DDR4_DIMM_CH0_DQ14 DDRT:REQ DDR4_DIMM_CH0_CKE1 N36 IO, LVDS3B_44P, DQ55 IO, LVDS3B_20P, DQ51 C36 DDR4_DIMM_CH0_TDQS_N10 DDR4_DIMM_CH0_CKE0 L36 IO, LVDS3B_45N, DQ55 IO, LVDS3B_21N, DQ51 A36 DDR4_DIMM_CH0_DBI_N1 DDRT:ERR DDR4_DIMM_CH0_ODT1 P35 IO, LVDS3B_45P, DQ55 IO, LVDS3B_21P, DQ51 D35 DDR4_DIMM_CH0_DQS_N1 DDR4_DIMM_CH0_ODT0 M35 IO, LVDS3B_46N, DQSN55 IO, LVDS3B_22N, DQSN51 B35 DDR4_DIMM_CH0_DQS_P1 DDR4_DIMM_CH0_ACT_N N34 IO, LVDS3B_46P, DQS55 IO, LVDS3B_22P, DQS51 C34 DDR4_DIMM_CH0_DQ11 DDR4_DIMM_CH0_CS_N0 L34 IO, LVDS3B_47N, DQ55 IO, LVDS3B_23N, DQ51 A34 DDR4_DIMM_CH0_DQ10 DDR4_DIMM_CH0_RESET_N P33 IO, LVDS3B_47P, DQ55 IO, LVDS3B_23P, DQ51 D33 DDR4_DIMM_CH0_DQ9 DDR4_DIMM_CH0_BG1 M33 IO, LVDS3B_48N, DQ55 IO, LVDS3B_24N, DQ51 B33 DDR4_DIMM_CH0_DQ8 IO, LVDS3B_48P, DQ55 IO, LVDS3B_24P, DQ51

B B BOT TOP Bank 3B

AGFB014R24_2486A

9 DDR4_DIMM_CH0_CK_P[1:0] 9 DDR4_DIMM_CH0_CK_N[1:0] CLK_DDR4_CH0_P R16 DNI CLK_DDR4_CH0_N

9 DDR4_DIMM_CH0_CKE[1:0]

9 DDR4_DIMM_CH0_A[17:0] 9 DDR4_DIMM_CH0_ODT[1:0] 9 DDR4_DIMM_CH0_BG[1:0] 9 DDR4_DIMM_CH0_BA[1:0] 9,10 DDR4_DIMM_CH0_DBI_N[8:0] 9 DDR4_DIMM_CH0_CS_N[3:0] 9,10 DDR4_DIMM_CH0_DQ[71:0] 9 DDR4_DIMM_CH0_RESET_N A 9 DDR4_DIMM_CH0_ACT_N 9,10 DDR4_DIMM_CH0_DQS_P[8:0] A 9 DDR4_DIMM_CH0_PAR 9 DDR4_DIMM_CH0_ALERT_N 9,10 DDR4_DIMM_CH0_DQS_N[8:0] Intel Corporation,101 innovation Dr, San Jose, CA 95134 9 DDR4_DIMM_CH0_C2 9,10 DDR4_DIMM_CH0_TDQS_N[17:9] Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 11of 66 5 4 3 2 1 5 4 3 2 1

12V_G1 R17 0 J2A 1p2V_DDR4_CH01 0p6V_VREF_DDR4_CH01 J2B DDR4 Single DIMM CH1 R18 0 1 145 2 12V/NC 12V/NC 146 DDR4_DIMM_CH1_DQ4 3 Vss Vrefca 147 DDR4_DIMM1_EVENT_N 78 222 DDR4_DIMM_CH1_PAR 1p2V_DDR4_CH01 HPS Dedicated 4 DQ4 Vss 148 DDR4_DIMM_CH1_DQ5 DDR4_DIMM_CH1_A0 79 EVENT_n PARITY 223 DDR4_DIMM_CH1_DQ0 5 Vss DQ5 149 80 A0 Vdd 224 DDR4_DIMM_CH1_BA1 Note: only support 1x Rank, x8 mode in HPS DQ0 Vss Vdd BA1 6 150 DDR4_DIMM_CH1_DQ1 DDR4_DIMM_CH1_BA0 81 225 DDR4_DIMM_CH1_A10 2p5V 1p2V_DDR4_CH01 DDR4_DIMM_CH1_DBI_N0 7 Vss DQ1 151 DDR4_DIMM_CH1_A16 82 BA0 A10/AP 226 R19 0 IO_3p3V DDR4_DIMM_CH1_TDQS_N9 8 DQS9_t/DM0_n/DBI0_n Vss 152 DDR4_DIMM_CH1_DQS_N0 83 RAS_n/A16 Vdd 227 R20 DNI DQS9_c DQS0_c Vdd RFU3 D 9 153 DDR4_DIMM_CH1_DQS_P0 DDR4_DIMM_CH1_CS_N0 84 228 DDR4_DIMM_CH1_A14 C37 C38 C39 D DDR4_DIMM_CH1_DQ6 10 Vss DQS0_t 154 85 S0_n WE_n/A14 229 11 DQ6 Vss 155 DDR4_DIMM_CH1_DQ7 DDR4_DIMM_CH1_A15 86 Vdd Vdd 230 DDR4_DIMM1_SAVE_N 1uF 0.1uF 0.1uF DDR4_DIMM_CH1_DQ2 12 Vss DQ7 156 DDR4_DIMM_CH1_ODT0 87 CAS_n/A15 SAVE_n/NC 231 13 DQ2 Vss 157 DDR4_DIMM_CH1_DQ3 88 ODT0 Vdd 232 DDR4_DIMM_CH1_A13 U3 DDR4_DIMM_CH1_DQ12 14 Vss DQ3 158 DDR4_DIMM_CH1_CS_N1 89 Vdd A13 233 14 1 15 DQ12 Vss 159 DDR4_DIMM_CH1_DQ13 90 S1_n Vdd 234 R793 100 DDR4_DIMM1_EVENT_N 13 VCC VL 2 DDR4_CH1_EVENT_N DDR4_DIMM_CH1_DQ8 16 Vss DQ13 160 DDR4_DIMM_CH1_ODT1 91 Vdd A17/NC 235 DDR4_DIMM1_SAVE_N 12 IOVCC1IOVL1 3 DDR4_CH1_SAVE_N 17 DQ8 Vss 161 DDR4_DIMM_CH1_DQ9 92 ODT1 C2/NC 236 QSFPDD_I2C_SCL 11 IOVCC2IOVL2 4 QSFPDD_FPGA_I2C_SCL DDR4_DIMM_CH1_DBI_N1 18 Vss DQ9 162 93 Vdd Vdd 237 QSFPDD_I2C_SDA 10 IOVCC3IOVL3 5 QSFPDD_FPGA_I2C_SDA DQS10_t/DM1_n/DBI1_n Vss S2_n/C0 S3_n/C1 IOVCC4IOVL4 DDR4_DIMM_CH1_TDQS_N10 19 163 DDR4_DIMM_CH1_DQS_N1 94 238 DDR4_DIMM_CH1_SA2 1p2V_DDR4_CH01 9 6 20 DQS10_c DQS1_c 164 DDR4_DIMM_CH1_DQS_P1 DDR4_DIMM_CH1_DQ36 95 Vss SA2/RFU 239 8 NC1 NC0 7 DDR4_DIMM_CH1_DQ14 21 Vss DQS1_t 165 96 DQ36 Vss 240 DDR4_DIMM_CH1_DQ37 TSn GND DQ14 Vss DDR4_DIMM_CH1_DQ15 DDR4_DIMM_CH1_DQ32 Vss DQ37 22 166 97 241 MAX3378E DDR4_DIMM_CH1_DQ10 23 Vss DQ15 167 98 DQ32 Vss 242 DDR4_DIMM_CH1_DQ33 24 DQ10 Vss 168 DDR4_DIMM_CH1_DQ11 DDR4_DIMM_CH1_DBI_N4 99 Vss DQ33 243 DDR4_DIMM_CH1_DQ20 25 Vss DQ11 169 DDR4_DIMM_CH1_TDQS_N13100 DQS13_t/DM4_n/DBI4_n Vss 244 DDR4_DIMM_CH1_DQS_N4 26 DQ20 Vss 170 DDR4_DIMM_CH1_DQ21 101 DQS13_c DQS4_c 245 DDR4_DIMM_CH1_DQS_P4 DDR4_DIMM_CH1_DQ16 27 Vss DQ21 171 DDR4_DIMM_CH1_DQ38 102 Vss DQS4_t 246 28 DQ16 Vss 172 DDR4_DIMM_CH1_DQ17 103 DQ38 Vss 247 DDR4_DIMM_CH1_DQ39 DDR4_DIMM_CH1_DBI_N2 29 Vss DQ17 173 DDR4_DIMM_CH1_DQ34 104 Vss DQ39 248 DDR4_DIMM_CH1_TDQS_N11 30 DQS11_t/DM2_n/DBI2_n Vss 174 DDR4_DIMM_CH1_DQS_N2 105 DQ34 Vss 249 DDR4_DIMM_CH1_DQ35 31 DQS11_c DQS2_c 175 DDR4_DIMM_CH1_DQS_P2 DDR4_DIMM_CH1_DQ44 106 Vss DQ35 250 DDR4_DIMM_CH1_DQ22 32 Vss DQS2_t 176 107 DQ44 Vss 251 DDR4_DIMM_CH1_DQ45 C DDR4 DIMM IF C 33 DQ22 Vss 177 DDR4_DIMM_CH1_DQ23 DDR4_DIMM_CH1_DQ40 108 Vss DQ45 252 DDR4_DIMM_CH1_DQ18 34 Vss DQ23 178 109 DQ40 Vss 253 DDR4_DIMM_CH1_DQ41 14 DDR4_DIMM_CH1_A[16:0] 35 DQ18 Vss 179 DDR4_DIMM_CH1_DQ19 DDR4_DIMM_CH1_DBI_N5 110 Vss DQ41 254 2p5V DDR4_DIMM_CH1_DQ28 36 Vss DQ19 180 DDR4_DIMM_CH1_TDQS_N14111 DQS14_t/DM5_n/DBI5_n Vss 255 DDR4_DIMM_CH1_DQS_N5 14 DDR4_DIMM_CH1_CK_P0 37 DQ28 Vss 181 DDR4_DIMM_CH1_DQ29 112 DQS14_c DQS5_c 256 DDR4_DIMM_CH1_DQS_P5 DDR4_DIMM1_SAVE_N R21 DNI 14 DDR4_DIMM_CH1_CK_N0 DDR4_DIMM_CH1_DQ24 38 Vss DQ29 182 DDR4_DIMM_CH1_DQ46 113 Vss DQS5_t 257 DDR4_DIMM1_EVENT_N R22 10.0K 14 DDR4_DIMM_CH1_CKE[1:0] 39 DQ24 Vss 183 DDR4_DIMM_CH1_DQ25 114 DQ46 Vss 258 DDR4_DIMM_CH1_DQ47 DDR4_DIMM_CH1_DBI_N3 40 Vss DQ25 184 DDR4_DIMM_CH1_DQ42 115 Vss DQ47 259 14 DDR4_DIMM_CH1_RESET_N DDR4_DIMM_CH1_TDQS_N12 41 DQS12_t/DM3_n/DBI3_n Vss 185 DDR4_DIMM_CH1_DQS_N3 116 DQ42 Vss 260 DDR4_DIMM_CH1_DQ43 DDR4_DIMM_CH1_SA0 R23 10.0K 14 DDR4_DIMM_CH1_ACT_N 42 DQS12_c DQS3_c 186 DDR4_DIMM_CH1_DQS_P3 DDR4_DIMM_CH1_DQ52 117 Vss DQ43 261 DDR4_DIMM_CH1_SA1 R24 0 14 DDR4_DIMM_CH1_ODT[1:0] DDR4_DIMM_CH1_DQ30 43 Vss DQS3_t 187 118 DQ52 Vss 262 DDR4_DIMM_CH1_DQ53 DDR4_DIMM_CH1_SA2 R25 0 14 DDR4_DIMM_CH1_BG[1:0] 44 DQ30 Vss 188 DDR4_DIMM_CH1_DQ31 DDR4_DIMM_CH1_DQ48 119 Vss DQ53 263 14 DDR4_DIMM_CH1_BA[1:0] DDR4_DIMM_CH1_DQ26 45 Vss DQ31 189 120 DQ48 Vss 264 DDR4_DIMM_CH1_DQ49 I2C Addr: 0xA2 14 DDR4_DIMM_CH1_CS_N[1:0] 46 DQ26 Vss 190 DDR4_DIMM_CH1_DQ27 DDR4_DIMM_CH1_DBI_N6 121 Vss DQ49 265 14 DDR4_DIMM_CH1_PAR DDR4_DIMM_CH1_DQ68 47 Vss DQ27 191 DDR4_DIMM_CH1_TDQS_N15122 DQS15_t/DM6_n/DBI6_n Vss 266 DDR4_DIMM_CH1_DQS_N6 1p2V_DDR4_CH0114 DDR4_DIMM_CH1_ALERT_N 48 CB4/NC Vss 192 DDR4_DIMM_CH1_DQ69 123 DQS15_c DQS6_c 267 DDR4_DIMM_CH1_DQS_P6 DDR4_DIMM_CH1_DQ64 49 Vss CB5/NC 193 DDR4_DIMM_CH1_DQ54 124 Vss DQS6_t 268 DDR4_DIMM_CH1_RESET_N R26 10.0K 13,14 DDR4_DIMM_CH1_DBI_N[8:0] 50 CB0/NC Vss 194 DDR4_DIMM_CH1_DQ65 125 DQ54 Vss 269 DDR4_DIMM_CH1_DQ55 R27 DNI DDR4_DIMM_CH1_DBI_N8 51 Vss CB1/NC 195 DDR4_DIMM_CH1_DQ50 126 Vss DQ55 270 13,14 DDR4_DIMM_CH1_DQ[71:0] DDR4_DIMM_CH1_TDQS_N17 52 DQS17_t/DM8_n/DBI8_n Vss 196 DDR4_DIMM_CH1_DQS_N8 127 DQ50 Vss 271 DDR4_DIMM_CH1_DQ51 53 DQS17_c DQS8_c 197 DDR4_DIMM_CH1_DQS_P8 DDR4_DIMM_CH1_DQ60 128 Vss DQ51 272 DDR4_DIMM_CH1_CKE0 R28 DNI 13,14 DDR4_DIMM_CH1_DQS_P[8:0] DDR4_DIMM_CH1_DQ70 54 Vss DQS8_t 198 129 DQ60 Vss 273 DDR4_DIMM_CH1_DQ61 55 CB6/NC Vss 199 DDR4_DIMM_CH1_DQ71 DDR4_DIMM_CH1_DQ56 130 Vss DQ61 274 DDR4_DIMM_CH1_CKE1 R29 DNI 13,14 DDR4_DIMM_CH1_DQS_N[8:0] Vss CB7/NC DQ56 Vss B DDR4_DIMM_CH1_DQ66 56 200 131 275 DDR4_DIMM_CH1_DQ57 B 57 CB2/NC Vss 201 DDR4_DIMM_CH1_DQ67 DDR4_DIMM_CH1_DBI_N7 132 Vss DQ57 276 13,14 DDR4_DIMM_CH1_TDQS_N[17:9] DDR4_DIMM_CH1_RESET_N 58 Vss CB3/NC 202 DDR4_DIMM_CH1_TDQS_N16133 DQS16_t/DM7_n/DBI7_n Vss 277 DDR4_DIMM_CH1_DQS_N7 59 RESET_n Vss 203 DDR4_DIMM_CH1_CKE1 134 DQS16_c DQS7_c 278 DDR4_DIMM_CH1_DQS_P7 1p2V_DDR4_CH01 9,15,18 DDR4D_SCL DDR4_DIMM_CH1_CKE0 60 Vdd CKE1 204 DDR4_DIMM_CH1_DQ62 135 Vss DQS7_t 279 9,15,18 DDR4D_SDA 61 CKE0 Vdd 205 136 DQ62 Vss 280 DDR4_DIMM_CH1_DQ63 DDR4_DIMM_CH1_ALERT_N R790 13 DDR4_CH1_EVENT_N DDR4_DIMM_CH1_ACT_N 62 Vdd RFU2 206 DDR4_DIMM_CH1_DQ58 137 Vss DQ63 281 10.0K 13 DDR4_CH1_SAVE_N DDR4_DIMM_CH1_BG0 63 ACT_n Vdd 207 DDR4_DIMM_CH1_BG1 138 DQ58 Vss 282 DDR4_DIMM_CH1_DQ59 64 BG0 BG1 208 DDR4_DIMM_CH1_ALERT_N DDR4_DIMM_CH1_SA0 139 Vss DQ59 283 2p5V DDR4_DIMM_CH1_A12 65 Vdd ALERT_n 209 DDR4_DIMM_CH1_SA1 140 SA0 Vss 284 DDR4_DIMM_CH1_A9 66 A12 Vdd 210 DDR4_DIMM_CH1_A11 DDR4D_SCL 141 SA1 Vddspd 285 DDR4D_SDA 23,24 QSFPDD_I2C_SCL 67 A9 A11 211 DDR4_DIMM_CH1_A7 2p5V 142 SCL SDA 286 23,24 QSFPDD_I2C_SDA DDR4_DIMM_CH1_A8 68 Vdd A7 212 143 Vpp Vpp 287 2p5V 13 QSFPDD_FPGA_I2C_SCL DDR4_DIMM_CH1_A6 69 A8 Vdd 213 DDR4_DIMM_CH1_A5 144 Vpp Vpp 288 R30 0 13 QSFPDD_FPGA_I2C_SDA 70 A6 A5 214 DDR4_DIMM_CH1_A4 RFU1 Vpp DDR4_DIMM_CH1_A3 71 Vdd A4 215 1p2V_DDR4_CH01 1p2V_DDR4_CH01 0p6V_VTT_DDR4_CH01 DDR4_DIMM_CH1_A1 72 A3 Vdd 216 DDR4_DIMM_CH1_A2 73 A1 A2 217 DDR4x72x288 DDR4_DIMM_CH1_CK_P0 74 Vdd Vdd 218 DDR4_DIMM_CH1_CK_P1 CK0_t CK1_t 1p2V_DDR4_CH01 DDR4_DIMM_CH1_CK_N0 75 219 DDR4_DIMM_CH1_CK_N1 C40 C41 C42 C43 C44 C45 C46 C47 C48 C49 C50 C51 C52 C53 76 CK0_c CK1_c 220 0p6V_VTT_DDR4_CH01 0p6V_VTT_DDR4_CH01 77 Vdd Vdd 221 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 100uF 1uF Vtt Vtt

DDR4x72x288 Put caps on VDD pins which are close to DIMM A/C pins A 1p2V_DDR4_CH01 0p6V_VREF_DDR4_CH01 A 0p6V_VTT_DDR4_CH01 2p5V DDR4_DIMM_CH1_CK_P0R678 0 DDR4_DIMM_CH1_CK_P1 C65 C66 C55 0.1uF DDR4_DIMM_CH1_CK_N0R679 0 DDR4_DIMM_CH1_CK_N1 Intel Corporation,101 innovation Dr, San Jose, CA 95134 100uF 100uF C67 C68 C58 C69 C70 C71 C54 C61 1206 1206 0.1uF C57 10nF 100uF C62 C63 C64 Title 6.3V 6.3V 10uF 10uF 0.1uF 0.1uF 10nF 10nF 1206 AgileX F-Series FPGA Dev Kit X6T X6T C60 0.1uF 6.3V 10uF 0.1uF 10nF Copyright (c) 2014, Intel Corporation. All Rights Reserved. X6T Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 12of 66 5 4 3 2 1 5 4 3 2 1 DDR4 DIMM CH1 Interface - FPGA Side 3C

U2G

D DDR4_DIMM_CH1_DQ39 V19 H19 D DDR4_DIMM_CH1_DQ38 T19 IO, LVDS3C_25N, DQ44 IO, LVDS3C_1N, DQ40 F19 QSFPDD0_FPGA_LED0 42 DDR4_DIMM_CH1_DQ37 W20 IO, LVDS3C_25P, DQ44 IO, LVDS3C_1P, DQ40 J20 QSFPDD0_FPGA_LED1 42 DDR4_DIMM_CH1_DQ36 U20 IO, LVDS3C_26N, DQ44 IO, LVDS3C_2N, DQ40 G20 QSFPDD0_FPGA_LED2 42 DDR4_DIMM_CH1_TDQS_N13 V21 IO, LVDS3C_26P, DQ44 IO, LVDS3C_2P, DQ40 H21 QSFPDD1_FPGA_LED0 42 DDR4_DIMM_CH1_DBI_N4 T21 IO, LVDS3C_27N, DQ44 IO, LVDS3C_3N, DQ40 F21 QSFPDD1_FPGA_LED1 42 DDR4_DIMM_CH1_DQS_N4 W22 IO, LVDS3C_27P, DQ44 IO, LVDS3C_3P, DQ40 J22 QSFPDD1_FPGA_LED2 42 DDR4_DIMM_CH1_DQS_P4 U22 IO, LVDS3C_28N, DQSN44 IO, LVDS3C_4N, DQSN40 G22 DDR4_DIMM_CH1_DQ35 V23 IO, LVDS3C_28P, DQS44 IO, LVDS3C_4P, DQS40 H23 DDR4_DIMM_CH1_DQ34 T23 IO, LVDS3C_29N, DQ44 IO, LVDS3C_5N, DQ40 F23 DDR4_DIMM_CH1_DQ33 W24 IO, LVDS3C_29P, DQ44 IO, LVDS3C_5P, DQ40 J24 FPGA_I2C_SCL 40 DDR4_DIMM_CH1_DQ32 U24 IO, LVDS3C_30N, DQ44 IO, LVDS3C_6N, DQ40 G24 DDR4_DIMM_CH1_DQ45 P19 IO, LVDS3C_30P, DQ44 IO, LVDS3C_6P, DQ40 D19 DDR4_DIMM_CH1_DQ47 M19 IO, LVDS3C_31N, DQ45 IO, LVDS3C_7N, DQ41 B19 FPGA_I2C_SDA 40 DDR4_CH1_EVENT_N 12 DDR4_DIMM_CH1_DQ46 N20 IO, LVDS3C_31P, DQ45 IO, LVDS3C_7P, DQ41 C20 DDR4_DIMM_CH1_DQ44 L20 IO, LVDS3C_32N, DQ45 IO, LVDS3C_8N, DQ41 A20 DDR4_CH1_SAVE_N 12 DDR4_DIMM_CH1_TDQS_N14 P21 IO, LVDS3C_32P, DQ45 IO, LVDS3C_8P, DQ41 D21 DDR4_CH0_EVENT_N 9 DDR4_DIMM_CH1_DBI_N5 M21 IO, LVDS3C_33N, DQ45 IO, LVDS3C_9N, DQ41 B21 DDR4_CH0_SAVE_N 9 DDR4_DIMM_CH1_DQS_N5 N22 IO, LVDS3C_33P, DQ45 IO, LVDS3C_9P, DQ41 C22 DDR4_DIMM_SDA 9 DDR4_DIMM_CH1_DQS_P5 L22 IO, PLL_3C_B_CLKOUT1N, LVDS3C_34N, DQSN45 IO, PLL_3C_T_CLKOUT1N, LVDS3C_10N, DQSN41 A22 DDR4_DIMM_CH1_DQ43 P23 IO, PLL_3C_B_CLKOUT1P, PLL_3C_B_CLKOUT1, PLL_3C_B_FB1, LVDS3C_34P, DQS45 IO, PLL_3C_T_CLKOUT1P, PLL_3C_T_CLKOUT1, PLL_3C_T_FB1, LVDS3C_10P, DQS41 D23 DDR4_DIMM_CH1_DQ42 M23 IO, LVDS3C_35N, DQ45 IO, LVDS3C_11N, DQ41 B23 DDR4_DIMM_CH1_DQ41 N24 IO, RZQ_B_3C, LVDS3C_35P, DQ45 IO, RZQ_T_3C, LVDS3C_11P, DQ41 C24 DDR4_DIMM_SCL 9 DDR4_DIMM_CH1_DQ40 L24 IO, CLK_B_3C_1N, LVDS3C_36N, DQ45 IO, CLK_T_3C_1N, LVDS3C_12N, DQ41 A24 C CPU_RESETn 41,44 C DDR4_DIMM_CH1_DQ61 IO, CLK_B_3C_1P, LVDS3C_36P, DQ45 IO, CLK_T_3C_1P, LVDS3C_12P, DQ41 W26 J26 CLK_SYS_BAK_50M_N 38 DDR4_DIMM_CH1_DQ63 IO, CLK_B_3C_0N, LVDS3C_37N, DQ46 IO, CLK_T_3C_0N, LVDS3C_13N, DQ42 U26 G26 CLK_SYS_BAK_50M_P 38 DDR4_DIMM_CH1_DQ62 V27 IO, CLK_B_3C_0P, LVDS3C_37P, DQ46 IO, CLK_T_3C_0P, LVDS3C_13P, DQ42 H27 DDR4_DIMM_CH1_DQ60 T27 IO, LVDS3C_38N, DQ46 IO, LVDS3C_14N, DQ42 F27 R31 100 DDR4_DIMM_CH1_TDQS_N16 W28 IO, LVDS3C_38P, DQ46 IO, LVDS3C_14P, DQ42 J28 DDR4_DIMM_CH1_DBI_N7 U28 IO, PLL_3C_B_CLKOUT0N, LVDS3C_39N, DQ46 IO, PLL_3C_T_CLKOUT0N, LVDS3C_15N, DQ42 G28 DDR4_DIMM_CH1_DQS_N7 V29 IO, PLL_3C_B_CLKOUT0P, PLL_3C_B_CLKOUT0, PLL_3C_B_FB0, LVDS3C_39P, DQ46 IO, PLL_3C_T_CLKOUT0P, PLL_3C_T_CLKOUT0, PLL_3C_T_FB0, LVDS3C_15P, DQ42 H29 QSFPDD_FPGA_I2C_SDA 12 DDR4_DIMM_CH1_DQS_P7 T29 IO, LVDS3C_40N, DQSN46 IO, LVDS3C_16N, DQSN42 F29 DDR4_DIMM_CH1_DQ59 W30 IO, LVDS3C_40P, DQS46 IO, LVDS3C_16P, DQS42 J30 DDR4_DIMM_CH1_DQ58 U30 IO, LVDS3C_41N, DQ46 IO, LVDS3C_17N, DQ42 G30 QSFPDD0_1V2_RESET_L 44 DDR4_DIMM_CH1_DQ57 V31 IO, LVDS3C_41P, DQ46 IO, LVDS3C_17P, DQ42 H31 QSFPDD0_1V2_MODPRS_L 44 DDR4_DIMM_CH1_DQ56 T31 IO, LVDS3C_42N, DQ46 IO, LVDS3C_18N, DQ42 F31 QSFPDD0_1V2_LPMODE 44 DDR4_DIMM_CH1_DQ55 N26 IO, LVDS3C_42P, DQ46 IO, LVDS3C_18P, DQ42 C26 QSFPDD0_1V2_INT_L 44 DDR4_DIMM_CH1_DQ54 L26 IO, LVDS3C_43N, DQ47 IO, LVDS3C_19N, DQ43 A26 QSFPDD0_1V2_MODSEL_L 44 DDR4_DIMM_CH1_DQ53 P27 IO, LVDS3C_43P, DQ47 IO, LVDS3C_19P, DQ43 D27 QSFPDD1_1V2_RESET_L 44 DDR4_DIMM_CH1_DQ52 M27 IO, LVDS3C_44N, DQ47 IO, LVDS3C_20N, DQ43 B27 QSFPDD1_1V2_MODPRS_L 44 DDR4_DIMM_CH1_TDQS_N15 N28 IO, LVDS3C_44P, DQ47 IO, LVDS3C_20P, DQ43 C28 QSFPDD1_1V2_MODSEL_L 44 DDR4_DIMM_CH1_DBI_N6 L28 IO, LVDS3C_45N, DQ47 IO, LVDS3C_21N, DQ43 A28 QSFPDD1_1V2_INT_L 44 DDR4_DIMM_CH1_DQS_N6 P29 IO, LVDS3C_45P, DQ47 IO, LVDS3C_21P, DQ43 D29 QSFPDD1_1V2_LPMODE 44 DDR4_DIMM_CH1_DQS_P6 M29 IO, LVDS3C_46N, DQSN47 IO, LVDS3C_22N, DQSN43 B29 QSFPDD_FPGA_I2C_SCL 12 DDR4_DIMM_CH1_DQ51 N30 IO, LVDS3C_46P, DQS47 IO, LVDS3C_22P, DQS43 C30 DDR4_DIMM_CH1_DQ50 L30 IO, LVDS3C_47N, DQ47 IO, LVDS3C_23N, DQ43 A30 FPGA_LED0 44 DDR4_DIMM_CH1_DQ49 P31 IO, LVDS3C_47P, DQ47 IO, LVDS3C_23P, DQ43 D31 FPGA_LED1 44 DDR4_DIMM_CH1_DQ48 M31 IO, LVDS3C_48N, DQ47 IO, LVDS3C_24N, DQ43 B31 FPGA_LED2 44 B IO, LVDS3C_48P, DQ47 IO, LVDS3C_24P, DQ43 FPGA_LED3 44 B R32 10.0K BOT TOP R33 10.0K R34 10.0K R35 10.0K Bank 3C

AGFB014R24_2486A 1p2V_DDR4_CH01

R36 10.0K DDR4_DIMM_SCL 1p2V_DDR4_CH01 R37 10.0K DDR4_DIMM_SDA 12,14 DDR4_DIMM_CH1_DBI_N[8:0] R38 10.0K QSFPDD0_1V2_RESET_L R49 10.0K DDR4_CH0_EVENT_N R39 10.0K QSFPDD1_1V2_RESET_L 12,14 DDR4_DIMM_CH1_DQ[71:0] R50 10.0K DDR4_CH0_SAVE_N R40 10.0K QSFPDD0_1V2_MODSEL_L R672 10.0K DDR4_CH1_EVENT_N R41 10.0K QSFPDD1_1V2_MODSEL_L 12,14 DDR4_DIMM_CH1_DQS_P[8:0] R673 10.0K DDR4_CH1_SAVE_N R42 DNI QSFPDD0_1V2_LPMODE R43 DNI R44 DNI QSFPDD1_1V2_LPMODE R45 DNI 12,14 DDR4_DIMM_CH1_DQS_N[8:0] R46 4.7K QSFPDD_FPGA_I2C_SCL R47 4.7K QSFPDD_FPGA_I2C_SDA A 12,14 DDR4_DIMM_CH1_TDQS_N[17:9] A

U2F D D

DDR4_DIMM_CH1_DQ71 V5 H5 DDR4_DIMM_CH1_DQ15 DDR4_DIMM_CH1_DQ70 T5 IO, LVDS3D_25N, DQ36 IO, LVDS3D_1N, DQ32 F5 DDR4_DIMM_CH1_DQ14 DDR4_DIMM_CH1_DQ69 W6 IO, LVDS3D_25P, DQ36 IO, LVDS3D_1P, DQ32 J6 DDR4_DIMM_CH1_DQ13 DDR4_DIMM_CH1_DQ68 U6 IO, LVDS3D_26N, DQ36 IO, LVDS3D_2N, DQ32 G6 DDR4_DIMM_CH1_DQ12 DDR4_DIMM_CH1_TDQS_N17 V7 IO, LVDS3D_26P, DQ36 IO, LVDS3D_2P, DQ32 H7 DDR4_DIMM_CH1_TDQS_N10 DDR4_DIMM_CH1_DBI_N8 T7 IO, LVDS3D_27N, DQ36 IO, LVDS3D_3N, DQ32 F7 DDR4_DIMM_CH1_DBI_N1 DDR4_DIMM_CH1_DQS_N8 W8 IO, LVDS3D_27P, DQ36 IO, LVDS3D_3P, DQ32 J8 DDR4_DIMM_CH1_DQS_N1 DDR4_DIMM_CH1_DQS_P8 U8 IO, LVDS3D_28N, DQSN36 IO, LVDS3D_4N, DQSN32 G8 DDR4_DIMM_CH1_DQS_P1 DDR4_DIMM_CH1_DQ67 V9 IO, LVDS3D_28P, DQS36 IO, LVDS3D_4P, DQS32 H9 DDR4_DIMM_CH1_DQ11 DDR4_DIMM_CH1_DQ66 T9 IO, LVDS3D_29N, DQ36 IO, LVDS3D_5N, DQ32 F9 DDR4_DIMM_CH1_DQ10 DDR4_DIMM_CH1_DQ65 W10 IO, LVDS3D_29P, DQ36 IO, LVDS3D_5P, DQ32 J10 DDR4_DIMM_CH1_DQ9 DDR4_DIMM_CH1_DQ64 U10 IO, LVDS3D_30N, DQ36 IO, LVDS3D_6N, DQ32 G10 DDR4_DIMM_CH1_DQ8 DDR4_DIMM_CH1_BG0 P5 IO, LVDS3D_30P, DQ36 IO, LVDS3D_6P, DQ32 D5 DDR4_DIMM_CH1_DQ7 DDR4_DIMM_CH1_BA1 M5 IO, LVDS3D_31N, DQ37 IO, LVDS3D_7N, DQ33 B5 DDR4_DIMM_CH1_DQ5 DDR4_DIMM_CH1_BA0 N6 IO, LVDS3D_31P, DQ37 IO, LVDS3D_7P, DQ33 C6 DDR4_DIMM_CH1_DQ6 DDR4_DIMM_CH1_ALERT_N L6 IO, LVDS3D_32N, DQ37 IO, LVDS3D_8N, DQ33 A6 DDR4_DIMM_CH1_DQ4 DDR4_DIMM_CH1_A16 P7 IO, LVDS3D_32P, DQ37 IO, LVDS3D_8P, DQ33 D7 DDR4_DIMM_CH1_TDQS_N9 DDR4_DIMM_CH1_A15 M7 IO, LVDS3D_33N, DQ37 IO, LVDS3D_9N, DQ33 B7 DDR4_DIMM_CH1_DBI_N0 DDR4_DIMM_CH1_A14 N8 IO, LVDS3D_33P, DQ37 IO, LVDS3D_9P, DQ33 C8 DDR4_DIMM_CH1_DQS_N0 DDR4_DIMM_CH1_A13 L8 IO, PLL_3D_B_CLKOUT1N, LVDS3D_34N, DQSN37 IO, PLL_3D_T_CLKOUT1N, LVDS3D_10N, DQSN33 A8 DDR4_DIMM_CH1_DQS_P0 DDR4_DIMM_CH1_A12 P9 IO, PLL_3D_B_CLKOUT1P, PLL_3D_B_CLKOUT1, PLL_3D_B_FB1, LVDS3D_34P, DQS37 IO, PLL_3D_T_CLKOUT1P, PLL_3D_T_CLKOUT1, PLL_3D_T_FB1, LVDS3D_10P, DQS33 D9 DDR4_DIMM_CH1_DQ3 C C 240 R48 DDR4_DIMM_CH1_RZQ M9 IO, LVDS3D_35N, DQ37 IO, LVDS3D_11N, DQ33 B9 DDR4_DIMM_CH1_DQ2 IO, RZQ_B_3D, LVDS3D_35P, DQ37 IO, RZQ_T_3D, LVDS3D_11P, DQ33 CLK_DDR4_CH1_N 38 N10 C10 DDR4_DIMM_CH1_DQ1 CLK_DDR4_CH1_P 38 L10 IO, CLK_B_3D_1N, LVDS3D_36N, DQ37 IO, CLK_T_3D_1N, LVDS3D_12N, DQ33 A10 DDR4_DIMM_CH1_DQ0 DDR4_DIMM_CH1_A11 W12 IO, CLK_B_3D_1P, LVDS3D_36P, DQ37 IO, CLK_T_3D_1P, LVDS3D_12P, DQ33 J12 DDR4_DIMM_CH1_DQ21 DDR4_DIMM_CH1_A10 U12 IO, CLK_B_3D_0N, LVDS3D_37N, DQ38 IO, CLK_T_3D_0N, LVDS3D_13N, DQ34 G12 DDR4_DIMM_CH1_DQ23 DDR4_DIMM_CH1_A9 V13 IO, CLK_B_3D_0P, LVDS3D_37P, DQ38 IO, CLK_T_3D_0P, LVDS3D_13P, DQ34 H13 DDR4_DIMM_CH1_DQ22 DDR4_DIMM_CH1_A8 T13 IO, LVDS3D_38N, DQ38 IO, LVDS3D_14N, DQ34 F13 DDR4_DIMM_CH1_DQ20 DDR4_DIMM_CH1_A7 W14 IO, LVDS3D_38P, DQ38 IO, LVDS3D_14P, DQ34 J14 DDR4_DIMM_CH1_TDQS_N11 DDR4_DIMM_CH1_A6 U14 IO, PLL_3D_B_CLKOUT0N, LVDS3D_39N, DQ38 IO, PLL_3D_T_CLKOUT0N, LVDS3D_15N, DQ34 G14 DDR4_DIMM_CH1_DBI_N2 DDR4_DIMM_CH1_A5 V15 IO, PLL_3D_B_CLKOUT0P, PLL_3D_B_CLKOUT0, PLL_3D_B_FB0, LVDS3D_39P, DQ38 IO, PLL_3D_T_CLKOUT0P, PLL_3D_T_CLKOUT0, PLL_3D_T_FB0, LVDS3D_15P, DQ34 H15 DDR4_DIMM_CH1_DQS_N2 DDR4_DIMM_CH1_A4 T15 IO, LVDS3D_40N, DQSN38 IO, LVDS3D_16N, DQSN34 F15 DDR4_DIMM_CH1_DQS_P2 DDR4_DIMM_CH1_A3 W16 IO, LVDS3D_40P, DQS38 IO, LVDS3D_16P, DQS34 J16 DDR4_DIMM_CH1_DQ19 DDR4_DIMM_CH1_A2 U16 IO, LVDS3D_41N, DQ38 IO, LVDS3D_17N, DQ34 G16 DDR4_DIMM_CH1_DQ18 DDR4_DIMM_CH1_A1 V17 IO, LVDS3D_41P, DQ38 IO, LVDS3D_17P, DQ34 H17 DDR4_DIMM_CH1_DQ17 DDR4_DIMM_CH1_A0 T17 IO, LVDS3D_42N, DQ38 IO, LVDS3D_18N, DQ34 F17 DDR4_DIMM_CH1_DQ16 DDR4_DIMM_CH1_PAR N12 IO, LVDS3D_42P, DQ38 IO, LVDS3D_18P, DQ34 C12 DDR4_DIMM_CH1_DQ31 DDR4_DIMM_CH1_CS_N1 L12 IO, LVDS3D_43N, DQ39 IO, LVDS3D_19N, DQ35 A12 DDR4_DIMM_CH1_DQ30 DDR4_DIMM_CH1_CK_N0 P13 IO, LVDS3D_43P, DQ39 IO, LVDS3D_19P, DQ35 D13 DDR4_DIMM_CH1_DQ29 DDR4_DIMM_CH1_CK_P0 M13 IO, LVDS3D_44N, DQ39 IO, LVDS3D_20N, DQ35 B13 DDR4_DIMM_CH1_DQ28 DDR4_DIMM_CH1_CKE1 N14 IO, LVDS3D_44P, DQ39 IO, LVDS3D_20P, DQ35 C14 DDR4_DIMM_CH1_TDQS_N12 DDR4_DIMM_CH1_CKE0 L14 IO, LVDS3D_45N, DQ39 IO, LVDS3D_21N, DQ35 A14 DDR4_DIMM_CH1_DBI_N3 DDR4_DIMM_CH1_ODT1 P15 IO, LVDS3D_45P, DQ39 IO, LVDS3D_21P, DQ35 D15 DDR4_DIMM_CH1_DQS_N3 DDR4_DIMM_CH1_ODT0 M15 IO, LVDS3D_46N, DQSN39 IO, LVDS3D_22N, DQSN35 B15 DDR4_DIMM_CH1_DQS_P3 IO, LVDS3D_46P, DQS39 IO, LVDS3D_22P, DQS35 B DDR4_DIMM_CH1_ACT_N N16 C16 DDR4_DIMM_CH1_DQ27 B DDR4_DIMM_CH1_CS_N0 L16 IO, LVDS3D_47N, DQ39 IO, LVDS3D_23N, DQ35 A16 DDR4_DIMM_CH1_DQ26 DDR4_DIMM_CH1_RESET_N P17 IO, LVDS3D_47P, DQ39 IO, LVDS3D_23P, DQ35 D17 DDR4_DIMM_CH1_DQ25 DDR4_DIMM_CH1_BG1 M17 IO, LVDS3D_48N, DQ39 IO, LVDS3D_24N, DQ35 B17 DDR4_DIMM_CH1_DQ24 IO, LVDS3D_48P, DQ39 IO, LVDS3D_24P, DQ35

BOT TOP Bank 3D

12 DDR4_DIMM_CH1_CK_P0 AGFB014R24_2486A 12 DDR4_DIMM_CH1_CK_N0

12 DDR4_DIMM_CH1_CKE[1:0]

12 DDR4_DIMM_CH1_A[16:0] 12 DDR4_DIMM_CH1_ODT[1:0] CLK_DDR4_CH1_P R53 DNI CLK_DDR4_CH1_N 12 DDR4_DIMM_CH1_BG[1:0] 12 DDR4_DIMM_CH1_BA[1:0] 12,13 DDR4_DIMM_CH1_DBI_N[8:0] 12 DDR4_DIMM_CH1_CS_N[1:0] A 12,13 DDR4_DIMM_CH1_DQ[71:0] A 12 DDR4_DIMM_CH1_RESET_N 12 DDR4_DIMM_CH1_ACT_N 12,13 DDR4_DIMM_CH1_DQS_P[8:0] 12 DDR4_DIMM_CH1_PAR Intel Corporation,101 innovation Dr, San Jose, CA 95134 12 DDR4_DIMM_CH1_ALERT_N 12,13 DDR4_DIMM_CH1_DQS_N[8:0] Title 12,13 DDR4_DIMM_CH1_TDQS_N[17:9] AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 14of 66 5 4 3 2 1 5 4 3 2 1

12V_G1 R54 0 J3A 1p2V_DDR4_CH23 DDR4/DDRT Single DIMM CH2 0p6V_VREF_DDR4_CH23 J3B R55 0 1 145 x72bit DIMM Only 2 12V/NC 12V/NC 146 DDR4_DIMM_CH2_DQ4 3 Vss Vrefca 147 DDR4_DIMM2_EVENT_N 78 222 DDR4_DIMM_CH2_PAR 1p2V_DDR4_CH23 4 DQ4 Vss 148 DDR4_DIMM_CH2_DQ5 DDR4_DIMM_CH2_A0 79 EVENT_n PARITY 223 DDR4_DIMM_CH2_DQ0 5 Vss DQ5 149 80 A0 Vdd 224 DDR4_DIMM_CH2_BA1 DQ0 Vss Vdd BA1 6 150 DDR4_DIMM_CH2_DQ1 DDR4_DIMM_CH2_BA0 81 225 DDR4_DIMM_CH2_A10 2p5V 1p2V_DDR4_CH23 DDR4_DIMM_CH2_DBI_N0 7 Vss DQ1 151 DDR4_DIMM_CH2_A16 82 BA0 A10/AP 226 DDR4_DIMM_CH2_TDQS_N9 8 DQS9_t/DM0_n/DBI0_n Vss 152 DDR4_DIMM_CH2_DQS_N0 83 RAS_n/A16 Vdd 227 DQS9_c DQS0_c Vdd RFU3 D 9 153 DDR4_DIMM_CH2_DQS_P0 DDR4_DIMM_CH2_CS_N0 84 228 DDR4_DIMM_CH2_A14 C73 C74 C75 D DDR4_DIMM_CH2_DQ6 10 Vss DQS0_t 154 85 S0_n WE_n/A14 229 11 DQ6 Vss 155 DDR4_DIMM_CH2_DQ7 DDR4_DIMM_CH2_A15 86 Vdd Vdd 230 DDR4_DIMM2_SAVE_N 1uF 0.1uF 0.1uF DDR4_DIMM_CH2_DQ2 12 Vss DQ7 156 DDR4_DIMM_CH2_ODT0 87 CAS_n/A15 SAVE_n/NC 231 13 DQ2 Vss 157 DDR4_DIMM_CH2_DQ3 88 ODT0 Vdd 232 DDR4_DIMM_CH2_A13 U4 DDR4_DIMM_CH2_DQ12 14 Vss DQ3 158 DDR4_DIMM_CH2_CS_N1 89 Vdd A13 233 14 1 15 DQ12 Vss 159 DDR4_DIMM_CH2_DQ13 90 S1_n Vdd 234 DDR4_DIMM_CH2_A17 DDR4_DIMM2_EVENT_N 13 VCC VL 2 DDR4_CH2_EVENT_N DDR4_DIMM_CH2_DQ8 16 Vss DQ13 160 DDR4_DIMM_CH2_ODT1 91 Vdd A17/NC 235 DDR4_DIMM_CH2_C2 DDR4_DIMM2_SAVE_N 12 IOVCC1IOVL1 3 DDR4_CH2_SAVE_N 17 DQ8 Vss 161 DDR4_DIMM_CH2_DQ9 92 ODT1 C2/NC 236 DDR4_DIMM3_EVENT_N 11 IOVCC2IOVL2 4 DDR4_CH3_EVENT_N DDR4_DIMM_CH2_DBI_N1 18 Vss DQ9 162 DDR4_DIMM_CH2_CS_N2 93 Vdd Vdd 237 DDR4_DIMM_CH2_CS_N3 DDR4_DIMM3_SAVE_N 10 IOVCC3IOVL3 5 DDR4_CH3_SAVE_N DQS10_t/DM1_n/DBI1_n Vss S2_n/C0 S3_n/C1 IOVCC4IOVL4 DDR4_DIMM_CH2_TDQS_N10 19 163 DDR4_DIMM_CH2_DQS_N1 94 238 DDR4_DIMM_CH2_SA2 1p2V_DDR4_CH23 9 6 20 DQS10_c DQS1_c 164 DDR4_DIMM_CH2_DQS_P1 DDR4_DIMM_CH2_DQ36 95 Vss SA2/RFU 239 8 NC1 NC0 7 DDR4_DIMM_CH2_DQ14 21 Vss DQS1_t 165 96 DQ36 Vss 240 DDR4_DIMM_CH2_DQ37 TSn GND DQ14 Vss DDR4_DIMM_CH2_DQ15 DDR4_DIMM_CH2_DQ32 Vss DQ37 22 166 97 241 MAX3378E DDR4_DIMM_CH2_DQ10 23 Vss DQ15 167 98 DQ32 Vss 242 DDR4_DIMM_CH2_DQ33 24 DQ10 Vss 168 DDR4_DIMM_CH2_DQ11 DDR4_DIMM_CH2_DBI_N4 99 Vss DQ33 243 DDR4_DIMM_CH2_DQ20 25 Vss DQ11 169 DDR4_DIMM_CH2_TDQS_N13100 DQS13_t/DM4_n/DBI4_n Vss 244 DDR4_DIMM_CH2_DQS_N4 26 DQ20 Vss 170 DDR4_DIMM_CH2_DQ21 101 DQS13_c DQS4_c 245 DDR4_DIMM_CH2_DQS_P4 DDR4_DIMM_CH2_DQ16 27 Vss DQ21 171 DDR4_DIMM_CH2_DQ38 102 Vss DQS4_t 246 28 DQ16 Vss 172 DDR4_DIMM_CH2_DQ17 103 DQ38 Vss 247 DDR4_DIMM_CH2_DQ39 DDR4_DIMM_CH2_DBI_N2 29 Vss DQ17 173 DDR4_DIMM_CH2_DQ34 104 Vss DQ39 248 DDR4_DIMM_CH2_TDQS_N11 30 DQS11_t/DM2_n/DBI2_n Vss 174 DDR4_DIMM_CH2_DQS_N2 105 DQ34 Vss 249 DDR4_DIMM_CH2_DQ35 31 DQS11_c DQS2_c 175 DDR4_DIMM_CH2_DQS_P2 DDR4_DIMM_CH2_DQ44 106 Vss DQ35 250 DDR4_DIMM_CH2_DQ22 32 Vss DQS2_t 176 107 DQ44 Vss 251 DDR4_DIMM_CH2_DQ45 C DDR4 DIMM IF C 33 DQ22 Vss 177 DDR4_DIMM_CH2_DQ23 DDR4_DIMM_CH2_DQ40 108 Vss DQ45 252 DDR4_DIMM_CH2_DQ18 34 Vss DQ23 178 109 DQ40 Vss 253 DDR4_DIMM_CH2_DQ41 17 DDR4_DIMM_CH2_A[17:0] 35 DQ18 Vss 179 DDR4_DIMM_CH2_DQ19 DDR4_DIMM_CH2_DBI_N5 110 Vss DQ41 254 2p5V DDR4_DIMM_CH2_DQ28 36 Vss DQ19 180 DDR4_DIMM_CH2_TDQS_N14111 DQS14_t/DM5_n/DBI5_n Vss 255 DDR4_DIMM_CH2_DQS_N5 17 DDR4_DIMM_CH2_CK_P[1:0] 37 DQ28 Vss 181 DDR4_DIMM_CH2_DQ29 112 DQS14_c DQS5_c 256 DDR4_DIMM_CH2_DQS_P5 DDR4_DIMM2_EVENT_N R56 DNI 17 DDR4_DIMM_CH2_CK_N[1:0] DDR4_DIMM_CH2_DQ24 38 Vss DQ29 182 DDR4_DIMM_CH2_DQ46 113 Vss DQS5_t 257 DDR4_DIMM2_SAVE_N R57 10.0K 17 DDR4_DIMM_CH2_CKE[1:0] 39 DQ24 Vss 183 DDR4_DIMM_CH2_DQ25 114 DQ46 Vss 258 DDR4_DIMM_CH2_DQ47 DDR4_DIMM_CH2_DBI_N3 40 Vss DQ25 184 DDR4_DIMM_CH2_DQ42 115 Vss DQ47 259 17 DDR4_DIMM_CH2_RESET_N DDR4_DIMM_CH2_TDQS_N12 41 DQS12_t/DM3_n/DBI3_n Vss 185 DDR4_DIMM_CH2_DQS_N3 116 DQ42 Vss 260 DDR4_DIMM_CH2_DQ43 DDR4_DIMM_CH2_SA0 R58 0 17 DDR4_DIMM_CH2_ACT_N 42 DQS12_c DQS3_c 186 DDR4_DIMM_CH2_DQS_P3 DDR4_DIMM_CH2_DQ52 117 Vss DQ43 261 DDR4_DIMM_CH2_SA1 R59 10.0K 17 DDR4_DIMM_CH2_ODT[1:0] DDR4_DIMM_CH2_DQ30 43 Vss DQS3_t 187 118 DQ52 Vss 262 DDR4_DIMM_CH2_DQ53 DDR4_DIMM_CH2_SA2 R60 0 17 DDR4_DIMM_CH2_BG[1:0] 44 DQ30 Vss 188 DDR4_DIMM_CH2_DQ31 DDR4_DIMM_CH2_DQ48 119 Vss DQ53 263 17 DDR4_DIMM_CH2_BA[1:0] DDR4_DIMM_CH2_DQ26 45 Vss DQ31 189 120 DQ48 Vss 264 DDR4_DIMM_CH2_DQ49 I2C Addr: 0xA4 17 DDR4_DIMM_CH2_CS_N[3:0] 46 DQ26 Vss 190 DDR4_DIMM_CH2_DQ27 DDR4_DIMM_CH2_DBI_N6 121 Vss DQ49 265 17 DDR4_DIMM_CH2_PAR DDR4_DIMM_CH2_DQ68 47 Vss DQ27 191 DDR4_DIMM_CH2_TDQS_N15122 DQS15_t/DM6_n/DBI6_n Vss 266 DDR4_DIMM_CH2_DQS_N6 1p2V_DDR4_CH23 17 DDR4_DIMM_CH2_ALERT_N 48 CB4/NC Vss 192 DDR4_DIMM_CH2_DQ69 123 DQS15_c DQS6_c 267 DDR4_DIMM_CH2_DQS_P6 DDR4_DIMM_CH2_DQ64 49 Vss CB5/NC 193 DDR4_DIMM_CH2_DQ54 124 Vss DQS6_t 268 DDR4_DIMM_CH2_RESET_N R61 10.0K 16,17 DDR4_DIMM_CH2_DBI_N[8:0] 50 CB0/NC Vss 194 DDR4_DIMM_CH2_DQ65 125 DQ54 Vss 269 DDR4_DIMM_CH2_DQ55 R62 DNI DDR4_DIMM_CH2_DBI_N8 51 Vss CB1/NC 195 DDR4_DIMM_CH2_DQ50 126 Vss DQ55 270 16,17 DDR4_DIMM_CH2_DQ[71:0] DDR4_DIMM_CH2_TDQS_N17 52 DQS17_t/DM8_n/DBI8_n Vss 196 DDR4_DIMM_CH2_DQS_N8 127 DQ50 Vss 271 DDR4_DIMM_CH2_DQ51 53 DQS17_c DQS8_c 197 DDR4_DIMM_CH2_DQS_P8 DDR4_DIMM_CH2_DQ60 128 Vss DQ51 272 DDR4_DIMM_CH2_CKE0 R63 DNI 16,17 DDR4_DIMM_CH2_DQS_P[8:0] DDR4_DIMM_CH2_DQ70 54 Vss DQS8_t 198 129 DQ60 Vss 273 DDR4_DIMM_CH2_DQ61 55 CB6/NC Vss 199 DDR4_DIMM_CH2_DQ71 DDR4_DIMM_CH2_DQ56 130 Vss DQ61 274 DDR4_DIMM_CH2_CKE1 R64 DNI 16,17 DDR4_DIMM_CH2_DQS_N[8:0] Vss CB7/NC DQ56 Vss B DDR4_DIMM_CH2_DQ66 56 200 131 275 DDR4_DIMM_CH2_DQ57 B 57 CB2/NC Vss 201 DDR4_DIMM_CH2_DQ67 DDR4_DIMM_CH2_DBI_N7 132 Vss DQ57 276 16,17 DDR4_DIMM_CH2_TDQS_N[17:9] DDR4_DIMM_CH2_RESET_N 58 Vss CB3/NC 202 DDR4_DIMM_CH2_TDQS_N16133 DQS16_t/DM7_n/DBI7_n Vss 277 DDR4_DIMM_CH2_DQS_N7 59 RESET_n Vss 203 DDR4_DIMM_CH2_CKE1 134 DQS16_c DQS7_c 278 DDR4_DIMM_CH2_DQS_P7 1p2V_DDR4_CH23 9,12,18 DDR4D_SCL DDR4_DIMM_CH2_CKE0 60 Vdd CKE1 204 DDR4_DIMM_CH2_DQ62 135 Vss DQS7_t 279 9,12,18 DDR4D_SDA 61 CKE0 Vdd 205 136 DQ62 Vss 280 DDR4_DIMM_CH2_DQ63 DDR4_DIMM_CH2_ALERT_N R791 16 DDR4_CH2_EVENT_N DDR4_DIMM_CH2_ACT_N 62 Vdd RFU2 206 DDR4_DIMM_CH2_DQ58 137 Vss DQ63 281 10.0K 16 DDR4_CH2_SAVE_N DDR4_DIMM_CH2_BG0 63 ACT_n Vdd 207 DDR4_DIMM_CH2_BG1 138 DQ58 Vss 282 DDR4_DIMM_CH2_DQ59 64 BG0 BG1 208 DDR4_DIMM_CH2_ALERT_N DDR4_DIMM_CH2_SA0 139 Vss DQ59 283 2p5V 17 DDR4_DIMM_CH2_C2 DDR4_DIMM_CH2_A12 65 Vdd ALERT_n 209 DDR4_DIMM_CH2_SA1 140 SA0 Vss 284 DDR4_DIMM_CH2_A9 66 A12 Vdd 210 DDR4_DIMM_CH2_A11 DDR4D_SCL 141 SA1 Vddspd 285 DDR4D_SDA 16 DDR4_CH3_EVENT_N 67 A9 A11 211 DDR4_DIMM_CH2_A7 2p5V 142 SCL SDA 286 16 DDR4_CH3_SAVE_N DDR4_DIMM_CH2_A8 68 Vdd A7 212 143 Vpp Vpp 287 2p5V 18 DDR4_DIMM3_SAVE_N DDR4_DIMM_CH2_A6 69 A8 Vdd 213 DDR4_DIMM_CH2_A5 144 Vpp Vpp 288 R65 0 18 DDR4_DIMM3_EVENT_N 70 A6 A5 214 DDR4_DIMM_CH2_A4 RFU1 Vpp DDR4_DIMM_CH2_A3 71 Vdd A4 215 1p2V_DDR4_CH23 1p2V_DDR4_CH23 0p6V_VTT_DDR4_CH23 DDR4_DIMM_CH2_A1 72 A3 Vdd 216 DDR4_DIMM_CH2_A2 73 A1 A2 217 DDR4x72x288 DDR4_DIMM_CH2_CK_P0 74 Vdd Vdd 218 DDR4_DIMM_CH2_CK_P1 CK0_t CK1_t 1p2V_DDR4_CH23 DDR4_DIMM_CH2_CK_N0 75 219 DDR4_DIMM_CH2_CK_N1 C76 C77 C78 C79 C80 C81 C82 C83 C84 C85 C86 C87 C88 C89 76 CK0_c CK1_c 220 0p6V_VTT_DDR4_CH23 0p6V_VTT_DDR4_CH23 77 Vdd Vdd 221 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 100uF 1uF Vtt Vtt

DDR4x72x288 Put caps on VDD pins which are close to DIMM A/C pins A 1p2V_DDR4_CH23 0p6V_VREF_DDR4_CH23 0p6V_VTT_DDR4_CH23 A 2p5V C90 0.1uF C91 0.1uF C92 C93 Intel Corporation,101 innovation Dr, San Jose, CA 95134 100uF 100uF C94 C95 C96 C97 C98 C99 C100 0.1uF C101 10nF C104 1206 1206 100uF C105 C106 C107 Title 6.3V 6.3V 10uF 10uF 0.1uF 0.1uF 10nF 10nF C103 0.1uF 1206 AgileX F-Series FPGA Dev Kit X6T X6T 6.3V 10uF 0.1uF 10nF Copyright (c) 2014, Intel Corporation. All Rights Reserved. X6T Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 15of 66 5 4 3 2 1 5 4 3 2 1 DDR4/T CH2 INTERFACE -- FPGA SIDE 2A

U2E

D D

DDR4_DIMM_CH2_DQ6 CF57 CT57 DDR4_DIMM_CH2_DQ14 DDR4_DIMM_CH2_DQ7 CH57 IO, LVDS2A_25N, DQ28 IO, LVDS2A_1N, DQ24 CV57 DDR4_DIMM_CH2_DQ15 DDR4_DIMM_CH2_DQ4 CE56 IO, LVDS2A_25P, DQ28 IO, LVDS2A_1P, DQ24 CR56 DDR4_DIMM_CH2_DQ12 DDR4_DIMM_CH2_DQ5 CG56 IO, LVDS2A_26N, DQ28 IO, LVDS2A_2N, DQ24 CU56 DDR4_DIMM_CH2_DQ13 DDR4_DIMM_CH2_TDQS_N9 CF55 IO, LVDS2A_26P, DQ28 IO, LVDS2A_2P, DQ24 CT55 DDR4_DIMM_CH2_TDQS_N10 DDR4_DIMM_CH2_DBI_N0 CH55 IO, LVDS2A_27N, DQ28 IO, LVDS2A_3N, DQ24 CV55 DDR4_DIMM_CH2_DBI_N1 DDR4_DIMM_CH2_DQS_N0 CE54 IO, LVDS2A_27P, DQ28 IO, LVDS2A_3P, DQ24 CR54 DDR4_DIMM_CH2_DQS_N1 DDR4_DIMM_CH2_DQS_P0 CG54 IO, LVDS2A_28N, DQSN28 IO, LVDS2A_4N, DQSN24 CU54 DDR4_DIMM_CH2_DQS_P1 DDR4_DIMM_CH2_DQ1 CF53 IO, LVDS2A_28P, DQS28 IO, LVDS2A_4P, DQS24 CT53 DDR4_DIMM_CH2_DQ9 DDR4_DIMM_CH2_DQ3 CH53 IO, LVDS2A_29N, DQ28 IO, LVDS2A_5N, DQ24 CV53 DDR4_DIMM_CH2_DQ11 DDR4_DIMM_CH2_DQ0 CE52 IO, LVDS2A_29P, DQ28 IO, LVDS2A_5P, DQ24 CR52 DDR4_DIMM_CH2_DQ8 DDR4_DIMM_CH2_DQ2 CG52 IO, LVDS2A_30N, DQ28 IO, LVDS2A_6N, DQ24 CU52 DDR4_DIMM_CH2_DQ10 CK57 IO, LVDS2A_30P, DQ28 IO, LVDS2A_6P, DQ24 CY57 DDR4_DIMM_CH2_DQ20 CM57 IO, LVDS2A_31N, DQ29 IO, LVDS2A_7N, DQ25 DB57 DDR4_DIMM_CH2_DQ21 CL56 IO, LVDS2A_31P, DQ29 IO, LVDS2A_7P, DQ25 DA56 DDR4_DIMM_CH2_DQ22 CN56 IO, LVDS2A_32N, DQ29 IO, LVDS2A_8N, DQ25 DC56 DDR4_DIMM_CH2_DQ23 CK55 IO, LVDS2A_32P, DQ29 IO, LVDS2A_8P, DQ25 CY55 DDR4_DIMM_CH2_TDQS_N11 CM55 IO, LVDS2A_33N, DQ29 IO, LVDS2A_9N, DQ25 DB55 DDR4_DIMM_CH2_DBI_N2 CL54 IO, LVDS2A_33P, DQ29 IO, LVDS2A_9P, DQ25 DA54 DDR4_DIMM_CH2_DQS_N2 CN54 IO, PLL_2A_B_CLKOUT1N, LVDS2A_34N, DQSN29 IO, PLL_2A_T_CLKOUT1N, LVDS2A_10N, DQSN25 DC54 DDR4_DIMM_CH2_DQS_P2 CK53 IO, PLL_2A_B_CLKOUT1P, PLL_2A_B_CLKOUT1, PLL_2A_B_FB1, LVDS2A_34P, DQS29 IO, PLL_2A_T_CLKOUT1P, PLL_2A_T_CLKOUT1, PLL_2A_T_FB1, LVDS2A_10P, DQS25 CY53 DDR4_DIMM_CH2_DQ17 CM53 IO, LVDS2A_35N, DQ29 IO, LVDS2A_11N, DQ25 DB53 DDR4_DIMM_CH2_DQ18 C C CL52 IO, RZQ_B_2A, LVDS2A_35P, DQ29 IO, RZQ_T_2A, LVDS2A_11P, DQ25 DA52 DDR4_DIMM_CH2_DQ16 CN52 IO, CLK_B_2A_1N, LVDS2A_36N, DQ29 IO, CLK_T_2A_1N, LVDS2A_12N, DQ25 DC52 DDR4_DIMM_CH2_DQ19 CE50 IO, CLK_B_2A_1P, LVDS2A_36P, DQ29 IO, CLK_T_2A_1P, LVDS2A_12P, DQ25 CR50 DDR4_DIMM_CH2_DQ71 CG50 IO, CLK_B_2A_0N, LVDS2A_37N, DQ30 IO, CLK_T_2A_0N, LVDS2A_13N, DQ26 CU50 DDR4_DIMM_CH2_DQ69 CF49 IO, CLK_B_2A_0P, LVDS2A_37P, DQ30 IO, CLK_T_2A_0P, LVDS2A_13P, DQ26 CT49 DDR4_DIMM_CH2_DQ68 CH49 IO, LVDS2A_38N, DQ30 IO, LVDS2A_14N, DQ26 CV49 DDR4_DIMM_CH2_DQ70 CE48 IO, LVDS2A_38P, DQ30 IO, LVDS2A_14P, DQ26 CR48 DDR4_DIMM_CH2_TDQS_N17 CG48 IO, PLL_2A_B_CLKOUT0N, LVDS2A_39N, DQ30 IO, PLL_2A_T_CLKOUT0N, LVDS2A_15N, DQ26 CU48 DDR4_DIMM_CH2_DBI_N8 CF47 IO, PLL_2A_B_CLKOUT0P, PLL_2A_B_CLKOUT0, PLL_2A_B_FB0, LVDS2A_39P, DQ30 IO, PLL_2A_T_CLKOUT0P, PLL_2A_T_CLKOUT0, PLL_2A_T_FB0, LVDS2A_15P, DQ26 CT47 DDR4_DIMM_CH2_DQS_N8 CH47 IO, LVDS2A_40N, DQSN30 IO, LVDS2A_16N, DQSN26 CV47 DDR4_DIMM_CH2_DQS_P8 CE46 IO, LVDS2A_40P, DQS30 IO, LVDS2A_16P, DQS26 CR46 DDR4_DIMM_CH2_DQ66 CG46 IO, LVDS2A_41N, DQ30 IO, LVDS2A_17N, DQ26 CU46 DDR4_DIMM_CH2_DQ64 CF45 IO, LVDS2A_41P, DQ30 IO, LVDS2A_17P, DQ26 CT45 DDR4_DIMM_CH2_DQ65 CH45 IO, LVDS2A_42N, DQ30 IO, LVDS2A_18N, DQ26 CV45 DDR4_DIMM_CH2_DQ67 CL50 IO, LVDS2A_42P, DQ30 IO, LVDS2A_18P, DQ26 DA50 DDR4_DIMM_CH2_DQ29 51 GPIO_TRIG_OUT CN50 IO, LVDS2A_43N, DQ31 IO, LVDS2A_19N, DQ27 DC50 DDR4_DIMM_CH2_DQ28 CK49 IO, LVDS2A_43P, DQ31 IO, LVDS2A_19P, DQ27 CY49 DDR4_DIMM_CH2_DQ31 CM49 IO, LVDS2A_44N, DQ31 IO, LVDS2A_20N, DQ27 DB49 DDR4_DIMM_CH2_DQ30 CL48 IO, LVDS2A_44P, DQ31 IO, LVDS2A_20P, DQ27 DA48 DDR4_DIMM_CH2_TDQS_N12 CN48 IO, LVDS2A_45N, DQ31 IO, LVDS2A_21N, DQ27 DC48 DDR4_DIMM_CH2_DBI_N3 IO, LVDS2A_45P, DQ31 IO, LVDS2A_21P, DQ27 DDR4_DIMM_CH2_DQS_N3 51 GPIO_TRIG_IN CK47 CY47 CM47 IO, LVDS2A_46N, DQSN31 IO, LVDS2A_22N, DQSN27 DB47 DDR4_DIMM_CH2_DQS_P3 CL46 IO, LVDS2A_46P, DQS31 IO, LVDS2A_22P, DQS27 DA46 DDR4_DIMM_CH2_DQ24 15 DDR4_CH2_SAVE_N IO, LVDS2A_47N, DQ31 IO, LVDS2A_23N, DQ27 DDR4_DIMM_CH2_DQ25 B 15 DDR4_CH2_EVENT_N CN46 DC46 B CK45 IO, LVDS2A_47P, DQ31 IO, LVDS2A_23P, DQ27 CY45 DDR4_DIMM_CH2_DQ27 15 DDR4_CH3_SAVE_N CM45 IO, LVDS2A_48N, DQ31 IO, LVDS2A_24N, DQ27 DB45 DDR4_DIMM_CH2_DQ26 15 DDR4_CH3_EVENT_N IO, LVDS2A_48P, DQ31 IO, LVDS2A_24P, DQ27

BOT TOP Bank 2A

AGFB014R24_2486A

15,17 DDR4_DIMM_CH2_DBI_N[8:0]

15,17 DDR4_DIMM_CH2_DQ[71:0] 1p2V_DDR4_CH23

15,17 DDR4_DIMM_CH2_DQS_P[8:0] R674 10.0K DDR4_CH2_EVENT_N A R675 10.0K DDR4_CH2_SAVE_N A 15,17 DDR4_DIMM_CH2_DQS_N[8:0] R676 10.0K DDR4_CH3_EVENT_N R677 10.0K DDR4_CH3_SAVE_N 15,17 DDR4_DIMM_CH2_TDQS_N[17:9] Intel Corporation,101 innovation Dr, San Jose, CA 95134 Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 16of 66 5 4 3 2 1 5 4 3 2 1

DDR4/T CH2 INTERFACE -- FPGA SIDE 2B U2D

DDRT:ERID2 DDR4_DIMM_CH2_CK_N1 CF43 CT43 DDR4_DIMM_CH2_DQ39 DDRT:ERID0 DDR4_DIMM_CH2_CK_P1 CH43 IO, LVDS2B_25N, DQ20 IO, LVDS2B_1N, DQ16 CV43 DDR4_DIMM_CH2_DQ37 D CE42 IO, LVDS2B_25P, DQ20 IO, LVDS2B_1P, DQ16 CR42 DDR4_DIMM_CH2_DQ38 D DDRT:NC DDR4_DIMM_CH2_ALERT_N CG42 IO, LVDS2B_26N, DQ20 IO, LVDS2B_2N, DQ16 CU42 DDR4_DIMM_CH2_DQ36 CF41 IO, LVDS2B_26P, DQ20 IO, LVDS2B_2P, DQ16 CT41 DDR4_DIMM_CH2_TDQS_N13 CH41 IO, LVDS2B_27N, DQ20 IO, LVDS2B_3N, DQ16 CV41 DDR4_DIMM_CH2_DBI_N4 CE40 IO, LVDS2B_27P, DQ20 IO, LVDS2B_3P, DQ16 CR40 DDR4_DIMM_CH2_DQS_N4 CG40 IO, LVDS2B_28N, DQSN20 IO, LVDS2B_4N, DQSN16 CU40 DDR4_DIMM_CH2_DQS_P4 CF39 IO, LVDS2B_28P, DQS20 IO, LVDS2B_4P, DQS16 CT39 DDR4_DIMM_CH2_DQ32 DDRT:C3 DDR4_DIMM_CH2_C2 CH39 IO, LVDS2B_29N, DQ20 IO, LVDS2B_5N, DQ16 CV39 DDR4_DIMM_CH2_DQ33 DDRT:C2 DDR4_DIMM_CH2_CS_N3 CE38 IO, LVDS2B_29P, DQ20 IO, LVDS2B_5P, DQ16 CR38 DDR4_DIMM_CH2_DQ35 DDRT:C1 DDR4_DIMM_CH2_CS_N2 CG38 IO, LVDS2B_30N, DQ20 IO, LVDS2B_6N, DQ16 CU38 DDR4_DIMM_CH2_DQ34 DDR4_DIMM_CH2_BG0 CK43 IO, LVDS2B_30P, DQ20 IO, LVDS2B_6P, DQ16 CY43 DDR4_DIMM_CH2_DQ47 DDR4_DIMM_CH2_BA1 CM43 IO, LVDS2B_31N, DQ21 IO, LVDS2B_7N, DQ17 DB43 DDR4_DIMM_CH2_DQ45 DDR4_DIMM_CH2_BA0 CL42 IO, LVDS2B_31P, DQ21 IO, LVDS2B_7P, DQ17 DA42 DDR4_DIMM_CH2_DQ46 DDR4_DIMM_CH2_A17 CN42 IO, LVDS2B_32N, DQ21 IO, LVDS2B_8N, DQ17 DC42 DDR4_DIMM_CH2_DQ44 DDR4_DIMM_CH2_A16 CK41 IO, LVDS2B_32P, DQ21 IO, LVDS2B_8P, DQ17 CY41 DDR4_DIMM_CH2_TDQS_N14 DDR4_DIMM_CH2_A15 CM41 IO, LVDS2B_33N, DQ21 IO, LVDS2B_9N, DQ17 DB41 DDR4_DIMM_CH2_DBI_N5 DDR4_DIMM_CH2_A14 CL40 IO, LVDS2B_33P, DQ21 IO, LVDS2B_9P, DQ17 DA40 DDR4_DIMM_CH2_DQS_N5 DDR4_DIMM_CH2_A13 CN40 IO, PLL_2B_B_CLKOUT1N, LVDS2B_34N, DQSN21 IO, PLL_2B_T_CLKOUT1N, LVDS2B_10N, DQSN17 DC40 DDR4_DIMM_CH2_DQS_P5 DDR4_DIMM_CH2_A12 CK39 IO, PLL_2B_B_CLKOUT1P, PLL_2B_B_CLKOUT1, PLL_2B_B_FB1, LVDS2B_34P, DQS21 IO, PLL_2B_T_CLKOUT1P, PLL_2B_T_CLKOUT1, PLL_2B_T_FB1, LVDS2B_10P, DQS17 CY39 DDR4_DIMM_CH2_DQ40 240 R66 DDR4_DIMM_CH2_RZQ CM39 IO, LVDS2B_35N, DQ21 IO, LVDS2B_11N, DQ17 DB39 DDR4_DIMM_CH2_DQ41 IO, RZQ_B_2B, LVDS2B_35P, DQ21 IO, RZQ_T_2B, LVDS2B_11P, DQ17 CLK_DDR4_CH2_N 38 CL38 DA38 DDR4_DIMM_CH2_DQ43 CLK_DDR4_CH2_P 38 CN38 IO, CLK_B_2B_1N, LVDS2B_36N, DQ21 IO, CLK_T_2B_1N, LVDS2B_12N, DQ17 DC38 DDR4_DIMM_CH2_DQ42 DDR4_DIMM_CH2_A11 CE36 IO, CLK_B_2B_1P, LVDS2B_36P, DQ21 IO, CLK_T_2B_1P, LVDS2B_12P, DQ17 CR36 DDR4_DIMM_CH2_DQ63 DDR4_DIMM_CH2_A10 CG36 IO, CLK_B_2B_0N, LVDS2B_37N, DQ22 IO, CLK_T_2B_0N, LVDS2B_13N, DQ18 CU36 DDR4_DIMM_CH2_DQ61 C C DDR4_DIMM_CH2_A9 CF35 IO, CLK_B_2B_0P, LVDS2B_37P, DQ22 IO, CLK_T_2B_0P, LVDS2B_13P, DQ18 CT35 DDR4_DIMM_CH2_DQ62 DDR4_DIMM_CH2_A8 CH35 IO, LVDS2B_38N, DQ22 IO, LVDS2B_14N, DQ18 CV35 DDR4_DIMM_CH2_DQ60 DDR4_DIMM_CH2_A7 CE34 IO, LVDS2B_38P, DQ22 IO, LVDS2B_14P, DQ18 CR34 DDR4_DIMM_CH2_TDQS_N16 DDR4_DIMM_CH2_A6 CG34 IO, PLL_2B_B_CLKOUT0N, LVDS2B_39N, DQ22 IO, PLL_2B_T_CLKOUT0N, LVDS2B_15N, DQ18 CU34 DDR4_DIMM_CH2_DBI_N7 DDR4_DIMM_CH2_A5 CF33 IO, PLL_2B_B_CLKOUT0P, PLL_2B_B_CLKOUT0, PLL_2B_B_FB0, LVDS2B_39P, DQ22 IO, PLL_2B_T_CLKOUT0P, PLL_2B_T_CLKOUT0, PLL_2B_T_FB0, LVDS2B_15P, DQ18 CT33 DDR4_DIMM_CH2_DQS_N7 DDR4_DIMM_CH2_A4 CH33 IO, LVDS2B_40N, DQSN22 IO, LVDS2B_16N, DQSN18 CV33 DDR4_DIMM_CH2_DQS_P7 DDR4_DIMM_CH2_A3 CE32 IO, LVDS2B_40P, DQS22 IO, LVDS2B_16P, DQS18 CR32 DDR4_DIMM_CH2_DQ56 DDR4_DIMM_CH2_A2 CG32 IO, LVDS2B_41N, DQ22 IO, LVDS2B_17N, DQ18 CU32 DDR4_DIMM_CH2_DQ57 DDR4_DIMM_CH2_A1 CF31 IO, LVDS2B_41P, DQ22 IO, LVDS2B_17P, DQ18 CT31 DDR4_DIMM_CH2_DQ59 DDR4_DIMM_CH2_A0 CH31 IO, LVDS2B_42N, DQ22 IO, LVDS2B_18N, DQ18 CV31 DDR4_DIMM_CH2_DQ58 DDR4_DIMM_CH2_PAR CL36 IO, LVDS2B_42P, DQ22 IO, LVDS2B_18P, DQ18 DA36 DDR4_DIMM_CH2_DQ52 DDRT:GNT0 DDR4_DIMM_CH2_CS_N1 CN36 IO, LVDS2B_43N, DQ23 IO, LVDS2B_19N, DQ19 DC36 DDR4_DIMM_CH2_DQ53 DDR4_DIMM_CH2_CK_N0 CK35 IO, LVDS2B_43P, DQ23 IO, LVDS2B_19P, DQ19 CY35 DDR4_DIMM_CH2_DQ55 DDR4_DIMM_CH2_CK_P0 CM35 IO, LVDS2B_44N, DQ23 IO, LVDS2B_20N, DQ19 DB35 DDR4_DIMM_CH2_DQ54 DDRT:REQ DDR4_DIMM_CH2_CKE1 CL34 IO, LVDS2B_44P, DQ23 IO, LVDS2B_20P, DQ19 DA34 DDR4_DIMM_CH2_TDQS_N15 DDR4_DIMM_CH2_CKE0 CN34 IO, LVDS2B_45N, DQ23 IO, LVDS2B_21N, DQ19 DC34 DDR4_DIMM_CH2_DBI_N6 DDRT:ERR DDR4_DIMM_CH2_ODT1 CK33 IO, LVDS2B_45P, DQ23 IO, LVDS2B_21P, DQ19 CY33 DDR4_DIMM_CH2_DQS_N6 DDR4_DIMM_CH2_ODT0 CM33 IO, LVDS2B_46N, DQSN23 IO, LVDS2B_22N, DQSN19 DB33 DDR4_DIMM_CH2_DQS_P6 DDR4_DIMM_CH2_ACT_N CL32 IO, LVDS2B_46P, DQS23 IO, LVDS2B_22P, DQS19 DA32 DDR4_DIMM_CH2_DQ48 DDR4_DIMM_CH2_CS_N0 CN32 IO, LVDS2B_47N, DQ23 IO, LVDS2B_23N, DQ19 DC32 DDR4_DIMM_CH2_DQ49 DDR4_DIMM_CH2_RESET_N CK31 IO, LVDS2B_47P, DQ23 IO, LVDS2B_23P, DQ19 CY31 DDR4_DIMM_CH2_DQ51 DDR4_DIMM_CH2_BG1 CM31 IO, LVDS2B_48N, DQ23 IO, LVDS2B_24N, DQ19 DB31 DDR4_DIMM_CH2_DQ50 IO, LVDS2B_48P, DQ23 IO, LVDS2B_24P, DQ19

B B BOT TOP Bank 2B

AGFB014R24_2486A

15 DDR4_DIMM_CH2_CK_P[1:0] 15 DDR4_DIMM_CH2_CK_N[1:0] CLK_DDR4_CH2_P R67 DNI CLK_DDR4_CH2_N

15 DDR4_DIMM_CH2_CKE[1:0]

15 DDR4_DIMM_CH2_A[17:0] 15 DDR4_DIMM_CH2_ODT[1:0] 15 DDR4_DIMM_CH2_BG[1:0] 15 DDR4_DIMM_CH2_BA[1:0] 15,16 DDR4_DIMM_CH2_DBI_N[8:0] 15 DDR4_DIMM_CH2_CS_N[3:0] 15,16 DDR4_DIMM_CH2_DQ[71:0] 15 DDR4_DIMM_CH2_RESET_N A 15 DDR4_DIMM_CH2_ACT_N 15,16 DDR4_DIMM_CH2_DQS_P[8:0] A 15 DDR4_DIMM_CH2_PAR 15 DDR4_DIMM_CH2_ALERT_N 15,16 DDR4_DIMM_CH2_DQS_N[8:0] Intel Corporation,101 innovation Dr, San Jose, CA 95134 15 DDR4_DIMM_CH2_C2 15,16 DDR4_DIMM_CH2_TDQS_N[17:9] Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 17of 66 5 4 3 2 1 5 4 3 2 1

12V_G1 R68 0 J4A 1p2V_DDR4_CH23 DDR4/DDRT Single DIMM CH3 0p6V_VREF_DDR4_CH23 J4B R69 0 1 145 x72bit DIMM Only 2 12V/NC 12V/NC 146 DDR4_DIMM_CH3_DQ4 3 Vss Vrefca 147 DDR4_DIMM3_EVENT_N 78 222 DDR4_DIMM_CH3_PAR 1p2V_DDR4_CH23 4 DQ4 Vss 148 DDR4_DIMM_CH3_DQ5 DDR4_DIMM_CH3_A0 79 EVENT_n PARITY 223 DDR4_DIMM_CH3_DQ0 5 Vss DQ5 149 80 A0 Vdd 224 DDR4_DIMM_CH3_BA1 6 DQ0 Vss 150 DDR4_DIMM_CH3_DQ1 DDR4_DIMM_CH3_BA0 81 Vdd BA1 225 DDR4_DIMM_CH3_A10 DDR4_DIMM_CH3_DBI_N0 7 Vss DQ1 151 DDR4_DIMM_CH3_A16 82 BA0 A10/AP 226 DDR4_DIMM_CH3_TDQS_N9 8 DQS9_t/DM0_n/DBI0_n Vss 152 DDR4_DIMM_CH3_DQS_N0 83 RAS_n/A16 Vdd 227 D 9 DQS9_c DQS0_c 153 DDR4_DIMM_CH3_DQS_P0 DDR4_DIMM_CH3_CS_N0 84 Vdd RFU3 228 DDR4_DIMM_CH3_A14 D DDR4_DIMM_CH3_DQ6 10 Vss DQS0_t 154 85 S0_n WE_n/A14 229 11 DQ6 Vss 155 DDR4_DIMM_CH3_DQ7 DDR4_DIMM_CH3_A15 86 Vdd Vdd 230 DDR4_DIMM3_SAVE_N DDR4_DIMM_CH3_DQ2 12 Vss DQ7 156 DDR4_DIMM_CH3_ODT0 87 CAS_n/A15 SAVE_n/NC 231 13 DQ2 Vss 157 DDR4_DIMM_CH3_DQ3 88 ODT0 Vdd 232 DDR4_DIMM_CH3_A13 DDR4_DIMM_CH3_DQ12 14 Vss DQ3 158 DDR4_DIMM_CH3_CS_N1 89 Vdd A13 233 15 DQ12 Vss 159 DDR4_DIMM_CH3_DQ13 90 S1_n Vdd 234 DDR4_DIMM_CH3_A17 DDR4_DIMM_CH3_DQ8 16 Vss DQ13 160 DDR4_DIMM_CH3_ODT1 91 Vdd A17/NC 235 DDR4_DIMM_CH3_C2 17 DQ8 Vss 161 DDR4_DIMM_CH3_DQ9 92 ODT1 C2/NC 236 DDR4_DIMM_CH3_DBI_N1 18 Vss DQ9 162 DDR4_DIMM_CH3_CS_N2 93 Vdd Vdd 237 DDR4_DIMM_CH3_CS_N3 DDR4_DIMM_CH3_TDQS_N10 19 DQS10_t/DM1_n/DBI1_n Vss 163 DDR4_DIMM_CH3_DQS_N1 94 S2_n/C0 S3_n/C1 238 DDR4_DIMM_CH3_SA2 20 DQS10_c DQS1_c 164 DDR4_DIMM_CH3_DQS_P1 DDR4_DIMM_CH3_DQ36 95 Vss SA2/RFU 239 DDR4_DIMM_CH3_DQ14 21 Vss DQS1_t 165 96 DQ36 Vss 240 DDR4_DIMM_CH3_DQ37 22 DQ14 Vss 166 DDR4_DIMM_CH3_DQ15 DDR4_DIMM_CH3_DQ32 97 Vss DQ37 241 DDR4_DIMM_CH3_DQ10 23 Vss DQ15 167 98 DQ32 Vss 242 DDR4_DIMM_CH3_DQ33 24 DQ10 Vss 168 DDR4_DIMM_CH3_DQ11 DDR4_DIMM_CH3_DBI_N4 99 Vss DQ33 243 DDR4_DIMM_CH3_DQ20 25 Vss DQ11 169 DDR4_DIMM_CH3_TDQS_N13100 DQS13_t/DM4_n/DBI4_n Vss 244 DDR4_DIMM_CH3_DQS_N4 26 DQ20 Vss 170 DDR4_DIMM_CH3_DQ21 101 DQS13_c DQS4_c 245 DDR4_DIMM_CH3_DQS_P4 DDR4_DIMM_CH3_DQ16 27 Vss DQ21 171 DDR4_DIMM_CH3_DQ38 102 Vss DQS4_t 246 28 DQ16 Vss 172 DDR4_DIMM_CH3_DQ17 103 DQ38 Vss 247 DDR4_DIMM_CH3_DQ39 DDR4_DIMM_CH3_DBI_N2 29 Vss DQ17 173 DDR4_DIMM_CH3_DQ34 104 Vss DQ39 248 DDR4_DIMM_CH3_TDQS_N11 30 DQS11_t/DM2_n/DBI2_n Vss 174 DDR4_DIMM_CH3_DQS_N2 105 DQ34 Vss 249 DDR4_DIMM_CH3_DQ35 31 DQS11_c DQS2_c 175 DDR4_DIMM_CH3_DQS_P2 DDR4_DIMM_CH3_DQ44 106 Vss DQ35 250 DDR4_DIMM_CH3_DQ22 32 Vss DQS2_t 176 107 DQ44 Vss 251 DDR4_DIMM_CH3_DQ45 C DDR4 DIMM IF C 33 DQ22 Vss 177 DDR4_DIMM_CH3_DQ23 DDR4_DIMM_CH3_DQ40 108 Vss DQ45 252 DDR4_DIMM_CH3_DQ18 34 Vss DQ23 178 109 DQ40 Vss 253 DDR4_DIMM_CH3_DQ41 20 DDR4_DIMM_CH3_A[17:0] 35 DQ18 Vss 179 DDR4_DIMM_CH3_DQ19 DDR4_DIMM_CH3_DBI_N5 110 Vss DQ41 254 2p5V DDR4_DIMM_CH3_DQ28 36 Vss DQ19 180 DDR4_DIMM_CH3_TDQS_N14111 DQS14_t/DM5_n/DBI5_n Vss 255 DDR4_DIMM_CH3_DQS_N5 20 DDR4_DIMM_CH3_CK_P[1:0] 37 DQ28 Vss 181 DDR4_DIMM_CH3_DQ29 112 DQS14_c DQS5_c 256 DDR4_DIMM_CH3_DQS_P5 DDR4_DIMM3_EVENT_N R70 DNI 20 DDR4_DIMM_CH3_CK_N[1:0] DDR4_DIMM_CH3_DQ24 38 Vss DQ29 182 DDR4_DIMM_CH3_DQ46 113 Vss DQS5_t 257 DDR4_DIMM3_SAVE_N R71 10.0K 20 DDR4_DIMM_CH3_CKE[1:0] 39 DQ24 Vss 183 DDR4_DIMM_CH3_DQ25 114 DQ46 Vss 258 DDR4_DIMM_CH3_DQ47 DDR4_DIMM_CH3_DBI_N3 40 Vss DQ25 184 DDR4_DIMM_CH3_DQ42 115 Vss DQ47 259 20 DDR4_DIMM_CH3_RESET_N DDR4_DIMM_CH3_TDQS_N12 41 DQS12_t/DM3_n/DBI3_n Vss 185 DDR4_DIMM_CH3_DQS_N3 116 DQ42 Vss 260 DDR4_DIMM_CH3_DQ43 DDR4_DIMM_CH3_SA0 R72 10.0K 20 DDR4_DIMM_CH3_ACT_N 42 DQS12_c DQS3_c 186 DDR4_DIMM_CH3_DQS_P3 DDR4_DIMM_CH3_DQ52 117 Vss DQ43 261 DDR4_DIMM_CH3_SA1 R73 10.0K 20 DDR4_DIMM_CH3_ODT[1:0] DDR4_DIMM_CH3_DQ30 43 Vss DQS3_t 187 118 DQ52 Vss 262 DDR4_DIMM_CH3_DQ53 DDR4_DIMM_CH3_SA2 R74 0 20 DDR4_DIMM_CH3_BG[1:0] 44 DQ30 Vss 188 DDR4_DIMM_CH3_DQ31 DDR4_DIMM_CH3_DQ48 119 Vss DQ53 263 20 DDR4_DIMM_CH3_BA[1:0] DDR4_DIMM_CH3_DQ26 45 Vss DQ31 189 120 DQ48 Vss 264 DDR4_DIMM_CH3_DQ49 I2C Addr: 0xA6 20 DDR4_DIMM_CH3_CS_N[3:0] 46 DQ26 Vss 190 DDR4_DIMM_CH3_DQ27 DDR4_DIMM_CH3_DBI_N6 121 Vss DQ49 265 20 DDR4_DIMM_CH3_PAR DDR4_DIMM_CH3_DQ68 47 Vss DQ27 191 DDR4_DIMM_CH3_TDQS_N15122 DQS15_t/DM6_n/DBI6_n Vss 266 DDR4_DIMM_CH3_DQS_N6 1p2V_DDR4_CH2320 DDR4_DIMM_CH3_ALERT_N 48 CB4/NC Vss 192 DDR4_DIMM_CH3_DQ69 123 DQS15_c DQS6_c 267 DDR4_DIMM_CH3_DQS_P6 DDR4_DIMM_CH3_DQ64 49 Vss CB5/NC 193 DDR4_DIMM_CH3_DQ54 124 Vss DQS6_t 268 DDR4_DIMM_CH3_RESET_N R75 10.0K 19,20 DDR4_DIMM_CH3_DBI_N[8:0] 50 CB0/NC Vss 194 DDR4_DIMM_CH3_DQ65 125 DQ54 Vss 269 DDR4_DIMM_CH3_DQ55 R76 DNI DDR4_DIMM_CH3_DBI_N8 51 Vss CB1/NC 195 DDR4_DIMM_CH3_DQ50 126 Vss DQ55 270 19,20 DDR4_DIMM_CH3_DQ[71:0] DDR4_DIMM_CH3_TDQS_N17 52 DQS17_t/DM8_n/DBI8_n Vss 196 DDR4_DIMM_CH3_DQS_N8 127 DQ50 Vss 271 DDR4_DIMM_CH3_DQ51 53 DQS17_c DQS8_c 197 DDR4_DIMM_CH3_DQS_P8 DDR4_DIMM_CH3_DQ60 128 Vss DQ51 272 DDR4_DIMM_CH3_CKE0 R77 DNI 19,20 DDR4_DIMM_CH3_DQS_P[8:0] DDR4_DIMM_CH3_DQ70 54 Vss DQS8_t 198 129 DQ60 Vss 273 DDR4_DIMM_CH3_DQ61 55 CB6/NC Vss 199 DDR4_DIMM_CH3_DQ71 DDR4_DIMM_CH3_DQ56 130 Vss DQ61 274 DDR4_DIMM_CH3_CKE1 R78 DNI 19,20 DDR4_DIMM_CH3_DQS_N[8:0] Vss CB7/NC DQ56 Vss B DDR4_DIMM_CH3_DQ66 56 200 131 275 DDR4_DIMM_CH3_DQ57 B 57 CB2/NC Vss 201 DDR4_DIMM_CH3_DQ67 DDR4_DIMM_CH3_DBI_N7 132 Vss DQ57 276 19,20 DDR4_DIMM_CH3_TDQS_N[17:9] DDR4_DIMM_CH3_RESET_N 58 Vss CB3/NC 202 DDR4_DIMM_CH3_TDQS_N16133 DQS16_t/DM7_n/DBI7_n Vss 277 DDR4_DIMM_CH3_DQS_N7 59 RESET_n Vss 203 DDR4_DIMM_CH3_CKE1 134 DQS16_c DQS7_c 278 DDR4_DIMM_CH3_DQS_P7 9,12,15 DDR4D_SCL DDR4_DIMM_CH3_CKE0 60 Vdd CKE1 204 DDR4_DIMM_CH3_DQ62 135 Vss DQS7_t 279 1p2V_DDR4_CH23 9,12,15 DDR4D_SDA 61 CKE0 Vdd 205 136 DQ62 Vss 280 DDR4_DIMM_CH3_DQ63 15 DDR4_DIMM3_EVENT_N DDR4_DIMM_CH3_ACT_N 62 Vdd RFU2 206 DDR4_DIMM_CH3_DQ58 137 Vss DQ63 281 DDR4_DIMM_CH3_ALERT_N R792 15 DDR4_DIMM3_SAVE_N DDR4_DIMM_CH3_BG0 63 ACT_n Vdd 207 DDR4_DIMM_CH3_BG1 138 DQ58 Vss 282 DDR4_DIMM_CH3_DQ59 10.0K 64 BG0 BG1 208 DDR4_DIMM_CH3_ALERT_N DDR4_DIMM_CH3_SA0 139 Vss DQ59 283 2p5V 20 DDR4_DIMM_CH3_C2 DDR4_DIMM_CH3_A12 65 Vdd ALERT_n 209 DDR4_DIMM_CH3_SA1 140 SA0 Vss 284 DDR4_DIMM_CH3_A9 66 A12 Vdd 210 DDR4_DIMM_CH3_A11 DDR4D_SCL 141 SA1 Vddspd 285 DDR4D_SDA 67 A9 A11 211 DDR4_DIMM_CH3_A7 2p5V 142 SCL SDA 286 DDR4_DIMM_CH3_A8 68 Vdd A7 212 143 Vpp Vpp 287 2p5V DDR4_DIMM_CH3_A6 69 A8 Vdd 213 DDR4_DIMM_CH3_A5 144 Vpp Vpp 288 R79 0 70 A6 A5 214 DDR4_DIMM_CH3_A4 RFU1 Vpp DDR4_DIMM_CH3_A3 71 Vdd A4 215 1p2V_DDR4_CH23 1p2V_DDR4_CH23 0p6V_VTT_DDR4_CH23 DDR4_DIMM_CH3_A1 72 A3 Vdd 216 DDR4_DIMM_CH3_A2 73 A1 A2 217 DDR4x72x288 DDR4_DIMM_CH3_CK_P0 74 Vdd Vdd 218 DDR4_DIMM_CH3_CK_P1 CK0_t CK1_t 1p2V_DDR4_CH23 DDR4_DIMM_CH3_CK_N0 75 219 DDR4_DIMM_CH3_CK_N1 C109 C110 C111 C112 C113 C114 C115 C116 C117 C118 C119 C120 C121 C122 76 CK0_c CK1_c 220 0p6V_VTT_DDR4_CH23 0p6V_VTT_DDR4_CH23 77 Vdd Vdd 221 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 10nF 0.1uF 100uF 1uF Vtt Vtt

DDR4x72x288 Put caps on VDD pins which are close to DIMM A/C pins A 1p2V_DDR4_CH23 0p6V_VREF_DDR4_CH23 0p6V_VTT_DDR4_CH23 A 2p5V C123 0.1uF C124 0.1uF C125 C126 Intel Corporation,101 innovation Dr, San Jose, CA 95134 100uF 100uF C127 C128 C129 C130 C131 C132 C133 0.1uF C134 10nF C137 1206 1206 100uF C138 C139 C140 Title 6.3V 6.3V 10uF 10uF 0.1uF 0.1uF 10nF 10nF C136 0.1uF 1206 AgileX F-Series FPGA Dev Kit X6T X6T 6.3V 10uF 0.1uF 10nF Copyright (c) 2014, Intel Corporation. All Rights Reserved. X6T Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 18of 66 5 4 3 2 1 5 4 3 2 1 DDR4/T CH3 INTERFACE -- FPGA SIDE 2C

U2C

D D

DDR4_DIMM_CH3_DQ23 CF17 CT17 DDR4_DIMM_CH3_DQ22 CH17 IO, LVDS2C_25N, DQ12 IO, LVDS2C_1N, DQ8 CV17 DDR4_DIMM_CH3_DQ20 CE18 IO, LVDS2C_25P, DQ12 IO, LVDS2C_1P, DQ8 CR18 PCIE_EP_I2C_SDA 25 PCIE_EP_WAKEN 25 DDR4_DIMM_CH3_DQ21 CG18 IO, LVDS2C_26N, DQ12 IO, LVDS2C_2N, DQ8 CU18 DDR4_DIMM_CH3_TDQS_N11 CF19 IO, LVDS2C_26P, DQ12 IO, LVDS2C_2P, DQ8 CT19 PCIE_EP_I2C_SCL 25 DDR4_DIMM_CH3_DBI_N2 CH19 IO, LVDS2C_27N, DQ12 IO, LVDS2C_3N, DQ8 CV19 DDR4_DIMM_CH3_DQS_N2 CE20 IO, LVDS2C_27P, DQ12 IO, LVDS2C_3P, DQ8 CR20 PCIE_1V2_CLKREQn 25 DDR4_DIMM_CH3_DQS_P2 CG20 IO, LVDS2C_28N, DQSN12 IO, LVDS2C_4N, DQSN8 CU20 DDR4_DIMM_CH3_DQ17 CF21 IO, LVDS2C_28P, DQS12 IO, LVDS2C_4P, DQS8 CT21 DDR4_DIMM_CH3_DQ16 CH21 IO, LVDS2C_29N, DQ12 IO, LVDS2C_5N, DQ8 CV21 DDR4_DIMM_CH3_DQ18 CE22 IO, LVDS2C_29P, DQ12 IO, LVDS2C_5P, DQ8 CR22 DDR4_DIMM_CH3_DQ19 CG22 IO, LVDS2C_30N, DQ12 IO, LVDS2C_6N, DQ8 CU22 DDR4_DIMM_CH3_DQ68 CK17 IO, LVDS2C_30P, DQ12 IO, LVDS2C_6P, DQ8 CY17 DDR4_DIMM_CH3_DQ71 CM17 IO, LVDS2C_31N, DQ13 IO, LVDS2C_7N, DQ9 DB17 DDR4_DIMM_CH3_DQ69 CL18 IO, LVDS2C_31P, DQ13 IO, LVDS2C_7P, DQ9 DA18 DDR4_DIMM_CH3_DQ70 CN18 IO, LVDS2C_32N, DQ13 IO, LVDS2C_8N, DQ9 DC18 DDR4_DIMM_CH3_TDQS_N17 CK19 IO, LVDS2C_32P, DQ13 IO, LVDS2C_8P, DQ9 CY19 DDR4_DIMM_CH3_DBI_N8 CM19 IO, LVDS2C_33N, DQ13 IO, LVDS2C_9N, DQ9 DB19 DDR4_DIMM_CH3_DQS_N8 CL20 IO, LVDS2C_33P, DQ13 IO, LVDS2C_9P, DQ9 DA20 DDR4_DIMM_CH3_DQS_P8 CN20 IO, PLL_2C_B_CLKOUT1N, LVDS2C_34N, DQSN13 IO, PLL_2C_T_CLKOUT1N, LVDS2C_10N, DQSN9 DC20 DDR4_DIMM_CH3_DQ66 CK21 IO, PLL_2C_B_CLKOUT1P, PLL_2C_B_CLKOUT1, PLL_2C_B_FB1, LVDS2C_34P, DQS13 IO, PLL_2C_T_CLKOUT1P, PLL_2C_T_CLKOUT1, PLL_2C_T_FB1, LVDS2C_10P, DQS9 CY21 DDR4_DIMM_CH3_DQ64 CM21 IO, LVDS2C_35N, DQ13 IO, LVDS2C_11N, DQ9 DB21 C C DDR4_DIMM_CH3_DQ67 CL22 IO, RZQ_B_2C, LVDS2C_35P, DQ13 IO, RZQ_T_2C, LVDS2C_11P, DQ9 DA22 DDR4_DIMM_CH3_DQ65 CN22 IO, CLK_B_2C_1N, LVDS2C_36N, DQ13 IO, CLK_T_2C_1N, LVDS2C_12N, DQ9 DC22 DDR4_DIMM_CH3_DQ12 IO, CLK_B_2C_1P, LVDS2C_36P, DQ13 IO, CLK_T_2C_1P, LVDS2C_12P, DQ9 CE24 CR24 CLK_SYS_100M_N 38 DDR4_DIMM_CH3_DQ15 IO, CLK_B_2C_0N, LVDS2C_37N, DQ14 IO, CLK_T_2C_0N, LVDS2C_13N, DQ10 CG24 CU24 CLK_SYS_100M_P 38 DDR4_DIMM_CH3_DQ14 CF25 IO, CLK_B_2C_0P, LVDS2C_37P, DQ14 IO, CLK_T_2C_0P, LVDS2C_13P, DQ10 CT25 DDR4_DIMM_CH3_DQ13 CH25 IO, LVDS2C_38N, DQ14 IO, LVDS2C_14N, DQ10 CV25 R80 100 DDR4_DIMM_CH3_TDQS_N10 CE26 IO, LVDS2C_38P, DQ14 IO, LVDS2C_14P, DQ10 CR26 DDR4_DIMM_CH3_DBI_N1 CG26 IO, PLL_2C_B_CLKOUT0N, LVDS2C_39N, DQ14 IO, PLL_2C_T_CLKOUT0N, LVDS2C_15N, DQ10 CU26 DDR4_DIMM_CH3_DQS_N1 CF27 IO, PLL_2C_B_CLKOUT0P, PLL_2C_B_CLKOUT0, PLL_2C_B_FB0, LVDS2C_39P, DQ14 IO, PLL_2C_T_CLKOUT0P, PLL_2C_T_CLKOUT0, PLL_2C_T_FB0, LVDS2C_15P, DQ10 CT27 DDR4_DIMM_CH3_DQS_P1 CH27 IO, LVDS2C_40N, DQSN14 IO, LVDS2C_16N, DQSN10 CV27 DDR4_DIMM_CH3_DQ10 CE28 IO, LVDS2C_40P, DQS14 IO, LVDS2C_16P, DQS10 CR28 DDR4_DIMM_CH3_DQ8 CG28 IO, LVDS2C_41N, DQ14 IO, LVDS2C_17N, DQ10 CU28 DDR4_DIMM_CH3_DQ11 CF29 IO, LVDS2C_41P, DQ14 IO, LVDS2C_17P, DQ10 CT29 DDR4_DIMM_CH3_DQ9 CH29 IO, LVDS2C_42N, DQ14 IO, LVDS2C_18N, DQ10 CV29 DDR4_DIMM_CH3_DQ7 CL24 IO, LVDS2C_42P, DQ14 IO, LVDS2C_18P, DQ10 DA24 DDR4_DIMM_CH3_DQ31 DDR4_DIMM_CH3_DQ6 CN24 IO, LVDS2C_43N, DQ15 IO, LVDS2C_19N, DQ11 DC24 DDR4_DIMM_CH3_DQ30 DDR4_DIMM_CH3_DQ4 CK25 IO, LVDS2C_43P, DQ15 IO, LVDS2C_19P, DQ11 CY25 DDR4_DIMM_CH3_DQ28 DDR4_DIMM_CH3_DQ5 CM25 IO, LVDS2C_44N, DQ15 IO, LVDS2C_20N, DQ11 DB25 DDR4_DIMM_CH3_DQ29 DDR4_DIMM_CH3_TDQS_N9 CL26 IO, LVDS2C_44P, DQ15 IO, LVDS2C_20P, DQ11 DA26 DDR4_DIMM_CH3_TDQS_N12 DDR4_DIMM_CH3_DBI_N0 CN26 IO, LVDS2C_45N, DQ15 IO, LVDS2C_21N, DQ11 DC26 DDR4_DIMM_CH3_DBI_N3 DDR4_DIMM_CH3_DQS_N0 CK27 IO, LVDS2C_45P, DQ15 IO, LVDS2C_21P, DQ11 CY27 DDR4_DIMM_CH3_DQS_N3 DDR4_DIMM_CH3_DQS_P0 CM27 IO, LVDS2C_46N, DQSN15 IO, LVDS2C_22N, DQSN11 DB27 DDR4_DIMM_CH3_DQS_P3 DDR4_DIMM_CH3_DQ1 CL28 IO, LVDS2C_46P, DQS15 IO, LVDS2C_22P, DQS11 DA28 DDR4_DIMM_CH3_DQ25 IO, LVDS2C_47N, DQ15 IO, LVDS2C_23N, DQ11 B DDR4_DIMM_CH3_DQ0 CN28 DC28 DDR4_DIMM_CH3_DQ24 B DDR4_DIMM_CH3_DQ2 CK29 IO, LVDS2C_47P, DQ15 IO, LVDS2C_23P, DQ11 CY29 DDR4_DIMM_CH3_DQ26 DDR4_DIMM_CH3_DQ3 CM29 IO, LVDS2C_48N, DQ15 IO, LVDS2C_24N, DQ11 DB29 DDR4_DIMM_CH3_DQ27 IO, LVDS2C_48P, DQ15 IO, LVDS2C_24P, DQ11

BOT TOP

Bank 2C

AGFB014R24_2486A

1p2V_DDR4_CH23

R81 10.0K PCIE_EP_I2C_SCL R82 10.0K PCIE_EP_I2C_SDA 18,20 DDR4_DIMM_CH3_DBI_N[8:0] R83 10.0K PCIE_EP_WAKEN 18,20 DDR4_DIMM_CH3_DQ[71:0]

18,20 DDR4_DIMM_CH3_DQS_P[8:0] A A 18,20 DDR4_DIMM_CH3_DQS_N[8:0]

18,20 DDR4_DIMM_CH3_TDQS_N[17:9] Intel Corporation,101 innovation Dr, San Jose, CA 95134 Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 19of 66 5 4 3 2 1 5 4 3 2 1

DDR4/T CH3 INTERFACE -- FPGA SIDE 2D U2B

DDR4_DIMM_CH3_DQ63 CF3 CT3 DDR4_DIMM_CH3_CK_N1 DDRT:ERID2 DDR4_DIMM_CH3_DQ62 CH3 IO, LVDS2D_25N, DQ4 IO, LVDS2D_1N, DQ0 CV3 DDR4_DIMM_CH3_CK_P1 DDRT:ERID0 D DDR4_DIMM_CH3_DQ60 CE4 IO, LVDS2D_25P, DQ4 IO, LVDS2D_1P, DQ0 CR4 D DDR4_DIMM_CH3_DQ61 CG4 IO, LVDS2D_26N, DQ4 IO, LVDS2D_2N, DQ0 CU4 DDR4_DIMM_CH3_ALERT_N DDRT:NC DDR4_DIMM_CH3_TDQS_N16 CF5 IO, LVDS2D_26P, DQ4 IO, LVDS2D_2P, DQ0 CT5 DDR4_DIMM_CH3_DBI_N7 CH5 IO, LVDS2D_27N, DQ4 IO, LVDS2D_3N, DQ0 CV5 DDR4_DIMM_CH3_DQS_N7 CE6 IO, LVDS2D_27P, DQ4 IO, LVDS2D_3P, DQ0 CR6 DDR4_DIMM_CH3_DQS_P7 CG6 IO, LVDS2D_28N, DQSN4 IO, LVDS2D_4N, DQSN0 CU6 DDR4_DIMM_CH3_DQ57 CF7 IO, LVDS2D_28P, DQS4 IO, LVDS2D_4P, DQS0 CT7 DDR4_DIMM_CH3_DQ56 CH7 IO, LVDS2D_29N, DQ4 IO, LVDS2D_5N, DQ0 CV7 DDR4_DIMM_CH3_C2 DDRT:C3 DDR4_DIMM_CH3_DQ58 CE8 IO, LVDS2D_29P, DQ4 IO, LVDS2D_5P, DQ0 CR8 DDR4_DIMM_CH3_CS_N3 DDRT:C2 DDR4_DIMM_CH3_DQ59 CG8 IO, LVDS2D_30N, DQ4 IO, LVDS2D_6N, DQ0 CU8 DDR4_DIMM_CH3_CS_N2 DDRT:C1 DDR4_DIMM_CH3_DQ52 CK3 IO, LVDS2D_30P, DQ4 IO, LVDS2D_6P, DQ0 CT1 DDR4_DIMM_CH3_BG0 DDR4_DIMM_CH3_DQ55 CM3 IO, LVDS2D_31N, DQ5 IO, LVDS2D_7N, DQ1 CV1 DDR4_DIMM_CH3_BA1 DDR4_DIMM_CH3_DQ54 CL4 IO, LVDS2D_31P, DQ5 IO, LVDS2D_7P, DQ1 CY3 DDR4_DIMM_CH3_BA0 DDR4_DIMM_CH3_DQ53 CN4 IO, LVDS2D_32N, DQ5 IO, LVDS2D_8N, DQ1 DA4 DDR4_DIMM_CH3_A17 DDR4_DIMM_CH3_TDQS_N15 CK5 IO, LVDS2D_32P, DQ5 IO, LVDS2D_8P, DQ1 CY5 DDR4_DIMM_CH3_A16 DDR4_DIMM_CH3_DBI_N6 CM5 IO, LVDS2D_33N, DQ5 IO, LVDS2D_9N, DQ1 DB5 DDR4_DIMM_CH3_A15 DDR4_DIMM_CH3_DQS_N6 CL6 IO, LVDS2D_33P, DQ5 IO, LVDS2D_9P, DQ1 DA6 DDR4_DIMM_CH3_A14 DDR4_DIMM_CH3_DQS_P6 CN6 IO, PLL_2D_B_CLKOUT1N, LVDS2D_34N, DQSN5 IO, PLL_2D_T_CLKOUT1N, LVDS2D_10N, DQSN1 DC6 DDR4_DIMM_CH3_A13 DDR4_DIMM_CH3_DQ50 CK7 IO, PLL_2D_B_CLKOUT1P, PLL_2D_B_CLKOUT1, PLL_2D_B_FB1, LVDS2D_34P, DQS5 IO, PLL_2D_T_CLKOUT1P, PLL_2D_T_CLKOUT1, PLL_2D_T_FB1, LVDS2D_10P, DQS1 CY7 DDR4_DIMM_CH3_A12 DDR4_DIMM_CH3_DQ48 CM7 IO, LVDS2D_35N, DQ5 IO, LVDS2D_11N, DQ1 DB7 DDR4_DIMM_CH3_RZQ 240 R84 DDR4_DIMM_CH3_DQ51 CL8 IO, RZQ_B_2D, LVDS2D_35P, DQ5 IO, RZQ_T_2D, LVDS2D_11P, DQ1 DA8 38 CLK_DDR4_CH3_N DDR4_DIMM_CH3_DQ49 CN8 IO, CLK_B_2D_1N, LVDS2D_36N, DQ5 IO, CLK_T_2D_1N, LVDS2D_12N, DQ1 DC8 38 CLK_DDR4_CH3_P DDR4_DIMM_CH3_DQ44 CE10 IO, CLK_B_2D_1P, LVDS2D_36P, DQ5 IO, CLK_T_2D_1P, LVDS2D_12P, DQ1 CR10 DDR4_DIMM_CH3_A11 DDR4_DIMM_CH3_DQ47 CG10 IO, CLK_B_2D_0N, LVDS2D_37N, DQ6 IO, CLK_T_2D_0N, LVDS2D_13N, DQ2 CU10 DDR4_DIMM_CH3_A10 C C DDR4_DIMM_CH3_DQ46 CF11 IO, CLK_B_2D_0P, LVDS2D_37P, DQ6 IO, CLK_T_2D_0P, LVDS2D_13P, DQ2 CT11 DDR4_DIMM_CH3_A9 DDR4_DIMM_CH3_DQ45 CH11 IO, LVDS2D_38N, DQ6 IO, LVDS2D_14N, DQ2 CV11 DDR4_DIMM_CH3_A8 DDR4_DIMM_CH3_TDQS_N14 CE12 IO, LVDS2D_38P, DQ6 IO, LVDS2D_14P, DQ2 CR12 DDR4_DIMM_CH3_A7 DDR4_DIMM_CH3_DBI_N5 CG12 IO, PLL_2D_B_CLKOUT0N, LVDS2D_39N, DQ6 IO, PLL_2D_T_CLKOUT0N, LVDS2D_15N, DQ2 CU12 DDR4_DIMM_CH3_A6 DDR4_DIMM_CH3_DQS_N5 CF13 IO, PLL_2D_B_CLKOUT0P, PLL_2D_B_CLKOUT0, PLL_2D_B_FB0, LVDS2D_39P, DQ6 IO, PLL_2D_T_CLKOUT0P, PLL_2D_T_CLKOUT0, PLL_2D_T_FB0, LVDS2D_15P, DQ2 CT13 DDR4_DIMM_CH3_A5 DDR4_DIMM_CH3_DQS_P5 CH13 IO, LVDS2D_40N, DQSN6 IO, LVDS2D_16N, DQSN2 CV13 DDR4_DIMM_CH3_A4 DDR4_DIMM_CH3_DQ42 CE14 IO, LVDS2D_40P, DQS6 IO, LVDS2D_16P, DQS2 CR14 DDR4_DIMM_CH3_A3 DDR4_DIMM_CH3_DQ40 CG14 IO, LVDS2D_41N, DQ6 IO, LVDS2D_17N, DQ2 CU14 DDR4_DIMM_CH3_A2 DDR4_DIMM_CH3_DQ43 CF15 IO, LVDS2D_41P, DQ6 IO, LVDS2D_17P, DQ2 CT15 DDR4_DIMM_CH3_A1 DDR4_DIMM_CH3_DQ41 CH15 IO, LVDS2D_42N, DQ6 IO, LVDS2D_18N, DQ2 CV15 DDR4_DIMM_CH3_A0 DDR4_DIMM_CH3_DQ39 CL10 IO, LVDS2D_42P, DQ6 IO, LVDS2D_18P, DQ2 DA10 DDR4_DIMM_CH3_PAR DDR4_DIMM_CH3_DQ38 CN10 IO, LVDS2D_43N, DQ7 IO, LVDS2D_19N, DQ3 DC10 DDR4_DIMM_CH3_CS_N1 DDRT:GNT0 DDR4_DIMM_CH3_DQ36 CK11 IO, LVDS2D_43P, DQ7 IO, LVDS2D_19P, DQ3 CY11 DDR4_DIMM_CH3_CK_N0 DDR4_DIMM_CH3_DQ37 CM11 IO, LVDS2D_44N, DQ7 IO, LVDS2D_20N, DQ3 DB11 DDR4_DIMM_CH3_CK_P0 DDR4_DIMM_CH3_TDQS_N13 CL12 IO, LVDS2D_44P, DQ7 IO, LVDS2D_20P, DQ3 DA12 DDR4_DIMM_CH3_CKE1 DDRT:REQ DDR4_DIMM_CH3_DBI_N4 CN12 IO, LVDS2D_45N, DQ7 IO, LVDS2D_21N, DQ3 DC12 DDR4_DIMM_CH3_CKE0 DDR4_DIMM_CH3_DQS_N4 CK13 IO, LVDS2D_45P, DQ7 IO, LVDS2D_21P, DQ3 CY13 DDR4_DIMM_CH3_ODT1 DDRT:ERR DDR4_DIMM_CH3_DQS_P4 CM13 IO, LVDS2D_46N, DQSN7 IO, LVDS2D_22N, DQSN3 DB13 DDR4_DIMM_CH3_ODT0 DDR4_DIMM_CH3_DQ33 CL14 IO, LVDS2D_46P, DQS7 IO, LVDS2D_22P, DQS3 DA14 DDR4_DIMM_CH3_ACT_N DDR4_DIMM_CH3_DQ32 CN14 IO, LVDS2D_47N, DQ7 IO, LVDS2D_23N, DQ3 DC14 DDR4_DIMM_CH3_CS_N0 DDR4_DIMM_CH3_DQ34 CK15 IO, LVDS2D_47P, DQ7 IO, LVDS2D_23P, DQ3 CY15 DDR4_DIMM_CH3_RESET_N DDR4_DIMM_CH3_DQ35 CM15 IO, LVDS2D_48N, DQ7 IO, LVDS2D_24N, DQ3 DB15 DDR4_DIMM_CH3_BG1 IO, LVDS2D_48P, DQ7 IO, LVDS2D_24P, DQ3 B BOT TOP B

Bank 2D

AGFB014R24_2486A

18 DDR4_DIMM_CH3_CK_P[1:0] 18 DDR4_DIMM_CH3_CK_N[1:0] CLK_DDR4_CH3_P R85 DNI CLK_DDR4_CH3_N

18 DDR4_DIMM_CH3_CKE[1:0]

18 DDR4_DIMM_CH3_A[17:0] 18 DDR4_DIMM_CH3_ODT[1:0] 18 DDR4_DIMM_CH3_BG[1:0] 18 DDR4_DIMM_CH3_BA[1:0] 18,19 DDR4_DIMM_CH3_DBI_N[8:0] 18 DDR4_DIMM_CH3_CS_N[3:0] 18,19 DDR4_DIMM_CH3_DQ[71:0] 18 DDR4_DIMM_CH3_RESET_N A 18 DDR4_DIMM_CH3_ACT_N 18,19 DDR4_DIMM_CH3_DQS_P[8:0] A 18 DDR4_DIMM_CH3_PAR 18 DDR4_DIMM_CH3_ALERT_N 18,19 DDR4_DIMM_CH3_DQS_N[8:0] Intel Corporation,101 innovation Dr, San Jose, CA 95134 18 DDR4_DIMM_CH3_C2 18,19 DDR4_DIMM_CH3_TDQS_N[17:9] Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 20of 66 5 4 3 2 1 5 4 3 2 1 E-TILE BANK 9A

U2K

D D

QSFPDD0_RX0_P AK7 AK1 QSFPDD0_TX0_P 23 QSFPDD0_RX0_P QSFPDD0_TX0_P 23 QSFPDD0_RX0_N AJ8 GXER9A_RX_CH0P GXER9A_TX_CH0P AJ2 QSFPDD0_TX0_N 23 QSFPDD0_RX0_N QSFPDD0_TX0_N 23 QSFPDD0_RX2_P AL10 GXER9A_RX_CH0N GXER9A_TX_CH0N AL4 QSFPDD0_TX2_P 23 QSFPDD0_RX2_P QSFPDD0_TX2_P 23 QSFPDD0_RX2_N AM11 GXER9A_RX_CH1P GXER9A_TX_CH1P AM5 QSFPDD0_TX2_N 23 QSFPDD0_RX2_N QSFPDD0_TX2_N 23 QSFPDD0_RX1_P AP7 GXER9A_RX_CH1N GXER9A_TX_CH1N AP1 QSFPDD0_TX1_P 23 QSFPDD0_RX1_P QSFPDD0_TX1_P 23 QSFPDD0_RX1_N AN8 GXER9A_RX_CH2P GXER9A_TX_CH2P AN2 QSFPDD0_TX1_N 23 QSFPDD0_RX1_N QSFPDD0_TX1_N 23 QSFPDD0_RX3_P AR10 GXER9A_RX_CH2N GXER9A_TX_CH2N AR4 QSFPDD0_TX3_P 23 QSFPDD0_RX3_P QSFPDD0_TX3_P 23 QSFPDD0_RX3_N AT11 GXER9A_RX_CH3P GXER9A_TX_CH3P AT5 QSFPDD0_TX3_N 23 QSFPDD0_RX3_N QSFPDD0_TX3_N 23 QSFPDD0_RX4_P AV7 GXER9A_RX_CH3N GXER9A_TX_CH3N AV1 QSFPDD0_TX4_P 23 QSFPDD0_RX4_P QSFPDD0_TX4_P 23 QSFPDD0_RX4_N AU8 GXER9A_RX_CH8P GXER9A_TX_CH8P AU2 QSFPDD0_TX4_N 23 QSFPDD0_RX4_N QSFPDD0_TX4_N 23 QSFPDD0_RX6_P AW10 GXER9A_RX_CH8N GXER9A_TX_CH8N AW4 QSFPDD0_TX6_P 23 QSFPDD0_RX6_P QSFPDD0_TX6_P 23 QSFPDD0_RX6_N AY11 GXER9A_RX_CH9P GXER9A_TX_CH9P AY5 QSFPDD0_TX6_N 23 QSFPDD0_RX6_N QSFPDD0_TX6_N 23 QSFPDD0_RX5_P BB7 GXER9A_RX_CH9N GXER9A_TX_CH9N BB1 QSFPDD0_TX5_P 23 QSFPDD0_RX5_P QSFPDD0_TX5_P 23 QSFPDD0_RX5_N BA8 GXER9A_RX_CH10P GXER9A_TX_CH10P BA2 QSFPDD0_TX5_N 23 QSFPDD0_RX5_N QSFPDD0_TX5_N 23 QSFPDD0_RX7_P BC10 GXER9A_RX_CH10N GXER9A_TX_CH10N BC4 QSFPDD0_TX7_P 23 QSFPDD0_RX7_P QSFPDD0_TX7_P 23 QSFPDD0_RX7_N BD11 GXER9A_RX_CH11P GXER9A_TX_CH11P BD5 QSFPDD0_TX7_N 23 QSFPDD0_RX7_N QSFPDD0_TX7_N 23 QSFPDD1_RX0_P BF7 GXER9A_RX_CH11N GXER9A_TX_CH11N BF1 QSFPDD1_TX0_P 24 QSFPDD1_RX0_P QSFPDD1_TX0_P 24 QSFPDD1_RX0_N BE8 GXER9A_RX_CH12P GXER9A_TX_CH12P BE2 QSFPDD1_TX0_N 24 QSFPDD1_RX0_N QSFPDD1_TX0_N 24 QSFPDD1_RX2_P BG10 GXER9A_RX_CH12N GXER9A_TX_CH12N BG4 QSFPDD1_TX2_P 24 QSFPDD1_RX2_P QSFPDD1_TX2_P 24 QSFPDD1_RX2_N BH11 GXER9A_RX_CH13P GXER9A_TX_CH13P BH5 QSFPDD1_TX2_N 24 QSFPDD1_RX2_N QSFPDD1_TX2_N 24 QSFPDD1_RX1_P BK7 GXER9A_RX_CH13N GXER9A_TX_CH13N BK1 QSFPDD1_TX1_P 24 QSFPDD1_RX1_P QSFPDD1_TX1_P 24 QSFPDD1_RX1_N BJ8 GXER9A_RX_CH14P GXER9A_TX_CH14P BJ2 QSFPDD1_TX1_N C 24 QSFPDD1_RX1_N QSFPDD1_TX1_N 24 C QSFPDD1_RX3_P BL10 GXER9A_RX_CH14N GXER9A_TX_CH14N BL4 QSFPDD1_TX3_P 24 QSFPDD1_RX3_P QSFPDD1_TX3_P 24 QSFPDD1_RX3_N BM11 GXER9A_RX_CH15P GXER9A_TX_CH15P BM5 QSFPDD1_TX3_N 24 QSFPDD1_RX3_N QSFPDD1_TX3_N 24 QSFPDD1_RX4_P BP7 GXER9A_RX_CH15N GXER9A_TX_CH15N BP1 QSFPDD1_TX4_P 24 QSFPDD1_RX4_P QSFPDD1_TX4_P 24 QSFPDD1_RX4_N BN8 GXER9A_RX_CH20P GXER9A_TX_CH20P BN2 QSFPDD1_TX4_N 24 QSFPDD1_RX4_N QSFPDD1_TX4_N 24 QSFPDD1_RX6_P BR10 GXER9A_RX_CH20N GXER9A_TX_CH20N BR4 QSFPDD1_TX6_P 24 QSFPDD1_RX6_P QSFPDD1_TX6_P 24 QSFPDD1_RX6_N BT11 GXER9A_RX_CH21P GXER9A_TX_CH21P BT5 QSFPDD1_TX6_N 24 QSFPDD1_RX6_N QSFPDD1_TX6_N 24 QSFPDD1_RX5_P BV7 GXER9A_RX_CH21N GXER9A_TX_CH21N BV1 QSFPDD1_TX5_P 24 QSFPDD1_RX5_P QSFPDD1_TX5_P 24 QSFPDD1_RX5_N BU8 GXER9A_RX_CH22P GXER9A_TX_CH22P BU2 QSFPDD1_TX5_N 24 QSFPDD1_RX5_N QSFPDD1_TX5_N 24 QSFPDD1_RX7_P BW10 GXER9A_RX_CH22N GXER9A_TX_CH22N BW4 QSFPDD1_TX7_P 24 QSFPDD1_RX7_P QSFPDD1_TX7_P 24 QSFPDD1_RX7_N BY11 GXER9A_RX_CH23P GXER9A_TX_CH23P BY5 QSFPDD1_TX7_N 24 QSFPDD1_RX7_N GXER9A_RX_CH23N GXER9A_TX_CH23N QSFPDD1_TX7_N 24 R810 DNI

AT13 38 REFCLK_322M_QSFPDD_P REFCLK_GXER9A_CH0P 38 REFCLK_322M_QSFPDD_N AP13 AN20 R86 2K AR14 REFCLK_GXER9A_CH0N IO_AUX_RREF20 38 REFCLK_156M_QSFPDD_P REFCLK_GXER9A_CH1P 38 REFCLK_156M_QSFPDD_N AN14 AJ12 REFCLK_GXER9A_CH1N R811 DNI AH11 REFCLK_GXER9A_CH2P AK13 REFCLK_GXER9A_CH2N AN18 FPGA_TEMP3p 47 AH13 REFCLK_GXER9A_CH3P TEMPDIODE4P AR20 FPGA_TEMP3n 47 AJ14 REFCLK_GXER9A_CH3N TEMPDIODE4N AL14 REFCLK_GXER9A_CH4P REFCLK_GXER9A_CH4N B AR16 B AN16 REFCLK_GXER9A_CH5P AJ16 REFCLK_GXER9A_CH5N 2p5V AL16 REFCLK_GXER9A_CH6P AM19 AH15 REFCLK_GXER9A_CH6N DNU16 AT19 R843 10.0K AK15 REFCLK_GXER9A_CH7P I2C_CLK_DFX DNU17 AP17 R844 10.0K AH17 REFCLK_GXER9A_CH7N I2C_DATA_DFX DNU18 AT17 AK17 REFCLK_GXER9A_CH8P DNU19 REFCLK_GXER9A_CH8N

Bank 9A

AGFB014R24_2486A

A A

D D

U2L

PCIE_EP_TX_P0 BP61 BP55 PCIE_EP_RX_P0 25 PCIE_EP_TX_P0 PCIE_EP_RX_P0 25 PCIE_EP_TX_N0 BR62 GXPL10A_RX_CH0P GXPL10A_TX_CH0P BR56 PCIE_EP_RX_N0 25 PCIE_EP_TX_N0 PCIE_EP_RX_N0 25 PCIE_EP_TX_P1 BN58 GXPL10A_RX_CH0N GXPL10A_TX_CH0N BN52 PCIE_EP_RX_P1 25 PCIE_EP_TX_P1 PCIE_EP_RX_P1 25 PCIE_EP_TX_N1 BM59 GXPL10A_RX_CH1P GXPL10A_TX_CH1P BM53 PCIE_EP_RX_N1 25 PCIE_EP_TX_N1 PCIE_EP_RX_N1 25 PCIE_EP_TX_P2 BK61 GXPL10A_RX_CH1N GXPL10A_TX_CH1N BK55 PCIE_EP_RX_P2 25 PCIE_EP_TX_P2 PCIE_EP_RX_P2 25 PCIE_EP_TX_N2 BL62 GXPL10A_RX_CH2P GXPL10A_TX_CH2P BL56 PCIE_EP_RX_N2 25 PCIE_EP_TX_N2 PCIE_EP_RX_N2 25 PCIE_EP_TX_P3 BJ58 GXPL10A_RX_CH2N GXPL10A_TX_CH2N BJ52 PCIE_EP_RX_P3 25 PCIE_EP_TX_P3 PCIE_EP_RX_P3 25 PCIE_EP_TX_N3 BH59 GXPL10A_RX_CH3P GXPL10A_TX_CH3P BH53 PCIE_EP_RX_N3 25 PCIE_EP_TX_N3 PCIE_EP_RX_N3 25 PCIE_EP_TX_P4 BF61 GXPL10A_RX_CH3N GXPL10A_TX_CH3N BF55 PCIE_EP_RX_P4 25 PCIE_EP_TX_P4 PCIE_EP_RX_P4 25 PCIE_EP_TX_N4 BG62 GXPL10A_RX_CH4P GXPL10A_TX_CH4P BG56 PCIE_EP_RX_N4 25 PCIE_EP_TX_N4 PCIE_EP_RX_N4 25 PCIE_EP_TX_P5 BE58 GXPL10A_RX_CH4N GXPL10A_TX_CH4N BE52 PCIE_EP_RX_P5 25 PCIE_EP_TX_P5 PCIE_EP_RX_P5 25 PCIE_EP_TX_N5 BD59 GXPL10A_RX_CH5P GXPL10A_TX_CH5P BD53 PCIE_EP_RX_N5 25 PCIE_EP_TX_N5 PCIE_EP_RX_N5 25 PCIE_EP_TX_P6 BB61 GXPL10A_RX_CH5N GXPL10A_TX_CH5N BB55 PCIE_EP_RX_P6 25 PCIE_EP_TX_P6 PCIE_EP_RX_P6 25 PCIE_EP_TX_N6 BC62 GXPL10A_RX_CH6P GXPL10A_TX_CH6P BC56 PCIE_EP_RX_N6 C 25 PCIE_EP_TX_N6 PCIE_EP_RX_N6 25 C PCIE_EP_TX_P7 BA58 GXPL10A_RX_CH6N GXPL10A_TX_CH6N BA52 PCIE_EP_RX_P7 25 PCIE_EP_TX_P7 PCIE_EP_RX_P7 25 PCIE_EP_TX_N7 AY59 GXPL10A_RX_CH7P GXPL10A_TX_CH7P AY53 PCIE_EP_RX_N7 25 PCIE_EP_TX_N7 PCIE_EP_RX_N7 25 PCIE_EP_TX_P8 AV61 GXPL10A_RX_CH7N GXPL10A_TX_CH7N AV55 PCIE_EP_RX_P8 25 PCIE_EP_TX_P8 PCIE_EP_RX_P8 25 PCIE_EP_TX_N8 AW62 GXPL10A_RX_CH8P GXPL10A_TX_CH8P AW56 PCIE_EP_RX_N8 25 PCIE_EP_TX_N8 PCIE_EP_RX_N8 25 PCIE_EP_TX_P9 AU58 GXPL10A_RX_CH8N GXPL10A_TX_CH8N AU52 PCIE_EP_RX_P9 25 PCIE_EP_TX_P9 PCIE_EP_RX_P9 25 PCIE_EP_TX_N9 AT59 GXPL10A_RX_CH9P GXPL10A_TX_CH9P AT53 PCIE_EP_RX_N9 25 PCIE_EP_TX_N9 PCIE_EP_RX_N9 25 PCIE_EP_TX_P10 AP61 GXPL10A_RX_CH9N GXPL10A_TX_CH9N AP55 PCIE_EP_RX_P10 25 PCIE_EP_TX_P10 PCIE_EP_RX_P10 25 PCIE_EP_TX_N10 AR62 GXPL10A_RX_CH10P GXPL10A_TX_CH10P AR56 PCIE_EP_RX_N10 25 PCIE_EP_TX_N10 PCIE_EP_RX_N10 25 PCIE_EP_TX_P11 AN58 GXPL10A_RX_CH10N GXPL10A_TX_CH10N AN52 PCIE_EP_RX_P11 25 PCIE_EP_TX_P11 PCIE_EP_RX_P11 25 PCIE_EP_TX_N11 AM59 GXPL10A_RX_CH11P GXPL10A_TX_CH11P AM53 PCIE_EP_RX_N11 25 PCIE_EP_TX_N11 PCIE_EP_RX_N11 25 PCIE_EP_TX_P12 AK61 GXPL10A_RX_CH11N GXPL10A_TX_CH11N AK55 PCIE_EP_RX_P12 25 PCIE_EP_TX_P12 PCIE_EP_RX_P12 25 PCIE_EP_TX_N12 AL62 GXPL10A_RX_CH12P GXPL10A_TX_CH12P AL56 PCIE_EP_RX_N12 25 PCIE_EP_TX_N12 PCIE_EP_RX_N12 25 PCIE_EP_TX_P13 AJ58 GXPL10A_RX_CH12N GXPL10A_TX_CH12N AJ52 PCIE_EP_RX_P13 25 PCIE_EP_TX_P13 PCIE_EP_RX_P13 25 PCIE_EP_TX_N13 AH59 GXPL10A_RX_CH13P GXPL10A_TX_CH13P AH53 PCIE_EP_RX_N13 25 PCIE_EP_TX_N13 PCIE_EP_RX_N13 25 PCIE_EP_TX_P14 AF61 GXPL10A_RX_CH13N GXPL10A_TX_CH13N AF55 PCIE_EP_RX_P14 25 PCIE_EP_TX_P14 PCIE_EP_RX_P14 25 PCIE_EP_TX_N14 AG62 GXPL10A_RX_CH14P GXPL10A_TX_CH14P AG56 PCIE_EP_RX_N14 25 PCIE_EP_TX_N14 PCIE_EP_RX_N14 25 PCIE_EP_TX_P15 AE58 GXPL10A_RX_CH14N GXPL10A_TX_CH14N AE52 PCIE_EP_RX_P15 25 PCIE_EP_TX_P15 PCIE_EP_RX_P15 25 PCIE_EP_TX_N15 AD59 GXPL10A_RX_CH15P GXPL10A_TX_CH15P AD53 PCIE_EP_RX_N15 25 PCIE_EP_TX_N15 GXPL10A_RX_CH15N GXPL10A_TX_CH15N PCIE_EP_RX_N15 25 R812 DNI AJ48 AH45 39 REFCLK_PCIE_CH0_P FPGA_TEMP2p 47 AH49 REFCLK_GXPL10A_CH0P TEMPDIODE1P AG46 39 REFCLK_PCIE_CH0_N FPGA_TEMP2n 47 AE48 REFCLK_GXPL10A_CH0N TEMPDIODE1N 39 REFCLK_PCIE_CH2_P REFCLK_GXPL10A_CH2P B 39 REFCLK_PCIE_CH2_N AD49 B R813 DNI REFCLK_GXPL10A_CH2N BU58 FPGA_PCIE_PERSTn 44 I_PIN_PERST_N_U10_P BH49 R87 200 R88 2K BM43 U10_P_IO_RESREF_0 1p8V IO_AUX_RREF10_P R89 10.0K Bank 10A

AGFB014R24_2486A

A A

NOTE 1: Bypass Capacitors should be placed as close to the associated 20-pin D connector as possible. D NOTE 2: zQSFP 100-ohm termination is implemented via the FPGA on-chip termination. NOTE 3: DC blocking capacitors are in the module for RX and TX. J5 NOTE 4: 1uH inductors should have a DC Resistance of less than 0.1-ohm. 36 17 21 QSFPDD0_TX0_P QSFPDD0_RX0_P 21 37 TX1P RX1P 18 IO_3p3V QSFPDD0_VCCT 21 QSFPDD0_TX0_N QSFPDD0_RX0_N 21 L15 1uH 3 TX1N RX1N 22 21 QSFPDD0_TX1_P QSFPDD0_RX1_P 21 2 TX2P RX2P 21 21 QSFPDD0_TX1_N QSFPDD0_RX1_N 21 33 TX2N RX2N 14 21 QSFPDD0_TX2_P QSFPDD0_RX2_P 21 34 TX3P RX3P 15 C142 C143 C144 C145 C146 C147 21 QSFPDD0_TX2_N QSFPDD0_RX2_N 21 6 TX3N RX3N 25 21 QSFPDD0_TX3_P QSFPDD0_RX3_P 21 5 TX4P RX4P 24 0.1uF 22uF 0.1uF 10uF 22uF 22uF 21 QSFPDD0_TX3_N QSFPDD0_RX3_N 21 74 TX4N RX4N 55 21 QSFPDD0_TX4_P QSFPDD0_RX4_P 21 75 TX5P RX5P 56 QSFPDD0_VCCR 21 QSFPDD0_TX4_N QSFPDD0_RX4_N 21 L16 1uH 41 TX5N RX5N 60 21 QSFPDD0_TX5_P QSFPDD0_RX5_P 21 40 TX6P RX6P 59 21 QSFPDD0_TX5_N QSFPDD0_RX5_N 21 71 TX6N RX6N 52 21 QSFPDD0_TX6_P QSFPDD0_RX6_P 21 72 TX7P RX7P 53 C148 C149 C150 C151 21 QSFPDD0_TX6_N QSFPDD0_RX6_N 21 44 TX7N RX7N 63 21 QSFPDD0_TX7_P QSFPDD0_RX7_P 21 43 TX8P RX8P 62 0.1uF 10uF 22uF 22uF C 21 QSFPDD0_TX7_N TX8N RX8N QSFPDD0_RX7_N 21 C L17 1uH QSFPDD0_VCC QSFPDD0_VCC

30 8 VCC1 68 C152 C153 C154 C155 44 QSFPDD0_3V3_MODSEL_L 9 MODSELL VCC2 QSFPDD0_VCCR 44 QSFPDD0_3V3_RESET_L 27 RESETL 0.1uF 10uF 22uF 22uF 44 QSFPDD0_3V3_MODPRS_L 31 MODPRSL 10 44 QSFPDD0_3V3_LPMODE INITMODE VCCRX 44 QSFPDD0_3V3_INT_L 28 48 INTL VCCRX1 QSFPDD0_VCCT

29 VCCTX Place close to QSFPDD Connector 12,24 QSFPDD_I2C_SCL 11 67 12 SCL VCCTX1 12,24 QSFPDD_I2C_SDA SDA IO_3p3V 1 B1 GND 4 R90 10.0K 47 GND 7 1 7 R91 10.0K 49 VS1 GND 13 2 Pin1 Pin7 8 R92 4.7K 50 VS2 GND 16 3 Pin2 Pin8 9 R93 4.7K VS3 GND 19 4 Pin3 Pin9 10 GND 20 5 Pin4 Pin10 11 GND Pin5 Pin11 B 46 23 6 12 B 66 RESERVED1 GND 26 Pin6 Pin12 69 RESERVED2 GND 32 RESERVED3 GND 65 35 Molex_QSFPDD_Cage NC GND 38 GND 39 GND_QSFPDD0_CAGE GND_QSFPDD0_CAGE 77 GND 42 Guide Pins 78 MTH1 GND 45 Guide Pins MTH2 GND 51 GND 54 MOLEX MPN 2031431355 GND 57 GND 58 GND 61 GND 64 1M R94 GND 70 GND 73 GND 76 1000pF C156 GND

2027180100 GND_QSFPDD0_CAGE

A A

Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 23of 66 5 4 3 2 1 5 4 3 2 1 QSFPDD1

NOTE 1: Bypass Capacitors should be placed as close to the associated 20-pin D connector as possible. D NOTE 2: zQSFP 100-ohm termination is implemented via the FPGA on-chip termination. NOTE 3: DC blocking capacitors are in the module for RX and TX. J6 NOTE 4: 1uH inductors should have a DC Resistance of less than 0.1-ohm. 36 17 21 QSFPDD1_TX0_P QSFPDD1_RX0_P 21 37 TX1P RX1P 18 IO_3p3V QSFPDD1_VCCT 21 QSFPDD1_TX0_N QSFPDD1_RX0_N 21 L18 1uH 3 TX1N RX1N 22 21 QSFPDD1_TX1_P QSFPDD1_RX1_P 21 2 TX2P RX2P 21 21 QSFPDD1_TX1_N QSFPDD1_RX1_N 21 33 TX2N RX2N 14 21 QSFPDD1_TX2_P QSFPDD1_RX2_P 21 34 TX3P RX3P 15 C157 C158 C159 C160 C161 C162 21 QSFPDD1_TX2_N QSFPDD1_RX2_N 21 6 TX3N RX3N 25 21 QSFPDD1_TX3_P QSFPDD1_RX3_P 21 5 TX4P RX4P 24 0.1uF 22uF 0.1uF 10uF 22uF 22uF 21 QSFPDD1_TX3_N QSFPDD1_RX3_N 21 74 TX4N RX4N 55 21 QSFPDD1_TX4_P QSFPDD1_RX4_P 21 75 TX5P RX5P 56 QSFPDD1_VCCR 21 QSFPDD1_TX4_N QSFPDD1_RX4_N 21 L19 1uH 41 TX5N RX5N 60 21 QSFPDD1_TX5_P QSFPDD1_RX5_P 21 40 TX6P RX6P 59 21 QSFPDD1_TX5_N QSFPDD1_RX5_N 21 71 TX6N RX6N 52 21 QSFPDD1_TX6_P QSFPDD1_RX6_P 21 72 TX7P RX7P 53 C163 C164 C165 C166 21 QSFPDD1_TX6_N QSFPDD1_RX6_N 21 44 TX7N RX7N 63 21 QSFPDD1_TX7_P QSFPDD1_RX7_P 21 43 TX8P RX8P 62 0.1uF 10uF 22uF 22uF C 21 QSFPDD1_TX7_N TX8N RX8N QSFPDD1_RX7_N 21 C L20 1uH QSFPDD1_VCC QSFPDD1_VCC

30 8 VCC1 68 C167 C168 C169 C170 44 QSFPDD1_3V3_MODSEL_L 9 MODSELL VCC2 QSFPDD1_VCCR 44 QSFPDD1_3V3_RESET_L 27 RESETL 0.1uF 10uF 22uF 22uF 44 QSFPDD1_3V3_MODPRS_L 31 MODPRSL 10 44 QSFPDD1_3V3_LPMODE INITMODE VCCRX 44 QSFPDD1_3V3_INT_L 28 48 INTL VCCRX1 QSFPDD1_VCCT

29 VCCTX Place close to QSFPDD Connector 12,23 QSFPDD_I2C_SCL 11 67 12 SCL VCCTX1 12,23 QSFPDD_I2C_SDA SDA IO_3p3V 1 B2 GND 4 R95 10.0K 47 GND 7 1 7 R96 10.0K 49 VS1 GND 13 2 Pin1 Pin7 8 50 VS2 GND 16 3 Pin2 Pin8 9 VS3 GND 19 4 Pin3 Pin9 10 GND 20 5 Pin4 Pin10 11 GND Pin5 Pin11 B 46 23 6 12 B 66 RESERVED1 GND 26 Pin6 Pin12 69 RESERVED2 GND 32 RESERVED3 GND 65 35 Molex_QSFPDD_Cage NC GND 38 GND 39 GND_QSFPDD1_CAGE GND_QSFPDD1_CAGE 77 GND 42 Guide Pins 78 MTH1 GND 45 Guide Pins MTH2 GND 51 GND 54 MOLEX MPN 2031431355 GND 57 GND 58 GND 61 GND 64 1M R97 GND 70 GND 73 GND 76 1000pF C171 GND

2027180100 GND_QSFPDD1_CAGE

A A

Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 24of 66 5 4 3 2 1 5 4 3 2 1 IO_3p3V PCIE_EP_3p3V PCIE_EP_12V PCIE_EP_12V PCIE_EP_3p3V IO_3p3V PCIe Endpoint Edge Connector J7 R98 R99 B1 A1 PCIE_EP_PRSNT_N R102 R103 B2 +12V_B1 PRSNT1_N A2 4.7K 4.7K B3 +12V_B2 +12V_A2 A3 4.7K 4.7K SW6 B4 +12V_B3 +12V_A3 A4 PCIE_EP_PRSNT_N 1 8 PCIE_EP_PRSNT_Nx16 PCIE_EP_3V3_I2C_SCL B5 GND GND A5 2 7 PCIE_EP_PRSNT_Nx8 44 PCIE_EP_3V3_I2C_SCL PCIE_EP_JTAG_TCK 44 PCIE_EP_3V3_I2C_SDA B6 SMCLK JTAG_TCK A6 3 6 PCIE_EP_PRSNT_Nx4 44 PCIE_EP_3V3_I2C_SDA PCIE_EP_JTAG_TDI 44 B7 SMDAT JTAG_TDI A7 4 OPEN 5 PCIE_EP_PRSNT_Nx1 PCIE_EP_JTAG_TDO 44 D IO_3p3V B8 GND JTAG_TDO A8 D PCIE_EP_JTAG_TMS 44 R104 10.0K B9 +3_3V JTAG_TMS A9 IO_3p3V TDA04H0SB1 R100 DNI B10 JTAG_TRSTN +3_3V A10 R105 10.0K R106 10.0K PCIE_EP_3V3_WAKEN R101 DNI B11 +3_3VAUX +3_3V A11 PCIE_EP_PERSTN Notes: Close --> select; WAKE_N PERST_N PCIE_EP_PERSTN 43,47 Open --> deselect PCIE TX to FPGA RX KEY PCIE RX from FPGA TX P/N Lane Reversal during layout is allowed PCIE_CLKREQn B12 A12 P/N Lane Reversal during layout is allowed B13 RSVD1 X1 GND A13 REFCLK_PCIE_EP_EDGE_P 39 B14 GND REFCLK+ A14 IO_3p3V 22 PCIE_EP_TX_P0 REFCLK_PCIE_EP_EDGE_N 39 1p2V_DDR4_CH23 B15 PET0P REFCLK- A15 22 PCIE_EP_TX_N0 PET0N GND PCIE_EP_RX_CP0 B16 A16 C172 0.22uF 25V0402 X6S PCIE_EP_RX_P0 22 PCIE_EP_PRSNT_Nx1 GND PER0P PCIE_EP_RX_CN0 B17 A17 C175 0.22uF 25V0402 X6S PCIE_EP_RX_N0 22 C173 C174 C176 B18 PRSNT2n_X1 PER0N A18 GND GND 1uF 0.1uF 0.1uF B19 A19 PCIE_RSV2 22 PCIE_EP_TX_P1 B20 PET1P X4 RSVD2 A20 U5 22 PCIE_EP_TX_N1 PET1N GND PCIE_EP_RX_CP1 B21 A21 C177 0.22uF 25V0402 X6S PCIE_EP_RX_P1 22 14 1 B22 GND PER1P A22 PCIE_EP_RX_CN1 C178 0.22uF 25V0402 X6S PCIE_EP_3V3_I2C_SCL 13 VCC VL 2 PCIE_EP_RX_N1 22 PCIE_EP_I2C_SCL 19 B23 GND PER1N A23 PCIE_EP_3V3_I2C_SDA 12 IOVCC1IOVL1 3 22 PCIE_EP_TX_P2 PCIE_EP_I2C_SDA 19 B24 PET2P GND A24 PCIE_EP_3V3_WAKEN 11 IOVCC2IOVL2 4 22 PCIE_EP_TX_N2 PET2N GND PCIE_EP_RX_CP2 PCIE_CLKREQn IOVCC3IOVL3 PCIE_EP_WAKEN 19 B25 A25 C179 0.22uF 25V0402 X6S PCIE_EP_RX_P2 22 10 5 PCIE_1V2_CLKREQn 19 GND PER2P PCIE_EP_RX_CN2 IOVCC4IOVL4 B26 A26 C180 0.22uF 25V0402 X6S PCIE_EP_RX_N2 22 1p2V_DDR4_CH23 9 6 B27 GND PER2N A27 8 NC1 NC0 7 22 PCIE_EP_TX_P3 B28 PET3P GND A28 R832 TSn GND R833 C 22 PCIE_EP_TX_N3 PET3N GND PCIE_EP_RX_CP3 C B29 A29 C181 0.22uF 25V0402 X6S PCIE_EP_RX_P3 22 MAX3378E 4.7K PCIE_PWRBRKN B30 GND PER3P A30 PCIE_EP_RX_CN3 C182 0.22uF 25V0402 X6S 4.7K 44,47 PCIE_PWRBRKN RSVD3 PER3N PCIE_EP_RX_N3 22 PCIE_EP_PRSNT_Nx4 B31 A31 1p2V_DDR4_CH23 B32 PRSNT2n_X4 GND A32 PCIE_RSV4 IO_3p3V GND RSVD4 B33 A33 PCIE_RSV5 3p3V_STBY 22 PCIE_EP_TX_P4 B34 PET4P X8 RSVD5 A34 22 PCIE_EP_TX_N4 PET4N GND PCIE_EP_RX_CP4 B35 A35 C183 0.22uF 25V0402 X6S PCIE_EP_RX_P4 22 GND PER4P PCIE_EP_RX_CN4 B36 A36 C184 0.22uF 25V0402 X6S PCIE_EP_RX_N4 22 B37 GND PER4N A37 22 PCIE_EP_TX_P5 B38 PET5P GND A38 R794 move R794 to near U26 or U30 22 PCIE_EP_TX_N5 PET5N GND PCIE_EP_RX_CP5 for easy power split of 3p3V_STBY B39 A39 C185 0.22uF 25V0402 X6S PCIE_EP_RX_P5 22 100K GND PER5P PCIE_EP_RX_CN5 B40 A40 C186 0.22uF 25V0402 X6S PCIE_EP_RX_N5 22 B41 GND PER5N A41 22 PCIE_EP_TX_P6 B42 PET6P GND A42 22 PCIE_EP_TX_N6 PET6N GND PCIE_EP_RX_CP6 PCIE_CLKREQn B43 A43 C187 0.22uF 25V0402 X6S PCIE_EP_RX_P6 22 C1472 1pF R773 49.9 GND PER6P PCIE_EP_RX_CN6 PCIE_RSV2 B44 A44 C188 0.22uF 25V0402 X6S PCIE_EP_RX_N6 22 C1473 1pF R774 49.9 B45 GND PER6N A45 PCIE_PWRBRKN C1474 1pF R775 49.9 22 PCIE_EP_TX_P7 B46 PET7P GND A46 PCIE_RSV4 C1475 1pF R776 49.9 22 PCIE_EP_TX_N7 PET7N GND PCIE_EP_RX_CP7 PCIE_RSV5 B47 A47 C189 0.22uF 25V0402 X6S PCIE_EP_RX_P7 22 C1476 1pF R777 49.9 PCIE_EP_PRSNT_Nx8 GND PER7P PCIE_EP_RX_CN7 PCIE_RSV6 B48 A48 C190 0.22uF 25V0402 X6S PCIE_EP_RX_N7 22 C1477 1pF R778 49.9 B49 PRSNT2n_X8 PER7N A49 PCIE_RSV7 C1478 1pF R779 49.9 GND GND PCIE_EP_PRSNT_Nx1 C1479 1pF R780 49.9 B50 A50 PCIE_RSV7 PCIE_EP_PRSNT_Nx4 C1480 1pF R781 49.9 B 22 PCIE_EP_TX_P8 B B51 PET8P X16 RSVD7 A51 PCIE_EP_PRSNT_Nx8 C1481 1pF R782 49.9 22 PCIE_EP_TX_N8 PET8N GND PCIE_EP_RX_CP8 PCIE_EP_PRSNT_Nx16 B52 A52 C191 0.22uF 25V0402 X6S PCIE_EP_RX_P8 22 C1482 1pF R783 49.9 GND PER8P PCIE_EP_RX_CN8 B53 A53 C192 0.22uF 25V0402 X6S PCIE_EP_RX_N8 22 B54 GND PER8N A54 22 PCIE_EP_TX_P9 B55 PET9P GND A55 Note: Place near to golden finger 22 PCIE_EP_TX_N9 PET9N GND PCIE_EP_RX_CP9 B56 A56 C193 0.22uF 25V0402 X6S PCIE_EP_RX_P9 22 GND PER9P PCIE_EP_RX_CN9 B57 A57 C194 0.22uF 25V0402 X6S PCIE_EP_RX_N9 22 B58 GND PER9N A58 22 PCIE_EP_TX_P10 B59 PET10P GND A59 22 PCIE_EP_TX_N10 PET10N GND PCIE_EP_RX_CP10 B60 A60 C195 0.22uF 25V0402 X6S PCIE_EP_RX_P10 22 GND PER10P PCIE_EP_RX_CN10 B61 A61 C196 0.22uF 25V0402 X6S PCIE_EP_RX_N10 22 B62 GND PER10N A62 22 PCIE_EP_TX_P11 B63 PET11P GND A63 22 PCIE_EP_TX_N11 PET11N GND PCIE_EP_RX_CP11 B64 A64 C197 0.22uF 25V0402 X6S PCIE_EP_RX_P11 22 GND PER11P PCIE_EP_RX_CN11 B65 A65 C198 0.22uF 25V0402 X6S PCIE_EP_RX_N11 22 B66 GND PER11N A66 22 PCIE_EP_TX_P12 B67 PET12P GND A67 PCIe TX/RX signal naming convention 22 PCIE_EP_TX_N12 PET12N GND PCIE_EP_RX_CP12 B68 A68 C199 0.22uF 25V0402 X6S PCIE_EP_RX_P12 22 with respect to CPU GND PER12P PCIE_EP_RX_CN12 B69 A69 C200 0.22uF 25V0402 X6S PCIE_EP_RX_N12 22 B70 GND PER12N A70 22 PCIE_EP_TX_P13 B71 PET13P GND A71 22 PCIE_EP_TX_N13 PET13N GND PCIE_EP_RX_CP13 B72 A72 C201 0.22uF 25V0402 X6S PCIE_EP_RX_P13 22 GND PER13P PCIE_EP_RX_CN13 B73 A73 C202 0.22uF 25V0402 X6S PCIE_EP_RX_N13 22 A B74 GND PER13N A74 A 22 PCIE_EP_TX_P14 B75 PET14P GND A75 22 PCIE_EP_TX_N14 PET14N GND PCIE_EP_RX_CP14 B76 A76 C203 0.22uF 25V0402 X6S PCIE_EP_RX_P14 22 GND PER14P PCIE_EP_RX_CN14 B77 A77 C204 0.22uF 25V0402 X6S PCIE_EP_RX_N14 22 Intel Corporation, 101 Innovation Dr., San Jose CA 95134 B78 GND PER14N A78 Copyright (c) 2016, Intel Corporation. All Rights Reserved. 22 PCIE_EP_TX_P15 B79 PET15P GND A79 Title 22 PCIE_EP_TX_N15 PET15N GND PCIE_EP_RX_CP15 AgileX F-Series FPGA Dev Kit B80 A80 C205 0.22uF 25V0402 X6S PCIE_EP_RX_P15 22 PCIE_EP_PRSNT_Nx16 GND PER15P PCIE_EP_RX_CN15 B81 A81 C206 0.22uF 25V0402 X6S PCIE_EP_RX_N15 22 PCIE_RSV6 B82 PRSNT2n_X16 PER15N A82 Size Document Number Rev RSVD6 GND B A0 PCIE_Slot K57065-001-A Date:Friday, January 10, 2020 Sheet 25of 66 5 4 3 2 1 5 4 3 2 1

IO_1p8V SDM & Configuration

R107 R108 R109

10.0K 10.0K 10.0K SW1 U2A D AS_CS0_MSEL0 1 8 R110 1K D FPGA_JTAG_TDO MSEL1 2 7 R111 1K 44 FPGA_JTAG_TDO CR62 MSEL2 3 6 R112 1K FPGA_JTAG_TMS CT61 TDO 44 FPGA_JTAG_TMS 4 OPEN 5 FPGA_JTAG_TCK CU62 TMS 44 FPGA_JTAG_TCK FPGA_JTAG_TDI TCK 44 FPGA_JTAG_TDI CV61 TDA04H0SB1 FPGA_NCONFIG CB57 TDI 44 FPGA_NCONFIG FPGA_NSTATUS CH59 NCONFIG FPGA_OSC_CLK_1 CC60 NSTATUS 38 FPGA_OSC_CLK_1 OSC_CLK_1

FPGA_INIT_DONE CF59 44 FPGA_INIT_DONE AS_DATA1 CU60 SDM_IO0, INIT_DONE, PWRMGT_PWM0, PWRMGT_SCL AS_CLK R113 33 AS_CLK_R CT59 SDM_IO1, AVSTX8_DATA2, AS_DATA1, SDMMC_CFG_DATA1, NAND_RE_N AS_DATA2 CK59 SDM_IO2, AVSTX8_DATA0, AS_CLK, SDMMC_CFG_DATA0, NAND_ADQ0 AS_DATA0 CN60 SDM_IO3, AVSTX8_DATA3, AS_DATA2, SDMMC_CFG_DATA2, NAND_ADQ2 Config Mode MSEL2 MSEL1 MSEL0 AS_CS0_MSEL0 CR60 SDM_IO4, AVSTX8_DATA1, AS_DATA0, SDMMC_CFG_CMD, NAND_ADQ1 AS_DATA3 CM59 SDM_IO5, INIT_DONE, AS_NCSO0, SDMMC_CFG_CCLK, NAND_WE_N, MSEL0, CONF_DONE AS_FAST 0 0 1 SDM_IO6, AVSTX8_DATA4, AS_DATA3, SDMMC_CFG_DATA3, NAND_ADQ3 MSEL1 CY59 CL60 SDM_IO7, AS_NCSO2, NAND_ALE, MSEL1 AS_NORMAL 0 1 1 MSEL2 CV59 SDM_IO8, AVST_READY, AS_NCSO3, SDMMC_CFG_DATA4, NAND_RB CC58 SDM_IO9, AS_NCSO1, NAND_CLE, MSEL2 FPGA_SDM_SDA CE60 SDM_IO10, AVSTX8_DATA7, SDMMC_CFG_DATA7, NAND_ADQ5 40 FPGA_SDM_SDA CC56 SDM_IO11, AVSTX8_VALID, PWRMGT_SDA, NAND_ADQ6 HPS_RESETn CB59 SDM_IO12, PWRMGT_PWM0, PWRMGT_SDA, NAND_WP_N C 44 HPS_RESETn C FPGA_SDM_SCL CG60 SDM_IO13, AVSTX8_DATA5, SDMMC_CFG_DATA5, NAND_CE_N 40 FPGA_SDM_SCL FPGA_CVP_CONFDONE CA58 SDM_IO14, AVSTX8_CLK, PWRMGT_SCL, NAND_ADQ7 41,44 FPGA_CVP_CONFDONE FPGA_CONF_DONE CA60 SDM_IO15, AVSTX8_DATA6, SDMMC_CFG_DATA6, NAND_ADQ4 41,44 FPGA_CONF_DONE SDM_IO16, INIT_DONE, CONF_DONE, PWRMGT_SDA R114 2K CA54 RREF_SDM

CG62 IO_1p8V CE62 VSIGP_0 CN62 VSIGN_0 CL62 VSIGP_1 U6 BY59 VSIGN_1 C207 C208 GND B4 D3 AS_DATA0 0.1uF 0.1uF VCC DQ0 D2 AS_DATA1 FPGA_TEMP0p CC52 47 FPGA_TEMP0p DQ1 C4 AS_DATA2 FPGA_TEMP0n CA52 TEMPDIODE0AP 47 FPGA_TEMP0n W#/DQ2 D4 AS_DATA3 TEMPDIODE0AN DQ3 AS_CLK B2 A2 C DNU1 A3 IO_1p8V R116 CC62 DNU2 A5 240 0402 1% CA62 VREFP_ADC DNU3 VREFN_ADC R115 B1 AS_CS0_MSEL0C2 DNU4 B5 U52 1K S# DNU5 B C1 1 B DNU6 C3 VO CF61 DNU7 C5 3 CH61 DNU1 A4 DNU8 D1 NC C209 R814 BY55 DNU2 RESET#/DNU DNU9 D5 2 CB53 DNU3 DNU10 E1 GND 0.1uF 1K BY53 DNU4 DNU11 E2 REF1112AIDBZR DNU5 DNU12 E3 SOT23-3 B3 DNU13 E4 VSS DNU14 E5 DNU15 MT25QU02GCBB3E12-1SIT SDM

AGFB014R24_2486A

IO_1p8V

R117 10.0K FPGA_JTAG_TMS R118 10.0K FPGA_JTAG_TDI FPGA_JTAG_TCK R119 1K A R120 10.0K FPGA_NSTATUS A

R121 10.0K FPGA_NCONFIG R122 10.0K FPGA_INIT_DONE Intel Corporation,101 innovation Dr, San Jose, CA 95134 R123 10.0K FPGA_CONF_DONE R124 10.0K FPGA_CVP_CONFDONE Title R125 10.0K HPS_RESETn AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 26of 66 5 4 3 2 1 5 4 3 2 1 Bank HPS

D D U2J

AH5 31 EMMC_CLK HPS_IOA_1, GPIO0_IO0, SPIM0_SS1_N, SPIS0_CLK, UART0_CTS_N, NAND_ADQ0, USB0_CLK, SDMMC_CCLK 31 EMMC_CMD AD1 AG6 HPS_IOA_2, GPIO0_IO1, SPIM1_SS1_N, SPIS0_MOSI, UART0_RTS_N, NAND_ADQ1, USB0_STP, SDMMC_CMD 31 EMMC_DATA0 HPS_IOA_3, GPIO0_IO2, SPIS0_SS0_N, UART0_TX, I2C1_SDA, NAND_WE_N, USB0_DIR, SDMMC_DATA0 31 EMMC_DATA1 AB1 AG4 HPS_IOA_4, GPIO0_IO3, SPIS0_MISO, UART0_RX, I2C1_SCL, NAND_RE_N, USB0_DATA0, SDMMC_DATA1 31 EMMC_DATA2 HPS_IOA_5, GPIO0_IO4, SPIM0_CLK, UART1_CTS_N, I2C0_SDA, NAND_WP_N, USB0_DATA1, SDMMC_DATA2 31 EMMC_DATA3 AD3 AF5 HPS_IOA_6, GPIO0_IO5, SPIM0_MOSI, UART1_RTS_N, I2C0_SCL, NAND_ADQ2, USB0_NXT, SDMMC_DATA3 31 EMMC_DATA4 HPS_IOA_7, GPIO0_IO6, SPIM0_MISO, MDIO2_MDIO, UART1_TX, I2C_EMAC2_SDA, NAND_ADQ3, USB0_DATA2, SDMMC_DATA4 31 EMMC_DATA5 AC2 AF1 HPS_IOA_8, GPIO0_IO7, SPIM0_SS0_N, MDIO2_MDC, UART1_RX, I2C_EMAC2_SCL, NAND_CLE, USB0_DATA3, SDMMC_DATA5 31 EMMC_DATA6 HPS_IOA_9, GPIO0_IO8, SPIM1_CLK, SPIS1_CLK, MDIO1_MDIO, I2C_EMAC1_SDA, NAND_ADQ4, USB0_DATA4, SDMMC_DATA6 31 EMMC_DATA7 AB3 AF3 HPS_IOA_10, GPIO0_IO9, SPIM1_MOSI, SPIS1_MOSI, MDIO1_MDC, I2C_EMAC1_SCL, NAND_ADQ5, USB0_DATA5, SDMMC_DATA7 HPS_IOA_11, GPIO0_IO10, SPIM1_MISO, SPIS1_SS0_N, MDIO0_MDIO, I2C_EMAC0_SDA, NAND_ADQ6, USB0_DATA6 44 RSV_SD_RESETn AA2 AC4 HPS_IOA_12, GPIO0_IO11, SPIM1_SS0_N, SPIS1_MISO, MDIO0_MDC, I2C_EMAC0_SCL, NAND_ADQ7, USB0_DATA7 28 ENET_GTX_CLK HPS_IOA_13, GPIO0_IO12, NAND_ALE, USB1_CLK, EMAC0_TX_CLK 28 ENET_TX_EN V1 AA4 HPS_IOA_14, GPIO0_IO13, NAND_RB, USB1_STP, EMAC0_TX_CTL 28 ENET_RX_CLK HPS_IOA_15, GPIO0_IO14, NAND_CE_N, USB1_DIR, EMAC0_RX_CLK 28 ENET_RX_DV T1 AD5 HPS_IOA_16, GPIO0_IO15, USB1_DATA0, EMAC0_RX_CTL 28 ENET_TXD0 HPS_IOA_17, GPIO0_IO16, NAND_ADQ8, USB1_DATA1, EMAC0_TXD0 28 ENET_TXD1 P1 AF7 HPS_IOA_18, GPIO0_IO17, NAND_ADQ9, USB1_NXT, EMAC0_TXD1 C 28 ENET_RXD0 C M1 HPS_IOA_19, GPIO0_IO18, NAND_ADQ10, USB1_DATA2, EMAC0_RXD0 28 ENET_RXD1 HPS_IOA_20, GPIO0_IO19, SPIM1_SS1_N, NAND_ADQ11, USB1_DATA3, EMAC0_RXD1 28 ENET_TXD2 AF9 W2 HPS_IOA_21, GPIO0_IO20, SPIM1_CLK, SPIS0_CLK, UART0_CTS_N, I2C1_SDA, NAND_ADQ12, USB1_DATA4, EMAC0_TXD2 28 ENET_TXD3 HPS_IOA_22, GPIO0_IO21, SPIM1_MOSI, SPIS0_MOSI, UART0_RTS_N, I2C1_SCL, NAND_ADQ13, USB1_DATA5, EMAC0_TXD3 28 ENET_RXD2 AB5 U2 HPS_IOA_23, GPIO0_IO22, SPIM1_MISO, SPIS0_SS0_N, UART0_TX, I2C0_SDA, NAND_ADQ14, USB1_DATA6, EMAC0_RXD2 28 ENET_RXD3 HPS_IOA_24, GPIO0_IO23, SPIM1_SS0_N, SPIS0_MISO, UART0_RX, I2C0_SCL, NAND_ADQ15, USB1_DATA7, EMAC0_RXD3 28 ENET_INTn AC6 H1 HPS_IOB_1, GPIO1_IO0, SPIM1_CLK, UART0_CTS_N, NAND_ADQ0, EMAC1_TX_CLK AA6 HPS_IOB_2, GPIO1_IO1, SPIM1_MOSI, UART0_RTS_N, NAND_ADQ1, EMAC1_TX_CTL 29 UART_TX HPS_IOB_3, GPIO1_IO2, SPIM1_MISO, UART0_TX, I2C0_SDA, NAND_WE_N, EMAC1_RX_CLK 29 UART_RX F1 AD7 HPS_IOB_4, GPIO1_IO3, SPIM1_SS0_N, UART0_RX, I2C0_SCL, NAND_RE_N, EMAC1_RX_CTL N2 HPS_IOB_5, GPIO1_IO4, SPIM1_SS1_N, SPIS1_CLK, UART1_CTS_N, NAND_WP_N, EMAC1_TXD0 AB7 HPS_IOB_6, GPIO1_IO5, SPIS1_MOSI, UART1_RTS_N, NAND_ADQ2, EMAC1_TXD1 40 HPS_I2C_SDA HPS_IOB_7, GPIO1_IO6, SPIS1_SS0_N, UART1_TX, I2C1_SDA, NAND_ADQ3, EMAC1_RXD0 40 HPS_I2C_SCL L2 AC8 HPS_IOB_8, GPIO1_IO7, SPIS1_MISO, UART1_RX, I2C1_SCL, NAND_CLE, EMAC1_RXD1 30 MICTOR_JTAG_TCK HPS_IOB_9, GPIO1_IO8, JTAG_TCK, SPIS0_CLK, MDIO2_MDIO, I2C_EMAC2_SDA, NAND_ADQ4, EMAC1_TXD2 30 MICTOR_JTAG_TMS J2 AA8 HPS_IOB_10, GPIO1_IO9, JTAG_TMS, SPIS0_MOSI, MDIO2_MDC, I2C_EMAC2_SCL, NAND_ADQ5, EMAC1_TXD3 30 MICTOR_JTAG_TDO HPS_IOB_11, GPIO1_IO10, JTAG_TDO, SPIS0_SS0_N, MDIO0_MDIO, I2C_EMAC0_SDA, NAND_ADQ6, EMAC1_RXD2 30 MICTOR_JTAG_TDI G2 AD9 HPS_IOB_12, GPIO1_IO11, JTAG_TDI, SPIS0_MISO, MDIO0_MDC, I2C_EMAC0_SCL, NAND_ADQ7, EMAC1_RXD3 30 SD_DATA0 V3 HPS_IOB_13, GPIO1_IO12, I2C1_SDA, NAND_ALE, SDMMC_DATA0, EMAC2_TX_CLK 30 SD_CMD HPS_IOB_14, GPIO1_IO13, I2C1_SCL, NAND_RB, SDMMC_CMD, EMAC2_TX_CTL 30 SD_CLK AB9 T3 HPS_IOB_15, GPIO1_IO14, UART1_TX, NAND_CE_N, SDMMC_CCLK, EMAC2_RX_CLK 30 SD_DATA1 AC10 HPS_IOB_16, GPIO1_IO15, UART1_RX, SDMMC_DATA1, EMAC2_RX_CTL 30 SD_DATA2 P3 HPS_IOB_17, GPIO1_IO16, UART1_CTS_N, NAND_ADQ8, SDMMC_DATA2, EMAC2_TXD0 30 SD_DATA3 HPS_IOB_18, GPIO1_IO17, SPIM0_SS1_N, UART1_RTS_N, NAND_ADQ9, SDMMC_DATA3, EMAC2_TXD1 B 38 HPS_OSC_CLK AD11 B M3 HPS_IOB_19, GPIO1_IO18, SPIM0_MISO, MDIO1_MDIO, I2C_EMAC1_SDA, NAND_ADQ10, SDMMC_DATA4, EMAC2_RXD0 AC12 HPS_IOB_20, GPIO1_IO19, SPIM0_SS0_N, MDIO1_MDC, I2C_EMAC1_SCL, NAND_ADQ11, SDMMC_DATA5, EMAC2_RXD1 H3 HPS_IOB_21, GPIO1_IO20, SPIM0_CLK, SPIS1_CLK, I2C_EMAC2_SDA, NAND_ADQ12, SDMMC_DATA6, EMAC2_TXD2 HPS_IOB_22, GPIO1_IO21, SPIM0_MOSI, SPIS1_MOSI, I2C_EMAC2_SCL, NAND_ADQ13, SDMMC_DATA7, EMAC2_TXD3 28 ENET_MDIO AD13 F3 HPS_IOB_23, GPIO1_IO22, SPIM0_MISO, SPIS1_SS0_N, MDIO0_MDIO, I2C_EMAC0_SDA, NAND_ADQ14, EMAC2_RXD2 28 ENET_MDC HPS_IOB_24, GPIO1_IO23, SPIM0_SS0_N, SPIS1_MISO, MDIO0_MDC, I2C_EMAC0_SCL, NAND_ADQ15, EMAC2_RXD3 AH19 AJ20 DNU6 DNU7

HPS IO

AGFB014R24_2486A

A A

U7A

27 ENET_MDC 36 37 MDC 27 ENET_MDIO Ethernet Interface C210 MDIO E_RX_CLK 43 ENET_RSTn 42 35 R127 33 ENET_RX_CLK 27 No Activity: OFF 0.1uF IO_3p3V RESET_N RX_CLK_PHYAD2 D D Activity (RX, TX) : Blinking J8 27 ENET_INTn 38 24 R128 0 ENET_GTX_CLK 27 NAME Pin Value Description 14 220 R126 INT_N/PME_N2 GTX_CLK ACTIVITY_LED 13 YA 25 PHYAD2 35 1 ID = b"100" YK TX_EN ENET_TX_EN 27 Yellow 11 On-Chip Termination Resistors for the Differential Pairs TD0_P E_RX_DV 12 CT0 C211 0.01uF 33 R129 33 ENET_RX_DV 27 PHYAD1 15 0 CT0 10 RX_DV_CLK125_EN TD0_N MDI_HPS_P0 2 22 ENET_TXD3 27 PHYAD0 17 0 4 MDI_HPS_N0 3 TXRXP_A TXD3 21 MDI INTERFACE ENET_TXD2 27 RGMII TD1_P 6 CT1 C212 0.01uF MDI_HPS_P1 5 TXRXM_A TXD2 20 MODE3 27 1 (10/100/1000 half-/full-duplex) CT1 TXRXP_B TXD1 ENET_TXD1 27 5 MDI_HPS_N1 6 19 ENET_TXD0 27 TD1_N MDI_HPS_P2 7 TXRXM_B TXD0 MODE2 28 1 3 MDI_HPS_N2 8 TXRXP_C TD2_P MDI_HPS_P3 TXRXM_C E_RXD0 18 1 CT2 C213 0.01uF 10 32 R130 33 ENET_RXD0 27 MODE1 31 1 GND_TAB CT2 MDI_HPS_N3 TXRXP_D RXD0_MODE0 E_RXD1 19 2 11 31 R131 33 ENET_RXD1 27 GND_TAB TD2_N TXRXM_D RXD1_MODE1 E_RXD2 28 R132 33 ENET_RXD2 27 MODE0 32 1 RXD2_MODE2 E_RXD3 8 27 R133 33 ENET_RXD3 27 GND_ETH_PHY Orange TD3_P 7 CT3 C214 0.01uF RXD3_MODE3 ClK125_EN 33 0 No clockoutput from pin41 Link OFF 15 CT3 9 single led Link ON OK TD3_N IO_3p3V LED_MODE 41 1 mode LINK_LED 17 16 220 R134 R135 12.1K ENET_RSET 48 GK GOA ISET 41 CLK125_NDO_LED_MODE Green C215 CLK125_NDO_LED_MODE Activity ENET_LED1 17 ENET_L829-1J1T-43 0.1uF ENET_LED2 15 LED1_PHYAD0/PME_N1 ENET_1.8V_DVDDH C C Link LED2_PHYAD1 LINK_LED IO_1p8V IO_1p8V R136 DNI ENET_LED2 R137 4.7K ACTIVITY_LED R138 DNI ENET_LED1 R139 4.7K R140 ENET_XI 46 R141 4.7K E_RXD3 R142 DNI L1 R143 45 XI R144 4.7K E_RXD2 R145 DNI 1.00K XO 742792780 L2 1.00K R146 4.7K E_RXD1 R147 DNI 742792780 R148 4.7K E_RXD0 R149 DNI Q1 KSZ9031RN R150 DNI E_RX_DV R151 4.7K 3 FDV305N Q2 Q3 R152 4.7K E_RX_CLK R153 DNI 3 3 FDV305N FDV305N Q4 R154 4.7K CLK125_NDO_LED_MODE R155 DNI 3 FDV305N 1 BOOT-STRAPS 1 ENET_LED2 1 1 ENET_LED1 2 2 2

2 Place near KSZ9031RN PHY IO_3p3V ENET_3.3V_AVDDH IO_1p8V ENET_1.2V_AVDLL_PLL L3 U7B R156 4.7K ENET_MDC ENET_3.3V_AVDDH 44 ENET_1.2V_AVDDL R157 4.7K ENET_MDIO AVDDL_PLL 47 43 V1 C216 C217 C218 R158 4.7K ENET_INTn NC1 LDO_O 3A, 30 Ohm FB B 12 R159 4.7K ENET_RSTn B ENET_1.8V_DVDDH 1 AVDDH 9 22uF 0.1uF 0.1uF AVDDH AVDDL 4 ENET_1.2V_DVDDL 40 AVDDL PHY_25M_3.3V PHY_25M_3.3V 16 DVDDH 18 IO_1p8V ENET_1.8V_DVDDH Y1 34 DVDDH DVDDL 14 L4 R160 10K 1 4 DVDDH DVDDL 39 EN VCC 49 DVDDL 30 2 3 R161 75 ENET_XI P_GND DVDDL GND OUT 13 26 3A, 30 Ohm FB C219 C220 C221 C222 29 NC DVDDL 23 25MHz VSS DVDDL 22uF 0.1uF 0.1uF 0.1uF KSZ9031RN Use AVDDH supply for the crystal/clock pins (XI, XO) ENET_VDD1.2V ENET_VDD1.2V L5 ENET_1.2V_AVDLL_PLL IO_3p3V PHY_25M_3.3V IO_3p3V Ethernet 1.2V LDO R162 0 250mA Max. 3A, 30 Ohm FB C223 C224 1M R724 U8 22uF 0.01uF C226 C227 C228 10 1 C225 R164 VIN1 VOUT1 0.01uF 0.01uF 0.01uF C229 R163 9 2 R165 L6 ENET_1.2V_AVDDL 1000pF C706 VIN2 VOUT2 2.61K 4.7K 120pF 4.7K 22uF 7 3 3A, 30 Ohm FB C230 A EN VFB C231 C232 GND_ETH_PHY A 6 4 C233 C234 22uF SS POK 0.01uF 0.01uF C235 8 5 22uF 2.2uF L7 ENET_1.2V_DVDDL Intel Corporation,101 innovation Dr, San Jose, CA 95134 NC GND 11 R166 EPAD 1nF 1.87K Title AgileX F-Series FPGA Dev Kit EY1501DI-ADJ 3A, 30 Ohm FB C236 C237 C238 C239 C240 C241 C242 Copyright (c) 2014, Intel Corporation. All Rights Reserved. 22uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF Size Document Number Rev B A0 PUS: AVDDH/DVDDH before 1.2V core K57065-001-A Date:Friday, January 10, 2020 Sheet 28of 66 5 4 3 2 1 5 4 3 2 1

FT232R_VCCIO USB-UART Port

OE=L A=X (Floating input allowed) R167 Y=Z 10.0K U9 D 1 D OE UART_EN 39

R169 33 4 2 27 UART_RX Y A IO_1p8V 5 3 C243 0.1uF VCC GND J9 1 Debugging Loopback 2 SN74AUP1G126DCK disable U9 and short J9 CON2 U10 FT232R_VCCIO 1 U11 NC 0.1uF C244 19 FT232R_3V3OUT FT232R_VCCIO USB_UART_5V USB_UART_CON_5V WE 651005136421 FT232R_TXD 30 VCC 2 4 FT232R_RXD 2 TXD 16 R171 0 L8 J10 27 UART_TX A Y 32 RXD 3V3OUT 1 MICRO_USB_CONN FT232R_VCCIO 8 RTS VCCIO 742792780 1 3 5 31 CTS 15 USB_UART_DM 2 VBUS D- GND VCC 6 DTR USBDM 14 USB_UART_DP 3 DSR USBDP D+ R172 7 4 ID 3 DCD 5 C SN74AUP1T17DCKR 4.7K C245 C246 C RI R173 0 IO_1p8V U12 FT232R_VCCIO 18 25 39pF 39pF 6 7 8 9 1 UART_RESETn RESET NC1 23 6 3 1 2 5 UART_USB_PGND R174 10K NC 0.1uF C247 UART_TX_LED 22 NC2 5 U13 ID CBUS0 NC3 D- D+ UART_RX_LED 21 12 NC CBUS1 NC4

2 4 R175 DNI 10 13 VBUS R176 43 UART_RSTn A Y 11 CBUS2 NC5 29 C248 CBUS3 NC6 0 9 DNI 3 5 CBUS4 27 GND GND VCC FT232R_VCCIO OSCI 28 TPD4S012DRYR OSCO 4

SN74AUP1T17DCKR GREEN_LED D2 220 R177 TEST GND3 GND2 GND1 AGND EPAD_GND GREEN_LED D3 220 R178 4 FT232R 26 20 17 24 33 FT232R_VCCIO

R179 10K PWR_ENA

B USB_UART_5V USB_UART_CON_5V B FT232R_3V3OUT FT232R_VCCIO

C254 C255 C257 C249 C250 C251 C252 C253 4.7uF C256 0.1uF 0.01uF 22uF 0.1uF 2.2uF 0.1uF 2.2uF 22uF

A A

SD_3.3V IO_1p8V

SD_3.3V C258 R180 200K Micro SD Card D 0.1uF D U14 C261 C259 C262 2 19 VREF_B Vref_A Vref_B J11 2.2uF 0.1uF 0.1uF 3 18 C260 SD_CLK_3.3V 5 4 IO_1p8V 4 A1 B1 17 CLK VDD 5 A2 B2 16 SD_DATA0_3.3V 0.1uF SD_CMD_3.3V 3 27 SD_DATA0 R181 DNI SD_CLK 6 A3 B3 15 SD_DATA1_3.3V CMD 9 27 SD_DATA1 R182 1.00K SD_CMD 7 A4 B4 14 SD_DATA2_3.3V SD_DATA0_3.3V 7 CAGE 10 27 SD_DATA2 R183 1.00K SD_DATA0 8 A5 B5 13 SD_DATA3_3.3V SD_DATA1_3.3V 8 DAT0 CAGE 11 27 SD_DATA3 R184 1.00K SD_DATA1 9 A6 B6 12 SD_CMD_3.3V SD_DATA2_3.3V 1 DAT1 CAGE 12 27 SD_CMD A7 B7 DAT2 CAGE R185 1.00K SD_DATA2 27 SD_CLK 10 11 SD_CLK_3.3V SD_DATA3_3.3V 2 6 R186 1.00K SD_DATA3 A8 B8 CD/DAT3 VSS EN 20 1 EN GND MicroSD_skt LSF0108PWR

R187 0

C C The B-side pullup resistors should SD_3.3V be sized according to signal frequency and current limits IO_1p8V IO_3p3V SD_3.3V SD_CLK_3.3V U15 R188 0.1 R189 499 SD_DATA0_3.3V SD_CMD_3.3V A2 A1 R191 499 SD_DATA1_3.3V SD_DATA0_3.3V R190 Vin Vout C263 R192 499 SD_DATA2_3.3V SD_DATA1_3.3V 4.7K C264 R193 499 SD_DATA3_3.3V SD_DATA2_3.3V B2 B1 0.1uF R194 330 SD_CMD_3.3V SD_DATA3_3.3V 2.2uF ON GND R195 330 SD_CLK_3.3V TPS22902BYFPR R196 DNI SD_DATA3_3.3V

43 SD_RSTn 2 1 2 1 2 1 ON Vih Threhold: 0.85V K2 K1 K2 K1 K2 K1 A A A D4 ESD5V3U2U D5 ESD5V3U2U D6 ESD5V3U2U 3 3 3

44 HPS_JTAG_TDO R197 0 J12 44 HPS_JTAG_TCK R198 0 1 2 R199 0 3 NC1 NC3 4 B 44 HPS_JTAG_TMS NC2 NC4 B 44 HPS_JTAG_TDI R200 0 5 6 R201 10K R202 10K 7 GND TRACECLK 8 R203 10K IO_1p8V IEC61000-4-2 (ESD): ± 20 kV (air / contact) 9 TRIGINTRIGOUT 10 R204 DNI 43 MICTOR_SRSTn nSRST NC 27 MICTOR_JTAG_TDO 11 12 MICTOR_PWR1 R205 0 IEC61000-4-4 (EFT): ±50 A (5/50 ns) R206 10K 13 TDO/SWOVTREF 14 R207 DNI RTCK Vsupply 27 MICTOR_JTAG_TCK 15 16 IEC61000-4-5 (surge): ±3 A (8/20 µs) 17 TCK TD7 18 27 MICTOR_JTAG_TMS TMS TD6 27 MICTOR_JTAG_TDI 19 20 MICTOR_JTAG_TRSTn 21 TDI TD5 22 23 nTRST TD4 24 25 TD15 TD3 26 27 TD14 TD2 28 29 TD13 TD1 30 LOGIC0A R208 10K 31 TD12 Logic0A 32 LOGIC0B R209 10K IO_1p8V 33 TD11 Logic0B 34 LOGIC1 R210 10K 35 TD10 LOGIC1 36 TRACECTL R211 10K IO_1p8V 37 TD9 TRACECTL 38 TD8 TD0 39 R212 10K MICTOR_SRSTn GND1 40 R213 10K MICTOR_JTAG_TRSTn GND2 41 R214 1.00K MICTOR_JTAG_TDI GND3 42 R215 1.00K MICTOR_JTAG_TDO GND4 43 R216 1.00K MICTOR_JTAG_TMS GND5 A R217 1.00K MICTOR_JTAG_TCK Mictor38P A

eMMC

U16C

eMMC PWR&GND A7 D E5 RFU1 D U16A E8 RFU2 G3 E9 RFU3 NC51 G12 eMMC Signals E10 RFU4 NC52 G13 R220 33 EMMC_DAT0 A3 F10 RFU5 NC53 G14 27 EMMC_DATA0 R221 33 EMMC_DAT1 A4 DAT0 G10 RFU6 NC54 H1 27 EMMC_DATA1 R222 33 EMMC_DAT2 A5 DAT1 K6 RFU7 NC55 H2 27 EMMC_DATA2 R218 33 EMMC_DAT3 B2 DAT2 K7 RFU8 NC56 H3 27 EMMC_DATA3 R223 33 EMMC_DAT4 B3 DAT3 K10 RFU9 NC57 H12 27 EMMC_DATA4 R219 33 EMMC_DAT5 B4 DAT4 P10 RFU10 NC58 H13 27 EMMC_DATA5 R224 33 EMMC_DAT6 B5 DAT5 RFU11 NC59 H14 27 EMMC_DATA6 R225 33 EMMC_DAT7 B6 DAT6 EMMC_DAT3 A1 NC60 J1 27 EMMC_DATA7 DAT7 EMMC_DAT4 A2 NC1 NC61 J2 M6 EMMC_DAT7 A8 NC2 NC62 J3 27 EMMC_CLK R226 33 EMMC_COMMAND M5 CLK A9 NC3 NC63 J12 27 EMMC_CMD H5 CMD A10 NC4 NC64 J13 DS A11 NC5 NC65 J14 EMMC_RSTn K5 A12 NC6 NC66 K1 43 EMMC_RSTn RST_N A13 NC7 NC67 K2 A14 NC8 NC68 K3 DS is used in HS400 mode B1 NC9 NC69 K12 MTFC8GAKAJCN-4M IT EMMC_DAT7 B7 NC10 NC70 K13 B8 NC11 NC71 K14 B9 NC12 NC72 L1 EMMC_COMMAND C C B10 NC13 NC73 L2 EMMC_COMMAND B11 NC14 NC74 L3 EMMC_COMMAND B12 NC15 NC75 L12 B13 NC16 NC76 L13 B14 NC17 NC77 L14 VDDIM C1 NC18 NC78 M1 EMMC_DAT5 C3 NC19 NC79 M2 EMMC_DAT6 C5 NC20 NC80 M3 C7 NC21 NC81 M7 C8 NC22 NC82 M8 C9 NC23 NC83 M9 C10 NC24 NC84 M10 C11 NC25 NC85 M11 C12 NC26 NC86 M12 C13 NC27 NC87 M13 C14 NC28 NC88 M14 EMMC_DAT5 D1 NC29 NC89 N1 U16B EMMC_DAT5 D2 NC30 NC90 N3 D3 NC31 NC91 N6 eMMC PWR&GND D4 NC32 NC92 N7 EMMC_CLK VDDIM C2 A6 D12 NC33 NC93 N8 VDDIM VSS1 NC34 NC94 C265 C266 E7 D13 N9 E6 VSS2 G5 D14 NC35 NC95 N10 VCC1 VSS3 NC36 NC96 B 1uF 0.1uF F5 H10 E1 N11 B IO_3p3V J10 VCC2 VSS4 J5 E2 NC37 NC97 N12 K9 VCC3 VSS5 K8 E3 NC38 NC98 N13 VCC4 VSS6 E12 NC39 NC99 N14 C6 C4 E13 NC40 NC100 P1 M4 VCCQ1 VSSQ1 N2 E14 NC41 NC101 P2 IO_1p8V N4 VCCQ2 VSSQ2 N5 F1 NC42 NC102 P7 EMMC_CLK P3 VCCQ3 VSSQ3 P4 F2 NC43 NC103 P8 P5 VCCQ4 VSSQ4 P6 F3 NC44 NC104 P9 VCCQ5 VSSQ5 F12 NC45 NC105 P11 IO_1p8V F13 NC46 NC106 P12 F14 NC47 NC107 P13 R227 10K EMMC_DATA0 MTFC8GAKAJCN-4M IT G1 NC48 NC108 P14 R228 10K EMMC_DATA1 G2 NC49 NC109 R229 10K EMMC_DATA2 NC50 R230 10K EMMC_DATA3 R231 10K EMMC_DATA4 IO_3p3V IO_1p8V R232 10K EMMC_DATA5 R233 10K EMMC_DATA6 MTFC8GAKAJCN-4M IT R234 10K EMMC_DATA7 C267 C268 C269 C270 C271 C272 C273 R235 10K EMMC_CMD R236 10K EMMC_RSTn 2.2uF 0.22uF 0.22uF 2.2uF 0.22uF 0.22uF 0.22uF

A A

U2M D D

CB61 U2N AD45 DNU8 BW18 DNU9 AD19 DNU10 W62 BV13 BY61 DNU11 V61 NC1 NC45 BU60 AE44 DNU12 U62 NC2 NC46 BU16 BY19 DNU13 T61 NC3 NC47 BU14 AF19 DNU14 P61 NC4 NC48 BT59 AH43 DNU15 N62 NC5 NC49 AD43 47 FPGA_TEMP1n AF43 TEMPDIODE0CN M61 NC6 NC50 AD17 47 FPGA_TEMP1p TEMPDIODE0CP L62 NC7 NC51 AD15 J62 NC8 NC52 AC62 G62 NC9 NC53 AC56 CM61 NC10 NC54 AC46 CM1 NC11 NC55 AC44 AJ46 CK61 NC12 NC56 AC42 BN50 DNU20 CK1 NC13 NC57 AC18 BK49 DNU21 CH1 NC14 NC58 AC16 BM49 DNU22 CF1 NC15 NC59 AC14 BL48 DNU23 CC8 NC16 NC60 AB61 BL44 DNU24 CC50 NC17 NC61 AB55 BU44 DNU25 CC22 NC18 NC62 AB47 C C BT49 DNU26 CC20 NC19 NC63 AB45 BV49 DNU27 CC2 NC20 NC64 AB43 BV51 DNU28 CC18 NC21 NC65 AB19 BU50 DNU29 CC16 NC22 NC66 AB17 BT51 DNU30 CC14 NC23 NC67 AB15 BL46 DNU31 CB7 NC24 NC68 AB13 BR50 DNU32 CB51 NC25 NC69 AB11 BN46 DNU33 CB21 NC26 NC70 AA62 BV53 DNU34 CB19 NC27 NC71 AA56 BP47 DNU35 CB17 NC28 NC72 AA52 BN44 DNU36 CB15 NC29 NC73 AA48 BU52 DNU37 CB13 NC30 NC74 AA46 BV55 DNU38 CB1 NC31 NC75 AA44 BT53 DNU39 CA56 NC32 NC76 AA42 BM47 DNU40 CA50 NC33 NC77 AA20 BV45 DNU41 CA18 NC34 NC78 AA18 BM45 DNU42 CA16 NC35 NC79 AA16 BT45 DNU43 CA14 NC36 NC80 AA14 BU46 DNU44 BY57 NC37 NC81 AA12 BU48 DNU45 BY21 NC38 NC82 AA10 BV47 DNU46 BY17 NC39 NC83 BT47 DNU47 BY15 NC40 BL50 DNU48 BV19 NC41 DNU49 NC42 B BN48 BV17 B BV57 DNU50 STRAP_NODE_ID0 BV15 NC43 BU54 DNU51 STRAP_NODE_ID1 NC44 DNU52 STRAP_UPI_MODE NC DNU AGFB014R24_2486A

AGFB014R24_2486A

A A

5 4 3 2 1 5 4 3 2 1

FPGA_VCC FPGA Power 1

U2O D D

BV23 AY21 BV21 VCC VCC AV41 BT23 VCC VCC AV39 BT21 VCC VCC AV37 BP41 VCC VCC AV25 BP39 VCC VCC AV23 BP37 VCC VCC AV21 BP35 VCC VCC AT41 BP33 VCC VCC AT39 BP31 VCC VCC AT37 BP29 VCC VCC AT25 BP27 VCC VCC AT23 BP25 VCC VCC AT21 BP23 VCC VCC AP41 BP21 VCC VCC AP39 BM41 VCC VCC AP37 BM39 VCC VCC AP25 BM37 VCC VCC AP23 BM35 VCC VCC AP21 BM33 VCC VCC AM41 BM31 VCC VCC AM39 BM29 VCC VCC AM37 C C BM27 VCC VCC AM35 BM25 VCC VCC AM33 BM23 VCC VCC AM31 BM21 VCC VCC AM29 BK41 VCC VCC AM27 BK39 VCC VCC AM25 BK37 VCC VCC AM23 BK25 VCC VCC AM21 BK23 VCC VCC AK41 BK21 VCC VCC AK39 BH41 VCC VCC AK37 BH39 VCC VCC AK35 BH37 VCC VCC AK33 BH25 VCC VCC AK31 BH23 VCC VCC AK29 BH21 VCC VCC AK27 BF41 VCC VCC AK25 BF39 VCC VCC AK21 BF37 VCC VCC AH41 BF25 VCC VCC AF41 BF23 VCC VCC BF21 VCC BD41 VCC BV35 VCC VCCP B BD39 BV33 B BD37 VCC VCCP BV31 BD25 VCC VCCP BV29 BD23 VCC VCCP BV27 BD21 VCC VCCP BT35 BB41 VCC VCCP BT33 BB39 VCC VCCP BT31 BB37 VCC VCCP BT29 BB23 VCC VCCP BT27 BB21 VCC VCCP AH35 AY41 VCC VCCP AH33 AY39 VCC VCCP AH31 AY37 VCC VCCP AH29 AY25 VCC VCCP AH27 AY23 VCC VCCP AF35 VCC VCCP AF33 VCCP AF31 VCCP 51 VCC_SENSE R238 0 VCCLSENSE BB25 AF29 R239 0 GNDSENSE BA26 VCCLSENSE VCCP AF27 51 VSS_SENSE GNDSENSE VCCP

C274 0.1uF

A AGFB014R24_2486A A

U2P 0p9V_VCCH 0p9V_VCCL_HPS U2X AK23 BF43 AH25 VCCL_HPS VCCH BD43 1p8V 1p2V_DDR4_CH23 AH23 VCCL_HPS VCCH AY43 BR36 CB39 AF25 VCCL_HPS VCCH AV43 BR34 VCCPT VCCIO_PIO_2A CB37 D VCCPLLDIG_HPS AF23 VCCL_HPS VCCH BL20 BR32 VCCPT VCCIO_PIO_2A BY39 D FB10 VCCL_HPS VCCH BJ20 BR30 VCCPT VCCIO_PIO_2A BY37 5A, 10mOhm AD23 VCCH BE20 AJ36 VCCPT VCCIO_PIO_2A 80ohm @ 100Mhz AB23 VCCPLLDIG_HPS VCCH BC20 AJ34 VCCPT CB35 VCCPLLDIG_HPS VCCH AJ32 VCCPT VCCIO_PIO_2B CB33 0p8V_VCCL_SDM BT43 AJ30 VCCPT VCCIO_PIO_2B BY35 BV41 VCCH_SDM VCCPT VCCIO_PIO_2B BY33 BV39 VCCL_SDM 0p9V_VCCH 1p2V_VCCR VCCIO_PIO_2B BT41 VCCL_SDM BH43 BV37 CB31 VCCPLLDIG_SDM BT39 VCCL_SDM VCC_HSSI_GXPL1 BE44 BT37 VCCRCORE VCCIO_PIO_2C CB29 FB9 VCCL_SDM VCC_HSSI_GXPL1 BC44 BR28 VCCRCORE VCCIO_PIO_2C BY31 5A, 10mOhm CB45 VCC_HSSI_GXPL1 BA44 BR26 VCCRCORE VCCIO_PIO_2C BY29 80ohm @ 100Mhz BY45 VCCPLLDIG_SDM VCC_HSSI_GXPL1 AW44 BR24 VCCRCORE VCCIO_PIO_2C VCCPLLDIG_SDM VCC_HSSI_GXPL1 AU44 AJ28 VCCRCORE CB27 0p9V_VCCH VCC_HSSI_GXPL1 AR44 AJ26 VCCRCORE VCCIO_PIO_2D CB25 BT19 VCC_HSSI_GXPL1 AJ24 VCCRCORE VCCIO_PIO_2D BY27 BR20 VCC_HSSI_GXER1 VCCH_GXPL1 FB11 1p8V AH37 VCCRCORE VCCIO_PIO_2D BY25 BP19 VCC_HSSI_GXER1 BE46 AF37 VCCRCORE VCCIO_PIO_2D 1p2V_DDR4_CH01 BK19 VCC_HSSI_GXER1 VCCH_GXPL1 BC46 VCCRCORE AD39 BH19 VCC_HSSI_GXER1 VCCH_GXPL1 AY47 80ohm @ 100Mhz 1p8V_FLTR VCCIO_PIO_3A AD37 BD19 VCC_HSSI_GXER1 VCCH_GXPL1 AW46 5A, 10mOhm CC34 VCCIO_PIO_3A AB39 BB19 VCC_HSSI_GXER1 VCCH_GXPL1 AV47 CC32 VCCA_PLL VCCIO_PIO_3A AB37 AY19 VCC_HSSI_GXER1 VCCH_GXPL1 AU46 CC30 VCCA_PLL VCCIO_PIO_3A AW20 VCC_HSSI_GXER1 VCCH_GXPL1 AN46 CC28 VCCA_PLL AD35 C C AU20 VCC_HSSI_GXER1 VCCH_GXPL1 AA34 VCCA_PLL VCCIO_PIO_3B AD33 VCC_HSSI_GXER1 0p9V_VCCRT_GXPL1 AA32 VCCA_PLL VCCIO_PIO_3B AB35 1p1V_VCCH_GXER1 AA30 VCCA_PLL VCCIO_PIO_3B AB33 BP17 BD49 AA28 VCCA_PLL VCCIO_PIO_3B BM17 VCCH_GXER1 VCCRT_GXPL1 BC48 VCCA_PLL AD31 BK17 VCCH_GXER1 VCCRT_GXPL1 BB49 CB43 VCCIO_PIO_3C AD29 BB17 VCCH_GXER1 VCCRT_GXPL1 AY49 BY43 VCCADC VCCIO_PIO_3C AB31 AY17 VCCH_GXER1 VCCRT_GXPL1 AV49 VCCADC VCCIO_PIO_3C AB29 VCCH_GXER1 VCCRT_GXPL1 AT49 1p8V VCCIO_PIO_3C 0p9V_VCCRT_GXER1 VCCRT_GXPL1 AR48 CC48 AD27 BP15 VCCRT_GXPL1 AP49 CA48 VCCBAT VCCIO_PIO_3D AD25 BN14 VCCRT_GXER1 VCCRT_GXPL1 AN48 IO_1p8V VCCBAT VCCIO_PIO_3D AB27 BM15 VCCRT_GXER1 VCCRT_GXPL1 AM49 AH21 VCCIO_PIO_3D AB25 BL14 VCCRT_GXER1 VCCRT_GXPL1 VCCFUSE_GXP 1p8V AF21 VCCIO_HPS VCCIO_PIO_3D BK15 VCCRT_GXER1 FB12 DNI AD21 VCCIO_HPS BV43 BJ14 VCCRT_GXER1 0p9V_VCCH CB41 VCCIO_HPS VCCN_PIO_SDM BG14 VCCRT_GXER1 BR44 FB13 220ohm BY41 VCCIO_SDM 0p6V_VREF_DDR4_CH23 BE14 VCCRT_GXER1 VCCFUSE_GXP VCCIO_SDM CC38 BC14 VCCRT_GXER1 VCCCLK_GXPL1 1p8V VCCPLL_HPS VREFB2AN0 CC36 BB15 VCCRT_GXER1 BH47 FB14 220ohm AC22 VREFB2BN0 BA14 VCCRT_GXER1 VCCCLK_GXPL1 BH45 AA22 VCCPLL_HPS CC26 AY15 VCCRT_GXER1 VCCCLK_GXPL1 VCCPLL_HPS VREFB2CN0 CC24 VCCRT_GXER1 VREFB2DN0 AW14 2p5V C275 C276 VCCPLL_SDM VCCRT_GXER1 B 0p9V_VCCH VCCRTPLL_GXER1 AV15 AR18 FB15 220ohm CB47 0p6V_VREF_DDR4_CH01 B FB16 VCCRT_GXER1 VCCCLK_GXER1 1uF 1uF BY47 VCCPLL_SDM AA38 BG16 VCCPLL_SDM VREFB3AN0 AA36 VCCRTPLL_GXER1 VREFB3BN0 BE16 C277 VCCFUSEWR_SDM 5A, 10mOhm VCCRTPLL_GXER1 CB49 AA26 80ohm @ 100Mhz 1uF BY49 VCCFUSEWR_SDM VREFB3CN0 AA24 VCCFUSEWR_SDM VREFB3DN0 C1450 C1448 C1449 AGFB014R24_2486A

22uF 1uF 1uF AGFB014R24_2486A

0p6V_VREF_DDR4_CH01 VCCPLLDIG_HPS VCCPLLDIG_SDM VCCRTPLL_GXER1 1p8V 1p8V_FLTR FB17 C278 C279 C280 C281 C282 C283 C284 C285 C286 C287 1p8V FB38 VCCCLK_GXPL1

1uF 1uF 1uF 1uF 1uF 1uF 0.1uF 0.1uF 0.1uF 0.1uF 80ohm @ 100Mhz 5A, 10mOhm 80ohm @ 100Mhz FB18 5A, 10mOhm

A A VCCFUSE_GXP 0p6V_VREF_DDR4_CH23 80ohm @ 100Mhz VCCPLL_SDM VCCPLL_HPS 5A, 10mOhm Intel Corporation,101 innovation Dr, San Jose, CA 95134 C289 C290 C291 C292 C1201 C1202 C294 C295 C296 C297 Title AgileX F-Series FPGA Dev Kit 1uF 1uF 1uF 1uF 1uF 4.7uF 0.1uF 0.1uF 0.1uF 0.1uF Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 34of 66 5 4 3 2 1 5 4 3 2 1 FPGA GND 1

U2Q U2R U2S

Y9 R18 E6 CW42 CM37 CD37 Y7 GND GND R16 E58 GND GND CW40 CM23 GND GND CD35 Y61 GND GND R14 E56 GND GND CW4 CL58 GND GND CD33 Y59 GND GND R12 E54 GND GND CW38 CL44 GND GND CD31 D Y57 GND GND R10 E52 GND GND CW36 CL30 GND GND CD3 D Y55 GND GND P53 E50 GND GND CW34 CL2 GND GND CD29 Y53 GND GND P39 E48 GND GND CW32 CL16 GND GND CD27 Y51 GND GND P25 E46 GND GND CW30 CK9 GND GND CD25 Y5 GND GND P11 E44 GND GND CW28 CK51 GND GND CD23 Y49 GND GND N60 E42 GND GND CW26 CK37 GND GND CD21 Y47 GND GND N46 E40 GND GND CW24 CK23 GND GND CD19 Y45 GND GND N4 E4 GND GND CW22 CJ8 GND GND CD17 Y43 GND GND N32 E38 GND GND CW20 CJ62 GND GND CD15 Y41 GND GND N18 E36 GND GND CW2 CJ60 GND GND CD13 Y39 GND GND M53 E34 GND GND CW18 CJ6 GND GND CD11 Y37 GND GND M39 E32 GND GND CW16 CJ58 GND GND CD1 Y35 GND GND M25 E30 GND GND CW14 CJ56 GND GND CC6 Y33 GND GND M11 E28 GND GND CW12 CJ54 GND GND CC54 Y31 GND GND L60 E26 GND GND CW10 CJ52 GND GND CC46 Y3 GND GND L46 E24 GND GND CV9 CJ50 GND GND CC44 Y29 GND GND L4 E22 GND GND CV51 CJ48 GND GND CC42 Y27 GND GND L32 E20 GND GND CV37 CJ46 GND GND CC40 Y25 GND GND L18 E2 GND GND CV23 CJ44 GND GND CC4 Y23 GND GND K9 E18 GND GND CU58 CJ42 GND GND CC12 Y21 GND GND K7 E16 GND GND CU44 CJ40 GND GND CC10 Y19 GND GND K61 E14 GND GND CU30 CJ4 GND GND CB9 Y17 GND GND K59 E12 GND GND CU2 CJ38 GND GND CB55 Y15 GND GND K57 E10 GND GND CU16 CJ36 GND GND CB5 C C Y13 GND GND K55 DC60 GND GND CT9 CJ34 GND GND CB3 Y11 GND GND K53 DC58 GND GND CT51 CJ32 GND GND CB23 Y1 GND GND K51 DC44 GND GND CT37 CJ30 GND GND CB11 W60 GND GND K5 DC4 GND GND CT23 CJ28 GND GND CA8 W46 GND GND K49 DC30 GND GND CR58 CJ26 GND GND CA6 W4 GND GND K47 DC2 GND GND CR44 CJ24 GND GND CA46 W32 GND GND K45 DC16 GND GND CR30 CJ22 GND GND CA44 W18 GND GND K43 DB9 GND GND CR2 CJ20 GND GND CA42 V53 GND GND K41 DB61 GND GND CR16 CJ2 GND GND CA40 V39 GND GND K39 DB59 GND GND CP9 CJ18 GND GND CA4 V25 GND GND K37 DB51 GND GND CP7 CJ16 GND GND CA38 V11 GND GND K35 DB37 GND GND CP61 CJ14 GND GND CA36 U60 GND GND K33 DB3 GND GND CP59 CJ12 GND GND CA34 U46 GND GND K31 DB23 GND GND CP57 CJ10 GND GND CA32 U4 GND GND K3 DB1 GND GND CP55 CH9 GND GND CA30 U32 GND GND K29 DA62 GND GND CP53 CH51 GND GND CA28 U18 GND GND K27 DA60 GND GND CP51 CH37 GND GND CA26 T53 GND GND K25 DA58 GND GND CP5 CH23 GND GND CA24 T39 GND GND K23 DA44 GND GND CP49 CG58 GND GND CA22 T25 GND GND K21 DA30 GND GND CP47 CG44 GND GND CA20 T11 GND GND K19 DA2 GND GND CP45 CG30 GND GND CA2 R8 GND GND K17 DA16 GND GND CP43 CG2 GND GND CA12 R62 GND GND K15 D61 GND GND CP41 CG16 GND GND CA10 GND GND GND GND GND GND B R60 K13 D53 CP39 CF9 C62 B R6 GND GND K11 D39 GND GND CP37 CF51 GND GND C60 R58 GND GND K1 D3 GND GND CP35 CF37 GND GND C46 R56 GND GND J60 D25 GND GND CP33 CF23 GND GND C4 R54 GND GND J46 D11 GND GND CP31 CE58 GND GND C32 R52 GND GND J4 D1 GND GND CP3 CE44 GND GND C2 R50 GND GND J32 CY9 GND GND CP29 CE30 GND GND C18 R48 GND GND J18 CY61 GND GND CP27 CE2 GND GND BY9 R46 GND GND H53 CY51 GND GND CP25 CE16 GND GND BY7 R44 GND GND H39 CY37 GND GND CP23 CD9 GND GND BY51 R42 GND GND H25 CY23 GND GND CP21 CD7 GND GND BY3 R40 GND GND H11 CY1 GND GND CP19 CD61 GND GND BY23 R4 GND GND G60 CW8 GND GND CP17 CD59 GND GND BY13 R38 GND GND G46 CW62 GND GND CP15 CD57 GND GND BY1 R36 GND GND G4 CW60 GND GND CP13 CD55 GND GND BW8 R34 GND GND G32 CW6 GND GND CP11 CD53 GND GND BW62 R32 GND GND G18 CW58 GND GND CP1 CD51 GND GND BW60 R30 GND GND F53 CW56 GND GND CN58 CD5 GND GND BW6 R28 GND GND F39 CW54 GND GND CN44 CD49 GND GND BW58 R26 GND GND F25 CW52 GND GND CN30 CD47 GND GND BW56 R24 GND GND F11 CW50 GND GND CN2 CD45 GND GND BW54 R22 GND GND E8 CW48 GND GND CN16 CD43 GND GND BW52 R20 GND GND E62 CW46 GND GND CM9 CD41 GND GND BW50 R2 GND GND E60 CW44 GND GND CM51 CD39 GND GND BW48 A GND GND GND GND GND GND A

AGFB014R24_2486A AGFB014R24_2486A AGFB014R24_2486A Intel Corporation,101 innovation Dr, San Jose, CA 95134 Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 35of 66 5 4 3 2 1 5 4 3 2 1

U2T U2U FPGA GND 2

BW46 BP53 BJ60 BE38 BW44 GND GND BP51 BJ6 GND GND BE26 BW42 GND GND BP5 BJ56 GND GND BE24 BW40 GND GND BP49 BJ54 GND GND BE22 BW38 GND GND BP45 BJ50 GND GND BE18 D BW36 GND GND BP43 BJ48 GND GND BE12 D BW34 GND GND BP3 BJ46 GND GND BE10 BW32 GND GND BP13 BJ44 GND GND BD9 BW30 GND GND BP11 BJ42 GND GND BD7 BW28 GND GND BN62 BJ40 GND GND BD61 BW26 GND GND BN60 BJ4 GND GND BD57 BW24 GND GND BN6 BJ38 GND GND BD55 BW22 GND GND BN56 BJ26 GND GND BD51 BW20 GND GND BN54 BJ24 GND GND BD47 BW2 GND GND BN42 BJ22 GND GND BD45 BW16 GND GND BN40 BJ18 GND GND BD3 BW14 GND GND BN4 BJ16 GND GND BD17 BW12 GND GND BN38 BJ12 GND GND BD15 BV9 GND GND BN36 BJ10 GND GND BD13 BV61 GND GND BN34 BH9 GND GND BD1 BV59 GND GND BN32 BH7 GND GND BC8 BV5 GND GND BN30 BH61 GND GND BC60 BV3 GND GND BN28 BH57 GND GND BC6 BV25 GND GND BN26 BH55 GND GND BC58 BV11 GND GND BN24 BH51 GND GND BC54 BU62 GND GND BN22 BH3 GND GND BC52 BU6 GND GND BN20 BH17 GND GND BC50 BU56 GND GND BN18 BH15 GND GND BC42 BU42 GND GND BN16 BH13 GND GND BC40 C C BU40 GND GND BN12 BH1 GND GND BC38 BU4 GND GND BN10 BG8 GND GND BC26 BU38 GND GND BM9 BG60 GND GND BC24 BU36 GND GND BM7 BG6 GND GND BC22 BU34 GND GND BM61 BG58 GND GND BC2 BU32 GND GND BM57 BG54 GND GND BC18 BU30 GND GND BM55 BG52 GND GND BC16 BU28 GND GND BM51 BG50 GND GND BC12 BU26 GND GND BM3 BG48 GND GND BB9 BU24 GND GND BM19 BG46 GND GND BB59 BU22 GND GND BM13 BG44 GND GND BB57 BU20 GND GND BM1 BG42 GND GND BB53 BU18 GND GND BL8 BG40 GND GND BB51 BU12 GND GND BL60 BG38 GND GND BB5 BU10 GND GND BL6 BG26 GND GND BB47 BT9 GND GND BL58 BG24 GND GND BB45 BT7 GND GND BL54 BG22 GND GND BB43 BT61 GND GND BL52 BG20 GND GND BB3 BT57 GND GND BL42 BG2 GND GND BB13 BT55 GND GND BL40 BG18 GND GND BB11 BT3 GND GND BL38 BG12 GND GND BA62 BT25 GND GND BL36 BF9 GND GND BA60 BT17 GND GND BL34 BF59 GND GND BA6 GND GND GND GND B BT15 BL32 BF57 BA56 B BT13 GND GND BL30 BF53 GND GND BA54 BT1 GND GND BL28 BF51 GND GND BA50 BR8 GND GND BL26 BF5 GND GND BA48 BR60 GND GND BL24 BF49 GND GND BA46 BR6 GND GND BL22 BF47 GND GND BA42 BR58 GND GND BL2 BF45 GND GND BA40 BR54 GND GND BL18 BF3 GND GND BA4 BR52 GND GND BL16 BF19 GND GND BA38 BR48 GND GND BL12 BF17 GND GND BA24 BR46 GND GND BK9 BF15 GND GND BA22 BR42 GND GND BK59 BF13 GND GND BA20 BR40 GND GND BK57 BF11 GND GND BA18 BR38 GND GND BK53 BE62 GND GND BA16 BR22 GND GND BK51 BE60 GND GND BA12 BR2 GND GND BK5 BE6 GND GND BA10 BR18 GND GND BK47 BE56 GND GND B61 BR16 GND GND BK45 BE54 GND GND B59 BR14 GND GND BK43 BE50 GND GND B53 BR12 GND GND BK3 BE48 GND GND B39 BP9 GND GND BK13 BE42 GND GND B3 BP59 GND GND BK11 BE40 GND GND B25 BP57 GND GND BJ62 BE4 GND GND B11 GND GND GND GND A A

AGFB014R24_2486A AGFB014R24_2486A Intel Corporation,101 innovation Dr, San Jose, CA 95134 Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 36of 66 5 4 3 2 1 5 4 3 2 1 FPGA GND 3 U2W U2V AL34 AF39 B1 AR58 AL32 GND GND AF17 AY9 GND GND AR54 AL30 GND GND AF15 AY7 GND GND AR52 AL28 GND GND AF13 AY61 GND GND AR50 AL26 GND GND AF11 D AY57 GND GND AR46 AL24 GND GND AE8 D AY55 GND GND AR42 AL22 GND GND AE62 AY51 GND GND AR40 AL20 GND GND AE60 AY45 GND GND AR38 AL2 GND GND AE6 AY3 GND GND AR26 AL18 GND GND AE56 AY13 GND GND AR24 AL12 GND GND AE54 AY1 GND GND AR22 AK9 GND GND AE50 AW8 GND GND AR2 AK59 GND GND AE46 AW60 GND GND AR12 AK57 GND GND AE42 AW6 GND GND AP9 AK53 GND GND AE40 AW58 GND GND AP59 AK51 GND GND AE4 AW54 GND GND AP57 AK5 GND GND AE38 AW52 GND GND AP53 AK49 GND GND AE36 AW50 GND GND AP51 AK47 GND GND AE34 AW48 GND GND AP5 AK45 GND GND AE32 AW42 GND GND AP47 AK43 GND GND AE30 AW40 GND GND AP45 AK3 GND GND AE28 AW38 GND GND AP43 AK19 GND GND AE26 AW26 GND GND AP3 AK11 GND GND AE24 AW24 GND GND AP19 AJ62 GND GND AE22 AW22 GND GND AP15 AJ60 GND GND AE20 AW2 GND GND AP11 AJ6 GND GND AE2 AW18 GND GND AN62 AJ56 GND GND AE18 AW16 GND GND AN60 AJ54 GND GND AE16 C C AW12 GND GND AN6 AJ50 GND GND AE14 AV9 GND GND AN56 AJ44 GND GND AE12 AV59 GND GND AN54 AJ42 GND GND AE10 AV57 GND GND AN50 AJ40 GND GND AD61 AV53 GND GND AN44 AJ4 GND GND AD57 AV51 GND GND AN42 AJ38 GND GND AD55 AV5 GND GND AN40 AJ22 GND GND AD51 AV45 GND GND AN4 AJ18 GND GND AD47 AV3 GND GND AN38 AJ10 GND GND AD41 AV19 GND GND AN36 AH9 GND GND AC60 AV17 GND GND AN34 AH7 GND GND AC58 AV13 GND GND AN32 AH61 GND GND AC54 AV11 GND GND AN30 AH57 GND GND AC52 AU62 GND GND AN28 AH55 GND GND AC50 AU60 GND GND AN26 AH51 GND GND AC48 AU6 GND GND AN24 AH47 GND GND AC40 AU56 GND GND AN22 AH39 GND GND AC38 AU54 GND GND AN12 AH3 GND GND AC36 AU50 GND GND AN10 AH1 GND GND AC34 AU48 GND GND AM9 AG8 GND GND AC32 AU42 GND GND AM7 AG60 GND GND AC30 AU40 GND GND AM61 AG58 GND GND AC28 AU4 GND GND AM57 AG54 GND GND AC26 GND GND GND GND B AU38 AM55 AG52 AC24 B AU26 GND GND AM51 AG50 GND GND AC20 AU24 GND GND AM47 AG48 GND GND AB59 AU22 GND GND AM45 AG44 GND GND AB57 AU18 GND GND AM43 AG42 GND GND AB53 AU16 GND GND AM3 AG40 GND GND AB51 AU14 GND GND AM17 AG38 GND GND AB49 AU12 GND GND AM15 AG36 GND GND AB41 AU10 GND GND AM13 AG34 GND GND AB21 AT9 GND GND AM1 AG32 GND GND AA60 AT7 GND GND AL8 AG30 GND GND AA58 AT61 GND GND AL60 AG28 GND GND AA54 AT57 GND GND AL6 AG26 GND GND AA50 AT55 GND GND AL58 AG24 GND GND AA40 AT51 GND GND AL54 AG22 GND GND A60 AT47 GND GND AL52 AG20 GND GND A58 AT45 GND GND AL50 AG2 GND GND A46 AT43 GND GND AL48 AG18 GND GND A4 AT3 GND GND AL46 AG16 GND GND A32 AT15 GND GND AL44 AG14 GND GND A2 AT1 GND GND AL42 AG12 GND GND A18 AR8 GND GND AL40 AG10 GND GND AF45 AR60 GND GND AL38 AF59 GND GND AF47 AR6 GND GND AL36 AF57 GND GND AF49 A GND GND AF53 GND GND AF51 A GND GND

AGFB014R24_2486A Intel Corporation,101 innovation Dr, San Jose, CA 95134 AGFB014R24_2486A Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 37of 66 5 4 3 2 1 5 4 3 2 1 Clock 1

D D

IO_1p8V SI5341_VDD FB19

220ohm C298 C299 C300 C301 SI5341_2p5V_VDDO FB20 2p5V 1uF 1uF 1uF 1uF

IO_3p3V C302 C303 220ohm set IO_VDD_SEL = 1, 1uF 1uF select VDDIO = VDDA FB21 SI5341_VDDA C304 U17 1uF 220ohm C305 C306 22 32 VDDO0 26 SI5341_1p8V_VDDO FB22 IO_1p8V 1uF 1uF 46 VDD VDDO1 29 60 VDD VDDO2 33 VDD VDDO3 36 C311 C307 C312 C308 C309 C313 C310 C314 220ohm 13 VDDO4 40 VDDA VDDO5 43 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF C C 7-bit I2C Address 74h VDDO6 49 18 VDDO7 52 39,40,44,46,47,50 MAIN_I2C_SDA SDA_SDIO VDDO8 39,40,44,46,47,50 MAIN_I2C_SCL 16 57 R242 1K SI5341_A1 IO_3p3V SI5341_A1 17 SCLK VDDO9 R241 1K SI5341_A0 SI5341_A0 19 A1_SDO R243 4.7K SI5341_I2C_SEL 39 A0_CSB 24 SI5341_OUT0p C315 0.1uF REFCLK_156M_QSFPDD_P 21 SI5341_ENn 11 I2C_SEL OUT0 23 SI5341_OUT0n C316 0.1uF 39,44 SI5341_ENn REFCLK_156M_QSFPDD_N 21 Default LVDS 156.25 MHz SI5341_IN_SEL0 3 OEB OUT0B IO_3p3V SI5341_IN_SEL1 4 IN_SEL0 28 SI5341_OUT1p R249 0 SI5341_RSTn 6 IN_SEL1 OUT1 27 SI5341_OUT1n R250 0 CLK_DDR4_CH1_P 14 44 SI5341_RSTn RSTB OUT1B CLK_DDR4_CH1_N 14 Default LVDS 33.333 MHz 63 31 SI5341_OUT2p R253 0 R244 R245 R247 4.7K 64 IN0 OUT2 30 SI5341_OUT2n R254 0 CLK_DDR4_CH3_P 20 Default LVDS 33.333 MHz 1 IN0_N OUT2B CLK_DDR4_CH3_N 20 10.0K 10.0K 2 IN1 35 SI5341_OUT3p R246 0 14 IN1_N OUT3 34 SI5341_OUT3n R248 0 CLK_DDR4_CH0_P 11 Default LVDS 33.333 MHz 15 IN2 OUT3B CLK_DDR4_CH0_N 11 SI5341_IN_SEL0 61 IN2_N 38 SI5341_OUT4p R251 0 SI5341_IN_SEL1 SI5341_XA 62 FBIN OUT4 37 SI5341_OUT4n R252 0 CLK_DDR4_CH2_P 17 FBIN_N OUT4B CLK_DDR4_CH2_N 17 Default LVDS 33.333 MHz Y2 3 48MHz 42 SI5341_OUT5p C317 0.1uF 4 2 SI5341_X1 7 OUT5 41 SI5341_OUT5n C318 0.1uF REFCLK_322M_QSFPDD_P 21 Default LVDS 322.265625 MHz 8 X1 OUT5B REFCLK_322M_QSFPDD_N 21 XA B 9 45 SI5341_OUT6p R255 0 B 1 SI5341_XB 10 XB OUT6 44 SI5341_OUT6n R256 0 CLK_SYS_100M_P 19 Default LVDS 100 MHz SI5341_X2 X2 OUT6B CLK_SYS_100M_N 19 SI5341_OUT7p 43 SI5341_FINC 48 51 R257 0 FINC OUT7 SI5341_OUT7n CLK_SYS_BAK_50M_P 13 43 SI5341_FDEC 25 50 R258 0 Default LVDS 50 MHz 5 FDEC OUT7B CLK_SYS_BAK_50M_N 13 47 SYNCB 54 SI5341_OUT8p R259 0 12 LOLB OUT8 53 FPGA_OSC_CLK_1 26 INTRB OUT8B Default LVCMOS 125 MHz 65 59 SI5341_OUT9p R834 0 ePAD OUT9 58 HPS_OSC_CLK 27 OUT9B Default LVCMOS 25 MHz RSVD1 RSVD2 RSVD3 RSVD4 Si5341A-D10654-GM 20 21 55 56

A A

Clock 2

IO_1p8V U18

SI2202_OUT0p REFCLK_PCIE_EP_P 38,40,44,46,47,50 MAIN_I2C_SCL R261 0 5% 0402 7 12 R262 0 R263 0 5% 0402 6 SCLK DIFF_0 13 SI2202_OUT0n R264 0 REFCLK_PCIE_EP_N 38,40,44,46,47,50 MAIN_I2C_SDA D R265 1K 8 SDA DIFF_0b D R260 1K SS_EN 17 R266 DNI DIFF_1 18 IO_1p8V R267 1K DIFF_1b 1p8V_SI52202 IO_1p8V R268 DNI 14 FB23 R269 1K 16 OE_0b 10 OE_1b VDD SI52202_PWRDNB 1 4 C320 C321 C322 C323 C707 C319 18pF PWRGD/PWRDNb VDDX 19 220ohm VDDA 15 0.1uF 0.1uF 0.1uF 0.1uF 4.7uF Y3 VDD_IO

3 25.00MHz 2 4 2 3 XIN/CLKIN 9 XOUT GND 11 GND 20 C324 18pF 1 GND 5 VSSR 21 GND_PAD

Si52202-A01AGM

C C

R805 R806 R807 R808 DNI DNI DNI DNI REFCLK_PCIE_EP_EDGE_N R824 DNI U72 REFCLK_PCIE_EP_EDGE_P R825 DNI

1 10 BUFFER_DIF0_P R797 0 25 REFCLK_PCIE_EP_EDGE_P REFCLK_PCIE_CH0_P 22 2 DIF_INA DIFF0 11 BUFFER_DIF0_N R798 0 25 REFCLK_PCIE_EP_EDGE_N DIF_INA# DIFF0# REFCLK_PCIE_CH0_N 22 REFCLK_PCIE_EP_P 5 13 BUFFER_DIF1_P R799 0 REFCLK_PCIE_CH2_P 22 IO_3p3V REFCLK_PCIE_EP_N 6 DIFF_INB DIFF1 14 BUFFER_DIF1_N R800 0 REFCLK_PCIE_CH2_N 22 R809 4.7K DIFF_INB# DIFF1# 23 17 REFCLK_PCIE_EP_N R826 DNI 1 IO_3p3V SEL_A_B# DIFF2 18 REFCLK_PCIE_EP_P R827 DNI SEL_A_B# Input SW7 R801 DNI 8 DIFF2# vSW_MODE 0 B CVS-01TB R804 1K 20 1 A R802 1K 9 DIFF3 21

12 OE0# DIFF3# ON R803 1K 19 OE1# IO_3p3V 22 OE2# 2 OE3# 15 GND B FB40 220ohm 3 7 B FB42 220ohm 4 VDDR3.3 GNDR 24 FB41 220ohm 16 VDDR3.3 GNDR 25 IO_1p8V VDD3.3 EPAD_GND C1518 C1520 C1523 C1521 C1519 C1522 9DML0441AKILF R273 10.0K 4.7uF 0.1uF 4.7uF 0.1uF 4.7uF 0.1uF SW2 4 5 R274 1K

29 UART_EN OPEN SI52202_PWRDNB 3 6 R275 1K SI5341_ENn 2 7 R276 1K 3p3V_STBY 38,44 SI5341_ENn USB_MAX_JTAGSEL 1 8 R277 1K 43,44 USB_MAX_JTAGSEL

R278 10.0K DIPSWITCH4 R279 10.0K OPEN = Enable 3p3V_STBY Closed = Disable FB24 U19 6 VDD 4 R270 22 CLK_PWR_M10 47 220ohm R271 4.7K 2 CLKp 5 R272 22 OE CLKn CLK_UBII_M10 43 C325 C326 A 3 1 A 4.7uF 0.1uF GND NC

510MCA50M0000AAGR Intel Corporation,101 innovation Dr, San Jose, CA 95134 Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 39of 66 5 4 3 2 1 5 4 3 2 1 I2C And PMBUS

IO_1p8V IO_3p3V

R280 4.7K R281 10.0K R282 4.7K R283 10.0K U20

26 FPGA_SDM_SCL 7 2 6 B0 A0 3 CORE_PMBUS_SCL 51 D 26 FPGA_SDM_SDA B1 A1 CORE_PMBUS_SDA 51 D IO_1p8V 5 OE FPGA_PMBUS_EN 44 8 1 IO_3p3V VCCB VCCA 4 C327 GND FXMA2102UMX 0.1uF C328

0.1uF

R284 DNI R285 DNI

IO_3p3V

R286 4.7K R287 4.7K U21 CORE_PMBUS_SCL 38,39,44,46,47,50 MAIN_I2C_SCL 7 2 R288 0 5% 0402 6 B0 A0 3 R289 0 5% 0402 CORE_PMBUS_SDA Place R288, R289 near to U20 38,39,44,46,47,50 MAIN_I2C_SDA B1 A1 C C IO_3p3V 5 OE MAIN_PMBUS_EN 44 8 1 IO_3p3V VCCB VCCA 4 C329 GND FXMA2102UMX 0.1uF C330

0.1uF

IO_3p3V

R290 10.0K IO_1p8V R291 10.0K R292 10.0K R293 4.7K SW3 R294 4.7K U22 FPGA_PMBUS_EN 4 5 R295 1K MAIN_I2C_SCL MAIN_PMBUS_EN OPEN 27 HPS_I2C_SCL 7 2 R296 0 5% 0402 3 6 R297 1K 6 B0 A0 3 R298 0 5% 0402 MAIN_I2C_SDA HPS_I2C_EN 2 7 R299 1K 27 HPS_I2C_SDA B1 A1 FPGA_I2C_EN 1 8 R300 1K IO_1p8V 5 B OE HPS_I2C_EN 44 B 1p2V_DDR4_CH01 8 1 IO_3p3V DIPSWITCH4 VCCB VCCA 4 R301 10.0K GND OPEN = Enable C331 Closed = Disable FXMA2102UMX 0.1uF C332

0.1uF

1p2V_DDR4_CH01 IO_3p3V

1p2V_DDR4_CH01 C333 C334

R302 4.7K 0.1uF 0.1uF R303 4.7K U23 1 14 VL VCC MAIN_I2C_SCL 13 FPGA_I2C_SCL 2 13 R304 0 5% 0402 3 IOVL1IOVCC1 12 R305 0 5% 0402 MAIN_I2C_SDA 13 FPGA_I2C_SDA A 4 IOVL2IOVCC2 11 A 5 IOVL3IOVCC3 10 6 IOVL4IOVCC4 9 7 NC0 NC1 8 GND TSn FPGA_I2C_EN 43 Intel Corporation,101 innovation Dr, San Jose, CA 95134 MAX3378E Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 40of 66 5 4 3 2 1 5 4 3 2 1 LEDs And PushButtons

IO_3p3V POWER LED D7 R306 56.2 5V

GREEN_LED D8 BLUE LED D Q5 R307 1K D

44 FPGA_3V3_LED0 FDV305N Q6 R308 DNI D9 46 PWR_LED_DR FDV305N R309 56.2 R310 10.0K GREEN_LED Q7

44 FPGA_3V3_LED1 FDV305N

D10 R311 56.2 3p3V_STBY

GREEN_LED D11 RED_LED R312 49.9 Q8 47 OVERTEMPn IO_3p3V 44 FPGA_3V3_LED2 FDV305N

R313 C C D12 R314 56.2 10.0K GREEN_LED U24 Q9 S1 1 2 3 2 43 FPGA_3V3_LED3 FDV305N PB Switch MR RESET HPS_COLD_RESETn 43

IO_3p3V 4 1 R315 VCC GND 100K MAX811 C335

IO_3p3V 0.1uF

D13 R316 56.2

GREEN_LED Q10 1p2V_PRE 3p3V_STBY 26,44 FPGA_CONF_DONE FDV305N

B B D14 R317 56.2 Note: move R318 close to U26, R318 R319 R320 to ease the split of 1p2V_PRE GREEN_LED 10.0K 10.0K 10.0K Q11 S2 R321 DNI 1 2 PB Switch 26,44 FPGA_CVP_CONFDONE FDV305N CPU_RESETn 13,44 C336 1000pF R322 1K

S3 1 2 PB Switch PCIE_PERSTn 43 C337 1000pF R323 1K

S4 1 2 PB Switch HPS_WARM_RESETn 43 C338 1000pF R324 1K

Large Mounting holes on the rear of boardLarge Mounting holes on the front of board Small Mounting holes on the front of board

MTH2 MTH3 A MTH1 A 1 1 1 DNI R325 GND GND GND Intel Corporation,101 innovation Dr, San Jose, CA 95134 MTH5 MTH6 MTH4 DNI C339 Title 1 1 AgileX F-Series FPGA Dev Kit 1 GND GND Copyright (c) 2014, Intel Corporation. All Rights Reserved. GND Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 41of 66 5 4 3 2 1 5 4 3 2 1

IO_3p3V QSFPDD LED D21 R704 200

GREEN_LED D LED_0603 D Q24 QSFPDD0_LED0 FDV305N 1p2V_DDR4_CH01 IO_3p3V LED 0 (Green) IO_3p3V

IO_3p3V C702 C703 R715 DNI R716 DNI 0.1uF 0.1uF R717 DNI U67 D22 1 14

Yellow VL VCC QSFPDD0_LED0 4 3 3 R705 200 13 QSFPDD0_FPGA_LED0 2 13

3 IOVL1IOVCC1 12 QSFPDD0_LED1 4 Green 13 QSFPDD0_FPGA_LED1 IOVL2IOVCC2 QSFPDD0_LED2 2 1 1 R706 200 13 QSFPDD0_FPGA_LED2 4 11 2 5 IOVL3IOVCC3 10 R710 4.7K 6 IOVL4IOVCC4 9 APHB1608CGKSYKC R711 4.7K 7 NC0 NC1 8 GND TSn QSFPDD0_LED1 R714 4.7K 1p2V_DDR4_CH01 MAX3378E

Q25 Q26 QSFPDD0_LED2 C C FDV305N FDV305N

1p2V_DDR4_CH01 IO_3p3V IO_3p3V

C704 C705 R718 DNI R719 DNI 0.1uF 0.1uF R721 DNI LED 1 (Green/Yellow) U68 IO_3p3V 1 14 D23 VL VCC QSFPDD1_LED0 13 QSFPDD1_FPGA_LED0 2 13 IOVL1IOVCC1 QSFPDD1_LED1 R707 200 13 QSFPDD1_FPGA_LED1 3 12 IOVL2IOVCC2 QSFPDD1_LED2 13 QSFPDD1_FPGA_LED2 4 11 5 IOVL3IOVCC3 10 GREEN_LED R720 4.7K 6 IOVL4IOVCC4 9 LED_0603 R722 4.7K 7 NC0 NC1 8 GND TSn R723 4.7K 1p2V_DDR4_CH01 Q27 MAX3378E QSFPDD1_LED0 FDV305N

B LED 2 (Green) B

IO_3p3V HW1

D24 LED3 (Green/Yellow) Port A Link

4 3 3Yellow R708 200 1

MT1 4 Green LED2 (Green) Port A Act. 2 1 1 R709 200 2 2 MT2 APHB1608CGKSYKC LED1 (Green/Yellow) Port B Link 3 QSFPDD1_LED1 MT3 LED0 (Green) Port B Act.

Q28 Q29 QSFPDD1_LED2 LIGHTPIPE_P-U90-1101-T00A-BP FDV305N FDV305N

A A

Intel Corporation,101 innovation Dr, San Jose, CA 95134 LED 3 (Green/Yellow) Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 42of 66 5 4 3 2 1 5 4 3 2 1

J13 FX2_SDA R326 0 MAX_SDA MICRO_USB_CONN 3p3V_USBPHY Bank 3: 3.3V IO UBII-MAX10 1 1 VBUS_5V VBUS 2 FX2_D_N C340 0.1uF D- FX2_D_P D+ 3 U26D FX2_FLAGB ID 4 R327 DNI U25 L5 5 1 4 FX2_PA1 M4 IO_3_L5/DIFFIO_TX_RX_B1N GND VCC FX2_PA4 L4 IO_3_M4/DIFFIO_RX_B2N U26H IO_3_L4/DIFFIO_TX_RX_B1P S5 FX2_PA2 M5 G5 9 8 7 6 100K R328 FX2_RESETn 2 3 1 2 FX2_PA3 K5 IO_3_M5/DIFFIO_RX_B2P USB_T_CLK H6 IO_2_G5/CLK0N/DIFFIO_RX_L18N D RESET MR PB Switch FX2_PA6 N4 IO_3_K5/DIFFIO_TX_RX_B3N H5 IO_2_H6/CLK0P/DIFFIO_RX_L18P D MAX811 FX2_PA5 J5 IO_3_N4/DIFFIO_RX_B4N CLK_UBII_M10 39 H4 IO_2_H5/CLK1N/DIFFIO_RX_L20N FX2_PB5 N5 IO_3_J5/DIFFIO_TX_RX_B3P USB_DISABLEn N2 IO_2_H4/CLK1P/DIFFIO_RX_L20P R329 FX2_PB3 N6 IO_3_N5/DIFFIO_RX_B4P FX2_RESETn N3 IO_2_N2/DPCLK0/DIFFIO_RX_L22N FX2_PB2 N7 IO_3_N6/DIFFIO_TX_RX_B5N G9 IO_2_N3/DPCLK1/DIFFIO_RX_L22P 29 UART_RSTn 3p3V_USBPHY FX2_PD5 M7 IO_3_N7/DIFFIO_RX_B6N G10 IO_6_G9/CLK2P/DIFFIO_RX_R14P U28 28 ENET_RSTn 0 U27 3p3V_USBPHY FX2_PD4 N8 IO_3_M7/DIFFIO_TX_RX_B5P F13 IO_6_G10/CLK2N/DIFFIO_RX_R14N 30 SD_RSTn 1 3 42 FX2_RESETn FX2_PD7 J6 IO_3_N8/DIFFIO_RX_B6P E13 IO_6_F13/CLK3P/DIFFIO_RX_R16P 31 EMMC_RSTn 3 D+ 2 7 AVCC RESET 15 FX2_SCL R330 2.00K FX2_PD6 M8 IO_3_J6/DIFFIO_TX_RX_B7N F9 IO_6_E13/CLK3N/DIFFIO_RX_R16N 30 MICTOR_SRSTn 4.7nF C341 GND D- AVCC SCL 16 FX2_SDA R331 2.00K FX2_PA0 K6 IO_3_M8/DIFFIO_RX_B8N F10 IO_6_F9/DPCLK3/DIFFIO_RX_R26P TPD2EUSB30 11 SDA FX2_PB6 M9 IO_3_K6/DIFFIO_TX_RX_B7P IO_6_F10/DPCLK2/DIFFIO_RX_R26N 17 VCC 44 FX2_WAKEUP FX2_PA7 J7 IO_3_M9/DIFFIO_RX_B8P H1 VCC WAKEUP FX2_PB0 IO_3_J7/DIFFIO_TX_RX_B9N 41 FPGA_3V3_LED3 IO_1B_H1/VREFB1N0 27 K7 46,50,53,58 EM_PMBUS_ALERTn L1 32 VCC 29 FX2_FLAGA N12 IO_3_K7/DIFFIO_TX_RX_B9P N11 IO_2_L1/VREFB2N0 38 SI5341_FINC 46,51 LT_PMBUS_ALERTn 43 VCC CTL0 30 FX2_FLAGB FX2_PB4 M13 IO_3_N12 K13 IO_3_N11/VREFB3N0 40 FPGA_I2C_EN 55 VCC CTL1 31 FX2_FLAGC FX2_SLWRn N10 IO_3_M13/DIFFIO_TX_RX_B10N D13 IO_5_K13/VREFB5N0 VCC CTL2 FX2_SLRDn M12 IO_3_N10/DIFFIO_RX_B11N PCIE_EP_PERSTNB7 25,47IO_6_D13/VREFB6N0 Y4 9 1 FX2_SLRDn FX2_PB1 N9 IO_3_M12/DIFFIO_TX_RX_B10P IO_8_B7/VREFB8N0 4 8 DMINUS RDY0 2 FX2_SLWRn FX2_PB7 M11 IO_3_N9/DIFFIO_RX_B11P MAX10 10M04SCU169 1 3 IFCLK = 48MHz DPLUS RDY1 FX2_FLAGC L11 IO_3_M11/DIFFIO_TX_RX_B12N USB_T_CLK R332 22 13 54 FX2_FLAGA J8 IO_3_L11/DIFFIO_TX_RX_B12P 24.00MHz 24M_XTALIN 5 IFCLK CLKOUT FX2_SCL K8 IO_3_J8/DIFFIO_TX_RX_B14N 2 24M_XTALOUT XTALIN IO_3_K8/DIFFIO_TX_RX_B14P 4 41 PCIE_PERSTn M10 XTALOUT MAX_SDA L10 IO_3_M10/DIFFIO_TX_RX_B16N C C342 C343 C FX2_PA0 33 18 FX2_PB0 IO_3_L10/DIFFIO_TX_RX_B16P 12pF 12pF FX2_PA1 34 PA0 PB0 19 FX2_PB1 MAX10 10M04SCU169 FX2_PA2 35 PA1 PB1 20 FX2_PB2 3p3V_STBY FX2_PA3 36 PA2 PB2 21 FX2_PB3 FX2_PA4 37 PA3 PB3 22 FX2_PB4 FX2_PA5 38 PA4 PB4 23 FX2_PB5 R333 DNI R334 FX2_PA6 39 PA5 PB5 24 FX2_PB6 FX2_PA7 40 PA6 PB6 25 FX2_PB7 PA7 PB7 10.0K 14 45 FX2_PD0 U26I RESERVED PD0 46 FX2_PD1 E5 6 PD1 47 FX2_PD2 USB_MAX_TMS G1 IO_1B_E5/JTAGEN/DIFFIO_RX_L9P 10 AGND PD2 48 FX2_PD3 USB_MAX_TCK G2 IO_1B_G1/TMS/DIFFIO_RX_L11N AGND PD3 49 FX2_PD4 USB_MAX_TDI F5 IO_1B_G2/TCK/DIFFIO_RX_L11P 12 PD4 50 FX2_PD5 USB_MAX_TDO F6 IO_1B_F5/TDI/DIFFIO_RX_L12N GND PD5 FX2_PD6 IO_1B_F6/TDO/DIFFIO_RX_L12P 26 51 41 HPS_COLD_RESETn B9 28 GND PD6 52 FX2_PD7 D8 IO_8_B9/DEV_CLRN/DIFFIO_RX_T16N 38 SI5341_FDEC 41 GND PD7 R335 10.0K D7 IO_8_D8/DEV_OE/DIFFIO_RX_T18P GND IO_8_D7/BOOT_SEL 53 41 HPS_WARM_RESETn D6 56 GND 57 R336 10.0K C4 IO_8_D6/CRC_ERROR/DIFFIO_RX_T22N GND EXPOSED_PAD 3p3V_STBY R337 10.0K C5 IO_8_C4/NSTATUS/DIFFIO_RX_T24P CY7C68013A_QFN R338 10.0K E7 IO_8_C5/CONF_DONE/DIFFIO_RX_T24N INPUT_ONLY_8_E7/NCONFIG

B MAX10 10M04SCU169 B 3p3V_STBY

C344 0.1uF 3p3V_STBY 0402 25V 3p3V_USBPHY X6S 3p3V_STBY U29 R339 DNI EXT_JTAG_TCK 1 14 EXT_JTAG_TMS 4 NO1 V+ VBUS_5V R340 10.0K FX2_WAKEUP R341 R342 R343 EXT_JTAG_TDI 8 NO2 2 USB_MAX_TCK EXT_JTAG_TDO 11 NO3 COM1 5 USB_MAX_TMS 1K 1K 1K R345 NO4 COM2 7 USB_MAX_TDI R344 C345 (TCK) FX2_PD0 16 COM3 10 USB_MAX_TDO 1K (TMS) FX2_PD1 3 NC1 COM4 20.0K 0.1uF J14 (TDI) FX2_PD2 9 NC2 1 2 R346 0 USB_DISABLEn (TDO) FX2_PD3 12 NC3 13 44 EXT_JTAG_TCK NC4 EN 44 EXT_JTAG_TDO 3 4 5 6 15 6 44 EXT_JTAG_TMS 39,44 USB_MAX_JTAGSEL 7 8 IN GND 9 10 TS3A5018RSVR 44 EXT_JTAG_TDI USB_MAX_JTAG = "1", Debug mode. UQFN-16 3p3V_STBY 3p3V_USBPHY 70247-1051 EXT UBII is disabled on UBII MAX10. FB25 PLACE NEAR CY7C68013A IN = "0" NC <--> COM R347 IN = "1" NO <--> COM A A 600 Ohm, 0.5A, 0.35DCR C346 C347 C348 C349 C350 C351 C352 C353 C354 1K External JTAG Header 0603 22uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF Intel Corporation,101 innovation Dr, San Jose, CA 95134 0603 Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 43of 66 5 4 3 2 1 5 4 3 2 1

Bank 8: 3.3V IO Bank 5: 1.2V IO UBII-MAX10 2 3p3V_STBY U26E U26G K10 C10 13 QSFPDD0_1V2_RESET_L 38,39,40,46,47,50 MAIN_I2C_SCL K11 IO_5_K10/DIFFIO_RX_R1P A8 IO_8_C10/DIFFIO_RX_T14P 13 QSFPDD0_1V2_MODPRS_L 38,39,40,46,47,50 MAIN_I2C_SDA J10 IO_5_K11/DIFFIO_RX_R2P C9 IO_8_A8/DIFFIO_RX_T15P 13 QSFPDD0_1V2_LPMODE 38,39 SI5341_ENn L12 IO_5_J10/DIFFIO_RX_R1N A9 IO_8_C9/DIFFIO_RX_T14N 13 QSFPDD0_1V2_INT_L 38 SI5341_RSTn R348 R349 R350 R351 K12 IO_5_L12/DIFFIO_RX_R2N B10 IO_8_A9/DIFFIO_RX_T15N 13 QSFPDD1_1V2_RESET_L 23 QSFPDD0_3V3_RESET_L 1K 1K 1K 1K L13 IO_5_K12/DIFFIO_RX_R7P A10 IO_8_B10/DIFFIO_RX_T16P 13 QSFPDD1_1V2_MODPRS_L 23 QSFPDD0_3V3_MODPRS_L D J12 IO_5_L13 A11 IO_8_A10/DIFFIO_RX_T17P D 23 QSFPDD0_3V3_LPMODE 13 QSFPDD1_1V2_MODSEL_L J9 IO_5_J12/DIFFIO_RX_R7N E8 IO_8_A11/DIFFIO_RX_T17N 13 QSFPDD1_1V2_INT_L 23 QSFPDD0_3V3_INT_L J13 IO_5_J9/DIFFIO_RX_R8P A7 IO_8_E8/DIFFIO_RX_T18N SW4 24 QSFPDD1_3V3_RESET_L 13 QSFPDD0_1V2_MODSEL_L H10 IO_5_J13/DIFFIO_RX_R9P A6 IO_8_A7/DIFFIO_RX_T19P JTAG_INPUT_SOURCE 1 8 13 QSFPDD1_1V2_LPMODE 24 QSFPDD1_3V3_MODPRS_L H13 IO_5_H10/DIFFIO_RX_R8N B6 IO_8_A6/DIFFIO_RX_T19N PWR_MAX10_BYPASSn 2 7 24 QSFPDD1_3V3_LPMODE 13,41 CPU_RESETn H9 IO_5_H13/DIFFIO_RX_R9N A4 IO_8_B6/DIFFIO_RX_T20P MICTOR_BYPASSn 3 6 24 QSFPDD1_3V3_INT_L 13 FPGA_LED0 G13 IO_5_H9/DIFFIO_RX_R10P B5 IO_8_A4/DIFFIO_RX_T21P FPGA_BYPASSn 4 OPEN 5 24 QSFPDD1_3V3_MODSEL_L 13 FPGA_LED1 H8 IO_5_G13/DIFFIO_RX_R11P A3 IO_8_B5/DIFFIO_RX_T20N 23 QSFPDD0_3V3_MODSEL_L 13 FPGA_LED2 G12 IO_5_H8/DIFFIO_RX_R10N PWR_MAX10_JTAG_TMS E6 IO_8_A3/DIFFIO_RX_T21N TDA04H0SB1 47 PWR_MAX10_JTAG_TMS 13 FPGA_LED3 IO_5_G12/DIFFIO_RX_R11N PWR_MAX10_JTAG_TCK B3 IO_8_E6/DIFFIO_RX_T22P 47 PWR_MAX10_JTAG_TCK B4 IO_8_B3/DIFFIO_RX_T23P JTAG Master Selection: MAX10 10M04SCU169 25,47 PCIE_PWRBRKN PWR_MAX10_JTAG_TDI A5 IO_8_B4/DIFFIO_RX_T23N USB_DISABLEn = 0: External JTAG 47 PWR_MAX10_JTAG_TDI PWR_MAX10_JTAG_TDO IO_8_A5/DIFFIO_RX_T25P USB_DISABLEn = 1: On-Board UBII/PCIe EP Edge 47 PWR_MAX10_JTAG_TDO A2 B2 IO_8_A2/DIFFIO_RX_T26P JTAG_INPUT_SOURCE = 0: PCIe EP edge 39,43 USB_MAX_JTAGSEL IO_8_B2/DIFFIO_RX_T26N JTAG_INPUT_SOURCE = 1: On-Board UBII Bank 6: 1.8V IO USB_MAX_JTAG = "1", Debug mode. MAX10 10M04SCU169 JTAG Chain: EXT UBII is disabled on UBII MAX10. SW4_2/3/4 = Low : Bypass U26F SW4_2/3/4 = High: Enable HPS_JTAG_TCK F12 30 HPS_JTAG_TCK HPS_JTAG_TDI E12 IO_6_F12/DIFFIO_RX_R18P 3p3V_STBY 30 HPS_JTAG_TDI IO_6_E12/DIFFIO_RX_R18N 26,41 FPGA_CVP_CONFDONE C13 IO_6_C13 PWR_MAX10_JTAG_TMS 26,41 FPGA_CONF_DONE F8 Bank 1A/1B: 3.3V IO R352 1K IO_6_F8/DIFFIO_RX_R27P PWR_MAX10_JTAG_TDI 26 FPGA_INIT_DONE B12 R353 1K Place R808~R810 near to U30 E9 IO_6_B12/DIFFIO_RX_R28P PWR_MAX10_JTAG_TCK R355 1K C 26 FPGA_NCONFIG C HPS_JTAG_TMS B11 IO_6_E9/DIFFIO_RX_R27N U26B 30 HPS_JTAG_TMS HPS_JTAG_TDO IO_6_B11/DIFFIO_RX_R28N PWR_GOOD 30 HPS_JTAG_TDO C12 41 FPGA_3V3_LED0 D1 R356 1K R354 0 B13 IO_6_C12/DIFFIO_RX_R29P C2 IO_1A_D1/DIFFIO_RX_L1N 26 HPS_RESETn 41 FPGA_3V3_LED1 FPGA_JTAG_TCK C11 IO_6_B13/DIFFIO_RX_R30P PCIE_EP_JTAG_TCK E3 IO_1A_C2/DIFFIO_RX_L1P 26 FPGA_JTAG_TCK 25 PCIE_EP_JTAG_TCK FPGA_JTAG_TDI A12 IO_6_C11/DIFFIO_RX_R29N FPGA_BYPASSn E4 IO_1A_E3/DIFFIO_RX_L3N 26 FPGA_JTAG_TDI FPGA_JTAG_TMS E10 IO_6_A12/DIFFIO_RX_R30N PCIE_EP_JTAG_TMS C1 IO_1A_E4/DIFFIO_RX_L3P 26 FPGA_JTAG_TMS 25 PCIE_EP_JTAG_TMS D9 IO_6_E10/DIFFIO_RX_R31P B1 IO_1A_C1/DIFFIO_RX_L5N 27 RSV_SD_RESETn 41 FPGA_3V3_LED2 R357 0 D12 IO_6_D9/DIFFIO_RX_R31N PCIE_EP_JTAG_TDI F1 IO_1A_B1/DIFFIO_RX_L5P DNI C1525 DNI R831 EXT_JTAG_TCK 22 FPGA_PCIE_PERSTn 25 PCIE_EP_JTAG_TDI FPGA_JTAG_TDO D11 IO_6_D12/DIFFIO_RX_R33P PWR_GOOD E1 IO_1A_F1/DIFFIO_RX_L7N 26 FPGA_JTAG_TDO IO_6_D11/DIFFIO_RX_R33N 46 PWR_GOOD IO_1A_E1/DIFFIO_RX_L7P PCIE_EP_JTAG_TDO F4 MAX10 10M04SCU169 25 PCIE_EP_JTAG_TDO G4 IO_1B_F4/DIFFIO_RX_L14N 40 FPGA_PMBUS_EN H2 IO_1B_G4/DIFFIO_RX_L14P Bank 2: 3.3V IO 40 MAIN_PMBUS_EN U26C H3 IO_1B_H2/DIFFIO_RX_L16N 40 HPS_I2C_EN JTAG_INPUT_SOURCEM3 IO_1B_H3/DIFFIO_RX_L16P DNI C355 DNI R358 PCIE_EP_JTAG_TCK EXT_JTAG_TDI IO_2_M3/PLL_L_CLKOUTN/DIFFIO_RX_L27N 43 EXT_JTAG_TDI L3 IO_2_L3/PLL_L_CLKOUTP/DIFFIO_RX_L27P MAX10 10M04SCU169 EXT_JTAG_TCK 43 EXT_JTAG_TCK J1 R359 PWR_MAX10_BYPASSn IO_2_J1/DIFFIO_RX_L19N J2 1K EXT_JTAG_TMS IO_2_J2/DIFFIO_RX_L19P 43 EXT_JTAG_TMS M1 MICTOR_BYPASSn M2 IO_2_M1/DIFFIO_RX_L21N L2 IO_2_M2/DIFFIO_RX_L21P 25 PCIE_EP_3V3_I2C_SDA K1 IO_2_L2 25 PCIE_EP_3V3_I2C_SCL EXT_JTAG_TDO K2 IO_2_K1/DIFFIO_RX_L28N 3p3V_STBY 3p3V_STBY 1p8V_UBII 1p2V_UBII B 43 EXT_JTAG_TDO IO_2_K2/DIFFIO_RX_L28P U26A PLACE CLOSE MAX II PWR PIN B MAX10 10M04SCU169 F2 G3 VCCIO1A__F2 K3 VCCIO1B__G3 C356 C357 C358 C359 C360 C361 C362 C363 C364 C365 C366 C367 C708 J3 VCCIO2__K3 L8 VCCIO2__J3 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 1p2V_PRE 1p8V_UBII 1p2V_UBII L7 VCCIO3__L8 FB26 L6 VCCIO3__L7 U26J 1p8V_PRE 0603 600 Ohm, 0.5A, 0.35DCR J11 VCCIO3__L6 3p3V_STBY UBII_M10_VCCA A1 H11 VCCIO5__J11 A13 GND__A1 FB270603 600 Ohm, 0.5A, 0.35DCR G11 VCCIO5__H11 B8 GND__A13 F11 VCCIO6__G11 C3 GND__B8 C8 VCCIO6__F11 C368 C369 C370 C371 C372 C373 C374 C375 C376 C377 C378 C379 D2 GND__C3 C7 VCCIO8__C8 D5 GND__D2 3p3V_STBY UBII_M10_VCCA C6 VCCIO8__C7 10uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF FB28 E11 GND__D5 VCCIO8__C6 E2 GND__E11 D3 F3 GND__E2 K4 VCCA3__D3 G7 GND__F3 600 Ohm, 0.5A, 0.35DCR D10 VCCA1__K4 GND__G7 VCCA2__D10 H12 0603 C380 C381 D4 J4 GND__H12 3p3V_STBY K9 VCCA3__D4 L9 GND__J4 10uF 0.1uF VCCA4__K9 M6 GND__L9 H7 A N1 GND__M6 G8 VCC_ONE__H7 A N13 GND__N1 G6 VCC_ONE__G8 GND__N13 F7 VCC_ONE__G6 VCC_ONE__F7 MAX10 10M04SCU169 Intel Corporation,101 innovation Dr, San Jose, CA 95134 MAX10 10M04SCU169 Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 44of 66 5 4 3 2 1 5 4 3 2 1

D D

BLANK C C

B B

A A

Intel Corporation,101 innovation Dr, San Jose, CA 95134 Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 45of 66 5 4 3 2 1 5 4 3 2 1 3p3V_STBY C382 0.1uF MAX 10 PWR Manager 1 R360 10 FPGA_VCC MAX10_AGND U30J U30D E2 L5 R361 49.9 3p3V_EN 50 FPGA_VCC R362 10 C383 1pF D3 REFGND__E2 IO_3_L5/DIFFIO_TX_RX_B1N M4 R363 49.9 FPGA_VCC_EN 51,52 D2 ADC_VREF__D3 IO_3_M4/DIFFIO_RX_B2N L4 R364 49.9 VCCL_SDM_EN 54 ANAIN1__D2 IO_3_L4/DIFFIO_TX_RX_B1P M5 R365 49.9 VCCL_HPS_EN 55 MAX10 10M16SA U169 IO_3_M5/DIFFIO_RX_B2P K5 IO_3_K5/DIFFIO_TX_RX_B3N N4 R367 49.9 IO_1p8V_EN 57 0p8V_VCCL_SDM IO_3_N4/DIFFIO_RX_B4N J5 R368 49.9 1p8V_EN 53 D 0p8V_VCCL_SDM R369 10 C384 1pF IO_3_J5/DIFFIO_TX_RX_B3P N5 R370 49.9 D VCC_HSSI_EN 58 0p9V_VCCL_HPS IO_3_N5/DIFFIO_RX_B4P N6 R371 49.9 VCCR_EN 59 0p9V_VCCL_HPS R372 10 C385 1pF IO_3_N6/DIFFIO_TX_RX_B5N N7 R373 49.9 1p2V_DDR4_CH01_EN 60 IO_1p8V U30B IO_3_N7/DIFFIO_RX_B6N M7 R374 49.9 1p2V_DDR4_CH23_EN 61 IO_1p8V R375 10 C386 1pF D1 IO_3_M7/DIFFIO_TX_RX_B5P N8 R377 49.9 VTT_DDR4_CH01_EN 62 1p1V_VCCH_GXER1 C2 IO_1A_D1/ADC1IN1/DIFFIO_RX_L1N IO_3_N8/DIFFIO_RX_B6P J6 R378 49.9 2p5V_EN 63 1p1V_VCCH_GXER1 R376 10 C387 1pF E3 IO_1A_C2/ADC1IN2/DIFFIO_RX_L1P IO_3_J6/DIFFIO_TX_RX_B13N M8 R379 49.9 VTT_DDR4_CH23_EN 62 0p9V_VCCH E4 IO_1A_E3/ADC1IN3/DIFFIO_RX_L3N IO_3_M8/DIFFIO_RX_B14N K6 R380 49.9 VCCFUSEWR_EN 64 0p9V_VCCH R381 10 C388 1pF C1 IO_1A_E4/ADC1IN4/DIFFIO_RX_L3P IO_3_K6/DIFFIO_TX_RX_B13P M9 R382 49.9 IO_3p3V_EN 63 1p8V B1 IO_1A_C1/ADC1IN5/DIFFIO_RX_L5N IO_3_M9/DIFFIO_RX_B14P J7 R703 49.9 VCCH_GXER1_EN 64 1p8V R383 10 C389 1pF F1 IO_1A_B1/ADC1IN6/DIFFIO_RX_L5P IO_3_J7/DIFFIO_TX_RX_B15N K7 IO_1A_F1/ADC1IN7/DIFFIO_RX_L7N IO_3_K7/DIFFIO_TX_RX_B15P 1p2V_DDR4_CH01 E1 N12 VCCFUSEWR_PG 64 1p2V_DDR4_CH01 IO_1A_E1/ADC1IN8/DIFFIO_RX_L7P IO_3_N12 R384 10 C390 1pF M13 R385 0 5% 0402 POWER_ON 48 1p2V_DDR4_CH23 F4 IO_3_M13/DIFFIO_TX_RX_B16N N10 1p2V_DDR4_CH23 R386 10 C391 1pF G4 IO_1B_F4/DIFFIO_RX_L14N IO_3_N10/DIFFIO_RX_B17N M12 IO_1B_G4/DIFFIO_RX_L14P IO_3_M12/DIFFIO_TX_RX_B16P MAIN_I2C_SDA 38,39,40,44,46,47,50 H2 N9 MAIN_I2C_SCL 38,39,40,44,46,47,50 H3 IO_1B_H2/DIFFIO_RX_L16N IO_3_N9/DIFFIO_RX_B17P M10 IO_1B_H3/DIFFIO_RX_L16P IO_3_M10/DIFFIO_TX_RX_B22N L10 MAX10_AGND IO_3_L10/DIFFIO_TX_RX_B22P MAX10 10M16SA U169 MAX10 10M16SA U169 R387 0 U30G A8 IO_8_A8/DIFFIO_RX_T27P A9 C FPGA_VCC_PG 51,52 C MAX10_AGND IO_8_A9/DIFFIO_RX_T27N B10 IO_8_B10/DIFFIO_RX_T28P VCCL_SDM_PG 54 A10 VCCL_HPS_PG 55 IO_8_A10/DIFFIO_RX_T29P A11 IO_8_A11/DIFFIO_RX_T29N E8 IO_1p8V_PG 57 IO_8_E8/DIFFIO_RX_T30N A7 IO_8_A7/DIFFIO_RX_T31P VCC_HSSI_PG 58 A6 3p3V_PG 50 IO_8_A6/DIFFIO_RX_T31N B6 IO_8_B6/DIFFIO_RX_T32P 1p8V_PG 53 A4 VCCR_PG 59 IO_8_A4/DIFFIO_RX_T33P B5 IO_8_B5/DIFFIO_RX_T32N 1p2V_DDR4_CH01_PG 60 A3 1p2V_DDR4_CH23_PG 61 IO_8_A3/DIFFIO_RX_T33N E6 IO_8_E6/DIFFIO_RX_T34P B3 IO_8_B3/DIFFIO_RX_T35P B4 FPGA_VCCFAULT 51,52 IO_8_B4/DIFFIO_RX_T35N A5 IO_8_A5 A2 IO_8_A2/DIFFIO_RX_T38P B2 IO_8_B2/DIFFIO_RX_T38N MAX10 10M16SA U169 3p3V 3p3V

U30F C394 C393 F12 IO_6_F12/DIFFIO_RX_R22P 12V_G1_PG 48 B R815 R817 R819 E12 12V_G2_PG 48 B 10uF 0.1uF IO_6_E12/DIFFIO_RX_R22N C13 IO_6_C13 5V_PG 49 DNI DNI DNI F8 0p6V_DDR4_VTT_CH23_PG 62 U73 IO_6_F8/DIFFIO_RX_R31P B12 PWR_LED_DR 41 1 8 IO_6_B12/DIFFIO_RX_R32P E9 A0 VCC IO_6_E9/DIFFIO_RX_R31N PWR_GOOD 44 2 B11 EM_PMBUS_ALERTn 43,50,53,58 3 A1 5 IO_6_B11/DIFFIO_RX_R32N C12 MAIN_I2C_SDA 38,39,40,44,46,47,50 LT_PMBUS_ALERTn 43,51 A2 SDA 6 IO_6_C12/DIFFIO_RX_R33P B13 SCL MAIN_I2C_SCL 38,39,40,44,46,47,50 IO_6_B13/DIFFIO_RX_R34P 0p6V_VTT_DDR4_CH01_PG 62 3p3V C11 VCCH_GXER1_PG 64 R816 R818 R820 IO_6_C11/DIFFIO_RX_R33N A12 IO_6_A12/DIFFIO_RX_R34N R821 DNI E10 2p5V_PG 63 1K 1K 1K 7 4 IO_6_E10/DIFFIO_RX_R35P D9 WP VSS IO_6_D9/DIFFIO_RX_R35N 12V_G1_UV_PG 48 R822 1K D12 12V_G1_OV_PG 48 IO_6_D12/DIFFIO_RX_R37P D11 24AA64-I IO_6_D11/DIFFIO_RX_R37N MAX10 10M16SA U169 I2C Address = b'1010000'

A A

R823 DNI C1524 DNI MAX10 PWR Manager 2

U30H U30E G5 K10 3p3V_STBY IO_2_G5/CLK0N/DIFFIO_RX_L20N IO_5_K10/RUP/DIFFIO_RX_R1P H6 CLK_PWR_M10 39 J10 U30I IO_2_H6/CLK0P/DIFFIO_RX_L20P H5 IO_5_J10/RDN/DIFFIO_RX_R1N R390 10.0K E5 IO_2_H5/CLK1N/DIFFIO_RX_L22N IO_1B_E5/JTAGEN H4 PCIE_EP_PERSTN 25,43 K11 OVERTEMPn 44 PWR_MAX10_JTAG_TMS R391 0 G1 IO_2_H4/CLK1P/DIFFIO_RX_L22P IO_5_K11/DIFFIO_RX_R2P TSENSE_ALERTn IO_1B_G1/TMS/DIFFIO_RX_L11N N2 L12 44 PWR_MAX10_JTAG_TCK R392 0 G2 IO_2_N2/DPCLK0/DIFFIO_RX_L24N IO_5_L12/DIFFIO_RX_R2N FAN_CTRL IO_1B_G2/TCK/DIFFIO_RX_L11P N3 K12 44 PWR_MAX10_JTAG_TDI R393 0 F5 D IO_2_N3/DPCLK1/DIFFIO_RX_L24P M11 IO_5_K12/DIFFIO_RX_R11P L13 3p3V_STBY R394 0 F6 IO_1B_F5/TDI/DIFFIO_RX_L12N D 44 PWR_MAX10_JTAG_TDO IO_3_M11/CLK6N/DIFFIO_TX_RX_B18N L11 IO_5_L13 J12 R784 10.0K B9 IO_1B_F6/TDO/DIFFIO_RX_L12P IO_3_L11/CLK6P/DIFFIO_TX_RX_B18P J8 IO_5_J12/DIFFIO_RX_R11N J9 3p3V_STBY D8 IO_8_B9/DEV_CLRN/DIFFIO_RX_T28N IO_3_J8/CLK7N/DIFFIO_TX_RX_B20N K8 IO_5_J9/DIFFIO_RX_R12P J13 R395 10.0K D7 IO_8_D8/DEV_OE/DIFFIO_RX_T30P IO_3_K8/CLK7P/DIFFIO_TX_RX_B20P IO_5_J13/DIFFIO_RX_R13P IO_8_D7/CONFIG_SEL G9 PCIE_PWRBRKN 25,44 H10 R396 10.0K E7 IO_6_G9/CLK2P/DIFFIO_RX_R18P G10 IO_5_H10/DIFFIO_RX_R12N H13 D6 INPUT_ONLY_8_E7/NCONFIG IO_6_G10/CLK2N/DIFFIO_RX_R18N F13 IO_5_H13/DIFFIO_RX_R13N H9 R397 10.0K C4 IO_8_D6/CRC_ERROR/DIFFIO_RX_T34N IO_6_F13/CLK3P/DIFFIO_RX_R20P E13 IO_5_H9/DIFFIO_RX_R14P G13 R398 10.0K C5 IO_8_C4/NSTATUS/DIFFIO_RX_T36P IO_6_E13/CLK3N/DIFFIO_RX_R20N F9 IO_5_G13/DIFFIO_RX_R15P H8 IO_8_C5/CONF_DONE/DIFFIO_RX_T36N IO_6_F9/DPCLK3/DIFFIO_RX_R30P F10 IO_5_H8/DIFFIO_RX_R14N G12 MAX10 10M16SA U169 IO_6_F10/DPCLK2/DIFFIO_RX_R30N C10 IO_5_G12/DIFFIO_RX_R15N IO_8_C10/CLK5P/DIFFIO_RX_T26P C9 IO_8_C9/CLK5N/DIFFIO_RX_T26N MAX10 10M16SA U169 H1 IO_1B_H1/VREFB1N0 L1 U30C IO_2_L1/VREFB2N0 N11 M3 IO_3_N11/VREFB3N0 K13 L3 IO_2_M3/PLL_L_CLKOUTN/DIFFIO_RX_L31N IO_5_K13/VREFB5N0 D13 IO_2_L3/PLL_L_CLKOUTP/DIFFIO_RX_L31P IO_6_D13/VREFB6N0 B7 J1 IO_8_B7/VREFB8N0 J2 IO_2_J1/DIFFIO_RX_L21N MAX10 10M16SA U169 M1 IO_2_J2/DIFFIO_RX_L21P 3p3V_STBY M2 IO_2_M1/DIFFIO_RX_L23N L2 IO_2_M2/DIFFIO_RX_L23P K1 IO_2_L2 C C K2 IO_2_K1/DIFFIO_RX_L32N IO_2_K2/DIFFIO_RX_L32P

R399 R400 MAX10 10M16SA U169

PWR_M10_VCCIO1A C711 100pf U32 U30A C710 100pf 10.0K 10.0K 3p3V_STBY F2 VCCIO1A__F2 26 FPGA_TEMP0p R401 0 23 16 OVERTEMPn G3 DXP1 OVERT TSENSE_ALERTn OVERTEMPn 41 VCCIO1B__G3 Core A 26 FPGA_TEMP0n R402 0 24 18 K3 R730 0 1 DXN1 ALERT J3 VCCIO2__K3 U30K 32 FPGA_TEMP1p DXP2 VCCIO2__J3 Core C 32 FPGA_TEMP1n R731 0 2 6 L8 A1 R732 0 3 DXN2 NC1 22 L7 VCCIO3__L8 A13 GND__A1 22 FPGA_TEMP2p DXP3 NC2 VCCIO3__L7 GND__A13 P TILE 22 FPGA_TEMP2n R733 0 4 L6 B8 R734 0 5 DXN3 3p3V_STBY J11 VCCIO3__L6 C3 GND__B8 21 FPGA_TEMP3p DXP4 VCCIO5__J11 GND__C3 E TILE 21 FPGA_TEMP3n R735 0 7 H11 D5 8 DXN4 17 G11 VCCIO5__H11 E11 GND__D5 C709 100pf 9 DXP5 VCC 15 F11 VCCIO6__G11 F3 GND__E11 C395 100pf 11 DXN5 I.C. C8 VCCIO6__F11 G7 GND__F3 10 DXP6 14 R729 10.0K PWR_M10_VCCA C7 VCCIO8__C8 H12 GND__G7 13 DXN6 STBY C6 VCCIO8__C7 J4 GND__H12 12 DXP7 K4 VCCIO8__C6 L9 GND__J4 DXN7 C396 D10 VCCA1__K4 M6 GND__L9 B VCCA2__D10 GND__M6 B 38,39,40,44,46,50 MAIN_I2C_SCL 20 25 0.1uF D4 N1 19 SMBCLK EP 21 3p3V_STBY K9 VCCA3__D4 N13 GND__N1 38,39,40,44,46,50 MAIN_I2C_SDA SMBDATA GND VCCA4__K9 GND__N13 H7 MAX10 10M16SA U169 MAX6581 G8 VCC_ONE__H7 G6 VCC_ONE__G8 F7 VCC_ONE__G6 VCC_ONE__F7 I2C ADDR = 4D Board Temp Sensor MAX10 10M16SA U169

3p3V_STBY L9 PWR_M10_VCCIO1A

BLM15AG221SN1 300mA C397 C398 12V_G1 PWR_M10_VCCA 10uF 0.1uF J15 3p3V_STBY 3p3V_STBY FB29 1 1 2 GND 2 C399 C400 C401 C402 C403 C404 C405 220ohm, 2.0A 12V 3 A TACH 4 FAN_CTRL 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 10uF C406 C407 C408 C409 C410 A PWM FAN_Conn 10uF 0.1uF 0.1uF 0.1uF 0.1uF C411 C412 C413 C414 C415 C416 Intel Corporation,101 innovation Dr, San Jose, CA 95134 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF 0.1uF Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 47of 66 5 4 3 2 1 5 4 3 2 1 Power - Select Power Input

12V_AUX H = 1.1mm H = 1.0mm Place on bottom side Place on bottom side U33 12V_GROUP1 U34 12V_G1 J16 FDMC2514SDC FDMC2514SDC 5 1 1 1 6 GND 12V 2 2 2 7 SENSE0 12V 3 3 5 5 3 D 8 GND 12V 4 C421 D GND SENSE1 560uF PCIe 2x4 ATX R404 16V C422 C423 C419 C424 C420 C417 C418 R405 R406 3p3V_STBY 20% PCIe Specs: 12.5A +5%/-8% U35 4 Vgs(th) = 2.5V/3.7V/4.5V DNI 5.49M 4 R828 4.7K ALUM POLY 22uF 22uF 22uF 22uF 680pF 1uF 3 1 C425 12mm 200K 2 GATE OUT 6 15m OHM IN VDD 4 DNI 3 2 1 5 4.7nF 8mm_CAN 5 GND 7 5

D15 7343P S3 S2 S1 D1 U36 R407 NC EP_GND TAB 12V Holding Caps 5p0SMDJ12A 4 6 10.0K LTC4357 R408 VIN VOUT POWER_ON

Q12 0 8 GATE SHDN 7

G PSMN1R0-30YLD 12V_G1_PG 46 3 FAULT 4 UV 1 R409 R410 2 GND 9 10 OV GND 0402 C426 4.7nF 100K LTC4365-1 1% 0402 X7R 50V PCIE_EP_12V

R413 R411 200K 12V_G1 4 2 1 8 When 16V, EN = 1.96V 100K Chold = 1160uF for 12_G1 When 15V, EN = 1.84V When 14V, EN = 1.72V R412 IN

When 13V, EN = 1.59V SRC OUT

41.2K GATE C427 When 12V, EN = 1.47V C 0402When 12V_PCIE = 12V Vshdn_absmax = 100V 5 3 1.5uF C428 C429 C430 C431 C When 11V, EN = 1.35V EN_12V_G1G2_L = 1.47V SHDN NC1 When 10V, EN = 1.23V 1% 7 1206 VGS(th) max = 0.85V 3 NC2 50V 150uF 150uF 150uF 150uF VSS X6S 7343P 7343P 7343P 7343P C432 LTC4359 U37 12V from PCIe Slot 0.01uF R414 R415 240 1 6 PCIE_EP_12V 0402 5.76K 0402 1% 25V 0402 Q13 2 X7R 1% SI2302CDS-T1-GE3 R416 1K SOT23 H = 1.1mm H = 1.0mm Place on bottom side Place on bottom side 12V_G2 U38 12V_GROUP2 U39 FDMC2514SDC Vshdn_th = 0.6V/1.2V/2V FDMC2514SDC 1 1 2 2 3 5 5 3

3p3V_STBY C434 R417 R418 D16 C433 U40 4 5.49M 4 R829 4.7K 5p0SMDJ12A 3 1 C435 DNI 150uF 2 GATE OUT 6 R419 IN VDD 4.7nF 7343P 4 DNI 10.0K 5 GND 7 7343P U41 5 NC EP_GND 4 6 LTC4357 R420 VIN VOUT POWER_ON

0 8 GATE SHDN 7 12V_G2_PG 46 B 3 FAULT B UV 1 R421 2 GND 9 OV GND 100K LTC4365-1 Power On Switch Condition Aux PCIe PWR_SW Start_SEQ Bench Y N ON 12V_G1_UV/OV_PG=Y Bench Y N OFF N R422 SLOT Y Y X 12V_G1_UV/OV_PG=Y 200K SLOT N Y ON N SLOT N Y OFF 12V_G1_UV/OV_PG=N 12V_G2 3p3V_STBY Chold = 900uF for 12_G2

12V_G1

R423 R424 C436 C437 C438 C439 C440 C441

150uF 150uF 150uF 150uF 150uF 150uF R425 10.0K 10.0K 7343P 7343P 7343P 7343P 7343P 7343P 12V_GROUP1 ON 200K U42 60.4K R426 4 1 3 1 INA+ OUTA 12V_G1_UV_PG 46 POWER_ON 5 2 4 6 46 POWER_ON 12V_G1_OV_PG 46 6 3 R427 INB- OUTB A PCIE_EP_12V 1.91K A 60.4K R428 SW5 12V_G2

OFF 2 5 R429 SW_SLIDE_DPDT GND VDD 20.0K R430 C442 Intel Corporation,101 innovation Dr, San Jose, CA 95134 6.04K TPS3700 0.1uF Title 12V_G1 > 10.46V : OUTA = "1"; AgileX F-Series FPGA Dev Kit 12V_G2 < 13.77V: OUTB = "1"; Copyright (c) 2014, Intel Corporation. All Rights Reserved. PWR MAX10 get both "1" to start the power seq Size Document Number Rev Custom K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 48of 66 5 4 3 2 1 5 4 3 2 1

LT4625_INTVCC LT4625_INTVCC

R431 12V to 5V, 3p3V STBY, 1p8V_PRE 100K

C443 1uF 5V_PG 46 12V_G2 D R432 D 200K

TP1 R433

TP2 C444 10 0.1uF C445 C446 C447 A5 B5 C2 E4 C5 22uF 22uF 22uF R434 R435 DNI SVIN

C448 CLKIN PGOOD INTVCC A1 CLKOUT D5 100K COMP VIN1 5V 5V_AGND 12pF B2 E5 PHMODE VIN2 R436 U43 C4 C1 100K MODE VOUT1 C C R437 A4 D1 R438 DNI FREQ VOUT2 DNI C449 C450 C451 C452 5V_AGND A2 D2 47uF 47uF 47uF 47uF TRACK/SS VOUT3 R439 C453 DNI 12V_G2 A3 E1 100pf C454 RUN VOUT4 0.1uF B4 E2 SGND VOUT5 5V_AGND R440 100K PGND1 PGND2 PGND3 PGND4 PGND6 FB B3 E3 B1 LTM4625 C3 D3 D4

0 R441 R442 24.9K 5.0V R443 8.25K B C455 B 1% DNI 5V_AGND 5V_LDO1 5V_LDO2

5V 80ohm @ 100Mhz 5V_LDO1 5V_AGND 5A, 10mOhm 5V 5V_LDO2 FB30 R785 R786 VDOmax = 185mV 10.0K FB31 VDOmax = 185mV 10.0K C456 0402 3p3V_STBY 0402 1p8V_PRE U44 1% 80ohm @ 100Mhz C457 U45 1% 22uF 8 4 3p3V_STBY_PG 5A, 10mOhm 8 4 1p8V_PRE_PG NC POK 22uF NC POK 9 1 Vout = 0.5V x (Rup/Rdn + 1) 9 1 Vout = 0.5V x (Rup/Rdn + 1) 10 VIN1 VOUT1 2 C458 10 VIN1 VOUT1 2 C459 VIN2 VOUT2 47pF VIN2 VOUT2 47pF 0402 R444 VINabsmax = -0.3V to 6.5V 0402 R445 VINabsmax = -0.3V to 6.5V 50V Rup 4.02K 50V Rup 2.61K 6 3 C0G/NPO 0402 C460 C461 C462 6 3 C0G/NPO 0402 C463 C464 C465 C466 SS VFB 1% C467 SS VFB 1% 10nF 22uF 22uF 22uF 10nF 22uF 22uF 22uF 0402 R446 5 0402 R447 5 0603 0603 0603 50V 10.0K 7 GND 11 50V 10.0K 7 GND 11 R449 A X7R 0402 EN EPAD R448 X7R 0402 EN EPAD A 1% EY1501di-adj Rdn 715 1% EY1501di-adj Rdn 0402 1K 1% Intel Corporation,101 innovation Dr, San Jose, CA 95134 ENth = 0.616V /0.8V / 0.95V ENth = 0.616V /0.8V / 0.95V Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 49of 66 5 4 3 2 1 5 4 3 2 1

TP5 MAIN 12V to 3.3V VDD33_OUT1 TESTPOINT

(Top Side 30mil pad,

TP No Via) R450 D 10.0K 1 D

R451 0 3.3V output R452 46 3p3V_PG 576 3p3V

0402 3.3V

3p3V_AGND 3p3V_AGND

26A C468 C474 C475 C469 C476 C470 C477 C471 C472 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 C473 46 3p3V_EN 220uF 220uF 47UF 47UF 47UF 47UF 47UF 47UF DNI 0603 1uF 6.3V 6.3V VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT PMBus Address = 0X4E VDD33_OUT1 81 R453 1 VOUT_PAD VOUT 80 R462 R454 3.3k R455 R456 2 VOUT VOUT 79 10.0K 0402 0 0 Place sense lines 4.7K 3 VOUT VOUT 78 at the load C C 4 VOUT VCCSEN 77 R457 VDD33_OUT1

0402 0402 5 RVSET VTRACK 76 DNI 3p3V_AGND R463 R461 6 RTUNE NC76 75 0402 R458 R459 R460 2.74K 22K 7 VINSEN NC75 74 10.0K 10.0K 10.0K 8 ADDR1 NC74 73 9 ADDR0 NC73 72 R464 10 PWM VSENN 71 C478 R465 DNI 0402 11 SYNC VSENP 102 DNI 1K 3p3V_AGND 12 PGOOD AGND_PAD 70 R467 0402 R466 0 13 CONTROL AGND 69 0402 0402 2K 43,46,53,58 EM_PMBUS_ALERTn 14 SMBALERT DGND 68 FB32 SDA NC68 53,58 EM_SDA 15 67 742792780 16 SCL U46 NC67 66 3p3V_AGND 0402 VDD33_OUT1 17 VDD33 VCC 65 53,58 EM_SCL 12V_G2 18 PVIN EM2130H PVCC 103 5V 19 PVIN PVIN_PAD 64 20 PVIN PVIN 63 C479 21 PVIN PVIN 62 2.2uF 22 PVIN PVIN 61 10V 23 PGND PVIN 60 X6S C480 C481 C482 C483 C484 C485 C486 R468 C487 24 PGND PGND 59 11K 10uF 25 PGND PGND 58 22uF 22uF 22uF 22uF 22uF 22uF 22uF 0402 26 PGND PGND 57

1206 PGND PGND B 0.1% 27 56 B 28 PGND PGND 55 29 PGND PGND 54 R469 C488 30 PGND PGND 53 1K DNI 31 PGND PGND 52 0402 104 PGND PGND 51

0.1% 0402 PGND_PAD PGND

3p3V_AGND

PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND Enpirion Dongle 3p3V_AGND

32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 J17 EM_SCL 1 R470 0 MAIN_I2C_SCL 38,39,40,44,46,47 1 2 EM_SDA R471 0 MAIN_I2C_SDA 38,39,40,44,46,47 H = 6.6mm 2 3 Place on Top side 3 TSW-103-08-G-S

ST1 A 1 2 A 1 2

AGNDSHORT PGND Intel Corporation,101 innovation Dr, San Jose, CA 95134 3p3V_AGND Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 50of 66 5 4 3 2 1 5 4 3 2 1

VIN1 12V to VCC Core (Phase 0,1) 12V_G1 VDD33

R472 R473 2.2uF C489 0.001 0.001

1 R474 GND_SIGNAL_core VDD25 VIN1 12V_G1 VIN1 C490 1uF Q14 10uF C491 R475 R476 D C492 C493 C494 1210 INTVCC1 BSG0811ND D GND_SIGNAL_core 150uF 10uF 10uF EXTVCC 3 4 9 C495 C496 C497 C498 FM_VCC should start from 0.8V as default, 7343P 1210 1210 C499 10uF 0 0 22uF 22uF 22uF 22uF need program LTC3884 by dongle in fab. C500 C501 10uF 1210 5 VDD33 1uF DNI 1 6 51 VSENSE+ 1210 7 39 38 25 28 47 46 2 FPGA_VCC SW0 R477 VIN1

IIN- 10 VIN IIN+ FPGA_VCC 0.8V R482 8 L10 0.25uH VDD25 VDD33

R478 1K 40 INTVCC R483 R479 R484 EXTVCC 44 TG0

TG0 3 4 9 DNI DNI 4.7K DNI C502 744301025 C505

11 45 INTVCC1 10 C503 C504 C507 + 1000uF C506 52 LT3884_SYNC SYNC U47 SW0 0.1uF D17 2.5V + 1000uF LTC3884_SCL DNI DNI R480 R481 LTC3884_SCL 12 LTC3884EUK 43 BST0 0 5 100uF 100uF 100uF 7343 2.5V SCL BOOST0 R485 1 6 7343 LTC3884_SDA LTC3884_SDA 13 42 CMDSH-3 7 R487 SDA BG0 TP6 2 R486 0 LT3884_ALERTn 14 715 ALERTB 7 Q15 SHARE_CLK 27 ISENSE0+ 8 R488 SHARE_CLK C508 BSG0811ND 10 R489 17 8 46,52 FPGA_VCC_EN RUN0 ISENSE0- 0.22uF

18 1 10 RUN1 VSENSE0+ VSENSE+ 51 R490 51 VSENSE- C 10.0K C WP1 26 2 VSENSE- 51 WP VSENSE0- DNI

R491 5 ITH_R0 VIN1 0 C509 6800pf C510 330pF 30 R492 DNI VCC_SENSE 33 ITH_R1 35 TG1 Q16 6 TG1 ITH0 BSG0811ND GND_SIGNAL_core 34 R493 DNI VSS_SENSE 33 GND_SIGNAL_core GND_SIGNAL_core 29 SW1 C511 C512 C513 C514 ITH1 36 BST1 3 4 9 52 LT3884_ITH BOOST1 22uF 22uF 22uF 22uF 10 37 BG1 TSNS0 BG1 Q17 5 FPGA_VCC C515 9 1 6 L11 0.25uH MMST3906-7-F TSNS1 3 7 0.01uF ISENSE1+ SOT-323 2 0.8V ASEL0 19 C517 R494 C516 744301025 ASEL0 4 INTVCC1 VIN1 SW1 C520 C521 ISENSE1- 0.22uF 0 ASEL1 20 0.1uF D18 8 C518 C519 + 1000uF + 1000uF GND_SIGNAL_core ASEL1 32 2.5V 2.5V Q18 VOUT0_CFG 21 VSENSE1+ R495 100uF 100uF 7343 7343 C522 VOUT0_CFG 31 CMDSH-3 3 4 9 VSENSE1- 715 MMST3906-7-F VOUT1_CFG 22 10 0.01uF VOUT1_CFG SOT-323 FREQ_CFG 23 15 5 FREQ_CFG FAULT0 1 6 R496 GND_SIGNAL_core PHASE_CFG 24 16 7 B 0 B VDD25 PHASE_CFG FAULT1 2 GND

24.9K 11.3K PGND PGOOD1 PGOOD0 Q19 VSENSE+ 51 R497 R498 8

41 49 33 48 BSG0811ND VSENSE- 51 24.9K 5.76K

R499 R500 VDD33 10 R505 R502 24.9K 4.32K 0.75V 0 R503 R501 R504 10.0K 0402 DNI 24.9K 4.32K 0.75V VDD33 1% R506 R507 FPGA_VCCFAULT 46,52 GND_SIGNAL_core R510 24.9K 5.76K 10.0K 0 R508 R509 500Hz 0402 R511 1% FPGA_VCC_PG 46,52 24.9K 5.76K R512 R513

GND_SIGNAL_core I2C Address: 0x47(user); 0x5A/5B(LTC3884 Global addr) A Check Phase define J18 A LTC3884_SDA 16 GPIO_TRIG_OUT R795 0 1 2 R514 0 1 2 LTC3884_SCL CORE_PMBUS_SDA 40 3 4 R515 0 CORE_PMBUS_SCL 40 R796 0 5 3 4 6 LT3884_ALERTn R516 0 16 GPIO_TRIG_IN LT_PMBUS_ALERTn 43,46 Need 0.8V core voltage 7 5 6 8 7 8 FM_VCC should start from 0.8V as default, 9 10 Intel Corporation,101 innovation Dr, San Jose, CA 95134 need program LTC3884 by dongle in fab. 11 9 10 12 11 12 Title 2x6HDR AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev Custom K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 51of 66 5 4 3 2 1 5 4 3 2 1 12V to VCC Core (Phase 2,3)

VIN1 D D

INTVCC2 EXTVCC 12V_G1 Check EXTVCC Q20 R517 BSG0811ND 2 3 4 9 C523 C524 C525 C526 C528 C529 22uF 22uF 22uF 22uF C527 1uF 5 FPGA_VCC 1 6 7 4.7uF 4.7uF 2 0.8V 20 19 18 8 VIN1 SW2 L12 0.25uH VIN 12 24 TG2 51 LT3884_SYNC SYNC TG0

INTVCC C530 EXTVCC 744301025 3 4 9

23 INTVCC2 10 C531 C532 C533 C534 SW0 1 0.1uF D19 + 1000uF + 1000uF 46,51 FPGA_VCC_PG MODE0 U48 22 BST2 R518 0 100uF 100uF 2.5V 2.5V 8 BOOST0 5 7343 7343 MODE1 21 CMDSH-3 1 6 R519 R520 LTC3874EUFD BG0 7 715 0 R521 0 4 2 2 C 46,51 FPGA_VCC_EN RUN0 ISENSE0+ C R522 0 5 C535 Q21 RUN1 3 8 ISENSE0- 0.22uF BSG0811ND

28 51 LT3884_ITH ITH0 R523 14 TG3 10 C536 22pF 9 TG1 INTVCC2 ITH1 15 SW1 LTC3874_AC_DC GND_SIGNAL_core 27 16 BST3 DNI LOWDCR BOOST1 DCR SENSING 17 BG3 VIN1 LOWDCR R524 BG1 NORMAL R525 100K 10 7 FREQ ISENSE1+ C537 10.0K Q22 GND_SIGNAL_core 6 0.22uF 0402 LTC3874_ILIM 11 ISENSE1- BSG0811ND ILIM 1% C538 C539 C540 C541 26 3 4 9 FAULT0 22uF 22uF 22uF 22uF 13 25 INTVCC2 PHASMD FAULT1 5 INTVCC2 R527 1 6 R526 C542 GND 0 INTVCC2 7 L13 0.25uH 0.1uF D20 2

R528 29 B B 744301025 10.0K 10.0K CMDSH-3 8 VIN1 SW3 C543 C544 C545 C546 0402 0402 + 1000uF + 1000uF 1% 1% 100uF 100uF 2.5V 2.5V 7343 7343 3 4 9

10 R529 715 R530 5 DNI 1 6 R531 7 46,51 FPGA_VCCFAULT 0 2

GND_SIGNAL_core Q23 8 BSG0811ND

10 R532

DNI

A A

PWR - 1p8V TP12 3p3V TESTPOINT

(Top Side 30mil pad,

TP No Via) R753 10.0K 1 D D R754 0 1.8V output R755 46 1p8V_PG 6.81K 1p8V

0402 1.8V

1p8V_AGND 1p8V_AGND

26A C1451 C1452 C1453 C1454 C1455 C1456 C1457 C1458 C1459 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 C1460 46 1p8V_EN 220uF 220uF 47UF 47UF 47UF 47UF 47UF 47UF DNI 0603 1uF 6.3V 6.3V VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT PMBus Address = 0X41 3p3V 81 R756 1 VOUT_PAD VOUT 80 R757 R758 3.3k R759 R760 2 VOUT VOUT 79 10.0K 0402 0 0 Place sense lines 4.7K 3 VOUT VOUT 78 at the load 4 VOUT VCCSEN 77 R761 VDD33_OUT2 C C 0402 0402 5 RVSET VTRACK 76 DNI 1p8V_AGND R762 R763 6 RTUNE NC76 75 0402 R764 2.74K 680 7 VINSEN NC75 74 10.0K 8 ADDR1 NC74 73 9 ADDR0 NC73 72 R767 10 PWM VSENN 71 C1461 R768 DNI 0402 11 SYNC VSENP 102 DNI 2K 1p8V_AGND 12 PGOOD AGND_PAD 70 0402 R770

R769 0 13 CONTROL AGND 69 0402 0402 2K 43,46,50,58 EM_PMBUS_ALERTn 14 SMBALERT DGND 68 FB39 50,58 EM_SDA SDA NC68 50,58 EM_SCL 15 67 742792780 16 SCL U71 NC67 66 1p8V_AGND 0402 VDD33_OUT2 17 VDD33 VCC 65 12V_G2 18 PVIN EM2120H01QI PVCC 103 5V 19 PVIN PVIN_PAD 64 20 PVIN PVIN 63 C1462 21 PVIN PVIN 62 2.2uF 22 PVIN PVIN 61 10V 23 PGND PVIN 60 X6S C1464 C1465 C1466 C1467 C1468 C1469 C1470 R771 C1463 24 PGND PGND 59 11K 10uF 25 PGND PGND 58 22uF 22uF 22uF 22uF 22uF 22uF 22uF 0402 26 PGND PGND 57

0.1% 1206 27 PGND PGND 56 PGND PGND B 28 55 B 29 PGND PGND 54 R772 C1471 30 PGND PGND 53 1K DNI 31 PGND PGND 52 0402 104 PGND PGND 51

0.1% 0402 PGND_PAD PGND

1p8V_AGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND 1p8V_AGND 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50

H = 6.6mm Place on Top side

ST19 1 2 1 2 A A AGNDSHORT PGND 1p8V_AGND Intel Corporation,101 innovation Dr, San Jose, CA 95134 Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 53of 66 5 4 3 2 1 5 4 3 2 1

PWR - 0p8V_VCCL_SDM

D D 0402 C562 0p8V_AGND 15nF VCCL_SDM_PG 46 0p8V_AGND R550

3p3V 100k R551 DNI

0 VCCL_SDM_EN 46 R552 39 38 37 36 35 34 33 32 31 30 29 28 27 26 R553 4.7K SS VFB POK AVIN RLLM AGND ENABLE NC(SW)1 NC(SW)2 NC(SW)3 NC(SW)4 NC(SW)5 GND_PAD LLM/SYNC 0402 1 25 NC(SW)7 NC25 R554 2 24 NC(SW)6 NC24 3 23 C U51 C 3M NC3 NC23 4 EN6337QI 22 DNI NC4 NC22 R555 5 21 VOUT PVIN 6 20 VOUT PVIN 0402 0402 R556

C563

15pF VOUT VOUT VOUT VOUT VOUT NC(SW) PGND PGND PGND PGND PGND PGND PVIN 3p3V 200k 7 8 9 10 11 12 13 14 15 16 17 18 19

C564 47uF C565 22uF 1206X5R 1206 X5R C566 47uF Connect the input B R557 cap to the GND plane B 0 Connect the output through multiple vias. 0p8V_VCCL_SDM cap to the GND plane (see the Gerber files) through multiple vias

0.8V ST3 1 2 1 2 AGND PGND SHORT 0p8V_AGND

PLACE Output decoupling caps close to the device. Connect AGND and PGND at the point of cap GND connection.

A A

PWR - 0p9V_VCCL_HPS 3p3V

0p9V_VCCL_HPS 0.9V 4A 0.9V D C688 C689 U65 C690 D

100uF 22uF 29 22pF C691 C692 C693 C694 30 PVIN1 15 31 PVIN2 EN6362QI VOUT1 16 R693 22uF 22uF 47uf 100uF R684 32 PVIN3 VOUT2 17 294K R685 PVIN4 VOUT3 DNI 33 6A 18 34 PVIN5 VOUT4 58 20.5K 35 PVIN6 VOUT5 DNC 36 PVIN7 59 PVIN8 PVIN9 DNC R686 0 41 ENABLE R687 10 43 AVIN R688 42 46 VFB 4.7K SS 21 22 NC17 48 VCCL_HPS_PG 46 37 NC18 PGOOD 38 NC19 C695 53 NC20 C C 54 NC21 1 15nF 55 NC22 NC1 2 56 NC23 NC2 3 NC24 NC3 4 R689 R694 23 NC4 5 100K 590K 49 NC(SW)1 NC5 6 50 NC(SW)2 NC6 7 51 NC(SW)3 NC7 8 VCCL_HPS_AGND 52 NC(SW)4 NC8 9 3p3V NC(SW)5 NC9 10 NC10 11 NC11 12 NC12 13 R691 60 NC13 14 NC NC14 19 NC15 20

NC16 0 47 VSENSE R692 45 FQADJ 5.49K

B 24 B PGND1 25 PGND2 26 PGND3 27 39 PGND4 28 VDDB PGND5 57 PGND(THRM) C696

0.22uF 40 BGND 44 AGND

EN6362QI

VCCL_HPS_AGND ST16 1 2 1 2

AGND SHORT PGND VCCL_HPS_AGND

A A

VCCL_HPS_EN 46 Intel Corporation,101 innovation Dr, San Jose, CA 95134 Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 55of 66 5 4 3 2 1 5 4 3 2 1

D D

C BLANK C

B B

A A

PWR - IO_1p8V

D D 0402 C1526 IO_1p8V_AGND 15nF IO_1p8V_PG 46 IO_1p8V_AGND R835

3p3V 100k R836 DNI

0 IO_1p8V_EN 46 R837 39 38 37 36 35 34 33 32 31 30 29 28 27 26 R838 4.7K SS VFB POK AVIN RLLM AGND ENABLE NC(SW)1 NC(SW)2 NC(SW)3 NC(SW)4 NC(SW)5 GND_PAD C LLM/SYNC C 0402 1 25 NC(SW)7 NC25 R839 2 24 NC(SW)6 NC24 3 U70 23 143K NC3 NC23 4 EN6347QI 22 DNI NC4 NC22 R840 5 21 VOUT PVIN 6 20 VOUT PVIN 0402 0402 R841 VIN = 2.4 - 6.6 VDC C1527

15pF VOUT VOUT VOUT VOUT VOUT NC(SW) PGND PGND PGND PGND PGND PGND PVIN 3p3V 200k 7 8 9 10 11 12 13 14 15 16 17 18 19

B B

C1528 47uF C1529 22uF 1206X5R 1206 X5R ST20 C1530 47uF 1 2 Connect the input 1 2 R842 cap to the GND plane AGND 0 Connect the output SHORT through multiple vias. IO_1p8V_AGND IO_1p8V cap to the GND plane (see the Gerber files) through multiple vias PLACE Output decoupling caps close to the device. Connect AGND and PGND at the point of 1.8V cap GND connection.

A A

PWR - VCC_HSSI_GXER1/VCC_HSSI_GXPL1

TP10 TESTPOINT 0p9V_VCCH D 3p3V (Top Side 30mil pad, D No Via)

TP 0.9V Cout = 2xBase = 1528uF R595 R596 1 C611 DNI 10.0K C603 C604 C605 C606 C607 C608 C609 C610 470uF C612 0402 0402 47uF 47uF 47uF DNI 47uF DNI 100uF 100uF 100uF DNI 100uF DNI 2917 470uF DNI 1% 1% 1206 1206 1206 1206 1206 1206 1206 1206 2.5V 2917

46 VCC_HSSI_PG 101 100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 10V 10V 10V 10V 6.3V 6.3V 6.3V 6.3V Alum Poly 2.5V X6S X6S X6S X6S X6T X6T X6T X6T Alum Poly

Rvset R597 10.5K VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT VOUT 0402 0.1% Rtune = 0 for 1x Base R598 0 81 Rtune = 392 for 2x Base 0402 5% 1 VOUT_PAD VOUT 80 R599 10.0K R600 3.3K 2 VOUT VOUT 79 0402 1% 0402 1% 3 VOUT VOUT 78 HSSI_VCCSEN Raddr1 R601 2.74K HSSI_RVSET 4 VOUT VCCSEN 77 HSSI_VTRACK R602 0, DNI VDD33_VOUT3 0402 HSSI_RTUNE 5 RVSET VTRACK 76 0402 5% I2C ADDR = 42H Raddr0 R603 1.2K ohm HSSI_VINSEN 6 RTUNE NC76 75 VCC_HSSI_AGND 0402 1% HSSI_ADDR1 7 VINSEN NC75 74 Rsync R604 0, DNI HSSI_ADDR0 8 ADDR1 NC74 73 0402 5% HSSI_PWM 9 ADDR0 NC73 72 HSSI_VSENN Rdiv1 ST21 C C HSSI_SYNC 10 PWM VSENN 71 HSSI_VSENP R605 2K HSSI_VSENP_R 1 2 1 2 VCC_HSSI_AGND 11 SYNC VSENP 102 PGOOD AGND_PAD 46 VCC_HSSI_EN 12 70 0402 SHORT HSSI_SMBALERT CONTROL AGND 43,46,50,53 EM_PMBUS_ALERTn R606 0 13 69 C613 0.1% C614 14 SMBALERT DGND 68 VCC_HSSI_AGND 5V 1000pF, DNI R607 0.1uF, DNI 50,53 EM_SDA SDA NC68 50,53 EM_SCL 15 67 600 Ohm, 0.5A, 0.35DCR 0402 2K, DNI Rdiv2 0402 Remote sense at FPGA VDD33_VOUT3 16 SCL U55 NC67 66 HSSI_VCC FB35 0603 50V 0402 25V R608 4.7K 17 VDD33 VCC 65 X7R 0.1% X6S 18 PVIN EM2140P01QI PVCC 103 ST22 19 PVIN PVIN_PAD 64 1 2 1 2 12V_G1 20 PVIN PVIN 63 C615 Place close PVIN PVIN to EM2130 21 62 2.2uF SHORT 22 PVIN PVIN 61 10V C621 C622 23 PGND PVIN 60 X6S C616 C617 C618 C619 C620 1uF 1uF R609 24 PGND PGND 59 0402 0402 11K 25 PGND PGND 58 22uF 22uF 22uF 22uF 22uF 25V 25V 0402 26 PGND PGND 57 X6S X6S 0.1% 27 PGND PGND 56 28 PGND PGND 55 0p9V_VCCH 0p9V_VCCRT_GXPL1 FB37 29 PGND PGND 54 30 PGND PGND 53 C623 31 PGND PGND 52 R610 0.1uF 104 PGND PGND 51 C1445 80ohm @ 100Mhz C1410 PGND_PAD PGND B 12V_G1 1K 0402 100uF 5A, 10mOhm 100uF C1446 C1447 B 0402 25V 1206 1206 C624 0.1% X6S 6.3V 6.3V 22uF 22uF 100uF X6T X6T 2917_4p3mm PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND PGND 25V

Tant Poly 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 Note:Near to FPGA to easy the power split. VCC_HSSI_AGND H = 6.76 mm Place on Top side 0p9V_VCCH L14 65nH 0p9V_VCCRT_GXER1

ST11 1 2 C1443 C1441 C1440 1 2 C1427 C1426 AGND SHORT PGND 100uF 22uF 100uF 47uF 22uF 6.3V VCC_HSSI_AGND

PLACE Output decoupling caps close to the device. Connect Note:Near to FPGA to easy the power split. AGND and PGND at the point of A cap GND connection. A

PWR - 1p2V VCCR 3p3V

1p2V_VCCR 1.2V 5.2A D 1.2V D C625 C626 U56 C629

100uF 22uF 29 22pF C630 C631 C627 C628 30 PVIN1 15 31 PVIN2 EN6362QI VOUT1 16 R613 22uF 22uF 47uf 100uF R611 32 PVIN3 VOUT2 17 294K R614 PVIN4 VOUT3 DNI 33 6A 18 34 PVIN5 VOUT4 58 20.5K 35 PVIN6 VOUT5 DNC 36 PVIN7 59 PVIN8 PVIN9 DNC R615 0 41 ENABLE R616 10 43 AVIN R612 42 46 VFB 4.7K SS 21 22 NC17 48 VCCR_PG 46 37 NC18 PGOOD C C 38 NC19 C632 53 NC20 54 NC21 1 15nF 55 NC22 NC1 2 56 NC23 NC2 3 NC24 NC3 4 R617 23 NC4 5 100K R618 49 NC(SW)1 NC5 6 294K 50 NC(SW)2 NC6 7 51 NC(SW)3 NC7 8 VCCR_AGND 52 NC(SW)4 NC8 9 3p3V NC(SW)5 NC9 10 NC10 11 NC11 12 NC12 13 R619 60 NC13 14 NC NC14 19 NC15 20

NC16 0 47 VSENSE R620 45 FQADJ

B 5.49K B

24 PGND1 25 PGND2 26 PGND3 27 39 PGND4 28 VDDB PGND5 57 PGND(THRM) C633

0.22uF 40 BGND 44 AGND

EN6362QI

VCCR_AGND ST12 1 2 1 2

AGNDSHORT PGND A VCCR_AGND A

Intel Corporation,101 innovation Dr, San Jose, CA 95134

VCCR_EN 46 Title AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 59of 66 5 4 3 2 1 5 4 3 2 1 PWR - 1p2V_DDR4_CH01

D D

3p3V U57 1p2V_DDR4_CH01

39 20 40 PVIN VOUT 21 1.2V 41 PVIN VOUT 22 PVIN VOUT 42 23 C636 C637 C638 C639 43 PVIN VOUT 24 C635 PVIN VOUT C640 C634 R621 44 25 27pF 47uf 47uf 47uf 100uF 45 PVIN VOUT 26 R622 47uf 47uf 46 PVIN VOUT 27 160K 3p3V 10.0K R624 R623 47 PVIN VOUT 28 PVIN VOUT 12K DNI 48 49 PVIN 66 R625 0 50 PVIN VSENSE R626 51 PVIN 63 PVIN VFB 10.0K R627 10 60 58 1p2V_DDR4_CH01_PG 46 R628 0 59 AVIN POK 57 ENABLE S_OUT C C 68 64 65 FQADJ EAOUT 69 SS 29 R629 56 EN_PB NC29 30 160K S_IN NC30(SW)30 R631 C641 62 31 R630 3.57K 1 M/S NC30(SW)31 70 0.015uF 2 NC1 NC(SW)70 71 4.7K R632 3 NC2 NC(SW)71 72 DNI 4 NC3 NC72 73 5 NC4 NC73 74 1p2V_DDR4_CH01_AGND R633 6 NC5 NC74 75 DNI 7 NC6 NC75 76 1p2V_DDR4_CH01_AGND 8 NC7 NC76 9 NC8 67 1p2V_DDR4_CH01_AGND 10 NC9 NC(XREF) 11 NC10 52 12 NC11 NC52 53 13 NC12 NC53 1p2V_DDR4_CH01_AGND 14 NC13 15 NC14 16 NC15 17 NC16 18 NC17 32 NC18 PGND B 19 33 B NC19 PGND 34 PGND C642 55 35 BGND PGND 36 0.22uF 54 PGND 37 VDDB PGND 38 61 PGND 77 AGND PGND(THRM) 12A EN63A0QI

1p2V_DDR4_CH01_AGND

1p2V_DDR4_CH01_EN 46 ST13 1 2 1 2

AGNDSHORT PGND A 1p2V_DDR4_CH01_AGND A

D D

3p3V U58 1p2V_DDR4_CH23

39 20 40 PVIN VOUT 21 1.2V 41 PVIN VOUT 22 PVIN VOUT 42 23 C644 C645 C648 C646 43 PVIN VOUT 24 C643 PVIN VOUT C649 C647 R636 44 25 27pF 47uf 47uf 47uf 100uF 45 PVIN VOUT 26 R634 47uf 47uf 46 PVIN VOUT 27 160K 3p3V 10.0K R637 R635 47 PVIN VOUT 28 PVIN VOUT 12K DNI 48 49 PVIN 66 R638 0 50 PVIN VSENSE R639 51 PVIN 63 PVIN VFB 10.0K R640 10 60 58 1p2V_DDR4_CH23_PG 46 R641 0 59 AVIN POK 57 ENABLE S_OUT C C 68 64 65 FQADJ EAOUT 69 SS 29 R642 56 EN_PB NC29 30 160K S_IN NC30(SW)30 R644 C650 62 31 R643 3.57K 1 M/S NC30(SW)31 70 0.015uF 2 NC1 NC(SW)70 71 4.7K R645 3 NC2 NC(SW)71 72 DNI 4 NC3 NC72 73 5 NC4 NC73 74 1p2V_DDR4_CH23_AGND R646 6 NC5 NC74 75 DNI 7 NC6 NC75 76 1p2V_DDR4_CH23_AGND 8 NC7 NC76 9 NC8 67 1p2V_DDR4_CH23_AGND 10 NC9 NC(XREF) 11 NC10 52 12 NC11 NC52 53 13 NC12 NC53 1p2V_DDR4_CH23_AGND 14 NC13 15 NC14 16 NC15 17 NC16 18 NC17 32 NC18 PGND B 19 33 B NC19 PGND 34 PGND C651 55 35 BGND PGND 36 0.22uF 54 PGND 37 VDDB PGND 38 61 PGND 77 AGND PGND(THRM) 12A EN63A0QI

1p2V_DDR4_CH23_AGND

1p2V_DDR4_CH23_EN 46 ST14 1 2 1 2

AGND SHORT PGND A 1p2V_DDR4_CH23_AGND A

0p6V_VTT_DDR4_CH01 3p3V 0.6V 3p3V 1p2V_DDR4_CH01 C652 2.2uF R647 C653 C654 C655 0402 10V 10.0K D X6S 0402 22uF 22uF 22uF D C656 C657 1% 0603 0603 0603 U59 22uF 22uF 10 9 0p6V_VTT_DDR4_CH01_PG 0p6V_VTT_DDR4_CH01_PG 46 0603 0603 VIN PGOOD 2 0p6V_VREF_DDR4_CH01 VLDOIN 3 0p6V_VTT_DDR4_CH01 R648 DNI VO 5 Vih=1.7, Vil = 0.3 0402 1% VOSNS 6 REFOUT 46 VTT_DDR4_CH01_EN R649 0 7 R650 10.0K EN C658 C659 0402 1% 0.1uF 1p2V_DDR4_CH01 8 0402 22uF GND 4 25V 0603 R651 10.0K 0.6V 1 PGND 11 X6S 0402 1% REFIN MPAD TPS51200DRCR C660 R652 10nF VSON-11 10.0K 0402 0402 50V 1% X7R

C C

0p6V_VTT_DDR4_CH23 3p3V 0.6V 3p3V 1p2V_DDR4_CH23 C661 2.2uF R653 C662 C663 C664 C665 C666 C667 0402 10V 10.0K X6S 0402 22uF 22uF 22uF 22uF 22uF 22uF C668 C669 1% 0603 0603 0603 0603 0603 0603 U60 22uF 22uF 10 9 0p6V_DDR4_VTT_CH23_PG 0p6V_DDR4_VTT_CH23_PG 46 0603 0603 VIN PGOOD 2 0p6V_VREF_DDR4_CH23 0p6V_VTT_DDR4_CH23 VLDOIN 3 R654 DNI VO 5 Vih=1.7, Vil = 0.3 0402 1% VOSNS 6 REFOUT 46 VTT_DDR4_CH23_EN R655 0 7 C670 C671 R656 10.0K EN C672 0402 1% 0.1uF 22uF 22uF 1p2V_DDR4_CH23 8 0402 0603 0603 GND 4 25V R657 10.0K 0.6V 1 PGND 11 X6S REFIN MPAD B 0402 1% B TPS51200DRCR C673 R658 10nF VSON-11 10.0K 0402 0402 50V 1% X7R

3p3V_STBY

3p3V_STBY 3p3V_LDO3 R787 FB36 VDOmax = 185mV 10.0K 0402 1p2V_PRE 80ohm @ 100Mhz C682 U64 1% 5A, 10mOhm 8 4 1p2V_PRE_PG 22uF NC POK 9 1 Vout = 0.5V x (Rup/Rdn + 1) 10 VIN1 VOUT1 2 C683 VIN2 VOUT2 270pF VINabsmax = -0.3V to 6.5V 0402 R680 50V Rup 2.61K A 6 3 C0G/NPO 0402 C684 C685 C686 A C687 SS VFB 1% 10nF 22uF 22uF 22uF 0402 R681 5 0603 0603 0603 Intel Corporation,101 innovation Dr, San Jose, CA 95134 50V 10.0K 7 GND 11 R682 EN EPAD X7R 0402 Title AgileX F-Series FPGA Dev Kit 1% EY1501di-adj Rdn 1.87K Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev ENth = 0.616V /0.8V / 0.95V B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 62of 66 5 4 3 2 1 5 4 3 2 1 0402 C674 2p5V_AGND PWR - 2p5V 15nF 2p5V_PG 46 2p5V_AGND R659

3p3V 100k R660 DNI

D D 0 2p5V_EN 46 R661 39 38 37 36 35 34 33 32 31 30 29 28 27 26 R662 4.7K SS VFB POK AVIN RLLM AGND ENABLE NC(SW)1 NC(SW)2 NC(SW)3 NC(SW)4 NC(SW)5 GND_PAD LLM/SYNC 0402 1 25 NC(SW)7 NC25 R663 2 24 NC(SW)6 NC24 3 U61 23 84.5K NC3 NC23 4 EN6337QI 22 DNI NC4 NC22 R664 5 21 VOUT PVIN 6 20 VOUT PVIN 0402 0402 R665 C C C675

15pF VOUT VOUT VOUT VOUT VOUT NC(SW) PGND PGND PGND PGND PGND PGND PVIN 3p3V 200k 7 8 9 10 11 12 13 14 15 16 17 18 19

C676 47uF C677 22uF 1206 X5R 1206 X5R ST15 C678 47uF 1 2 Connect the input 1 2 R666 cap to the GND plane AGND PGND 0 Connect the output SHORT through multiple vias. 2p5V_AGND 2p5V cap to the GND plane (see the Gerber files) through multiple vias PLACE Output decoupling caps close to the device. Connect AGND and PGND at the point of 2.5V cap GND connection.

B B

3p3V

R667 DNI 5V

1 IO_3p3V 2 5 3

U62

R668 FDMC2514 C679 C680 0 4 100uF DNI 6.3V 3p3V R830 4.7K C681 0.047uF

R669 DNI U63 5 4 6 VIN VOUT A IO_3p3V_EN A 46 IO_3p3V_EN R670 0 8 GATE SHDN 7 3 FAULT UV R671 1 Intel Corporation,101 innovation Dr, San Jose, CA 95134 2 GND 9 4.7K OV GND Title LTC4365-1 AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev 3.3V Enable Circuit B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 63of 66 5 4 3 2 1 5 4 3 2 1 PWR - 1p1V VCCH_GXER1 VCCFUSEWR_SDM 0402 C697 VCCH_GXER1_AGND 15nF VCCH_GXER1_PG 46 VCCH_GXER1_AGND R695

D 3p3V D 100k R696 DNI

0 VCCH_GXER1_EN 46 R697 39 38 37 36 35 34 33 32 31 30 29 28 27 26 R698 4.7K SS VFB POK AVIN RLLM AGND ENABLE NC(SW)1 NC(SW)2 NC(SW)3 NC(SW)4 NC(SW)5 GND_PAD LLM/SYNC 0402 1 25 NC(SW)7 NC25 R699 2 24 NC(SW)6 NC24 3 U66 23 422K NC3 NC23 4 EN6347QI 22 DNI NC4 NC22 R700 5 21 VOUT PVIN 6 20 C VOUT PVIN C 0402 0402 R701 VIN = 2.4 - 6.6 VDC C698

15pF VOUT VOUT VOUT VOUT VOUT NC(SW) PGND PGND PGND PGND PGND PGND PVIN 3p3V 200k 7 8 9 10 11 12 13 14 15 16 17 18 19

C699 47uF C700 22uF 1206 X5R1206 X5R ST17 C701 47uF 1 2 Connect the input 1 2 R702 cap to the GND plane AGND PGND 0 Connect the output SHORT through multiple vias. VCCH_GXER1_AGND 1p1V_VCCH_GXER1 cap to the GND plane (see the Gerber files) through multiple vias PLACE Output decoupling caps close to the device. Connect B AGND and PGND at the point of B 1.1V cap GND connection.

3p3V

3p3V 80ohm @ 100Mhz 5A, 10mOhm FB33 R788 VDOmax = 185mV C555 4.7K VCCFUSEWR_SDM U50 22uF 8 4 NC POK VCCFUSEWR_PG 46 2.4V 9 1 Vout = 0.5V x (Rup/Rdn + 1) 10 VIN1 VOUT1 2 C557 VIN2 VOUT2 47pF 0402 R546 VINabsmax = -0.3V to 6.5V 50V Rup 4.02K 6 3 C0G/NPO 0402 C558 C559 C560 C561 SS VFB 1% 10nF 3p3V 22uF 22uF 22uF 0402 R547 DNI 5 0603 0603 0603 50V 7 GND 11 X7R EN EPAD R548 A EY1501di-adj Rdn 1.05K A 0402 R549 1% Intel Corporation,101 innovation Dr, San Jose, CA 95134 46 VCCFUSEWR_EN 4.7K Title AgileX F-Series FPGA Dev Kit ENth = 0.616V /0.8V / 0.95V Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 64of 66 5 4 3 2 1 5 4 3 2 1 Decoupling - page 1

FPGA_VCC

1p8V

D C762 C763 C764 C765 C766 C767 C768 C769 C770 C771 D C1214 C1215 C1211 C1203 C1204 C1205 C1206 C1207 C1208 C1209 C1210 C1212 C1241 C1239 C1240 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 330uF 330uF 1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF 10uF 10uF 10uF 1uF 1uF

C772 C773 C774 C775 C776 C777 C778 C779 C780 C781

4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 1p8V_FLTR

C782 C783 C784 C785 C786 C787 C788 C789 C790 C791 C1222 C1216 C1217 C1218 C1219 C1220 C1221 C1223 C1224 C1225 C1226 C1319 C1320 C1321 C1322

4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 100uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 10uF 10uF 6.3V

C792 C793 C794 C795 C796 C797 C798 C799 C800 C801

22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF VCCH_GXPL1

C1227 C1232 C1233 C1234 C C1228 C1229 C1230 C1231 C C802 C803 C804 C805 C806 C807 C1232 ~ C1234 are 0402 100uF 1uF 1uF 1uF 1uF 0.1uF 0.1uF 0.1uF 100uF 100uF 100uF 100uF 100uF 100uF 6.3V

C808 C809 C810 C811 C817 C812 C814 C815

330uF 330uF 330uF 330uF 330uF 220uF 220uF 220uF 1p1V_VCCH_GXER1

C818 C819 C821 C825 C1242 C1243 C1244 C1245 C1246 C1247 C1248 C1249 C1250 C1251 C1252 C1253 C1254 C1255

330uF 330uF 330uF 220uF 220uF 220uF 100uF 100uF 100uF 22uF 22uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 6.3V 6.3V

0p9V_VCCL_HPS 1p2V_VCCR

B C835 B C828 C829 C830 C831 C832 C833 C834 C1428 C1429 C1430 C1431 C1432 C1433 C1434 C1435 C1436 C1437 C1438 C1439

4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 22uF 22uF 330uF 100uF 100uF 10uF 10uF 10uF 10uF 1uF 1uF 1uF 1uF 1uF 1uF 6.3V 6.3V

0p8V_VCCL_SDM

C737 C836 C837 C838 C839 C840 C841 C842 C1213 VCCFUSEWR_SDM IO_1p8V 1uF 1uF 1uF 1uF 1uF 10uF 10uF 10uF 100uF 6.3V

C1235 C293 C1425 C1424 C1423 C1236 C1237 C1238 C1421 C1422 0p9V_VCCRT_GXER1 4.7uF 1uF 100uF 100uF 10uF 10uF 1uF 1uF 1uF 1uF 6.3V 6.3V

C843 C844 C845 C846 C847 C848 C849 C850 C851 C852 C1199 C1200

1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 100uF 100uF 1 100uF + 1 10uF near to FPGA HPS area, 1 100uF+1 10uF near to FPGA SDM area A 6.3V 6.3V A

C853 C854 C855 C856 C857 C858 C859 C860 C861 C1196 C1197 Intel Corporation,101 innovation Dr, San Jose, CA 95134 1uF 1uF 1uF 1uF 1uF 10uF 10uF 4.7uF 4.7uF 220uF 220uF Title 6.3V 6.3V AgileX F-Series FPGA Dev Kit Copyright (c) 2014, Intel Corporation. All Rights Reserved. Size Document Number Rev B K57065-001-A A0 Date:Friday, January 10, 2020 Sheet 65of 66 5 4 3 2 1 5 4 3 2 1

0p9V_VCCH Decoupling - page 2

C1256 C1257 C1258 C1259 C1260 C1261 C1262 C1263 C1264 C1265 FPGA_VCC 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF

C1483 C1484 C1485 C1486 C1487 C1488 C1489 C1490 C1491 C1492 D C1266 C1267 C1268 C1269 C1270 C1271 C1272 C1273 C1274 C1275 D 47uF 47uF 47uF 47uF 47uF 47uF 47uF 47uF 47uF 47uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF

C1493 C1494 C1495 C1496 C1497 C1498 C1499 C1500 C1501 C1502 C1276 C1277 C1278 C1279 C1280 C1281 C1282 C1283 C1284 C1285 C1317 C1318 47uF 47uF 47uF 47uF 47uF 47uF 47uF 47uF 47uF 47uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF 1uF

C1503 C1504 C1505 C1506 C1507 C1508 C1509 C1510 C1511 C1512 C1286 C1287 C1288 C1289 C1290 C1291 C1292 C1293 C1294 C1295 C1296 C1297 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 22uF 47uF 47uF 47uF 47uF 47uF 47uF

C1513 C1514 C1515 C1516 C1517 C1298 C1299 C1302 C1303 22uF 22uF 22uF 22uF 22uF 220uF 220uF 220uF 220uF 6.3V 6.3V 6.3V 6.3V

C C

0p9V_VCCRT_GXPL1

C1315 C1304 C1305 C1306 C1307 C1308 C1309 C1310 C1311 C1312 C1313 C1314

220uF 1uF 1uF 1uF 1uF 1uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 6.3V

1p2V_DDR4_CH01

C1324 C1325 C1326 C1327 C1328 C1329 C1330 C1331 C1332 C1333 C1334 C1335 C1336 C1337 C1338 C1339 C1340 C1341 C1342 C1343 C1344 C1323 220uF 1uF 1uF 1uF 1uF 1uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 1uF 10uF 10uF 10uF 10uF 220uF 6.3V 6.3V

C1345 C1346 C1347 C1348 C1349 C1350 C1351 C1352 C1353 C1354 C1355 C1356 C1357 C1358 C1359 C1360 C1361 C1362 C1363 C1364 C1365 C1366 B B 1uF 1uF 1uF 1uF 1uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 1uF 10uF 10uF 10uF 10uF 1uF 1uF

1p2V_DDR4_CH23

C1388 C1367 C1368 C1369 C1370 C1371 C1372 C1373 C1374 C1375 C1376 C1377 C1378 C1379 C1380 C1381 C1382 C1383 C1384 C1385 C1386 C1387

220uF 220uF 1uF 1uF 1uF 1uF 1uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 1uF 10uF 10uF 10uF 10uF 6.3V 6.3V

C1389 C1390 C1391 C1392 C1393 C1394 C1395 C1396 C1397 C1398 C1399 C1400 C1401 C1402 C1403 C1404 C1405 C1406 C1407 C1408

1uF 1uF 1uF 1uF 1uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 4.7uF 1uF 10uF 10uF 10uF 10uF

A A