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Mapping Quantum Algorithms in a Crossbar Architecture

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Mapping Quantum Algorithms in a Crossbar Architecture Mapping QUANTUM ALGORITHMS IN A CROSSBAR ARCHITECTURE Alejandro MorAIS Mapping quantum algorithms in a crossbar architecture by Alejandro Morais to obtain the degree of Master of Science at the Delft University of Technology, to be defended publicly on the 25th of September 2019. Student number: 4747240 Project duration: November 1, 2018 – July 1, 2019 Thesis committee: Dr. ir. C.G. Almudever, QCA, TU Delft Dr. ir. Z. Al-Ars, CE, TU Delft Dr. ir. F. Sebastiano, AQUA, TU Delft Dr. ir. M. Veldhorst, QuTech, TU Delft Supervisor: Dr. ir. C.G. Almudever, QCA, TU Delft An electronic version of this thesis is available at https://repository.tudelft.nl/. Abstract In recent years, Quantum Computing has gone from theory to a promising reality, leading to quantum chips that in a near future might be able to exceed the computational power of any current supercomputer. For this to happen, there are some problems that must be overcome. For example, in a quantum processor, qubits are usually arranged in a 2D architecture with limited connectivity between them and in which only nearest-neighbour interactions are allowed. This restricts the execution of two-qubit gates and requires qubit to be moved to adjacent positions. Quantum algorithms, which are described as quantum circuits, neglect the quantum chip constraints and therefore cannot be directly executed. This is known as the mapping problem. This thesis focuses on the problem of mapping quantum algorithms into a quantum chip based on spin qubits, called the crossbar architecture. In this project we have developed the required compiler support (mapping) for making quantum circuits executable on the crossbar architecture based on the tools provided by OpenQL. Using this compiler, we have analyzed the mapping overhead of the crossbar architecture and studied how it relates to the characteristics of quantum algorithms. In addition, we have developed a verification program that checks the output of the compiler and provides a visualisation tool for debugging. i Acknowledgements This work would not have been possible without the support of many people. Firstly, I would like to thank all of those who have been involved in my education, helping me find my passion for quantum computing and computer engineering. Especially to my supervisor, Dr. Carmina G. Almudéver, for her guidance and for giving me the opportunity to work in the field of quantum computing. I would also like to thank Lingling Lao for her additional supervision during this thesis and to Hans Van Someren for his help during the technical aspect of this thesis. In addition, I would like to mention the rest of people in the Quantum Computer Archi- tecture group: Prof. Koen Bertels, Abid Moueddene, Amitabh Yadav, Anneriet Krol, Aritra Sarkar, Diogo Valada, Imran Ashraf, Jeroen van Straten, Matthijs Brobbel, Savvas Varsamopou- los and Yaoling Yang; and people who have already left: Daniel Moreno Manzano, Leon Riese- bos, Miguel Serrao and Xiang Fu. Also, I would like to send a special thanks to all of those who have contributed to open source projects from which millions of people benefit today. Finally, I would like to thank my family for their financial and emotional support through- out these years and, essentially, for putting up with me every day even a thousand kilometers away. Alejandro Morais Delft, September 2019 ii Contents 1 Introduction 1 1.1 Motivation . 1 1.2 Problem definition . 1 1.3 Structure . 3 2 Background 4 2.1 Quantum Computing . 4 2.1.1 Qubits . 4 2.1.2 Quantum Gates. 5 2.1.3 Quantum Circuits . 6 2.2 Mapping problem in quantum computing . 7 2.2.1 Gate Decomposition . 8 2.2.2 Initial Placement . 8 2.2.3 Routing . 9 2.2.4 Scheduling . 9 2.2.5 State of the art . 10 3 Crossbar Architecture 12 3.1 Layout and constraints . 12 3.1.1 Layout. 12 3.1.2 Layout constraints . 13 3.2 Model . 14 3.3 Operations . 16 3.3.1 Shuttling. 16 3.3.2 One-qubit gate . 19 3.3.3 Two-qubit gate . 22 3.3.4 Measurement . 24 3.4 Conflicts. 28 3.4.1 Side effects . 28 3.4.2 Undecidable configurations . 29 iii Contents iv 3.5 Gate Set Decomposition . 31 4 Mapping Implementation 33 4.1 Initial Placement . 33 4.2 Routing . 34 4.2.1 Crossbar Topology . 34 4.2.2 Crossbar Configuration. 35 4.2.3 Routing Strategy . 36 4.2.4 Routing Implementation . 37 4.3 Scheduling . 39 4.4 Mapping Decomposition . 39 5 Simulation framework 42 5.1 Framework overview . 42 5.2 Verification Program . 43 5.2.1 Parameters . 44 5.2.2 Conflict Checker . 44 5.2.3 Visualisation Tool . 45 5.3 Additional Crossbar Parameters . 46 5.3.1 Ancillary qubits . 46 5.3.2 Phase shift gates . 46 5.3.3 Crossbar Configuration. 47 6 Experiments and Results 50 6.1 Benchmarks . 50 6.2 Mapping Results . 51 6.2.1 Mapping Results with Trivial Initial Placement . 51 6.2.2 Mapping Results with Initial Placement . 53 6.3 Comparison of Different Mappers . 56 6.4 Comparison with the Surface 17 chip . 57 6.5 Mapping Overhead Analysis . 59 6.5.1 Characteristics . 59 6.5.2 Experiments . 60 6.6 Scalability . 62 7 Conclusions and future work 66 7.1 Conclusions. 66 Contents v 7.2 Future work . 67 A Gate decomposition 69 A.1 CPHASE Decomposition. 69 A.2 CNOT Decomposition . 69 B Benchmarks 71 Bibliography 75 1 Introduction This chapter explains the motivation behind the mapping of quantum algorithms in quan- tum processors in Section 1.1 with its definition in Section 1.2. Section 1.3 describes the organization of this thesis. 1.1. Motivation Since the birth of the modern computer in the early 1930s, the main goal of a computer program was to execute a task as fast as possible. This meant, directing the majority of the efforts towards improving the electronics that handle the logic. The speed of progress was so high that a few years after, Moore, co-founder of Intel, successfully predicted that the number of transistors in a processor would double every two years. Unfortunately, there is a physical limit in the number of transistors that one can fit inside a certain amount of space. Due to this fact, nowadays many chip manufacturers include more than one core in their processors. This allows the software to increase its efficiency by doing calculations in parallel. But even with parallelization, this hardware has a hard limit in terms of computational power. During this period, a new field of physics emerged, called quantum mechanics, which brought a new way of thinking and interacting with nature. In fact, it brought a new paradigm of computation which had the potential to overcome the limits of classic computation and increase the computational power exponentially. But analogous to what happened in the 1950s, nowadays there is a wide range of quantum computer technologies and all of them are still in a very early stage. And since every technology has different constraints, one can not execute a quantum algorithm directly into any quantum processors. There are some restrictions that must be respected to be able to execute the algorithm. Therefore, there is clearly a gap between the software and the quantum hardware; we need to make quantum algorithms executable on given quantum processors. However, as we will see in the next chapters, there is no straight forward solution to this problem. And it is at this point in which this thesis will focus on; that is, in the process of mapping quantum algorithms to a specific chip architecture, the crossbar architecture. 1.2. Problem definition In classical computing, a task is executed by dividing it into specific and discrete steps. This means describing the task in a language that the computer can understand: machine code. Initially, these programs were written in assembly language which was then translated into machine code. In the early days, this translation to machine code was dependant on 1 1.2. Problem definition 2 the underlying hardware implementation. In other words, a compiled program could not be executed in different hardware than its target. Fortunately, nowadays, this problem is solved by using a compatible instruction set between the most used processors of the market (AMD and Intel), although there are still some architectures (like ARM) that need a different compiler to run the program. A similar problem is found in the execution of quantum algorithms in a quantum archi- tecture. To tackle this and other related problems, the Quantum Computer Architecture Lab at TU Delft [9] proposed the system stack for a quantum computer as shown in Figure 1.1. The highest layer of the stack is the quantum algorithm, which is represented by a quantum circuit. This circuit describes the number of qubits and the gates that should be executed. Note that this description is hardware agnostic, so there are no limits in the types of gates or the interactions between qubits. But at the lowest level, the quantum chip might not sup- port every gate and interaction. This is why it is necessary to have intermediate layers that translate the circuit input into an equivalent one that can be executed on the quantum chip. Figure 1.1: The full-stack design of quantum computer architecture [10] One of the main constraints of a quantum chip is the interaction between qubits. These can be represented as graph, where each node is a qubit and each edge is a possible inter- action between two qubits..
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