GLS85VM1004A / 1008A / 1016A / 1032A Industrial Temp Emmc Nandrive™

GLS85VM1004A / 1008A / 1016A / 1032A Industrial Temp eMMC NANDrive™

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017 Features  Industry Standard Embedded MultiMediaCard  Expanded Data Protection (eMMC) Host Interface - Hardware Write Protection pin - JEDEC/MMC Standard Version 4.4  Latency Management JESD84-A44 compliant - Reduce latencies due to background operation - Backward compatible with eMMC 4.3 during time critical read/write operations  Performance  Integrated Voltage Detector - eMMC clock speed: Up to 52MHz (Support - Detects supply voltage fluctuations and x1/x4/x8 bus and Dual Data Rate mode) generates reset during power-up and power- - Sequential data read: down to prevent inadvertent writes Up to 60 MByte/sec *  Robust Built-in ECC - Sequential data write:  NAND Configuration Up to 30 MByte/sec * - 2 bits per cell (MLC) * measured using 128 Kbyte transfer size  Temperature Range  Power Management - Industrial: -40°C to 85°C - 3.3V power supply - 3.3V or 1.8V eMMC IO voltage  100-ball LBGA Package - Immediate disabling of unused circuitry without - 14.0 mm x 18.0 mm x 1.40 mm, host intervention 1.0 mm ball pitch, LFWE  Power Specifications (GLS85VM1004A/08A/16A/32A) - Active mode  All Devices are RoHS Compliant 180mA typical (GLS85VM1032A) 150mA typical (GLS85VM1016A) 120mA typical (GLS85VM1008A) 120mA typical (GLS85VM1004A) - Sleep mode 200µA typical

Product Description The GLS85VM1004A / VM1008A / VM1016A / The integrated NAND flash controller with built-in VM1032A eMMC NANDrive™ devices (referred to as advanced NAND management firmware “eMMC NANDrive” in this datasheet) are fully communicates with the host through the standard integrated solid state drives. They combine an eMMC protocol. It does not require any additional or advanced Greenliant NAND controller and 4, 8, 16 or proprietary software such as the Flash File System 32 GByte of NAND flash memory in a multi-chip (FFS) and Memory Technology Driver (MTD). package. These products are ideal for solid state eMMC NANDrive’s advanced NAND management mass storage in embedded and portable applications technology enhances data security, improves that require small form-factor, energy efficient and endurance and accurately tracks the usage of the reliable data storage. NAND flash. This innovative technology combines eMMC solid state drives are widely used in GPS and robust error correction capabilities with advanced telematics, in-vehicle infotainment, portable and wear-leveling algorithms and bad block management industrial computers, handheld data collection to extend the life of the product. scanners, point-of-sale terminals, networking and eMMC NANDrive supports Dual Data Rate (DDR) telecommunications equipment, robotics, audio and mode, boot, multiple partitions, permanent and partial video recorders, monitoring devices and set-top boxes. write protect, Replay Protected Memory Block (RPMB) eMMC NANDrive provides complete eMMC solid state access, Secure erase and TRIM, hardware reset and drive (SSD) functionality and compatibility in a 14mm other features detailed in the eMMC 4.4 standard x 18mm BGA package for easy, space saving specification. It is fully backward compatible with the mounting to a system motherboard. With its small size, eMMC 4.3 standard. low power consumption, strong security, reliability and ruggedness, eMMC NANDrive surpasses removable storage and discrete NAND-based products.

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017 Contents 1.0 GENERAL DESCRIPTION ...... 3 1.1 Optimized eMMC NANDrive ...... 3 1.1.1 Microcontroller Unit (MCU) ...... 3 1.1.2 Internal Direct Memory Access (DMA) ...... 3 1.1.3 Power Management Unit (PMU) ...... 3 1.1.4 Embedded Flash File System ...... 3 1.1.5 Error Correction Code (ECC) ...... 3 1.1.6 Serial Communication Interface (SCI) ...... 3 1.1.7 Multi-tasking Interface ...... 3 1.2 SMT Reflow Consideration ...... 3 1.3 Advanced NAND Management ...... 3 2.0 FUNCTIONAL BLOCKS ...... 4 3.0 PIN ASSIGNMENTS ...... 4 4.0 PRODUCT SPECIFICATIONS ...... 6 5.0 NANDrive FEATURES ...... 7 5.1 Hardware Write Protection ...... 7 5.2 Power-down Mode Entry ...... 7 5.3 Power-on Initialization ...... 7 5.4 Automatic Sleep Mode ...... 7 5.5 Latency Management ...... 7 6.0 DEBUGGING / MONITORING TOOL...... 7 6.1 Manufacturing Debug Tool ...... 7 6.2 Serial Communication Interface (SCI) ...... 7 7.0 eMMC FEATURES ...... 8 7.1 JEDEC / MMC Standard...... 8 7.2 eMMC Interface ...... 8 7.3 Supported Registers ...... 8 7.4 Supported Command Classes ...... 8 7.5 Sleep Mode ...... 8 7.6 Supported Features ...... 8 7.7 Supported Command List ...... 10 7.8 eMMC Register Values...... 11 7.8.1 OC Register ...... 11 7.8.2 CID Register ...... 11 7.8.3 CSD Register ...... 12 7.8.4 Extended CSD Register ...... 13 8.0 ELECTRICAL SPECIFICATIONS ...... 16 8.1 Absolute Maximum Ratings ...... 16 8.2 Operating Ratings ...... 16 8.3 Power Supply Voltage ...... 16 8.4 Bus Operating Condition ...... 16 8.5 Bus Signal Line Load ...... 17 8.6 Power-on Sequence ...... 17 8.7 Power-off Sequence ...... 18 8.8 Power-on Initialization Time ...... 19 8.9 Power-Down Mode Entry Time ...... 19 8.10 Power Consumption ...... 19 8.11 Bus Signal Level (eMMC Standard Input/Output) ...... 20 8.12 Bus Signal Level (NANDrive Specific Input/Output) ...... 21 8.13 eMMC AC timing (Standard/High-Speed Single-Data Rate) ...... 22 8.14 eMMC AC timing (High-Speed Dual-Data Rate) ...... 24 9.0 APPENDIX ...... 25 9.1 Reflow Profile ...... 25 9.2 Product Ordering Information ...... 26 9.3 Package Diagram ...... 28 9.4 Greenliant Internal Test Pads ...... 29 9.5 Reference Documents ...... 30 9.6 Revision History ...... 30

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017 1.0 GENERAL DESCRIPTION Each eMMC NANDrive contains an integrated eMMC NAND flash memory controller and NAND flash die in a BGA package. Refer to Figure 2-1 for the eMMC NANDrive block diagram.

1.1 Optimized eMMC NANDrive 1.1.5 Error Correction Code (ECC) High performance is achieved through optimized The heart of the eMMC NANDrive is the eMMC NAND hardware error detection and correction. flash memory controller, which translates standard eMMC signals into flash media data and control 1.1.6 Serial Communication Interface (SCI) signals. The following components contribute to the The Serial Communication Interface (SCI) is designed eMMC NANDrive’s operation. for error reporting. During the product development 1.1.1 Microcontroller Unit (MCU) stage, it is recommended to provide the SCI port on the PCB to aid in design validation. The MCU transfers the eMMC commands into data and control signals required for flash media operation. 1.1.7 Multi-tasking Interface 1.1.2 Internal Direct Memory Access (DMA) The multi-tasking interface enables fast, sequential The eMMC NANDrive uses internal DMA allowing write performance by allowing concurrent Read, instant data transfer from/to buffer to/from flash media. Program and Erase operations to multiple flash media. This implementation eliminates microcontroller 1.2 SMT Reflow Consideration overhead associated with the traditional, firmware- based approach, thereby increasing the data transfer The eMMC NANDrive family utilizes standard NAND rate. flash for data storage. Because the high temperature in a surface-mount soldering reflow process may alter 1.1.3 Power Management Unit (PMU) the content on NAND flash, it is recommended to The PMU controls the power consumption of the program the eMMC NANDrive after the reflow process. eMMC NANDrive. The PMU dramatically reduces the power consumption of the eMMC NANDrive by putting 1.3 Advanced NAND Management the part of the circuitry that is not in operation into eMMC NANDrive’s integrated controller uses Sleep mode. advanced wear-leveling algorithms to substantially The Flash File System handles inadvertent power increase the longevity of NAND flash media. Wear interrupts and has auto-recovery capability to ensure caused by data writes is evenly distributed in all or the eMMC NANDrive’s data integrity. select blocks in the device that prevents “hot spots” in locations that are programmed and erased extensively. 1.1.4 Embedded Flash File System This effective wear-leveling technique results in The embedded flash file system is an integral part of optimized device endurance, enhanced data retention the eMMC NANDrive. It contains MCU firmware that and higher reliability required by long-life applications. performs the following tasks:

1. Translates host side signals into flash media writes and reads 2. Provides flash media wear leveling to spread flash writes across all memory address space to increase the longevity of flash media 3. Keeps track of the data file structure 4. Manages system security for the selected protection zones

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017 2.0 FUNCTIONAL BLOCKS eMMC NANDrive

NAND Controller

MCU

eMMC SRAM Buffer Memory HOST I/F Channel Flash Media I/F eMMC NAND I/F NANDNAND I/F NANDNAND NANDChipsChips ChipsChips I/F Flash

Internal ECC DMA

PMU SCI

Figure 2-1: eMMC NANDrive Block Diagram

3.0 PIN ASSIGNMENTS TOP VIEW (balls facing down)

Figure 3-1: Pin Assignments for 100-Ball BGA

Highlighted pins are assigned for Greenliant specific functions. Refer to the Miscellaneous section in Table 3-1 for details.

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017 Table 3-1: Pin Assignments Ball I/O Symbol Ball No. Name and Functions Type Type Host Side Interface Clock input: Each cycle directs a 1-bit transfer on the CMD and DAT[7:0], or a CLK P6 I I1 two bits transfer on all DAT[7:0] (DDR). Command line: A bidirectional channel used for device initialization and command transfers. - Command has two operating modes: CMD P5 I/O I1/O1 1) Open-drain for initialization 2) Push-pull for fast command transfer - Commands are sent from host to the device. Responses are sent from the device to the host. DAT0 K2 I/O I1/O1 Data I/O[7:0]: Bidirectional channel used for data transfer DAT1 N2 I/O I1U/O1 - DAT[7:0] are operated in push-pull mode. DAT2 K3 I/O I1U/O1 - By default, after power-up or reset, only DAT[0] is used for data transfer. A DAT3 N3 I/O I1U/O1 wider data bus can be configured for data transfer using either DAT[3:0] or DAT[7:0], by the eMMC controller. DAT4 N8 I/O I1U/O1 - DAT[7:1] has internal pull-ups. Immediately after entering the 4-bit mode, DAT5 K8 I/O I1U/O1 the device disconnects the internal pull-ups of DAT[3:1]. Correspondingly, DAT6 N9 I/O I1U/O1 immediately after entering 8-bit mode, the device disconnects the internal DAT7 K9 I/O I1U/O1 pull-ups of DAT[7:1]. Reset signal pin: - By default, this RST_n is disabled. The host must enable with Extended RST_n M5 I I1 CSD register [162] to use it. - By asserting this RST_n, the device enters the pre-idle state. Miscellaneous SCIDIN D2 I I2/I2D SCI interface data input. Route this signal to the board for easy access. SCI interface data output. No external pull-up or pull-down resister should SCIDOUT D4 O O2 connect to this signal. Route this signal to the board for easy access. SCICLK D3 I I2/I2D SCI interface clock. Route this signal to the board for easy access. WP# E2 I I3/I3U Write Protect mode. Internal pull-up resister is implemented. PD# E3 I I3/I3U Power Down mode. Internal pull-up resister is implemented. RFU_PD J2, J9 Reserved for future use. External 10k ohm pull-down is recommended. A1, A2, A9, A10, B1, B10, NC No connect. All of these pins should remain not connected. T1, T10, U1, U2, U9, U10 D5, D6, D7, D8, D9, E5, E6, E7, E8, E9, H4, H5, H6, H7, J3, J4, J5, J6, J7, RFU Reserved for future use. Leave these pins floating on the application board. J8, K4, K5, K6, K7, L5, L6, M2, M3, M6, M8, M9, N4, N5, N6, N7, P4, P7 Power and Ground F2, F3, F4, F5, F6, F7, eMMC controller power supply, Flash memory and Flash memory I/O power VCC Supply F8, F9 supply H3, H8, L2, L4, L7, L9, VCCQ Supply eMMC I/O power supply P3, P8 G2, G3, G4, G5, G6, G7, VSS Supply eMMC controller, Flash memory and Flash memory I/O ground connection G8, G9 H2, H9, L3, L8, M4, M7, VSSQ Supply eMMC I/O ground connection (V and V are connected internally) P2, P9 SS SSQ Connect 2.2-4.7µF (or larger) ceramic capacitor from VDDI to ground. This pin VDDI E4 cannot be connected to VCC or VCCQ. Table 3-2: I/O Type IO voltage range I/O Type Description 1.65-1.95V or 2.7-3.6V 2.7-3.6V I1, I2, I3 Input I1 and I3 I2 O1, O2 Output O1 O2 I1U, I3U Input with Pull-up I1U, I3U ----- I2D Input with Pull-down ----- I2D

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

4.0 PRODUCT SPECIFICATIONS

Table 4-1: Default eMMC NANDrive Settings 1) Capacity Total Bytes Max LBA (Logical Block Addressing) 4 GByte 3,875,536 ,896 7,569,408 8 GByte 7,818,182,656 15,269,888 16 GByte 15,636,365,312 30,539,776 32 GByte 31,457,280,000 61,440,000 1) Total Byte and Max LBA do not include Boot Area 1, Boot Area 2 and RPMB Area (512KB each)

Table 4-2: Sequential Performance 2) Normal Attribute Area 3) Enhanced Attribute Area 4) Product Capacity Product Revision Write Read Write Read Performance Performance Performance Performance GLS85VM1004A-M-I-LFWE-ND202 AA1 GLS85VM1004A-M-I-LFWE-ND206 AA2 4 GByte 7MB/s 30MB/s 10MB/s 30MB/s GLS85VM1004A-M-I-LFWE-ND209 AA3 GLS85VM1004A-M-I-LFWE-ND214 AA4 GLS85VM1008A-M-I-LFWE-ND202 AA1 GLS85VM1008A-M-I-LFWE-ND206 AA2 8 GByte 10MB/s 30MB/s 15MB/s 30MB/s GLS85VM1008A-M-I-LFWE-ND209 AA3 GLS85VM1008A-M-I-LFWE-ND214 AA4 GLS85VM1016A-M-I-LFWE-ND202 AA1 GLS85VM1016A-M-I-LFWE-ND206 AA2 16 GByte 20MB/s 55MB/s 28MB/s 55MB/s GLS85VM1016A-M-I-LFWE-ND209 AA3 GLS85VM1016A-M-I-LFWE-ND214 AA4 GLS85VM1032A-M-I-LFWE-ND202 AA1 GLS85VM1032A-M-I-LFWE-ND206 AA2 32 GByte 30MB/s 60MB/s 44MB/s 60MB/s GLS85VM1032A-M-I-LFWE-ND209 AA3 GLS85VM1032A-M-I-LFWE-ND214 AA4 2) Actual performance may vary based on the application, host device and operating system. 3) Normal Attribute Area is eMMC User Data Area Partition and General Purpose Partitions. 4) Enhanced Attribute Area is eMMC Boot Area1, Boot Area2, RPMB Area and Enhanced User Data Area. Each General Purpose Partition has an option to be configured as Enhanced attribute area.

Table 4-3: Total Program / Erase (P/E) Cycles 5) Total P/E Cycles Per Block Capacity Product Revision Normal Attribute Area 3) Enhanced Attribute Area 4) 4 / 8 / 16 / 32 GByte AA1 / AA2 / AA3 / AA4 5,000 (Typical) 30,000 (Typical) 5) This NAND P/E cycling reference accounts for the benefits of NANDrive’s integrated controller, which uses advanced wear-leveling algorithms to increase the longevity of NAND flash media.

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

5.0 NANDrive FEATURES

5.1 Hardware Write Protection routines for flash media support and performing the low-level format. The Write Protect pin (WP#) offers extended data protection in addition to the standard eMMC Write 5.4 Automatic Sleep Mode Protection. This feature can be either selected When eMMC NANDrive is in the idle state and no through a jumper or host logic to protect the stored background operations are performed, it automatically data from inadvertent system writes or erases, and enters Automatic Sleep mode in order to reduce viruses. The Write Protect feature protects the full power consumption. When the host issues any eMMC address space of the data stored on the flash media. command to eMMC NANDrive, it will return to normal When WP# is asserted, eMMC Command Class4 operation and respond to the host immediately. (Block-Oriented Write Command), Class5 (Erase Commands) are invalid. eMMC NANDrive will return 5.5 Latency Management an error flag on WP_VIOLATION bit of response (R1). eMMC NANDrive has a special feature to avoid long 5.2 Power-down Mode Entry latencies during time critical operations such as read/write. The host can monitor the status of internal The Power-down Protection pin (PD#) can protect maintenance levels, and execute necessary user data and file system in NAND Flash from sudden background operations proactively when the device is power interruption. When the PD# is asserted during not in use. Refer to application note “eMMC NANDrive an operation, eMMC NANDrive stops the ongoing Background Operation Control” for more details. operation and immediately enters Power-down mode. Afterwards, the device will not accept any other 6.0 DEBUGGING / MONITORING TOOL commands. Software reset (CMD0: device goes to pre- Idle state) or hardware reset will bring the device to 6.1 Manufacturing Debug Tool normal operation with the PD# pin de-asserted. Greenliant provides a Linux/Windows/DOS-based An assertion of PD# pin during power-on initialization may executable file that allows users to send manufacturer cause the device to enter an unexpected power-down interface commands to the device via eMMC host mode. The device can be recovered from the mode by interface and can be used as a debugging utility. a power cycle, but not by software or a hardware reset. To avoid this situation, Greenliant recommends not to 6.2 Serial Communication Interface assert PD# pin until the device responds “Ready” to (SCI) the SEND_OP_COND command (CMD1). The SCI provides access to device activity logs, useful A filter algorithm is built to the PD# pin to avoid any for troubleshooting both during design phase and in signal noise or glitch that will cause eMMC NANDrive the field. The SCI consists of 3 active signals: to inadvertently enter Power-down mode. To ensure SCIDOUT, SCIDIN, and SCICLK. Always provide the device is entering Power-down mode properly, it is access to the SCI port in the PCB design to aid in recommended that PD# pin has to be asserted for at design validation. Refer to application note “Serial least 5µs. Refer to application note “Power Interrupt Communication Interface (SCI)” for more details. Protection Design Considerations” for more details. 5.3 Power-on Initialization For information on other NANDrive features, refer eMMC NANDrive is self-initialized during the first to application notes in Table 9-3. power-up. As soon as the power is applied to the eMMC NANDrive it reports busy for typically up to seven seconds while performing search for bad blocks and low-level format. This initialization is a one-time event. During the first self-initialization, the eMMC NANDrive firmware scans all connected flash media devices and reads their device ID. The eMMC NANDrive performs drive self-initialization including setting up the bad block table, executing all the necessary handshaking

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

7.0 eMMC FEATURES

7.1 JEDEC / MMC Standard - Class5 (erase), Secure Erase and Secure Trim operations are supported (CMD38). Greenliant eMMC NANDrive complies with JEDEC / MMC Standard Version 4.4 (JESD84-A44). Refer to - Class6 (write protection) JESD84-A44 for specification details. - Class7 (lock card) - Backward compatible with previous MMC modes - Class8 (GEN_CMD), Greenliant unique command - MMC mode operation (SPI mode is not supported) to configure internal settings. TM TM - MMCplus and MMCmobile protocols Class1 and Class3 (Stream read and write) are not supported. 7.2 eMMC Interface - Selectable eMMC IO; X1, X4 or X8 bus. 7.5 Sleep Mode - Max 52MHz Clock Speed eMMC NANDrive supports Sleep/Awake command (CMD5/CMD0). However, Vcc=0 during Sleep mode - Dual Data Rate (DDR) function supported is not supported. - Hardware Reset Signal 7.6 Supported Features - Bus testing procedure is supported. The following features are supported by eMMC 7.3 Supported Registers NANDrive. The specifications comply with JEDEC specifications. The following registers are supported by eMMC NANDrive. The register values are defined in Section Protection features 7.8, “eMMC Register values”. - Temporary Write Protection - Operating Control Register (OCR), 32-bit - Permanent and power-on write protection - Card Identify Register (CID), 128-bit - Lock/Unlock operation with password - Card Specific Register (CSD), 128-bit Partition features - Extended Card Specific Register (ECSD), 512-Byte. - Boot partition and boot operation (high-speed boot, The most significant 320 Bytes are the Properties DDR boot supported) segment. The lower 192 Bytes are the Mode - Replay-Protected Memory Block (RPMB) segment. - Multiple partitions with enhanced attribute (such as - Relative Card Address (RCA), 16-bit. Default value better reliability), which distinguish them from the is 0x0001. 0x0000 is reserved to set all eMMC default storage media. Boot and RPMB area devices into Standby state with CMD7. partition sizes and attributes are defined by Greenliant (read-only), while general-purpose Driver Strength Register (DSR), 16-bit is not partition sizes and attributes can be programmed supported. by the host. Boot Area Partition 1, Boot Area Partition 2 and RPMB Partition are configured as 7.4 Supported Command Classes 512KB by default. Refer to JESD84-A44 for the description of Enhanced User Data Area options. The following command classes are supported by eMMC NANDrive. The supported commands are Refer to Figure 7-1 for example of eMMC partitioning. indicated in Section 7.7, “Supported Command List.”

- Class0 (basic) - Class2 (block read) - Class4 (block write)

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

Default Configuration Enhanced Data Area Configuration General Purpose Partition Configuration

0x0000 0000 0x0000 0000 0x0000 0000 Boot Area Partition 1 Boot Area Partition 1 Boot Area Partition 1 (512KB) (512KB) (512KB)

0x0000 0000 0x0000 0000 0x0000 0000 Boot Area Partition 2 Boot Area Partition 2 Boot Area Partition 2 (512KB) (512KB) (512KB)

0x0000 0000 0x0000 0000 0x0000 0000 RPMB Area Partition RPMB Area Partition RPMB Area Partition (512KB) (512KB) (512KB)

0x0000 0000 0x0000 0000 0x0000 0000

User Data Area User Data Area General Purpose Partition 1 (Enhanced Attribute configuration) (Normal Attribute) (Normal Attribute) 0x0000 0000

Enhanced Multiple of Enhanced Multiple of Multiple of User Data Area WPG Size User Data Area WPG Size WPG Size

User Data Area (Normal Attribute) General Purpose Partition 2 (Normal Attribute configuration) Max of 0x0000 0000 User Data Area Device Capacity (Normal Attribute)

User Data Area General Purpose Partition 3 (Normal Attribute configuration) (Normal Attribute) 0x0000 0000

General Purpose Partition 4 (Enhanced Attribute configuration) 0x0000 0000 Max of Max of Device Capacity Device Capacity (Default) Overhead for Partition management (Not User accessible Area) Overhead for Enhanced attribute area (Not User accessible Area) Figure 7-1: Example of eMMC Partitioning

- Boot Area Partition 1, Boot Area Partition 2 and RPMB Partition with the Enhanced attribute. - One Enhanced User Data Area can be created in User Data Area by configuring eMMC registers. It is aligned to a multiple of Write Protect Group size. Enhanced attribute reduces total device capacity. - Up to four General Purpose Partitions can be created by configuring eMMC registers. They are aligned to a multiple of Write Protect Group size. The total size of User Data Area is reduced due to the overhead for partition management. Each General Purpose Partition can be configured to Normal attribute or Enhanced attribute.

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

7.7 Supported Command List The following table is the summary of supported commands. The command set is divided into several classes. Table 7-1: Supported Command Classes CMD# Support CMD# Support CLASS 0 Basic Commands CLASS 4 Block-Oriented Write Commands CMD0 GO_IDLE_STATE Yes CMD16 SET_BLOCKLEN Yes CMD0 GO_PRE_IDLE_STATE Yes CMD23 SET_BLOCK_COUNT Yes CMD0 BOOT_INITIATION Yes CMD24 WRITE_BLOCK Yes CMD1 SEND_OP_COND Yes CMD25 WRITE_MULTIPLE_BLOCK Yes CMD2 ALL_SEND_CID Yes CMD26 PROGRAM_CID Yes CMD3 SET_RELATIVE_ADDR Yes CMD27 PROGRAM_CSD Yes CMD4 SET_DSR 6) Yes CLASS 5 Erase Commands CMD5 SLEEP_AWAKE Yes CMD32-34 Reserved --- CMD6 SWITCH Yes CMD35 ERASE_GROUP_START Yes CMD7 SELECT/ DESELECT_CARD Yes CMD36 ERASE_GROUP_END Yes CMD8 SEND_EXT_CSD Yes CMD37 Reserved --- CMD9 SEND_CSD Yes CMD38 ERASE Yes Block-Oriented Write Protection CMD10 SEND_CID Yes CLASS 6 Commands CMD12 STOP_TRANSMISSION Yes CMD28 SET_WRITE_PROT Yes CMD13 SEND_STATUS Yes CMD29 CLR_WRITE_PROT Yes CMD14 BUSTEST_R Yes CMD30 SEND_WRITE_PROT Yes CMD15 GO_INACTIVE_STATE Yes CMD31 SEND_WRITE_PROT_TYPE Yes CMD19 BUSTEST_W Yes CLASS 7 Lock Card Commands CLASS 1 Stream Read Commands CMD42 LOCK_UNLOCK Yes CMD11 READ_DAT_UNTIL_STOP No CMD43-54 Reserved --- CLASS 2 Block-Oriented Read Commands CLASS 8 Application Specific Commands CMD16 SET_BLOCKLEN Yes CMD55 APP_CMD No CMD17 READ_SINGLE_BLOCK Yes CMD56 GEN_CMD 7) Yes CMD18 READ_MULTIPLE_BLOCK Yes CMD57-59 Reserved --- CMD23 SET_BLOCK_COUNT Yes CMD60-63 Reserved --- CLASS 3 Stream Write Commands CLASS 9 I/O Mode Commands CMD20 WRITE_DAT_UNTIL_STOP No CMD39 FAST_IO No CMD21 Reserved --- CMD40 GO_IRQ_STATE No CMD22 Reserved --- CMD41 Reserved --- 6) This command will be accepted, but will be treated as non-operation. 7) CMD56 is vendor specific command. For more information, please ask your Greenliant contact.

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

7.8 eMMC Register Values

7.8.1 OC Register Table 7-2: OC Register Definition Width Register OCR Name Field Value [bits] Type bits Power up status bit 1 R [31] 1 8) Access mode (10b: Sector mode) 2 R [30:29] 2h Reserved 5 R [28:24] 0 2.7 to 3.6V support OCR 9 R [23:15] 1FFh 2.0 to 2.6V support 7 R [14:8] 0 1.70 to 1.95V support 1 R [7] 1h Reserved 7 R [6:0] 0 8) Default value is “0”. This bit is set to “1” after the device finishes a power up routine.

7.8.2 CID Register Table 7-3: CID Register Definition Width Register CID Name Field 9) Value [bits] Type bits Manufacturer ID MID 8 R [127:120] F8h Reserved - 6 R [119:114] 0 Card/BGA CBX 2 R [113:112] 1h OEM/application ID OID 8 R [111:104] 0 Product name PNM 48 R [103:56] VM010B 10) Product revision PRV 8 R [55:48] AAh 11) Product serial number PSN 32 R [47:16] - Manufacturing date MDT 8 R [15:8] 10h 12) CRC7 checksum CRC 7 R [7:1] - Not used (Always 1) - 1 R [0] 1h 9) Some register values are configurable with vendor specific command (CMD56). Ask your Greenliant contact for more information. 10) ASCII code. 11) The product revision is composed of two Binary Coded Decimal (BCD) digits, four bits each, representing eMMC NANDrive. 12) Manufacturing date is composed of two hexadecimal digits representing a two-digit date code; most significant nibble is ‘m’ (month) and least significant nibble is ‘y’ (year). For example, 10h means January 2013 and A1h means October 2014.

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

7.8.3 CSD Register Table 7-4: CSD Register Definition Width Register CSD CSD Name Field 9) [bits] Type bits Value CSD structure CSD_STRUCTURE 2 R [127:126] 3h System specification version SPEC_VERS 4 R [125:122] 4h Reserved - 2 R [121:120] 0 Data read access time 1 TAAC 8 R [119:112] 7Fh Data read access time 2 in CLK NSAC 8 R [111:104] 1h cycles (NSAC*100) Max. bus clock frequency TRAN_SPEED 8 R [103:96] 32h Card command classes CCC 12 R [95:84] 1F5h Max. read data block length READ_BL_LEN 4 R [83:80] 9h Partial blocks for read allowed READ_BL_PARTIAL 1 R [79] 0 Write block misalignment WRITE_BLK_MISALIGN 1 R [78] 0 Read block misalignment READ_BLK_MISALIGN 1 R [77] 0 DSR implemented DSR_IMP 1 R [76] 0 Reserved - 2 R [75:74] 0 Device size C_SIZE 12 R [73:62] FFFh Max. read current @ VCCmin VDD_R_CURR_MIN 3 R [61:59] 7h Max. read current @ VCCmax VDD_R_CURR_MAX 3 R [58:56] 7h Max. write current @ VCCmin VDD_W_CURR_MIN 3 R [55:53] 7h Max. write current @ VCCmax VDD_W_CURR_MAX 3 R [52:50] 7h Device size multiplier C_SIZE_MULT 3 R [49:47] 7h Erase group size ERASE_GRP_SIZE 5 R [46:42] 1Fh Erase group size multiplier ERASE_GRP_MULT 5 R [41:37] 1Fh Write protect group size 4GB WP_GRP_SIZE 5 R [36:32] 1Fh 8GB WP_GRP_SIZE 5 R [36:32] 1Fh 16GB WP_GRP_SIZE 5 R [36:32] 1Fh 32GB WP_GRP_SIZE 5 R [36:32] 1Fh Write protect group enable WP_GRP_ENABLE 1 R [31] 1h Manufacturer default ECC DEFAULT_ECC 2 R [30:29] 0 Write speed factor R2W_FACTOR 3 R [28:26] 4h Max. write data block length WRITE_BL_LEN 4 R [25:22] 9h Partial blocks for write allowed WRITE_BL_PARTIAL 1 R [21] 0 Reserved - 4 R [20:17] 0 Content protection application CONTENT_PROT_APP 1 R [16] 0 File format group FILE_FORMAT_GRP 1 R/W [15] 0 Copy flag (OTP) COPY 1 R/W [14] 0 Permanent write protection PERM_WRITE_PROTECT 1 R/W [13] 0 Temporary write protection TMP_WRITE_PROTECT 1 R/W/E [12] 0 File format FILE_FORMAT 2 R/W [11:10] 0 ECC code ECC 2 RW/E [9:8] 0 CRC CRC 7 R/W/E [7:1] - Not used, always ‘1’ - 1 - [0] 1h

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

7.8.4 Extended CSD Register Table 7-5: Extended CSD Register Definition (Properties Segment) Width Register ECSD ECSD Name Field 9) [Bytes] Type Bytes Value Reserved ----- 7 - [511:505] 0 Supported command sets S_CMD_SET 1 R [504] 1h Reserved ----- 262 - [503:242] 0 1st initialization time after partitioning 4GB INI_TIMEOUT_PA 1 R [241] F6h 13) 8GB INI_TIMEOUT_PA 1 R [241] F6h 13) 16GB INI_TIMEOUT_PA 1 R [241] FFh 13) 32GB INI_TIMEOUT_PA 1 R [241] FFh 13) Reserved ----- 1 - [240] 0 Power class for 52MHz, DDR at 3.6V 4GB PWR_CL_DDR_52_360 1 R [239] 11h 8GB PWR_CL_DDR_52_360 1 R [239] 11h 16GB PWR_CL_DDR_52_360 1 R [239] 33h 32GB PWR_CL_DDR_52_360 1 R [239] 55h Power class for 52MHz, DDR at 1.95V 4GB PWR_CL_DDR_52_195 1 R [238] 11h 8GB PWR_CL_DDR_52_195 1 R [238] 11h 16GB PWR_CL_DDR_52_195 1 R [238] 33h 32GB PWR_CL_DDR_52_195 1 R [238] 55h Reserved ----- 2 - [237:236] 0 Min write performance, MIN_PERF_DDR_W_8_52 1 R [235] 0 8bit/52MHz/DDR Min read performance, MIN_PERF_DDR_R_8_52 1 R [234] 0 8bit/52MHz/DDR Reserved ----- 1 - [233] 0 TRIM multiplier 4GB TRIM_MULT 1 R [232] 1h 8GB TRIM_MULT 1 R [232] 1h 16GB TRIM_MULT 1 R [232] 1h 32GB TRIM_MULT 1 R [232] 1h Secure feature support SEC_FEATURE_SUPPORT 1 R [231] 15h Secure erase multiplier 4GB SEC_ERASE_MULT 1 R [230] 2h 8GB SEC_ERASE_MULT 1 R [230] 2h 16GB SEC_ERASE_MULT 1 R [230] 2h 32GB SEC_ERASE_MULT 1 R [230] 2h Secure TRIM multiplier 4GB SEC_TRIM_MULT 1 R [229] 2h 8GB SEC_TRIM_MULT 1 R [229] 2h 16GB SEC_TRIM_MULT 1 R [229] 2h 32GB SEC_TRIM_MULT 1 R [229] 2h Boot information BOOT_INFO 1 R [228] 7h Reserved ----- 1 - [227] 0 Boot partition size BOOT_SIZE_MULTI 1 R [226] 4h Access size 4GB ACC_SIZE 1 R [225] 4h 8GB ACC_SIZE 1 R [225] 5h 16GB ACC_SIZE 1 R [225] 6h 32GB ACC_SIZE 1 R [225] 6h High-capacity erase unit size 4GB HC_ERASE_GRP_SIZE 1 R [224] 4h 8GB HC_ERASE_GRP_SIZE 1 R [224] 8h 16GB HC_ERASE_GRP_SIZE 1 R [224] 10h 32GB HC_ERASE_GRP_SIZE 1 R [224] 20h High-capacity erase timeout ERASE_TIMEOUT_MULT 1 R [223] 1h Reliable write sector count REL_WR_SEC_C 1 R [222] 8h High-capacity write protect group size 4GB HC_WP_GRP_SIZE 1 R [221] 2h 8GB HC_WP_GRP_SIZE 1 R [221] 2h 16GB HC_WP_GRP_SIZE 1 R [221] 2h 32GB HC_WP_GRP_SIZE 1 R [221] 2h Sleep current (VCC) S_C_VCC 1 R [220] 9h Sleep current (VCCQ) S_C_VCCQ 1 R [219] 4h These specifications are subject to change without notice. 3/9/2017 © 2017 Greenliant Systems 13 S71425 GLS FS0019 Rev. 00 GLS85VM1004A / 1008A / 1016A / 1032A Industrial Temp eMMC NANDrive™

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017 Reserved ----- 1 - [218] 0 Sleep/awake timeout S_A_TIMEOUT 1 R [217] Fh Reserved ----- 1 - [216] 0 Sector count 4GB SEC_COUNT 4 R [215:212] 738000h 8GB SEC_COUNT 4 R [215:212] E90000h 16GB SEC_COUNT 4 R [215:212] 1D20000h 32GB SEC_COUNT 4 R [215:212] 3A98000h Reserved ----- 1 - [211] 0 Min write performance, 8-bit/52MHz MIN_PERF_W_8_52 1 R [210] 8h Min read performance, 8-bit/52MHz MIN_PERF_R_8_52 1 R [209] 8h Min write speed, 8-bit/26MHz, 4- MIN_PERF_W_8_26_4_52 1 R [208] 8h bit/52MHz Min read speed, 8-bit/26MHz, 4- MIN_PERF_R_8_26_4_52 1 R [207] 8h bit/52MHz Min write speed, 4-bit/26MHz MIN_PERF_W_4_26 1 R [206] 8h Min read speed, 4-bit/26MHz MIN_PERF_R_4_26 1 R [205] 8h Reserved ----- 1 R [204] 0 Power class for 26MHz/3.6V 4GB PWR_CL_26_360 1 R [203] 0h 8GB PWR_CL_26_360 1 R [203] 0h 16GB PWR_CL_26_360 1 R [203] 11h 32GB PWR_CL_26_360 1 R [203] 22h Power class for 52MHz/3.6V 4GB PWR_CL_52_360 1 R [202] 11h 8GB PWR_CL_52_360 1 R [202] 11h 16GB PWR_CL_52_360 1 R [202] 22h 32GB PWR_CL_52_360 1 R [202] 33h Power class for 26MHz/1.95V 4GB PWR_CL_26_195 1 R [201] 0h 8GB PWR_CL_26_195 1 R [201] 0h 16GB PWR_CL_26_195 1 R [201] 11h 32GB PWR_CL_26_195 1 R [201] 22h Power class for 52MHz/1.95V 4GB PWR_CL_52_195 1 R [200] 11h 8GB PWR_CL_52_195 1 R [200] 11h 16GB PWR_CL_52_195 1 R [200] 22h 32GB PWR_CL_52_195 1 R [200] 33h Reserved ----- 3 R [199:197] 0 Card type CARD_TYPE 1 R [196] 7h Reserved ----- 1 - [195] 0 CSD structure version CSD_STRUCTURE 1 R [194] 2h Reserved ----- 1 - [193] 0 Extended CSD revision EXT_CSD_REV 1 R [192] 5h 14) 13) First Initialization time after partitioning exceeds the defined Max value of INI_TIMEOUT_PA (FFh=25.5 sec). For actual values, refer to DC Spec in Section 8.8. 14) eMMC NANDrive supports Revision 1.5, but neither Background Operation management nor High Priority Interrupt (HPI) feature is supported.

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

Table 7-6: Extended CSD Register Definition (Modes Segment) Width Register ECSD ECSD Name Field 9) [Bytes] Type Bytes Value Command set CMD_SET 1 R/W/E_P [191] 0 Reserved ----- 2 - [190],[188] 0 Command set revision CMD_SET_REV 1 R [189] 0 Power class POWER_CLASS 1 R/W/E_P [187] 0 Reserved ----- 2 - [186],[184] 0 High-speed interface timing HS_TIMING 1 R/W/E_P [185] 0 Bus width mode BUS_WIDTH 1 W/E_P [183] 0 Reserved ----- 1 - [182] 0 Erased memory content ERASED_MEM_CONT 1 R [181] 0 Reserved ----- 1 - [180] 0 R/W/E Partition configuration PARTITION_CONFIG 1 [179] 0 &R/W/E_P R/W & Boot configuration protection BOOT_CONFIG_PROT 1 [178] 0 R/W/C_P Boot bus width 1 BOOT_BUS_WIDTH 1 R/W/E [177] 0 Reserved ----- 1 - [176] 0 High-density erase group definition ERASE_GROUP_DEF 1 R/W/E [175] 1h Reserved ----- 1 - [174] 0 R/W & Boot area write protection register BOOT_WP 1 [173] 0 R/W/C_P Reserved ----- 1 - [172] 0 R/W, User area write protection register USER_WP 1 R/W/C_P & [171] 0 R/W/E_P Reserved ----- 1 - [170] 0 FW configuration FW_CONFIG 1 R/W [169] 0 RPMB size RPMB_SIZE_MULT 1 R [168] 4h Reserved ----- 5 - [167:163] 0 Hardware reset function RST_n_FUNCTION 1 R/W [162] 0 Reserved ----- 1 - [161] 0 Partitioning support PARTITIONING_SUPPORT 1 R [160] 3h 4GB MAX_ENH_SIZE_MULT 3 R [159:157] 1CEh 8GB MAX_ENH_SIZE_MULT 3 R [159:157] 1D2h Max enhanced area size 16GB MAX_ENH_SIZE_MULT 3 R [159:157] 1D2h 32GB MAX_ENH_SIZE_MULT 3 R [159:157] 1D4h Partitions attribute PARTITIONS_ATTRIBUTE 1 R/W [156] 0 PARTITION_SETTING_CO Partitioning setting 1 R/W [155] 0 MPLETED General Purpose partition size GP_SIZE_MULT 12 R/W [154:143] 0 Enhanced user data area size ENH_SIZE_MULT 3 R/W [142:140] 0 Enhanced user data start address ENH_START_ADDR 4 R/W [139:136] 0 Reserved ----- 1 - [135] 0 Bad block management mode SEC_BAD_BLK_MGMNT 1 R/W [134] 0 Reserved ----- 134 - [133:0] 0

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017 8.0 ELECTRICAL SPECIFICATIONS

8.1 Absolute Maximum Ratings Absolute Maximum Stress Ratings - Applied conditions greater than those listed under “Absolute Maximum Stress Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these conditions or conditions greater than those defined in the operational sections of this data sheet is not implied. Exposure to absolute maximum stress rating conditions may affect device reliability. Storage Temperature15): - 40°C to +85°C (1,500 hours17) for 10% cycled device / 300 hours for 100% cycled device) 16) - 40°C to +55°C (5 years for 10% cycled device / 1 year for 100% cycled device) 16) 18) D.C. Voltage on Pin types I1/I1U/I2/I2D/I3/I3U and O1/O2 to Ground Potential...... - 0.5V to VCC+0.5V 18) Transient Voltage (<20ns) on Pin types I1/I1U/I2/I2D/I3/I3U and O1/O2 to Ground Potential.. - 2.0V to VCC+2.0V Package Power Dissipation Capability (TA = 25°C) ………………………………………..………………………. 1.5W Surface Mount Solder Reflow Temperature19) ………………………………………………...... 260°C for 10 seconds 20) Output Short Circuit Current …………………………………………………………...... 50 mA

15) Recommended maximum storage duration when the device is not powered up. Refer to Table 4-3 for P/E cycle estimates. Contact Greenliant for details. 16) The cycling condition shall be either under the normal usage situation with sufficient relaxation time between cycles (maximum one P/E cycle through the entire device per 10 minutes), or under an accelerated test condition at an elevated temperature (85°C) as specified by JEDEC. 17) 3,000 hours for devices configured with 100% Enhanced attribute area. 18) Refer to Table 3-1 and Table 3-2. I1/I1U/I3/I3U and O1 refer to VCCQ, instead of VCC. 19) Refer to Figure 9-1. 20) Outputs shorted for no more than 1 second. No more than one output shorted at a time.

8.2 Operating Ratings Table 8-1: Operating Ranges

Range Ambient Temperature VCC VCCQ 2.7 to 3.6V Industrial -40oC to +85oC 2.7V to 3.6V 21) 1.65V to 1.95V 21) Must keep Vcc=2.7-3.6V for all operations (including Sleep mode)

8.3 Power Supply Voltage Table 8-2: Operating Ranges Parameter Symbol Min Max Unit 21) Supply Voltage (NAND & Controller Core) VCC 2.7 3.6 V 2.7 3.6 V Supply Voltage (Controller I/O) V CCQ 1.65 1.95 V

VCC / VCCQ Power-Up time for 3.3V tPRUH 35 ms

VCCQ Power-Up time for 1.8V tPRUL 25 ms

8.4 Bus Operating Condition Table 8-3: Bus Operating Condition Parameter Min Max Unit

Peak voltage on all lines -0.5 VCCQ + 0.5 V Input leakage current (before initialization sequence and/or the -100 100 µA internal pull-up resistors connected) Input leakage current (after initialization sequence and the internal -2 2 µA pull-up resistors disconnected) Output leakage current (before initialization sequence) -100 100 µA Output leakage current (after initialization sequence) -2 2 µA

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

8.5 Bus Signal Line Load

The total capacitance CL of each line of the eMMC bus is the sum of the bus master capacitance CHOST, the bus capacitance CBUS itself, and the capacitance CDEVICE of the card connected to this line; CL = CHOST + CBUS + CDEVICE and requiring the sum of the host and bus capacitances not to exceed 20pF. 22)

22) If only “Standard/High-speed Single-Data Rate” is supported, the sum of the host and bus capacitances is required not to exceed 30pF. 8.6 Power-on Sequence

The following figure shows the eMMC power-up sequence. eMMC Initialization Sequence starts after VCC > VCC min. and VCCQ > VCCQ min.

Figure 8-1: Power-on Sequence

Table 8-4: Power-On Sequence Symbol Parameter Min Typ Max Unit

tPRUH VCC / VCCQ Power-Up time for 3.3V ------35 ms

tPRUL VCCQ Power-Up time for 1.8V ------25 ms

tVCCQ-SET VCCQ Setup Time (VCC min to VCCQ min) -25 --- +25 ms 23) tCMD1-READY First CMD1 to Device Ready (Synchronization time) --- 200 1,000 ms 23) tPU-BOOT Power-on Reset to Boot data start ------1,000 ms 23) Does not apply to the Initialization cases that are defined in Section 8.8 (tPU-INITIAL and tPARTITION) or when last power- off or reset sequence is not terminated properly. Issuing Sleep command (CMD5) before power-off or reset sequence is required to terminate properly. In the case of that the last power-off or reset sequence was not terminated with CMD5 properly, the max value may be longer than 1sec.

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017 8.7 Power-off Sequence

The following figure shows the eMMC power-down sequence. VCC and VCCQ can be powered off after the device gets ready for power-down. There is no timing restriction on the timing between VCC and VCCQ.

Figure 8-2: Power-off Sequence

Table 8-5: Power-Off Sequence Symbol Parameter Min Typ Max Unit 24) tPRDH VCC / VCCQ Power-Down time for 3.3V 0 ------ms 24) tPRDL VCCQ Power-Down time for 1.8V 0 ------ms 24) This is a case when eMMC NANDrive has entered a non-operating mode after receiving Sleep command (CMD5) and finishing Sleep mode entry prior to power-off, as recommended in the specifications of the JEDEC Standard for eMMC. For other cases, refer to application note “NANDrive Power Interrupt Protection Design Considerations.”

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

8.8 Power-on Initialization Time Table 8-6: Power-on Initialization Time Symbol Device Revision Parameter Typ Max Unit eMMC NANDrive Initialization TPU-INITIAL ALL --- to Ready (one-time event 7 50 s during very first power-on) VM1032A 65 70 s First Power-on Initialization VM1016A AA1/AA2/ Time after successful 35 40 s T PARTITION VM1008A AA3/AA4 partitioning (synchronization 20 25 s 25) VM1004A time) 15 25 s 25) Max initialization timeout during the first power up after successful partitioning is defined at INI_TIMEOUT_PA in CSD[241].

8.9 Power-Down Mode Entry Time Table 8-7: Power-Down Mode Entry Time Symbol Parameter Min. [µs] 26) TPOWER-DOWN Time for PD# pin be asserted to enter Power-down mode 5 26) Greenliant recommends keeping the PD# pin at Low until next power-on after it’s asserted.

8.10 Power Consumption

Table 8-8: Power Consumption (TA = -40°C to +85°C, VCC = 2.7-3.6V, VCCQ = 2.7-3.6V or 1.65-1.95V) Product Typ Max Symbol Type Device Parameter Units Conditions Revision VCC VCCQ Total VCC VCCQ Total IDD PWR Active 165 15 180 240 30 270 mA 27) IST PWR AA1/AA2 Standby/Idle 1.49 0.01 1.5 1.78 0.02 1.8 mA VM1032A 28) VCC=VCC Max ISP PWR /AA3/AA4 Sleep 0.19 0.01 0.2 1.18 0.02 1.2 mA 29) IPD PWR Power Down 69.99 0.01 70 139.98 0.02 140 mA IDD PWR Active 135 15 150 190 30 220 mA 27) IST PWR AA1/AA2 Standby/Idle 1.49 0.01 1.5 1.78 0.02 1.8 mA VM1016A 28) VCC=VCC Max ISP PWR /AA3/AA4 Sleep 0.19 0.01 0.2 1.18 0.02 1.2 mA 29) IPD PWR Power Down 34.99 0.01 35 69.98 0.02 70 mA IDD PWR Active 110 10 120 170 20 190 mA 27) IST PWR AA1/AA2 Standby/Idle 1.49 0.01 1.5 1.78 0.02 1.8 mA VM1008A 28) VCC=VCC Max ISP PWR /AA3/AA4 Sleep 0.19 0.01 0.2 1.18 0.02 1.2 mA 29) IPD PWR Power Down 16.99 0.01 17 34.98 0.02 35 mA IDD PWR Active 110 10 120 170 20 190 mA 27) IST PWR AA1/AA2 Standby/Idle 1.49 0.01 1.5 1.78 0.02 1.8 mA VM1004A 28) VCC=VCC Max ISP PWR /AA3/AA4 Sleep 0.19 0.01 0.2 1.18 0.02 1.2 mA 29) IPD PWR Power Down 16.99 0.01 17 34.98 0.02 35 mA 27) Including Automatic Sleep mode. These values are valid when eMMC CLK is not toggled by host. 28) During Sleep mode, must keep Vcc=2.7-3.6V. 29) Power Down mode with PD# pin.

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

8.11 Bus Signal Level (eMMC Standard Input/Output)

The bus can be supplied with a variable supply voltage. All signal levels relate to the supply voltage.

Figure 8-3: Bus Signal Levels

Table 8-9: eMMC Standard Interface Open-Drain Mode Bus Signal Level Symbol Type Parameter Min Max Unit Conditions

VOH O1 Output high voltage VCCQ – 0.2 --- V IOH = -100µA

VOL O1 Output low voltage --- 0.3 V IOL = 2mA The input levels are identical with the push-pull mode bus signal levels.

Table 8-10: eMMC Standard Interface Push-Pull Mode Bus Signal Level (VCCQ=2.7-3.6V) Symbol Type Parameter Min Max Unit Conditions

VOH O1 Output high voltage 0.75 x VCCQ --- V IOH = -100µA at VCCQ min

VOL O1 Output low voltage --- 0.125 x VCCQ V IOL = 100µA at VCCQ min

VIH I1 Input high voltage 0.625 x VCCQ VCCQ + 0.3 V

VIL I1 Input low voltage VSS – 0.3 0.25 x VCCQ V

Table 8-11: eMMC Standard Interface Push-Pull Mode Bus Signal Level (VCCQ=1.65-1.95V) Symbol Type Parameter Min Max Unit Conditions

VOH O1 Output high voltage VCCQ – 0.45 --- V IOH = -2mA

VOL O1 Output low voltage --- 0.45 V IOL = 2mA

VIH I1 Input high voltage 0.65 x VCCQ VCCQ + 0.3 V

VIL I1 Input low voltage VSS – 0.3 0.35 x VCCQ V

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

8.12 Bus Signal Level (NANDrive Specific Input/Output)

The bus can be supplied with a variable supply voltage. All signal levels relate to the supply voltage.

Figure 8-4: Bus Signal Levels

Table 8-12: NANDrive Specific Interface Bus Signal Level 30) Symbol Type Parameter Min Max Unit Conditions

VIH I2 Input high voltage 2.52 --- V VCC = VCC max

VIL I2 Input low voltage --- 0.54 V VCC = VCC min

VOH O2 Output high voltage 1.81 --- V IOH = -2mA, VCC = VCC min

VOL O2 Output low voltage --- 0.40 V IOL = 2mA, VCC = VCC max

IIH I2D Pull-down current 21 73 uA VCCQ = VCC max, VCC min 30) SCIDIN, SCIDOUT and SCICLK pins always follow the specification of VCC = 2.7-3.6V.

Table 8-13: NANDrive Specific Interface Bus Signal Level (VCCQ=2.7-3.6V) Symbol Type Parameter Min Max Unit Conditions 31) VT+ I3 Schmitt Trigger Threshold --- 1.96 V VCCQ = VCCQ max 31) VT- I3 Schmitt Trigger Threshold 0.87 --- V VCCQ = VCCQ min

ΔVT I3 Schmitt Trigger Hysteresis 0.82 0.85 V

IIL I3U Pull-up current -83 -26 uA VCCQ = VCCQ max, VCCQ min 31) PD# and WP# pins follow this specification for input high/low voltage levels.

Table 8-14: NANDrive Specific Interface Bus Signal Level (VCCQ=1.65-1.95V) Symbol Type Parameter Min Max Unit Conditions 31) VT+ I3 Schmitt Trigger Threshold --- 1.10 V VCCQ = VCCQ max 31) VT- I3 Schmitt Trigger Threshold 0.54 --- V VCCQ = VCCQ min

ΔVT I3 Schmitt Trigger Hysteresis 0.45 0.50 V

IIL I3U Pull-up current -22 -5.2 uA VCCQ = VCCQ max, VCCQ min

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017 8.13 eMMC AC timing (Standard/High-Speed Single-Data Rate)

Figure 8-5: Interface Timing

Table 8-15: Interface Timing (High-Speed Interface) Parameter Symbol Min Max Unit Conditions CLK 32) Clock frequency Data C ≤ 30pF f 0 52 33) MHz L Transfer Mode (PP) PP Tolerance: +100KHz Clock frequency

Identification Mode fOD 0 400 kHz Tolerance: +20KHz (OD)

Clock high time tWH 6.5 --- ns CL ≤ 30pF

Clock low time tWL 6.5 --- ns CL ≤ 30pF 34) Clock rise time tTLH --- 3 ns CL ≤ 30pF

Clock fall time tTHL --- 3 ns CL ≤ 30pF Inputs CMD, DAT (referenced to CLK)

Input set-up time tISU 3 --- ns CL ≤ 30pF

Input hold time tIH 3 --- ns CL ≤ 30pF Outputs CMD, DAT (referenced to CLK) Output delay time t --- 13.7 ns C ≤ 30pF during data transfer ODLY L

Output hold time tOH 2.5 --- ns CL ≤ 30pF 35) Signal rise time tRISE --- 3 ns CL ≤ 30pF 35) Signal fall time tFALL --- 3 ns CL ≤ 30pF

32) CLK timing is measured at 50% of VCC. 33) eMMC NANDrive supports the full frequency range of 0 to 52 MHz. 34) CLK rise and fall times are measured by VIHmin and VILmax. 35) Rise and fall times for inputs CMD and DAT are measured by VIHmin and VILmax. Rise and fall times for outputs CMD and DAT are measured by VOHmin and VOLmax.

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

36) Table 8-16: Interface Timing (Standard Interface) Parameter Symbol Min Max Unit Conditions CLK 37) Clock frequency Data f 0 26 MHz C ≤ 30pF Transfer Mode (PP) 38) PP L Clock frequency

Identification Mode fOD 0 400 kHz --- (OD)

Clock high time tWH 10 --- ns CL ≤ 30pF

Clock low time tWL 10 --- ns CL ≤ 30pF 39) Clock rise time tTLH --- 10 ns CL ≤ 30pF

Clock fall time tTHL --- 10 ns CL ≤ 30pF Inputs CMD, DAT (referenced to CLK)

Input set-up time tISU 3 --- ns CL ≤ 30pF

Input hold time tIH 3 --- ns CL ≤ 30pF Outputs CMD, DAT (referenced to CLK) 40)

Output set-up time tOSU 11.7 --- ns CL ≤ 30pF

Output hold time tOH 8.3 --- ns CL ≤ 30pF 36) The device must always start with the standard interface timing (i.e. the device works up to 26MHz without the host sending the SWITCH command (CMD6)). The timing mode can be switched to high speed interface timing by the host sending the SWITCH command (CMD6) with the argument for high speed interface select. 37) CLK timing is measured at 50% of VCC. 38) For compatibility with devices that support the v4.2 standard or earlier, the host should not use > 20 MHz before switching to high speed interface timing. 39) CLK rise and fall times are measured by VIHmin and VILmax. 40) tOSU and tOH are defined as values from the clock’s rising edge.

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017 8.14 eMMC AC timing (High-Speed Dual-Data Rate)

These timings apply to DAT [7:0] signals only when the device is configured for dual data mode operation. In this dual data mode, the DAT signals operate synchronously of both the rising and the falling edges of CLK.

Figure 8-6: Interface Timing (2x Data Rate Operation)

Table 8-17: Interface Timing (High Speed Dual Data Rate) Parameter Symbol Min Max Unit Conditions CLK 41) Includes jitter, phase Clock duty cycle 45 55 % noise Inputs DAT (referenced to CLK-DDR mode) 42)

Input set-up time tISUddr 2.5 --- ns CL ≤ 20pF

Input hold time tIHddr 2.5 --- ns CL ≤ 20pF Outputs DAT (referenced to CLK-DDR mode) 42) Output delay time t 1.5 7 ns C ≤ 20pF during data transfer ODLYddr L Signal rise time (all t --- 2 ns C ≤ 20pF signals) RISE L Signal fall time (all t --- 2 ns C ≤ 20pF signals) FALL L

41) CLK timing is measured at 50% of VCC. 42) Inputs DAT rise and fall times are measured by min (VIH) and max (VIL), and output DAT rise and fall times are measured by min (VOH) and max (VOL).

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017 9.0 APPENDIX

9.1 Reflow Profile

Figure 9-1: Soldering Reflow Profile

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

9.2 Product Ordering Information GLS 85 VM 1 0xx A - M - I - LFWE - NDxxx XX XX X XXX X - X - X - XXXX - XXXXX Ordering Code 43) NDxxx = NANDrive Revision EDxxx = Evaluation Board Revision Environmental Attribute E = non-Pb solder (RoHS Compliant) Package Modifier W = 100-ball positions Package Type LF = LBGA (max. package height 1.40mm)

Operation Temperature I = Industrial: -40°C to +85°C NAND Configuration M = 2 bits per cell Generation / Product Configuration A = First generation

Capacity 004 = 4 GByte 008 = 8 GByte 016 = 16 GByte 032 = 32 GByte

MByte or GByte Designator 0 = MByte 1 = GByte Interface M = eMMC Voltage V = 2.7V to 3.3V Product Series 85 = NANDrive

43) Note that the top side marking on the package typically does not include ordering codes (e.g. NDxxx), unless it is a special custom specification (C-SPEC) required by the end-customer to be marked on the device.

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017

Valid Combinations

Valid product combinations are those that are in the mass production or will be in the mass production. Consult your Greenliant sales representative to confirm availability of the valid combinations and to determine availability of new product combinations.

Table 9-1: eMMC NANDrive Product Valid Ordering Numbers Capacity Operating Temperature Part Number Package 4GB Industrial (-40°C to 85°C) GLS85VM1004A-M-I-LFWE-ND202 LFWE, 14x18x1.40mm 4GB Industrial (-40°C to 85°C) GLS85VM1004A-M-I-LFWE-ND206 LFWE, 14x18x1.40mm 4GB Industrial (-40°C to 85°C) GLS85VM1004A-M-I-LFWE-ND209 LFWE, 14x18x1.40mm 4GB Industrial (-40°C to 85°C) GLS85VM1004A-M-I-LFWE-ND214 LFWE, 14x18x1.40mm 8GB Industrial (-40°C to 85°C) GLS85VM1008A-M-I-LFWE-ND202 LFWE, 14x18x1.40mm 8GB Industrial (-40°C to 85°C) GLS85VM1008A-M-I-LFWE-ND206 LFWE, 14x18x1.40mm 8GB Industrial (-40°C to 85°C) GLS85VM1008A-M-I-LFWE-ND209 LFWE, 14x18x1.40mm 8GB Industrial (-40°C to 85°C) GLS85VM1008A-M-I-LFWE-ND214 LFWE, 14x18x1.40mm 16GB Industrial (-40°C to 85°C) GLS85VM1016A-M-I-LFWE-ND202 LFWE, 14x18x1.40mm 16GB Industrial (-40°C to 85°C) GLS85VM1016A-M-I-LFWE-ND206 LFWE, 14x18x1.40mm 16GB Industrial (-40°C to 85°C) GLS85VM1016A-M-I-LFWE-ND209 LFWE, 14x18x1.40mm 16GB Industrial (-40°C to 85°C) GLS85VM1016A-M-I-LFWE-ND214 LFWE, 14x18x1.40mm 32GB Industrial (-40°C to 85°C) GLS85VM1032A-M-I-LFWE-ND202 LFWE, 14x18x1.40mm 32GB Industrial (-40°C to 85°C) GLS85VM1032A-M-I-LFWE-ND206 LFWE, 14x18x1.40mm 32GB Industrial (-40°C to 85°C) GLS85VM1032A-M-I-LFWE-ND209 LFWE, 14x18x1.40mm 32GB Industrial (-40°C to 85°C) GLS85VM1032A-M-I-LFWE-ND214 LFWE, 14x18x1.40mm

Table 9-2: eMMC Evaluation Board Valid Ordering Numbers Capacity Operating Temperature Part Number Form Factor 4GB Industrial (-40°C to 85°C) GLS85VM1004A-M-I-E2-ED202 JEDEC MO-277 4GB Industrial (-40°C to 85°C) GLS85VM1004A-M-I-E2-ED206 JEDEC MO-277 4GB Industrial (-40°C to 85°C) GLS85VM1004A-M-I-E2-ED209 JEDEC MO-277 4GB Industrial (-40°C to 85°C) GLS85VM1004A-M-I-E2-ED214 JEDEC MO-277 8GB Industrial (-40°C to 85°C) GLS85VM1008A-M-I-E2-ED202 JEDEC MO-277 8GB Industrial (-40°C to 85°C) GLS85VM1008A-M-I-E2-ED206 JEDEC MO-277 8GB Industrial (-40°C to 85°C) GLS85VM1008A-M-I-E2-ED209 JEDEC MO-277 8GB Industrial (-40°C to 85°C) GLS85VM1008A-M-I-E2-ED214 JEDEC MO-277 16GB Industrial (-40°C to 85°C) GLS85VM1016A-M-I-E2-ED202 JEDEC MO-277 16GB Industrial (-40°C to 85°C) GLS85VM1016A-M-I-E2-ED206 JEDEC MO-277 16GB Industrial (-40°C to 85°C) GLS85VM1016A-M-I-E2-ED209 JEDEC MO-277 16GB Industrial (-40°C to 85°C) GLS85VM1016A-M-I-E2-ED214 JEDEC MO-277 32GB Industrial (-40°C to 85°C) GLS85VM1032A-M-I-E2-ED202 JEDEC MO-277 32GB Industrial (-40°C to 85°C) GLS85VM1032A-M-I-E2-ED206 JEDEC MO-277 32GB Industrial (-40°C to 85°C) GLS85VM1032A-M-I-E2-ED209 JEDEC MO-277 32GB Industrial (-40°C to 85°C) GLS85VM1032A-M-I-E2-ED214 JEDEC MO-277

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017 9.3 Package Diagram

Note: All linear dimensions are in millimeters. Untoleranced dimensions are nominal target values. Coplanarity: 0.12 mm Ball diameter is 0.45 mm (± 0.05 mm) Ball opening size is 0.38 mm (± 0.05 mm), SMD type

Figure 9-2: eMMC NANDrive 100-Ball, Ball Grid Array (BGA) Greenliant Package Code: LFWE

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017 9.4 Greenliant Internal Test Pads eMMC NANDrive package “LFWE” has test pads that are used by Greenliant. No solder balls are mounted on the test pads. These pads may be rejected by Surface Mount Technology (SMT) equipment or other machines at assembly vendors, if such equipment is not programmed accordingly. Figure 9-3 shows the locations of the test pads, which are colored in gray. These pads are Do Not Use (DNU) pads for all users, and must be open (no connection).

 Pitch (pad to pad): 1mm (+/- 0.05mm) and aligned with solder balls  Pad opening size and shape: 0.38mm (+/- 0.05mm), round  Number of test pads: 41 pads  Land pattern: SMD type (Solder Mask Defined)  Material: Electro Ni and Electro Au

Figure 9-3: Locations of Solder Balls and Test Pads (balls facing down)

Greenliant Systems Proprietary & Confidential Data Sheet 03.400 March 2017 9.5 Reference Documents Table 9-3: Reference Documents Document Number Title S72089 NANDrive Power Interrupt Protection Design Considerations S72111 Serial Communication Interface (SCI) S72105 eMMC NANDrive Firmware Update Specification S72106 eMMC NANDrive Background Operation Control Specification S72107 eMMC NANDrive Special Function Zone Specification S72108 eMMC NANDrive Manufacturer Interface Command Specification S72110 eMMC NANDrive SMART Command Specification S74027 eMMC NANDrive WindowsPT2 User Guide S74028 eMMC NANDrive Reference Design Schematic S74030 eMMC NANDrive Firmware Update - Linux Sample Code S72092 * eMMC NANDrive Solution For Incomplete Power-on Initialization E08500002 * eMMC NANDrive Disconnection Feature Issue E08500003 * eMMC NANDrive RPMB Error Handling Issue E08500004 * eMMC NANDrive PD# and WP# Low Pulse Issue * Contact Greenliant Field Application Engineering for more information

9.6 Revision History Table 9-4: Revision History Number Description Date 01.000 Initial release as Data Sheet March 22, 2013 Added GLS85VM1004A-M-I-LFWE, Section 9.4 and Tables 8-13, 8-14. 02.000 May 22, 2013 Updated Figure 3-1, Sections 5.4, 6.2 and Tables 3-1, 3-2, 7-2, 8-4, 8-13, 9-3. Updated the product revision from AA0 to AA1, and the relating parameters. 03.000 August 19, 2013 Updated Tables 4-1, 4-2, 4-3, 7-4, 7-5, 7-6, 8-4, 8-5, 8-6, 8-8, and Section 8.1. 03.001 Updated Table 4-3 August 28, 2013 03.100 Updated Figures 8-1, 8-2 and Tables 8-2, 8-4, 8-5, 8-8, 9-2 March 14, 2014 Updated a description for RFU pins in Table 3-1. Added the product revision 03.200 January 20, 2015 AA2 in Table 4-2, 4-3, 8-6, 8-8, 9-1, 9-2. Updated descriptions on Table 4-3, 9-3. Added the product revision AA3 in Table 4-2, 4-3, 8-6, 8-8, 9-1, 9-2. Fixed typos 03.300 March 4, 2016 of Byte width in Table7-5, 7-6. Updated descriptions in 5.2, Table 8-7 and 8-16. 03.400 Added the product revision AA4 in Table 4-2, 4-3, 8-6, 8-8, 9-1, 9-2. March 9, 2017

© 2017 Greenliant Systems. All rights reserved. Greenliant and the Greenliant logo are registered trademarks, and NANDrive is a trademark of Greenliant Systems. All other trademarks and registered trademarks are the property of their respective owners. Specifications are subject to change without notice. Memory sizes denote raw storage capacity; actual usable capacity may be less. Greenliant makes no warranty for the use of its products other than those expressly contained in the Greenliant Terms and Conditions of Sale.

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