CV of Dr. S. M. Rezaul Hasan

CONTACT PARTICULARS

Room 106.20B, Building 106 Electronics, Information & Communication Systems School of Engineering and Advanced Technology Massey University Albany, Auckland 1311 NEW ZEALAND email: [email protected] Tel: 09-414-0800 extension 41283

AREAS OF EXPERTISE & PROFESSIONAL INTEREST

MICROELECTRONICS, NANOELECTRONICS, CMOS ANALOG, DIGITAL & MIXED SIGNAL INTEGRATED CIRCUIT DESIGN, CMOS DATA-CONVERTER IINTEGRATED CIRCUIT DESIGN, CMOS RADIO FREQUENCY INTEGRATED CIRCUIT DESIGN, VLSI MICRO-CHIP DESIGN, BiCMOS & SiGeHBT-CMOS CIRCUIT DESIGN TECHNIQUES, CMOS VLSI CIRCUIT DESIGN FOR APPLICATIONS IN , ANALOG MICROSYSTEM DESIGN, MULTI-MEDIA & COMMUNICATION SYSTEMS, CMOS VLSI MICRO-PROCESSOR & VLSI MICRO- CONTROLLER DESIGN, PHYSICS OF SEMI-CONDUCTOR DEVICES, SILICON BASED MICRO-ELECTRO-MECHANICAL SYSTEMS (MEMS) DESIGN, BIO-MEDICAL MICRO & NANO DEVICES, CMOS MICROFLUIDICS, MICROBIOELECTRONICS, NANOBIOTECHNOLOGY.

EDUCATION

7/81 - 10/85 UNIVERSITY OF CALIFORNIA LOS ANGELES (UCLA), CALIFORNIA, USA. DEPARTMENT OF ELECTRICAL ENGINEERING IN ELECTRONICS ENGINEERING (CGPA 3.6/4.0) Ph.D. Dissertation: Distributed VLSI Image Processors and Master Quad-Slice Transformers.

1 Course work includes: analog integrated circuit design, digital integrated circuit design, digital signal processing, digital filter design, micro-wave integrated circuit design, physics of semi-conductor devices, semi-conductor device processing, solid state electronics, computer aided circuit design, advanced circuit theory, network synthesis, VLSI design.

9/79 - 3/81 STATE UNIVERSITY OF NEW YORK AT BUFFALO, NEW YORK, USA. DEPARTMENT OF ELECTRICAL & COMPUTER ENGINEERING MASTER OF SCIENCE IN ELECTRICAL ENGINEERING (CGPA 3.8/4.0) Course work includes: systems analysis, digital signal processing, computer interface design, computer engineering, digital circuits laboratory, systems, digital control systems , random signals & noise, micro-electronics devices.

1/75 - 3/79 BANGLADESH UNIVERSITY OF ENGINEERING & TECHNOLOGY, DHAKA, BANGLADESH. DEPARTMENT OF ELECTRICAL ENGINEERING BACHELOR OF SCIENCE IN ELECTRICAL ENGINEERING Stood first in first class in graduating class.

WORK EXPERIENCE (Academic Teaching & Research)

7/2004- present MASSEY UNIVERSITY, AUCKLAND, NEW ZEALAND SENIOR LECTURER IN ELECTRONICS ENGINEERING: Teaching & Research in Analog Electronics, Digital Electronics, Analog Circuit Design, VLSI Microchip Design, RF IC Design. Developing IC Design/VLSI Design program & Laboratory.

1/2006- present MASSEY UNIVERSITY, AUCKLAND, NEW ZEALAND DIRECTOR, CENTER FOR RESEARCH in ANALOG & VLSI MICROSYSTEM DESIGN (CRAVE): Development of Research Center of Excellence in Integrated Circuit Design/VLSI Design.

9/2000- 6/2004 UNIVERSITY OF SHARJAH, UNIVERSITY CITY, SHARJAH, U.A.E. DEPARTMENT OF ELECTRICAL/ELECTRONICS & COMPUTER ENGINEERING ASSOCIATE PROFESSOR OF MICROELECTRONICS ENGINEERING: Teaching & Research in Analog Electronics, Digital Integrated Circuit Design, VLSI Design & computer engineering. Developing IC Design/VLSI Design program & Laboratory, Undergraduate & graduate curriculum development. Courses taught: Analog electronics, analog CMOS IC design, digital CMOS IC design, VLSI design, digital logic design, communication electronics.

2 3/92 – 8/2000 UNIVERSITI SAINS MALAYSIA, MALAYSIA. SCHOOL OF ELECTRICAL & ELECTRONICS ENGINEERING ASSOCIATE PROFESSOR OF MICROELECTRONICS ENGINEERING & CO-CORDINATOR ANALOG & VLSI RESEARCH LABORATORY: Set-up and developed the Analog & VLSI Research Laboratory. Lead the research activity in the Analog & VLSI Research Laboratory. Courses taught: analog CMOS IC design, RF CMOS integrated circuit design, digital CMOS IC design, CMOS VLSI design, digital system design, computer architecture, physics of semiconductor devices, CMOS & BiCMOS process technology.

2/90 – 2/92 CURTIN UNIVERSITY OF TECHNOLOGY, BENTLEY, WESTERN AUSTRALIA. SCHOOL OF ELECTRICAL & ELECTRONIC ENGINEERING LECTURER IN COMPUTER & ELECTRONICS ENGG.

3/86 – 12/88 NANYANG TECHNOLOGICAL UNIVERSITY, SINGAPORE SCHOOL OF ELECTRICAL & ELECTRONIC ENGINEERING LECTURER, DEPARTMENT OF ELECTRONIC ENGINEERING

9/85 – 2/86 UNIVERSITY OF CALIFORNIA LOS ANGELES (UCLA), USA ELECTRICAL ENGINEERING DEPARTMENT VISITING LECTURER IN ELECTRICAL ENGINEERING: Supervision of high frequency hybrid circuits laboratory.

9/79 – 5/80 STATE UNIVERSITY OF NEW YORK AT BUFFALO, NEW YORK, USA DEPARTMENT OF ELECTRICAL AND COMPUTER ENGINEERING TEACHING ASSISTANT

WORK EXPERIENCE (Industrial)

2001 –2002 VALENCE SEMICONDUCTOR INC., IRVINE, CALIFORNIA, USA DUBAI DESIGN CENTER, DUBAI INTERNET CITY, DUBAI, UAE

CONSULTANT ANALOG MICROCHIP DESIGN GROUP:

Sigma-delta A-to-D & D-to-A design, mixed signal IC design, substrate noise analysis, high performance offset cancelled comparator design.

1995 MALAYSIA CENTER FOR ROBOTICS & INDUSTRIAL MICROCONTROLLER DESIGN CONSULTANT Project: Design of VLSI micro-controllers for robotics & industrial automation.

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1993 – 1994 ADVANCED MICRO DEVICES, PENANG, MALAYSIA

CONSULTANT Project: running an inhouse industrial electronics course.

1987-1988 APPLIED RESEARCH CORPORATION, SINGAPORE CONSULTANT Duties: Lecturing on analog & digital VLSI design to staff from various singapore electronics companies.

6/83 - 2/86 XEROX CORPORATION ELECTRONICS DIVISION, CALIFORNIA, USA SENIOR MEMBER, VLSI DESIGN ENGINEERING STAFF Duties include: VLSI micro-processor architecture design, CMOS digital logic & circuit design, functional simulation, layout & logic verification, development of high speed VLSI architecture for digital document & image processing. Project completed : Design, fabrication & testing of a CMOS VLSI micro-processor for xerox's star workstation.

WORK EXPERIENCE ( Academic Administrative)

1993 Academic Panel Advisor, Institute telecommunicasi dan technology Maklumat, Malaysia

2000 - 2004 Member, college research committee, college of engineering, University of Sharjah, Sharjah, UAE.

2006 – 2008 Member, Technology & Engineering Program Committee, Massey University, New Zealand. 2004 –present Paper coordinator for 143.457: Advanced Micro Technoogies 2006 – present Paper coordinator for 124.251: Analogue Electronics 2007-present Paper coordinator for 140.271: Analogue Electronic Devices & Circuits 2009- present Paper coordinator for 124.252: Digital Electronics

RESEARCH GRANTS, FUNDINGS & CORPORATE CONTRIBUTIONS OBTAINED

1993 US$ 5,000 UNIVERSIT SAINS MALAYSIA SHORT-TERM RESEARCH GRANT PROJECT: IMPLEMENTATION OF VLSI SIGNAL PROCESSING ON SINGLE CHIP SILICON

1996 US$ 62,000 MINISTRY OF SCIENCE, MALAYSIA, IRPA GRANTS PROJECT: NOVEL LOW POWER BICMOS VLSI CIRCUIT TECHNIQUES

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1997 US$ 80,000 HELPED IN SECURING FUNDING FOR WORKSTATIONS FOR IC/VLSI RESEARCH FROM INTEL PENANG, MALAYSIA

1998 US$ 2,600,000 HELPED IN SECURING FUNDING FOR LAB. EQUIPMENT & SOFTWARE DONATION FROM HP, PENANG, MALAYSIA

1999 US$ 26,000 RECIPIENT OF 1999 INTEL RESEARCH GRANT FOR THE DEVELOPMENT OF DATA ENCRYPTION VLSI MICROCHIP

2000 US$ 50,000 MINISTRY OF SCIENCE, MALAYSIA, IRPA GRANTS PROJECT: DEVELOPMENT, DESIGN & FABRICATION OF SIGMA- DELTA A-TO-D CONVERTERS

2001 AED 30,000 RECEIVED SEED RESEARCH GRANT FROM UNIVERSITY OF SHARJAH FOR THE PROJECT: HIGH-PERFORMANCE CMOS INTEGRATED CIRCUIT AMPLIFIER DESIGN FOR OPTICAL TRANSCEIVERS IN OPTICAL NETWORKING APPLICATIONS

2005 NZ$2000 MASSEY UNIVERSITY RESEARCH FUND PROJECT: AMPLIFIER AND FILTER DESIGN FOR NANOMETRIC CMOS RADIO INTEGRATED CIRCUITS

NZ$7000 PVC OFFICE MASSEY UNIVERSITY, ALBANY, AUCKLAND PROJECT: STARTUP BUDGET FOR CENTER FOR RESEARCH IN ANALOG & VLSI MICROSYSTEM DESIGN (CRAVE)

NZ$14,000 IIMS RESEARCH FUND PROJECT: SOFTWARE PROCUREMENT FOR IC/VLSI DESIGN

2006 FABRICATION SUPPORT MOSIS, UNIVERSITY OF SOUTHERN CALIFORNIA, USA AS FUNDING FOR CHIP FABRICATION COST FOR A 0.18UM 1.5SQ. MM. CMOS MICRO-CHIP USING THE TSMC CMOS FOUNDRY

2007 FABRICATION SUPPORT MOSIS, UNIVERSITY OF SOUTHERN CALIFORNIA, USA AS FUNDING FOR CHIP FABRICATION COST FOR A 130 NANOMETER 5SQ. MM. CMOS MICRO-CHIP USING THE IBM CMOS FOUNDRY

2006 NZ$115,000 MASSEY UNIVERSITY CAPITAL EQUIPMENT FUND

5 PROJECT: TEST EQUIPMENT FOR FABRICATED ANALOG & RF MICROCHIPS

NZ$6,000 MASEY UNIVERSITY RESEARCH FUND ULTRAWIDEBAND TRANSCEIVER MICROCHIP DESIGN IN 0.13µm CMOS

2007 NZ$ 8000 ITE MINOR CAPITAL FUND PROJECT: S-PARAMETER MEASUREMENT MODULE

2009 NZ$110,000 MASSEY UNIVERSITY CAPITAL EQUIPMENT FUND PROJECT: MICROPROBING FABRICATED ANALOG, RF AND BIO MICROCHIPS

2009 FABRICATION SUPPORT MOSIS, UNIVERSITY OF SOUTHERN CALIFORNIA, USA AS FUNDING FOR CHIP FABRICATION COST FOR A 130 NANOMETER 4.6SQ. MM. CMOS MICRO-CHIP USING THE IBM CMOS FOUNDRY

2009 FABRICATION SUPPORT MOSIS, UNIVERSITY OF SOUTHERN CALIFORNIA, USA AS FUNDING FOR CHIP FABRICATION COST FOR A 65 NANOMETER 9 SQ. MM. CMOS MICRO-CHIP USING THE IBM CMOS FOUNDRY

MEMBERSHIP OF PROFESSIONAL ORGANIZATIONS:

SENIOR MEMBER (SM) OF IEEE (Institute of Electrical & Electronic Engineers,USA)

Member IEEE Solid State Circuits Society & IEEE Circuits & Systems Society

AWARDS:

Recipient of the National Bank of Sharjah Award in 2002, for the paper entitled, “600 MHz BiCMOS digitally controlled oscillator for clock recovery & frequency synthesis PLLs ," International Journal of Electronics, Taylor & Francis, U.K., vol. 88, no. 5, pp. 529-541, May 2001.

NEWSPAPER CITATION:

Thursday July 3 2003 ISSUE of GULF NEWS, p.2 The nation: Varsity researcher designs 2 GHz silicon chip

6 LIST OF PUBLICATION WORK Journal Articles:

24. S. M. Rezaul Hasan, “Analysis and design of a multi-stage CMOS band-pass low-noise pre-amplifier for ultra-wide-band RF receiver,“ IEEE Transactions on Very Large Scale Integration Systems, Accepted as Regular Paper, 2009, to appear.

23. S. M. Rezaul Hasan and Siti Noorjannah Ibrahim, “Design of an Enhanced Electric Field Sensor Circuit in 0.18µm CMOS for a Lab-on-a-chip Bio-cell Detection Micro-array, “ Journal of Sensors and Transducers, IFSA, ISSN 1726- 5479, vol. 90, pp. 39-47, Apr. 2008.

22. S. M. Rezaul Hasan and Siti Noorjannah Ibrahim, “An Improved CMOS Sensor Circuit using Parasitic Bipolar Junction Transistors for Monitoring the Freshness of Perishables, “ Journal of Sensors and Transducers, IFSA, ISSN 1726-5479, vol. 90, pp. 276-280, Apr. 2008.

21. S. M. Rezaul Hasan, “A Novel Mixed-Signal Integrated Circuit Model for DNA-Protein Regulatory Genetic Circuits and Genetic State Machines, ” IEEE Transactions on Circuits and Systems-I: Regular Papers, vol. 55, no. 6, pp. 1185- 1196, Jun. 2008.

20. S. M. Rezaul Hasan, “An offset compensated sampled-data CMOS comparator circuit for low-power implantable biosensor applications,” Journal of Circuits, Systems and Signal Processing, Springer-Verlag, vol. 27, pp. 351-366, Jun. 2008.

19. S. M. Rezaul Hasan, “Stability Analysis and Novel Compensation of a CMOS Current-feedback Potentiostat Circuit for Electro-chemical Sensors,” IEEE Sensors Journal, vol. 7, no. 5, pp. 814-824, May 2007.

18. S. M. Rezaul Hasan, “A CMOS DCO design using delay programmable differential latches and a novel digital control scheme,” Electrical Engineering, Springer-Verlag, Germany, ISSN:0948-7921(paper) 1432-0487(online), vol. 89, no. 7, pp. 569-576, July 2007.

17. S. M. Rezaul Hasan and Nazmul Ula, “A Novel Feed-forward Compensation Technique for Single-Stage Fully-Differential CMOS Folded Cascode Rail-to-Rail Amplifier,” Electrical Engineering, Springer-Verlag, Germany, ISSN:0948-7921(paper) 1432-0487(online), vol. 88, no. 6, pp. 509- 517, Aug. 2006.

16. S. M. Rezaul Hasan, “Design of a Low-power 3.5GHz Broad-Band CMOS Transimpedance Amplifier for Optical Transceivers,” IEEE Transactions on Circuits and Systems I: Regular Papers, vol 52, no. 6, pp. 1061-1072 , 2005

15. Shahin J. Ashtiani, Omid Shoaei, S. M. Rezaul Hasan, A. M. Jannesari, “On the Parasitic-Sensitivity of Switched-Capacitor Summing-Integrator structures for Σ-∆ Modulators,” IEEE Transactions on Circuits and Systems II: Analog and Digital signal processing, vol. 50, no. 9, pp. 634-640, Sept. 2003

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14. S. M. Rezaul Hasan and Omid Shoaei, “A Fast Macro-Model for Substrate Coupling & Ground Bounce Induced Substrate Noise Simulation in Mixed Signal VLSI,” Journal of Analog Integrated Circuits & Signal Processing-An International Journal, Kluwer academic publishers(Springer), U.S.A., Vol. 37, no. 3, PP. 149-163, Dec. 2003.

13. S. M. Rezaul Hasan and Yufridin Wahab, "Performance enhancement of low-voltage dynamic BiCMOS logic gates by transistor reordering," VLSI Design, An international journal of custom-chip design, simulation and testing, Taylor & Francis, U.K., vol. 15, no. 2, pp. 547-553, 2002.

12. S. M. Rezaul Hasan, Lim Chu Aun & Azman Yusof, " 600 MHz BiCMOS digitally controlled oscillator for clock recovery & frequency synthesis PLLs ," International Journal of Electronics, Taylor & Francis, U.K., vol. 88, no. 5, pp. 529-541, May 2001.

11. Ho Yoon San and S. M. Rezaul Hasan, "An Architectural Comparison and CMOS Implementation of Sixth-Order Cascaded Σ∆ Modulator," Journal of Analog Integrated Circuits & Signal Processing-An International Journal, Kluwer Academic Publishers(Springer), U.S.A., Vol. 26, no. 3, pp. 257-271, March 2001.

10. Jayabalan Kundan and S. M. Rezaul Hasan " Enhanced folded source- coupled logic technique for low-voltage mixed-signal integrated circuits," IEEE Transactions on Circuits & Systems -II: Analog & Digital Signal Processing, Vol. 47, no. 8, pp. 810-817, August 2000.

9. S. M. Rezaul Hasan and Yufridin Wahab, "Performance enhancement of low-voltage dynamic BiCMOS logic gates by charge redistribution based transistor reordering," Jurnal Teknikal Pusat Pengajian Electrik dan Elektronik, Vol 4, no. 1 , pp. 1-8, 1998 .

8. S. M. Rezaul Hasan and Ho Yoon San "A behavioral simulator for switched- capacitor sigma-delta modulator analog-to-digital converter," ASEAN Journal on Science & Technology for Development, vol. 15, no. 2, pp. 59 - 71 , 1998

7. S. M. Rezaul Hasan and Chakaravarty Rajagopal " Low Voltage dynamic BiCMOS CLA circuit with carry skip using Novel full-swing logic, " IEEE Journal of Solid State Circuits, vol. 32, no.1, pp. 70 - 78, 1997

6. S.M. Rezaul Hasan and Ng Kang Siong, " A Parallel Processing VLSI BAM Engine," IEEE Transactions on Neural Networks, vol. 8, no. 2, pp. 424- 436,1997.

5. S. M. Rezaul Hasan and Chakaravarty Rajagopal " Improved Low Voltage BiCMOS Dynamic Logic Gates using Output Feedthrough," ASEAN Journal on Science & Technology for Development , vol. 13, no. 2, pp. 87 - 92, 1996

4. S. M. Rezaul Hasan, S.Z. Basri and R. M. Ali, "A VLSI processing element for massively parallel pyramid machine," AMSE Journal On Advances In Modelling & Analysis, A, Vol. 31, No 1, pp. 61- 64, France, 1995.

8 3. S. M. Rezaul Hasan and Ng Kang Siong, "A VLSI hardware design for bi- directional associative memory neural network," AMSE Journal On Modelling, Measurement & Control, A, Vol. 58, No 1, pp. 11-18, France, 1994.

2. S. M. Rezaul Hasan and C.M. Hadzer, " A new Distributed Arithmetic VLSI Architecture for Discrete Fourier Transform Processor," ASEAN Journal of Science & Technology for Development, Vol. 10, No. 2 , pp. 105-114 , 1993 .

1. S. M. Rezaul Hasan, " A Novel ASIC Architecture for Image Scaling," Jurnal Teknikal Pusat Pengajian Electrik dan Elektronik, Vol 2, no. 1 , pp. 83- 90 , 1992.

Journal Articles (under review /revision):

5. S. M. Rezaul Hasan, W. L. Xu, “A central pattern generator circuit for rhythmic robotic chewing locomotion in low-voltage analog CMOS technology,” Artificial Life and Robotics: An International Journal, Springer-Japan.

4. S. M. Rezaul Hasan, “On the Fundamental Limit of f-trans and a New CMOS Negative Resistance Cell,” International Journal of Electronics.

3. S. M. Rezaul Hasan, “A CMOS Model for Bio-Cellular Oxidation-Reduction and Mitochondrial Electron-Transfer Reactions,“ IEEE Transactions on Nanobioscience.

2. S. M. Rezaul Hasan, “A Novel Low-Voltage CMOS Variable Gain Amplifier with Gain-Independent Input Impedance Matching for DTV Tuning Applications,” Journal of Circuits, Systems and Computers.

1. S. M. Rezaul Hasan, “A 10GHz CMOS Inductive Buffered Current Feed-back Transimpedance Amplifier for Optical Sensing, “ Electrical Engineering, Springer – Verlag.

Chapter in Book Series:

1. S. M. Rezaul Hasan and Johan Potgieter, “A centre-of-mass tracker integrated circuit design in nanometric CMOS for Robotic Visual Object Position Tracking,” Studies in Computational Intelligence (SCI), Springer-Verlag, vol. 76, pp. 69-79, 2007.

Book Review:

1. Ali Yeon Md. Shakaff and S. M. Rezaul Hasan, "Microprogrammed Systems Design- A Book review," International Journal of Electrical Engineering Education, Manchester, U.K., 1993.

9 Conference Proceedings:

79. S. M. Rezaul Hasan, ”A Micro-sequenced CMOS Model for Cell Signaling Pathway using G-Protein and Phosphorylation Cascade,” Proceedings 15th International conference on Mechatronics and machine vision in practice(M2VIP), Auckland, pp.57-62, 2008.

78. S. M. Rezaul Hasan, ”A Novel CMOS low-voltage regulated cascode trans- impedance amplifier operating at 0.8V supply voltage,” Proceedings 15th International conference on Mechatronics and machine vision in practice(M2VIP), Auckland, pp.51-56, 2008.

77. Robert Fisk and S. M. Rezaul Hasan, ”Incremental delta-sigma modulators for temperature sensing applications,” Proceedings 15th International conference on Mechatronics and machine vision in practice(M2VIP), Auckland, pp.63-67, 2008.

76. S. M. Rezaul Hasan, “An inductive buffered trans-impedance amplifier stage for optical transceivers in 130nm CMOS,” Proceedings 2008 IEEE 20th International Conference of Microelectronics (ICM 2008), Sharjah, UAE, pp. 219- 222, Dec. 2008.

75. Muhammad Khurram and Rezaul Hasan, “Design of a sub-gigahertz complementary cascode LNA with active input matching,” Proceedings 15th Electronics New Zealand Conference, Nov. 24-25, Auckland, New Zealand, pp. 39-44, 2008.

74. Muhammad Khurram and Rezaul Hasan, “Design of a full-band gm-boosted current reused UWB LNA,” Proceedings 15th Electronics New Zealand Conference, Nov. 24-25, Auckland, New Zealand, pp. 25-28, 2008.

73. Rezaul Hasan and Muhammad Khurram, “A new CMOS negative resistance oscillator buffer-cell with a fundamental f-trans limit,” Proceedings 15th Electronics New Zealand Conference, Nov. 24-25, Auckland, New Zealand, pp. 29-32, 2008.

72. S. M. Rezaul Hasan and Nazmul Ula, “Analog CMOS Charge Model for Molecular Redox Electron-Transfer Reactions and Bio-Chemical Pathways,” Proceedings 2008 IEEE International Conference on Circuits and Systems (ISCAS 2008), pp. 2038-2041, Seattle, Washington.

71. S. M. Rezaul Hasan, W. L. Xu and Nazmul Ula, “Low-voltage analog current-mode central pattern generator circuit for robotic chewing locomotion using 130nm CMOS technology,” Proceedings 2007 IEEE 19th International Conference of Microelectronics (ICM 2007), Cairo, Egypt, pp. 167-171, Dec. 2007.

70. S. M. Rezaul Hasan and Siti Noorjannah Ibrahim, “An enhanced CMOS electric field sensor circuit for cells sensing lab-on-a-chip application,” Proceedings International conference on sensing technology(ICST), Palmerston North , pp. 255-259, Nov. 2007.

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69. S. M. Rezaul Hasan and Siti Noorjannah Ibrahim, “An improved MOS sensor circuit for emulating the quantum of freshness in perishables using parasitic bipolar devices,” Proceedings International conference on sensing technology(ICST), Palmerston North , pp. 260-264, Nov. 2007.

68. S. M. Rezaul Hasan and Jie Li, “A bias-controlled noise-cancelling CMOS tuned low noise amplifier for UWB transceivers,” Proceedings IEEE ICECS, Morocco , pp. 1205-1208, Dec. 2007.

67. S. M. Rezaul Hasan, “A CMOS RF variable gain amplifier with gain- independent input impedance matching,” Proceedings 14th Electronics New Zealand Conference, Nov. 12-13, Wellington, New Zealand, pp. 53-58, 2007.

66. S. M. Rezaul Hasan and W. L. Xu, “Low-voltage analog CMOS central pattern generator circuit for rhythmic robotic chewing locomotion,” Proceedings 14th Electronics New Zealand Conference, Nov. 12-13, Wellington, New Zealand, pp. 297-301, 2007.

65. S. M. Rezaul Hasan, “A PMOS-diode differential body-driven offset compensated 0.5V sampled-data comparator for biosensor applications,” Proceedings 20th IEEE International conference on VLSI Design (VLSID’07), Bangalore, INDIA, pp. 913-918, Jan. 2007

64. S. M. Rezaul Hasan and Johan Potgieter, “A novel CMOS sampled-data center of mass tracker circuit for robotic visual feedback object tracking,” Proceedings the 3rd International conference on Autonomous Robots and agents, Dec. 12-14, Palmerston North, New Zealand, pp. 213-218, 2006.

63. Robert Fisk and S. M. Rezaul Hasan, “Analysis of Internally-Generated Noise in Bandgap References,” Proceedings 13th Electronics New Zealand Conference, Nov. 13-14, Christchurch, New Zealand, pp. 18-23, 2006.

62. S. M. Rezaul Hasan, “ A Novel Body-driven Deep nanometric CMOS Operational Transconductance Buffer for Implantable Bio-electronics,” Proceedings 13th Electronics New Zealand Conference, Nov. 13-14, Christchurch, New Zealand, pp. 163-166, 2006.

61. S. M. Rezaul Hasan, “A Novel Offset compensated CMOS Sub-1V Sampled-data Comparator for Biosensor Applications,” Proceedings 13th Electronics New Zealand Conference, Nov. 13-14, Christchurch, New Zealand, pp. 75-80, 2006.

60. S. M. Rezaul Hasan, “A Novel 16-bit CMOS Digitally Controlled Oscillator,“ Proceeedings IEEE ASIA-PACIFIC conference on Circuits & Systems, Dec. 5-7, Singapore, pp. 527-530, 2006.

59. S. M. Rezaul Hasan and Nazmul Ula, “A Novel Current Feed-back Sub- Nano-Siemen Transconductance Circuit Suitable for Large Time-Constant Bio-

11 medical Applications,“ Proceeedings IEEE ASIA-PACIFIC conference on Circuits & Systems, Dec. 5-7, Singapore, pp. 687-690, 2006.

58. S. M. Rezaul Hasan, “Stability and compensation technique for a CMOS amperometric potentiostat circuit for redox sensors,” Proceedings IEEE ASIA- PACIFIC Conference on Circuits & Systems, Dec. 5-7, Singapore, pp. 878-881, 2006.

57. S. M. Rezaul Hasan and Nazmul Ula, “A Novel Current-feedback Nano- Siemen Transconductance Circuit Suitable for Large Time-constant Applications, “ Proceedings IEEE Midwest conference on Circuits & Systems, Puerto Rico, pp. 557-560, 2006.

56. S. M. Rezaul Hasan and Nazmul Ula, “An Inductive-bounce Enhanced Output-pad for CMOS UltraWideBand RF Applications, “ Proceedings IEEE Midwest conference on Circuits & Systems, Puerto Rico, pp. 358-361, 2006.

55. S. M. Rezaul Hasan and Nazmul Ula, “A 16-bit CMOS digitally controlled oscillator using a novel control scheme, “ Proceedings IEEE Midwest conference on Circuits & Systems, Puerto Rico, pp. 680-684, 2006.

54. S. M. Rezaul Hasan, “A CMOS Low Noise Pre-Amplifier for Ultra-Wide- Band RF Receiver,” Proceedings IFIP VLSI System-on-Chip 2005 Conference, Perth, Australia, pp. 545-549, 2005.

53. S. M. Rezaul Hasan, “A Novel Wide-Swing Wide-Bandwidth Scalable Low-Voltage Analog CMOS Multiplier for Communication Signal Processing,” Proceedings 12th Electronics New Zealand Conference, Nov 14-15, Manukau, New Zealand, pp. 31-34, 2005.

52. S. M. Rezaul Hasan, “A novel integrated circuit model for mRNA transcription in bio-cellular processes,” Proceedings 12th Electronics New Zealand Conference, Nov 14-15, Manukau, New Zealand, pp.7-12, 2005.

51. S. M. Rezaul Hasan, “A fifth order LC butterworth tuned CMOS low noise pre-amplifier for ultrawideband RF receiver,” Proceedings 12th Electronics New Zealand Conference, Nov 14-15, Manukau, New Zealand, pp.25-29, 2005.

50. A. Luxton and S. M. Rezaul Hasan, “A low power high gain CMOS folded cascade amplifier,” Proceedings 12th Electronics New Zealand Conference, Nov 14-15, Manukau, New Zealand, pp. 47-50, 2005.

49. S. M. Rezaul Hasan, “A novel CMOS integrated circuit model for cellular DNA-protein regulatory mRNA transcription process,” Proceedings 12th International conference on biomedical engineering, Dec 7-10, Singapore, IFMBE CD proceedings, ISBN: 981054572x, 2005.

48. S. M. Rezaul Hasan and Nazmul Ula, “A Capacitor-free Feed-forward Compensated Single-stage Merged Topology Fully-differential CMOS Folded Cascode Amplifier ,” Proceedings 3rd IEEE North East Workshop on Circuits and Systems, Quebec City, Canada, pp.179-182, 2005.

12 47. S. M. Rezaul Hasan, “A High Efficiency 3GHz 24-dBm CMOS Linear Power Amplifier for RF Application,” Proceedings 5th IEEE workshop on Systems-on- chip for Real-time applications, July 19-21, Alberta, Canada, IEEE Computer Society Press, pp. 503-507, 2005.

46. S. M. Rezaul Hasan, “A transmission-gate CMOS folded LC quadrature VCO for low-power RF transceivers”, Proceedings 11th Electronics New Zealand Conference, Nov 15-16, Palmerston North, New Zealand, pp.171-175, 2004.

45. A. M. Jannesari, S. M. Rezaul Hasan, and Mehrdad Sharif-Bakhtiar, “Design of wide-band opamp with improved DC-gain for high-Q high frequency switched-capacitor filters”, Proceedings 11th Electronics New Zealand Conference, Nov 15-16, Palmerston North, New Zealand, pp.77-81, 2004. : 44. S. M. Rezaul Hasan and Nazmul Ula, “A 4GHz Low-Power Folded- Cascode CMOS LC Quadrature VCO for RF Transceivers”, Proceedings The 2004 International Conference on VLSI (VLSI'04), June 21-24, Las Vegas, Nevada, pp.339-342, 2004.

43. S. M. Rezaul Hasan, “A scalable low-voltage extended swing CMOS LC quadrature VCO for RF Transceivers”, Proceedings 4th IEEE workshop on Systems-on-chip for Real-time applications, July 19-21, Alberta, Canada, IEEE Computer Society Press, pp.131-135, 2004.

42. Nazmul Ula and S. M. Rezaul Hasan, "Simulation and Optimization of a Wide-Bandwidth Transimpedance Amplifier", Proceedings of the Twelfth IASTED International Conference on Applied Simulation and Modelling , Marbella, Spain, September 3-5, pp 136 - 140, 2003.

41. S. M. Rezaul Hasan and Maamar Bettayeb, “An Order RecursivePipelined Real-Time VLSI HOS Engine for System-On-Chip Implementation,” Proceedings, IEEE TENCON, vol. 4, pp. 1257-1261, Bangalore, India, Oct. 2003.

40. S. M. Rezaul Hasan, “A 5GHz CMOS Voltage-Current Feedback Wide- band Transimpedance Amplifier for Optical Transceivers,” IEEE ICECS, pp. 567-570 , Sharjah, Dec. 2003.

39. S. M. Rezaul Hasan, “A 5GHz CMOS digitally controlled oscillator with a 3GHz tuning range for PLL applications,” IEEE ICECS 2003, pp. 208-211, Sharjah, Dec. 2003

38. S. M. Rezaul Hasan, “A 5GHz CMOS broad-band transimpedance amplifier for optical transceivers,” Proceedings, IEEE GCC Industrial Electrical & Electronic Engineering Conference, Bahrain, May 13-14, 2003.

37. S. M. Rezaul Hasan, “A high performance wide-band CMOS transimpedance amplifier for optical transceivers,” Proceedings 3rd IEEE workshop on Systems-on-chip for Real-time applications, Calgary, Canada, IEEE Computer Society Press, pp. 82-85, 2003

13 36. S. M. Rezaul Hasan, " An Inductively Peaked 3.5GHz Broad-band CMOS Trans-impedance Amplifier for Optical Transceivers," CD Proceedings GSPx International Signal Processing Conference, Dallas, Texas, USA, March 31 - April 3, paper no: 431, 2003.

35. S. M. Rezaul Hasan & Yufridin Wahab, " Reduction of power dissipation in dynamic BiCMOS logic gates by transistor reordering," Proceedings International Symposium on Integrated Circuits, Devices & Systems, pp. 117- 121, September, 2001.

34. S. M. R. Hasan & N. A. Quadir, “A 2.5 GHz Current-Feedback Transimpedance Amplifier for Optical Transceivers”, IEEE Region 10 Conference, Singapore, August 2001

33. S. M. R. Hasan, “Effect of globalization on electrical & computer engineering education”, Forum: The changing role of engineering education in the information age – innovation and tradition, sharjah, Society of Engineers , pp. 50, UAE, April 2001

32. S. M. R. Hasan & S. Kumar, “Design of a high speed and high- performance CMOS serial bus data transceiver,” SPIE Proceedings, Design, Modeling, & Simulation in Microelectronics, pp. 352-357, Volume 4228, 2000

31. S. M. R. Hasan & N. A. Quadir, “High performance transimpedance amplifier for OC-48 Optical transceiver application,” SPIE Proceedings, Design, Modeling, & Simulation in Microelectronics, pp. 342-351, Volume 4228, 2000

30. Ho Yoon Sun & S. M. Rezaul Hasan " A sixth-order 2-1-1-2 cascaded CMOS sigma-delta modulator," Proc. 8 th International Conference on IC Design, Technology & Manufacture (ISIC '99), pp. 286-289, Singapore , 1999.

29. Lim Chu Aun & S. M. Rezaul Hasan " A BiCMOS implementation of an all digital phase lock loop for VLSI communication applications," Proc. 8 th International Conference on IC Design, Technology & Manufacture (ISIC '99), pp. 290-292, Singapore , 1999.

28. Lim Chu Aun & S. M. Rezaul Hasan, "An all Digital BiCMOS Phase Lock Loop for VLSI Processors, " GLSVLSI-99, IEEE Computer Society, USA, pp. 318-320, 1999 .

27. S. M. Rezaul Hasan & Yufridin Wahab, "Performance enhancement of low-voltage dynamic BiCMOS logic gates by charge redistribution based transistor reordering," Proc. International conference on computing & information technology (ICCIT), Dhaka, Dec. 1998.

26. Ho Yoon San, S. M. Rezaul Hasan & Nazmul Ula, "CMOS Implementation of a Sixth-Order Cascaded Sigma-Delta Modulator Architecture," Proc. 42 nd IEEE Midwest symposium on Circuits & Systems, USA, 1999.

25. Azman Yusof, Lim Chu Aun & S. M. Rezaul Hasan, "600 MHz digitally controlled BiCMOS oscillator (DCO) for VLSI signal processing &

14 communication applications," GLSVLSI-98, IEEE Computer Society, USA, pp. 71-76, 1998.

24. Ho Yoon San; Rezaul Hasan, S.M., “A sixth-order CMOS sigma-delta modulator“, ASIC Conference 1998. Proceedings. Eleventh Annual IEEE International, pp. 63 –66, 13-16 Sep 1998.

23. Ho Yoon Sun & S. M. Rezaul Hasan " A simulation tool for switched- capacitor sigma-delta converter," Proc. 7 th International Conference on IC Design, Technology & Manufacture (ISIC '97), pp. 216-219, Singapore , 1997.

22. Ho Yoon Sun & S. M. Rezaul Hasan " A behavioral simulator for switched-capacitor sigma-delta modulator analog-to-digital converter," Proc. IASTED International Conference on Modelling, Simulation and Optimization , pp. 311-314, Singapore , 1997.

21. K. Jayabalan & S. M. Rezaul Hasan "Current mode BiCMOS Folded source-coupled logic circuits, " IEEE International Conference on Circuits & Systems (ISCAS), pp. 1880-1883, Hong Kong , 1997.

20. K. Jayabalan & S. M. Rezaul Hasan "Improved current-mode BiCMOS logic circuit technique," Proc. ROVPIA'96 Conference, pp. 586-592, Ipoh, Malaysia 1996.

19. S. M. Rezaul Hasan & Chen Seong Chin "A new VLSI architecture for multi layer perceptron(MLP) network," Proc. IEEE TENCON Conference, pp. 352-354, Perth, Australia , 1996.

18. S. M. Rezaul Hasan & Ho Yoon Sun, "Low power, high performance switched-capacitor second order sigma-delta modulator suitable for battery operated signal processing applications," Proc. IEEE TENCON Conference, pp. 728-730, Perth, Australia , 1996.

17. S.M. Rezaul Hasan & Ho Yoon Sun " Low power, high performance switched-capacitor second order sigma-delta modulator suitable for battery operated signal processing applications," Proc. GlobalTRONICS Electronics Design Conference, Suntec city, Singapore, 1996 .

16. S. M. Rezaul Hasan, Chakaravarty Rajagopal and Nazmul Ula " Improved Low Voltage Dynamic BiCMOS Logic Gates using Output Feedthrough," Proceedings 1996 IEEE 39 th Midwest Symposium on Circuits & Systems, pp. 94-97, Ames, Iowa, USA .

15. C. M. Hadzer, S. M. Rezaul Hasan & Lau Kwee Sing, " Improved Singular Value Decomposition by using Neural Networks," Proc. IEEE International Conference on Neural Networks (ICNN '95), vol. 1, pp. 438 - 442, Perth, Australia, 1995.

14. S. M. Rezaul Hasan & Ng Kang Siong , "A VLSI BAM Neural Network Chip for Pattern Recognition Applications," Proc.. IEEE International Conference on Neural Networks (ICNN '95), vol. 1, pp 164 - 168, Perth, Australia, 1995.

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13. Norlaili Mohd. Noh & S. M. Rezaul Hasan, "VLSI Viterbi Decoder for deep space communications," Proceedings 2nd IEEE Malaysia International Conference on Communications, pp. 14.6.1 - 14.6.4, Langkawi, Malaysia, 1995.

12. Norlaili Mohd. Noh & S. M. Rezaul Hasan, "Single Chip VLSI implementation of a systolic array viterbi decoder," Proceedings 7th International Conference on Microelectronics(ICM'95), pp. 63-66, Kualalumpur, Malaysia, 1995.

11. S. M. Rezaul Hasan & Chakaravarty Rajagopal , "Novel 1.5V BiCMOS dynamic logic gates using output feedthrough," Proceedings 7th International Conference on Microelectronics(ICM '95), pp. 67-69, Kualalumpur, Malaysia, 1995.

10. S.M. Rezaul Hasan, " Design of a pH controller ASIC Fuzzy logic chip for industrial application," Proc. GlobalTRONICS Electronics Design Conference, WTC, Singapore, 1994 .

9. S. M. Rezaul Hasan & Norlaili bte Mhd. Noh, " Application of FPGA Device in the Design of a Systolic Array Viterbi Decoder," Proc. Fifth International Conference on Signal Processing Applications & Technology (ICSPAT ), pp. 1459-1464, Dallas, Texas, USA, 1994.

8. S. M. Rezaul Hasan & Ng Kang Siong , "A VLSI BAM Neural Network Chip for Pattern Recognition Applications," Proc. Australian Microelectronics Conference (MICRO '93), Brisbane, Australia, 1993.

7. S. M. Rezaul Hasan, " A new Distributed -pipeline VLSI Distributed Arithmetic Architecture for Discrete Fourier Transform Processor," Proc. AL- AZHAR Engineering Third International Conference, Nasr City, Cairo, Egypt, 1993.

6. S.M. Rezaul Hasan, G. N. Kumer, R. S. Fager," A Bi-level Weighted ASIC Neural Processor Slice," Proc. International Micro-electronics & Systems Conference , PWTC, Kuala Lumpur,Malaysia, 1993.

5. S. M. Rezaul Hasan & Ng Kang Siong, " VLSI BAM CHIP," Proc. International Conference on Signal Processing Applications & Technology (ICSPAT), pp. 1637-1640, Santa Clara, California, USA, 1993.

4. S. M. Rezaul Hasan , "A Novel Pipeline LSI Architecture for Image Magnification and Reduction," Proc. IEEE Asian Electronics Conference, Hong kong, 1987.

3. S. M. Rezaul Hasan, "A Novel LSI Architecture for Image Scaling," Proc. IEEE TENCON Conference, pp. 110-114, Seoul, Korea, 1987.

2. John Wu, Han Jen, S. M. Rezaul Hasan, " VLSI Processor Design using Standard-cell and Custom-cell Methodology," Proc. 2nd International Symposium on IC Design and Manufacture(ISIC-87), pp. 137-160, Singapore, 1987.

16 1. S. M. Rezaul Hasan , " A new VLSI Architecture for Image Data rate Discrete Cosine Transform Processor," Proc. IASTED International Symposium on Signal Processing and its Applications, pp. 750-755, Brisbane, Australia, 1987.

Thesis, Dissertation & Reports:

1. S.M. Rezaul Hasan , " Distributed VLSI Image Processors and Master Quad-slice Transformers" , Ph.D. Dissertation, School of Engineering & Applied Science, University of California, Los Angeles, USA, 1985.

2. S. M. Rezaul Hasan & Zulkifli Hj. Abdul Kadir Bakti, "A Pipe-line Multiplier MPR Chip", Report Mesyuarat "Asean Subcommittee on Micro-electronics and Information Technology" ke 8, 24-26 Jun, 1993, Manila, Filipina.

EXPERIENCE AS JOURNAL ARTICLE REVIEWER

IEEE Transactions on Circuits & Systems-I & II, USA IEEE Journal of Solid State Circuits INFORMATION SCIENCES, An International Journal, USA International Journal of Electronics, UK Microelectronics Journal Electronic Letters Active and passive electronic components- Hindawi Journal IEEE Transactions on VLSI systems Journal of VLSI signal processing IEEE Sensors Journal

EXPERIENCE IN INTERNATIONAL CONFERENCES

Technical Program Committee member, IEEE M2VIP conference, Massey University, Albany, Auckland 2009.

Technical Program Committee member, IEEE ICECES 2003, 10th IEEE International Conference on Electronics, Circuits and Systems, Sharjah, United Arab Emirates.

Technical Program Committee member, SPIE MICROELECTRONICS 2003, SPIE conference on Design, Modeling & Simulation for Microelectronics, 2000, Singapore.

VLSI CAD TOOLS EXPERIENCE

CADENCE TANNER TOOLS

17 MENTOR GRAPHICS SYNOPSYS H-SPICE T-SPICE SPECTRE

SUPERVISION OF GRADUATE STUDENTS

Supervised 10 M.S. & 4 Ph.D. Student

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