SVEN Technology 1.0

1 ® System Studio for * 2014

1. Windows* Host and Linux* Host Support with * Integration 2. Support for Intel® Atom™ Processor E3xxx (code-named “Baytrail SoC”) 3. Support for * IVI 4. Intel® ++ Improvements • Optimizations for latest Intel processors • improved sysroot and GNU cross-build integration support • Cross-build support for Windows* host and Wind River* Linux* target 5. Extended Intel® VTune™ Amplifier System-Wide Analysis 6. Yocto Project* Compatible 7. Intel® JTAG support for next generation processors of all sizes$ 8. Graphical installer for both Windows* host and Linux* host

$: requires NDA

Copyright© 2013, Intel Corporation. All rights reserved. 2 *Other brands and names are the property of their respective owners. Support for Latest Intel Processors & SoCs

Silvermont Ivy Bridge Haswell microarchictectur microarchitecture microarchitecture e Intel® JTAG Debugger† – ✔ -- ✔ System Debug Enhanced GDB* Debugger ✔ ✔ ✔ – Application Debug Intel® Inspector – ✔ ✔ ✔ Memory & Thread Memory & Thread Memory & Thread Memory & Thread Analysis Analysis Analysis Analysis

Intel® VTune™ Amplifier †† ✔ ✔ ✔ – Power & Performance Hardware Events Hardware Events Hardware Events

® ✔ ✔ ✔ Intel C++ Compiler SSE4.2 SSE, AVX SSE, AVX, AVX2, FMA3 ✔ ✔ ® -- Intel MKL SSE, AVX SSE, AVX, AVX2, FMA3 Intel® IPP ✔ ✔ ✔

† Hardware platform debug coverage added as new processors ship † † Hardware events for new processors added as new processors ship

Copyright© 2013, Intel Corporation. All rights reserved. 3 *Other brands and names are the property of their respective owners. Windows* Host Build and Debug Support with Eclipse* Integration

Windows* Host Eclipse* integration for SVEN, GDB and Intel® C++ Compiler

Copyright© 2013, Intel Corporation. All rights reserved. 4 *Other brands and names are the property of their respective owners. Updated Studio Components

Build Major Windows* Eclipse* Tizen* Yocto Intel® Atom™ 4th Gen Intel® Update & Linux* Host Integration Project* 1.4 Processor E3xxx Core™ Processor Intel® C++ Compiler 14.0 P P P P P P P for Embedded OS Linux* Intel® Integrated Performance Primitives P P P P P P 8.0 Update 1 Intel® 11.1 P P P P (Intel® 64 only) Analysis Intel® VTune™ Amplifier 2014 for Systems P P P P P P Intel® VTune™ Amplifier Sampling Enabling Product P P P P P P (SEP) 3.10 Update 12 Intel® Inspector 2014 for Systems P P P P P P Debug The GNU* Project Debugger – GDB v7.5 P P P P P P (Provided under GNU Public License v3) Intel® JTAG Debugger 2014 for Linux* P P P P P P Intel® JTAG Debugger notification module xdbntf.ko P P P P P (Provided under GNU Public License v2) SVEN Technology 1.0 P P P P P P (Provided under GNU Public License v2)

Copyright© 2013, Intel Corporation. All rights reserved. 5 *Other brands and names are the property of their respective owners. Supported OSs

Host: • Red Hat Enterprise* Linux* 5, 6 • Ubuntu* 10.04 LTS, 12.04 LTS, 13.04 • Fedora* 17, 18 • Wind River* Linux* 4, 5 • openSUSE 12.1 • SUSE LINUX Enterprise Server* 11 SP2 • * Windows* 7,8 Target:

• Yocto Project* 1.3, 1.4, and newer based environment • CE Linux* PR32 based environment • Tizen* IVI 1.0, 2.0 • Wind River* Linux* 4, 5 based environment

Copyright© 2013, Intel Corporation. All rights reserved. 6 *Other brands and names are the property of their respective owners. Intel® JTAG Debugger(XDB) System Debug Solution

IPT Support

• EFI/UEFI Firmware Debug • ELF Dwarf / PDB symbol info support • Complex Software Breakpoints • Source File Bookmarks • Memory Layout and Page Table views • Descriptor Table Views (GDT, LDT, IDT) • Linux* OS awareness Kernel Thread Views, Kernel Module Debug • Hardware/Platform register access • Hardware Threads • LBR based Hardware trace capability support • Advanced Scripting • Flash Writer

System Software Debug with in-depth register and memory configuration awareness – from Firmware to OS

Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. Debug Firmware and Bootloaders

• Debug SEC, PEI, DXE phase EFI debug support • Source level debug for modules in flash, RAM and shadowed mode • Tree view of firmware modules • Automatic load of source files • Step and set breakpoints as in any high level language debugger

JTAG assisted firmware and bootloader debug made easy

Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners.

3 What is SVEN ?

SVEN = „System Visible Event Nexus“

• Infrastructure for low overhead software event tracing

• Based on SW instrumentation using an TX-API – Inserted code to indicate what is happening when • SoC/Platform scope, collects traces for – multiple cores (IA, DSP, ...) – user and kernel code

Think of SVEN as the SW analog to an airplane black box recorder

9

Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. What is a SVEN event

• 32 byte in size • Indicates good or poor

health of the module timestamp

• Standardized set of events ! mod u typ sub • User defined module or API events

p a y

l o a

d

10 Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. What is debug instrumentation?

Code inserted to indicate WHAT a component is doing and WHEN I just got a buffer at my input! Whoops, frame DROP! Physical address = 0xCAFEF00D Physical_addr= 0xABADFEED Timestamp =Bad 6006 frame in stream, skipping..Timestamp = 140 Buffer_idClient = Workload57 = SVEN0xC0DED0010 Buffer_id = 13 Timestamp = 3003 Buffer_id = 31

Events

PSI

Input Viddec Vidpproc Vidrend Demux Audio Display SMD Audio Decode completeCore (ac3) Timestamp = 3003 Buffer_id = 23 Num_samples = 1536

11 Intel Confidential

Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. Software Instrumentation Example static void ipc_message_received( struct HostIPC_Handler *hipc, struct Host_IPC_ReceiveQueue *rcv_q, const struct _IPC_MessageHeader *mh, const char *message, unsigned int message_size ) { struct Host_IPC_QueuedMessage *msg;

DEVH_FUNC_ENTER(hipc->devh);

/** Queue the message for reading with HostIPC_GetNextInboundMessage() */ DEVH_ASSERT( hipc->devh, (message_size > 0) ); DEVH_ASSERT( hipc->devh, (message_size <= CONFIG_IPC_MESSAGE_MAX_SIZE) ); DEVH_ASSERT( hipc->devh, (mh->ipc_mh_dst_qnum < CONFIG_IPC_HOST_MAX_RX_QUEUES) );

devh_ReadReg32( hipc->devh, CONFIG_IPC_ROFF_DOORBELL_STATUS );

if ( NULL != (msg = HostIPC_GetFreeMessage(hipc)) ) { if ( message_size > CONFIG_IPC_MESSAGE_MAX_SIZE ) message_size = CONFIG_IPC_MESSAGE_MAX_SIZE;

msg->mh = *mh; /* copy the header */ memcpy( msg->msg, message, message_size );

/* Add to inbound messages */ OS_LIST_ADD_TAIL( &msg->node, &rcv_q->inbound_msgs ); } else { DEVH_WARN( hipc->devh, "HIPC_RX_OVF" ); }

DEVH_FUNC_EXIT(hipc->devh); }

Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. SVEN Architecture

SVEN Intrumented SW modules Transmitters • Tracing infrastructure with a SW device kernel User SVEN TX API: instrumentation API and devh_WriteEvent() devh_ReadReg() visualization tools DEVH_WARN() Sys Debug SVEN TX OS Integration ... • 3 Layer architecture API – Event TX API for user/kernel/firmware code – DRAM based event ring buffer (nexus)

– Trace receiving API and tools Debugger System Intel

– Multiple trace writers/ multiple readers StructureSVENEvent • Very low event TX overhead – < .5 microseconds on Intel CE HW – Can remain in retail builds

• Open and extensible architecture – Well defined event structure Trace – Independent tools development Receivers: Visualisation – Split between TX and receivers Trace File Storage Scripting Remote or DUT analsyis tools

Low overhead Event Trace infrastructure for SoC SW event tracing

13

Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. SVEN SDK

• Easy adaptable SVEN device side SW stack • Source code distribution (no binary components) • SVEN kernel module • User mode tools like the csven trace console • Build system – Works on any Linux distribution with kernel module build environment – Basically just “make && sudo make install” needed for setup

• C/C++ Headers and libraries for doing SW instrumentation

• Documentation for installing and adapting to own needs

• Intel Internal version for Linux available via git http://wiki.ith.intel.com/display/SVEN/Accessing+the+SVEN+SDK+using+git

The SDK contains everything for SVEN enabling of a Linux platform and for starting with instrumenting code

14

Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. SVEN Tools Environment Trace configuration File (htuple) SVEN SDK CSVEN recorded enabled Trace Data file Linux System Trace Visualisation Layout

Trace Data in Trace BBR format Data (BlackBoxRec SVEN Breakpoint order)

triggering

USB

Trace visualisation

Upload of SVEN trace data from memory via JTAG

XDB JTAG Debugger

15

Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. SVEN Debug Tools Trace Visualization Framework

• Embeddable into JTAG Debugger and Eclipse Timeline view with SVEN SW events and • Advanced navigation and search capabilities OMAR waveforms • Graphical and textual event displays

• Extensible to other trace inputs (OMAR support available)

Textual Event display • User controlled trace line grouping with Search and Filter

Graphical Event distribution overview for quick navigation SVEN Event Debugger triggering

• Unique combination of life JTAG system with event tracing

• Smart breakpoints that interrupt execution on SVEN event TX Specialized register Advanced SVEN trigger • Support for any possible SVEN event from access trigger UI definition UI generic to very specific ones

• Examples: – Break on any event from the USB driver – Break on any Debug String that starts with “ERROR” – Break if register X is accessed – Break if register X bits [7-9] have value 0b101

16

Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. SVEN Event Example, Register Read 32’

/** Event Tag for SVEN Events, allows decoding /* SVEN_event_type_register_io SUBTypes */ Intel Confidential * of event o wner and event type/subtype enum SVEN_EV_RegIo_t timestamp */ { struct SVENEventTag SVEN_EV_RegIo_invalid, { ! mod u typ sub unsigned int et_gencount : 2; SVEN_EV_RegIo32_Read, unsigned int et_module : 10; SVEN_EV_RegIo32_Write, unsigned int et_unit : 4; SVEN_EV_RegIo32_OrBits, unsigned int et_type : 8; SVEN_EV_RegIo32_AndBits, unsigned int et_subtype : 8; SVEN_EV_RegIo32_SetMasked, }; SVEN_EV_RegIo16_Read, SVEN_EV_RegIo16_Write,

p SVEN_EV_RegIo16_OrBits, SVEN_EV_RegIo16_AndBits, a /* SVEN Major Event Types */ SVEN_EV_RegIo16_SetMasked,

y enum SVEN_MajorEventType_t

l {

o SVEN_EV_RegIo8_Read, SVEN_event_type_invalid, /* NO ZEROES ALLOWED */ SVEN_EV_RegIo8_Write, a SVEN_event_type_trigger, /* 1 */ SVEN_EV_RegIo8_OrBits,

d SVEN_event_type_debug_string, /* 2 */ SVEN_EV_RegIo8_AndBits, SVEN_event_type_register_io, /* 3 */ SVEN_EV_RegIo8_SetMasked, SVEN_event_type_port_io, /* 4 */ SVEN_event_type_module_isr, /* 5 */ SVEN_EV_RegIo64_Read, SVEN_event_type_os_isr, /* 6 */ SVEN_EV_RegIo64_Write, SVEN_event_type_os_thread, /* 7 */ SVEN_EV_RegIo64_OrBits, SVEN_event_type_smd, /* 8 - Media Drivers */ SVEN_EV_RegIo64_AndBits, SVEN_event_type_module_specific, /* 9 */ SVEN_EV_RegIo64_SetMasked, SVEN_event_type_PMU, /* 10 HW Performance */ SVEN_event_type_performance, /* 11 SW Performance */ SVEN_EV_RegIo_MAX SVEN_event_type_MAX }; };

17 Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. SVEN

Transmitter Transmitter Rx_API(events) Receiver Transmitter Tx_API(Events) Receiver Transmitter Nexus Receiver

DDR SMD Drivers CSVEN ISR memory GSVEN Firmware HOMIE Events Events

18 Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. Intel System Debugger Environment JTAG Debugging • Host target IO via JTAG probe (Intel XDP or Macraigor* usb2demon) • No network/usb/Serial connection to system required

Device • Boot phase and kernel debugging Drivers

SVEN kernel module

Linux OS

Macraigor* “usb2demon*“ or Intel® XDP3 probe

USB JTAG

19

Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. Linux* OS Awareness – System Debug

Kernel Kernel

• Monitor kernel modules and system threads • Access status information • Debugging of Linux* memory images

Be aware of all relevant platform software stack interactions

20

Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. SVEN Event Breakpoints in Intel Debugger

Sven Event Properties New breakpoint type based on SVEN mod unit type subtype events

• Trigger is comparison of event properties Type/Subtype dependent against values and mask properties (payload) • Mask defined what bits in a sven event are considered for comparison

• Supports generic event properties like – „any event from graphics card driver“ – „audio driver performs 32 bit write access to any register“ • and specific event properties that depend on the event kind – „INT_ENABLE bit is being set in register INTR“ – „SVEN event with debug string „ABCD“ written“

Workflow example on next slides 21

Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. Matching SVEN instrumented code with Debugger Event Triggers register access

Driver code example

Clearing bit 7 in a register //reset bit in the int_en register // devh_WriteReg32(handle,

ROFF_MFD_HOST_INT_EN, register name regval & ~(0x00000040));

value

access

Trigger definition can be matched precisely with the corresponding source code

22

Copyright© 2013, Intel Corporation. All rights reserved. *Other brands and names are the property of their respective owners. Summary / Next Steps Intel® System Studio 2014 for Linux*

1. Windows* Host and Linux* Host Support with Eclipse* Integration 2. Support for Intel® Atom™ Processor E3xxx (Baytrail SoC) 3. Support for Tizen* IVI 4. Intel® C++ Compiler Improvements • Optimizations for latest Intel processors • improved sysroot and GNU cross-build integration support • Cross-build support for Windows* host and Wind River* Linux* target 5. Extended Intel® VTune™ Amplifier System-Wide Analysis 6. Yocto Project* Compatible 7. Intel® JTAG Debugger support for next generation processors of all sizes$ 8. Graphical installer for both Windows* host and Linux* host

http://intel.ly/system-studio

The next step in Intelligent Systems Software Development

Copyright© 2013, Intel Corporation. All rights reserved. 23 *Other brands and names are the property of their respective owners. Legal Disclaimer & Optimization Notice

INFORMATION IN THIS DOCUMENT IS PROVIDED “AS IS”. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO THIS INFORMATION INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT.

Software and workloads used in performance tests may have been optimized for performance only on Intel microprocessors. Performance tests, such as SYSmark and MobileMark, are measured using specific computer systems, components, software, operations and functions. Any change to any of those factors may cause the results to vary. You should consult other information and performance tests to assist you in fully evaluating your contemplated purchases, including the performance of that product when combined with other products.

Copyright © , Intel Corporation. All rights reserved. Intel, the Intel logo, Xeon, Core, VTune, and Cilk are trademarks of Intel Corporation in the U.S. and other countries.

Optimization Notice Intel’s may or may not optimize to the same degree for non-Intel microprocessors for optimizations that are not unique to Intel microprocessors. These optimizations include SSE2, SSE3, and SSSE3 instruction sets and other optimizations. Intel does not guarantee the availability, functionality, or effectiveness of any optimization on microprocessors not manufactured by Intel. Microprocessor-dependent optimizations in this product are intended for use with Intel microprocessors. Certain optimizations not specific to Intel microarchitecture are reserved for Intel microprocessors. Please refer to the applicable product User and Reference Guides for more information regarding the specific instruction sets covered by this notice. Notice revision #20110804

24

Copyright© 2013,2012, Intel Corporation. All rights reserved. 10/18/2013 *Other brands and names are the property of their respective owners.