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A Clari Cation Concerning the L Hierarchy 1 the Proof A Clari cation Concerning the L Hierarchy Eric Allender Department of Computer Science, Rutgers University P.O. Box 1179, Piscataway, NJ 08855-117 9,USA e-mail: [email protected] Octob er 29, 1997 Abstract 1 0 In [AO96], it is stated without proof that if NC L = AC L, then the L hierarchy col lapses to some level. This note provides a proof of that claim. The reader is referredto[AO96] for al l background, de nitions, and motivation. Al l of the circuit complexity classes mentioned in this note arelogtime-uniform [BIS90 ], unless otherwise speci ed. 1 The Pro of The pro of consists of establishing the following fact. 1 Fact 1.1 The set of languages NC DET has a complete set under logspace many-one reducibility. This fact is sucient to establish the claim made in [AO96]. To see this, 1 0 assume that NC DET = AC DET. By Claim 1.1, there is a complete set :L : L 0 0 L , this complete set is in for AC DET. Since AC DET is equal to L 0 some xed level of this hierarchy, and thus AC DET collapses to this level. It remains for us to establish Fact 1.1. Supp orted in part by NSF grant CCR-9509603. 1 First, let's come up with a de nition of a \canonical" way for a log-time 1 2 machine to sp ecify a circuit. Let M b e a clo cked 3-tap e Turing machine running for c log n time for some c. Let us say that M is k-good on length n if for all p of length k log n, M n; p is a string in the set fb; ORACLE; 2; AND; 2; OR; 1; NOT; i; INPUTg where jbj + jpj k log n, and i n, and such that if jpj = k log n, then M n; p= i; INPUT for some i, and for each pre x q of p,ifM n; q = j; INPUT, then i = j . Intuitively, p is an enco ding of a path from the output gate to a gate 1 g in the NC circuit, and M , on input n; p, is pro ducing as output the fan-in of the g , and the typ e of gate that g is. The other conditions are merely for technical convenience. The depth of the circuit is k log n. Note that { for a suitable enco ding of clo cked Turing machines { the following 0 language is in uniform AC , for each c and k : fM; n : M is a clo cked Turing machine running in c log n time, and M is k -go o d on length ng. This do es dep end somewhat on the enco ding of Turing machines. However, note that M n p i for any reasonable enco ding of Turings machines M , the language f1 0 1 0 b 0 : the i-th output bit of M n; pisbg is in Dlogtime-uniform AC since it is in Dlogtime. Checking if a circuit is 2-go o d can b e expressed as a rst-order 0 0 sentence over a uniform AC predicate, and thus it is in Dlogtime-uniform AC . De ne the circuit C as follows: If M is a clo cked Turing machine M ;c;k ;n rnning in time c log n and M is k -go o d on length n, then this is the circuit with gates having lab els of the form p, where the typ e and fan-in of gate p is given by M n; p. If gate p has fan-in b, then for all strings q of length jbj that lexicographically precede b, the gates that are input to p are the gates pq . If M is not a clo cked Turing machine that is k -go o d on length n, then the circuit is a circuit that trivially accepts the empty set. I claim that the set C = fM; x : M is a clo cked Turing machine running in 5 log n time, and M is 2-go o d on length jxj, and the circuit C accepts M ;c;k ;jxj 3 x where the oracle gates give the middle bit of the function DET applied to 1 their inputs, and jM j log log jxjg is complete for NC L. 1 We need to showthatCisinNC L, and that it is hard. Neither seems completely trivial. 1 A clo cked TM running in time c log n is a machine that, on input n; p 1. computes c log n which is just c times jnj. 2. starts a counter that will allow it to execute only c log n steps. Actually, steps 1 and 2 can b e b egun simultaneously; there are a numb er of programming tricks with Turing machines that one can use. The p oint is, a there is some purely syntactic part of the Turing machine description that we will call the \clo ck", b this \clo ck" enforces a run-time on the Turing machine, and c every Turing machine is equivalent to a \clo cked" Turing machine of comparable complexity. 2 0 1 Note that Dlogtime-uniform AC and NC have circuits that are Dlogtime-uniform even with this additional restriction that the uniformity machine have three tap es [BIS90]. 3 Any bit of the DETERMINANT can b e reduced to the middle bit. If I want the lower- k n order bit of fx, this is the middle-bit of some function GapL function gx de ned as f x2 for some k . 2 1 First, let's show that it's in NC L. Let m b e xed. We'll describ e the circuit accepting C for inputs of length m. First, given input M; x, where 0 jxj = n, the circuit will evaluate the AC predicate to check that M runs for 5 log n time and is 2-go o d on length jxj;thus let's assume that M is go o d, and let's concentrate on length n.For each string p, there will b e circuitry evaluating M n; p. The output of the circuit our circuit accepting C , of course, is the value of gate in circuit C on input x. Recall that the empty string is the M ;c;k ;n name of the output gate of C . Here is the circuitry that will evaluate M ;c;k ;n 0 0 any given gate p. With NC circuitry, with \free" calls to the AC predicates that are computed only once, given M n; p we can compute the \typ e" of gate p. If the gate is of typ e INPUT, then a sub circuit of depth log n can compute the input bit i to which gate p is connected. If the gate is of any other typ e, then a sub circuit of depth log b can compute the fan-in b of gate p. That is, near the \top" of this circuit, there will b e gates checking if the fan-in is 2, and attempting to compute the AND of the inputs of gate p; near the b ottom of 4 the circuit, there will b e gates checking if the fan-in is n , and attempting to 4 compute DETthe values of the input gates pq , etc. The total circuit depth required to evaluate a gate of fan-in d is O log d+ depth of its inputs. This is 1 all that's required in order to show that this is in NC L. Now, let's show hardness. 1 For this, we need to show that anything accepted byNC L circuits is accepted by circuits of the form C for some k -good Turing machine M , M ;c;k ;n for some c and k . If wehave this, then a standard \padding" reduction will show that our set C is complete. What we need is that a log-time machine, given a path p, can compute the typ e and fan-in of the gate that is reached by following path p from the output gate. By \following a path p", I mean that at each oracle gate of fan-in b, log b bits are used to determine the input wire from the oracle gate that is followed. 1 Let A b e accepted by logspace-uniform NC L circuits C . Note that there n 1 is a very uniform NC L family of circuits recognizing the language fn; p; t; i : g is the gate reached by following path p in C , and either i is 0 and the gate n has typ e t,ori logb and t is the i-th bit of the binary representation of the fan-in of gate g .g That is, the L oracle can b e used to determine the name 4 Actually sp ecifying the lab eling M uses will b e a bit messy. The circuit has a very regular structure: Use OR gates to guess the typ e of the gate g . Use ANDs to { check that the guess is correct, and { simulate the gate. The circuits of typ e 1 are all similar. To do part 2, we a Use OR gates to guess the next bit of the fan-in b of g b use AND gates to check that this bit is correct Once wehave the entire fan-in, wehave a gate that actually simulates the gate of the original circuit, and then we rep eat the pro cess for the inputs to gate g.
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