High Performance Control Design for Dynamic Voltage Scaling Devices Carolina Albea-Sanchez, Francisco Gordillo Álvarez, Carlos Canudas de Wit
To cite this version:
Carolina Albea-Sanchez, Francisco Gordillo Álvarez, Carlos Canudas de Wit. High Performance Con- trol Design for Dynamic Voltage Scaling Devices. IEEE Transactions on Circuits and Systems Part 1 Fundamental Theory and Applications, Institute of Electrical and Electronics Engineers (IEEE), 2011, 58 (12), pp.2919-2930. 10.1109/TCSI.2011.2158707. hal-00642260
HAL Id: hal-00642260 https://hal.archives-ouvertes.fr/hal-00642260 Submitted on 17 Nov 2011
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C. Albea, F. Gordillo and C. Canudas de Wit
Abstract—Dynamic Voltage Scaling (DVS) is an im- size of the inductive component. In the framework of portant method in managing dynamically the sys- SoC miniaturization, a discrete DC-DC converter was tem supply voltage for efficient power reduction. This developed in [7]. It is composed of two supply sources approach is applied in Very-Large-Scale Integration (VLSI). A DC-DC converter is an electronic device and a Power Supply Selector (PSS). This discrete DVS which allows to vary the voltage and, thus, to imple- converter replaces the inductive element with a set of ment DVS technique. CMOS transistors, reducing the converter required size. In this paper, a high-performance controller is pre- Control objective for the discrete DVS converter is to sented for a novel discrete DVS converter. This con- achieve the target voltage providing a correct and reliable troller is developed with the aim to deal with the unknown resistive component of the load as well as operation during the switching transitions. Therefore, the to minimize the dissipated energy and current peaks, control must achieve: what is very important in the field of microelectronics. • small current peaks, Current peaks and power consumption are minimized • fast transient periods, by computing an optimal evolution for the voltage • minimum dissipated energy, reference. Likewise, an adaptive controller is proposed • to deal with the unknown load resistive parameter. adaptation to unknown load and Consequently, the obtained advanced controller can • low performance cost. acquires a high consideration on electronic devices. A simple discrete controller was proposed in [7] to Index Terms—Dynamic voltage scaling, energy handle the two-voltage level required for the discrete DVS aware, Lyapunov’s methods, optimal control, adaptive converter. In this control structure, only one transistor control can be switched at each sampling time. This limits the ability of the converter to make fast transient periods. In I. Introduction addition, the employed voltage reference was a ramp with a computed slope to obtain small current peaks. The development of low-power electronic devices has In the first part of this paper, a high-performance con- raised up in recent years. Very-Large-Scale Integration trol law for discrete DVS converter is developed, without (VLSI) is mostly used in information technology-related the constraint that only one transistor can be switched at products, such as PCs, mobile devices and digital con- each sampling time. [8]. This allows to obtain a richer con- sumer equipments. trol sequence and, thus, better expected performance with Dynamic Voltage Scaling (DVS) is a known technique respect to the issues previously mentioned. The controller that adjusts the processor voltage supply to the minimum is based on Lyapunov theory, being developed in order level of performance required by the system application to improve the tracking capability and their regulation [1], [2]. DC-DC converters are a key element in a DVS characteristic. As a side effect, it is also observed that the mechanism, since they can dynamically adapt the supply current peaks are reduced during the transient periods. voltage. This technology has been employed in VLSI. How- This controller is compared with the controller proposed ever, this kind of converters has a different structure than in [7] in terms of: transient response, quality of the induced the standard ones since they must change the operating load current, power consumption and performance cost. voltage in a dynamic way [3], [4]. Likewise, the controllers The high-performance controller presents suited proper- of these DC-DC converters present a relevant interest [5]. ties. Nevertheless, it needs knowledge of the load and, cur- A dynamic continuous buck converter for DVS systems rent peaks and energy-saving are not necessarily optimal. was presented in [6], which provides suited performance. These important issues are also dealt with in this work. It, however, limits SoC scaling properties due to the In the second part of this paper the Lyapunov-based controller is improved in two directions: on the one hand, Copyright (c) 2011 IEEE. Personal use of this material is permit- optimal control theory is applied in order to achieve min- ted. However, permission to use this material for any other purposes must be obtained from the IEEE by sending an email to pubs- imum current peaks and maximum energy efficiency. For [email protected]. this purpose, an optimal evolution for the voltage reference This work has been conducted while C. Albea was with INPG, is obtained by solving a Boundary Value Problem (BVP) Gipsa-lab Grenoble, France and the Dpto. de Ing. de Sistemas y Au- tom´atica, Sevilla, Spain. Now, C.Albea is with CEA-LETI Minatec with transversality condition. This problem is numerically campus, Grenoble, France [email protected] solved by using the MATLAB function bvp4c [9], [7]. F. Gordillo is with the Dpto. de Ing. de Sistemas y Autom´atica, On the other hand, an adaptation mechanism is added Sevilla, Spain [email protected] C. Canudas de Wit is with the CNRS, Gipsa-lab, Grenoble, France to the Lyapunov-based control law in order to cope with [email protected] load uncertainties. Modelling the load connected to the discrete DVS converter is involved. In some occasions, it control block has as inputs: a clock signal (CLK), a local is designed as a dynamic resistance modeled as function power manager signal (LPM), that orders to the PSS to depending on the voltage and chip frequency [10], [11], start the hopping sequence and an error voltage signal, e, among other components. However, this is not an accurate from a comparator. model. This is why this resistance connected to the DVS V V converter should be considered unknown or/and slowly h l changing. For this reason, an adaptive strategy is imple- mented in such a way that the load resistive component is Set of adapted. PMOS These researchers have been developed in the French project called ARAVIS (Architecture avanc´ee reconfig- uk urable et asynchrone int´egr´ee sur puce ) sponsored by vc e − sponsored by the international competitiveness pole Mi- CLK + nalogic1. DIGITAL CONTROL vr The rest of this work is organized as follows: in Sec- LPM tion II, the circuit model of the discrete DVS converter is presented as well as their properties and the error Fig. 1: DVS converter. equation. A high-performance controller for the discrete DVS converter is proposed in Section III, explaining in Load model. Section IV its implementation. Next up, a performance evaluation of the controller is done in Section V. Section The discrete DVS converter is connected to a load that VI states the possibility to improve the high-performance can be modeled as an impedance depending on the core controller by employing optimal and adaptive control. voltage, vc. In this work, the load model implemented in They are developed in Section VII (optimal control) and VHDL-AMS in [12] is employed: VIII (adaptive law). A performance evaluation of this Il = f(vc)= Idyn + Ishort + Ileak + Icap (1) advanced controller is presented in Section IX. The work I = K ωv (2) closes with a section of conclusions. dyn dyn c 3 The work closes with a section of conclusions. Ishort = Kshortω(vc − 2Vth) (3) Notation. Denote: Ileak = Kleak (4) M if x>M dvc Icap = C , (5) satM (x)= x if m ≤ x ≤ M , dt m m if x
1http://www.minalogic.com/ 2Cortesy of Sylvain Miermont. I l IMPEDANCE where • β , 1 > 0 and δ , Ileak > 0 depend on the load. RLC C + • , 1 Icap Idyn Ishort b R0C > 0. Define the voltage error as: e , vr − vc, where vr is a voltage reference. Thus, the associated error voltage equation is C rL Ileak e˙ = −(β + buk)e + (buk + β)vr − bVhuk + δ +v ˙r. (10)
III. Control law The objective of this section is to present a high per- Fig. 2: Load model. formance control law for the discrete DVS converter. This controller must fulfill the requirements mentioned before for the transient periods, i.e., when the output voltage robustness and/or adaptation with respect to unknown is scaled from a low voltage level to a high voltage level electrical parameter. (rising transient period) and from a high voltage level to a For simplicity the low voltage supply, V , is disregarded l low voltage level (falling transient period). This controller for control design purposes (see Fig. 3). The main objective is designed to provide stable behavior by using control is that the core voltage v achieves the high and low voltage c methodology. levels by switching the PMOS transistors. Note that, at In the steady states, the maximum stable voltage least, one transistor must always be switched on. achieved is V − ∆ and the minimum stable voltage Figure 3 shows an electrical representation of the DVS h h achieved is V − ∆ where ∆ , ∆ ∈ R depend on several converter without the low voltage supply, V , connected to l l h l l factors and are difficult to estimate. These variables catch the load that has been described above. the PMOS model errors, current variations, supply voltage and the resistive losses through the PMOS transistors vr DIGITAL CONTROL switched on. Assumption 1: ∆h, ∆l are small with respect to vc, and uk they do not change the system stability properties. Some simulations are performed in such a way that M1 R1 M the behavior of the closed-loop system with the different 2 R2 v c controllers are shown. In these simulations, N = 24 is M Rn−1 n−1 taken as the total number of PMOS transistors in the M R I v n N l( c) model shown in Fig. 1. Note that at least, one active transistor must be always switched on. The voltage supply IMPEDANCE is Vh =1.2V . The reference signal, vr, is a step between the
low voltage level Vcl =0.8V −ǫh and the high voltage level Vh Z(vc) Vch =1.2 − ǫh, being ǫh =0.06V and ǫl =0.01 (Vcl ≈ Vl). These parameters comes from the equilibrium of Eq. (10). This signal has a slope specified by the designer, which is inspired by [7]. Fig. 3: Load with DVS converter without Vl. The system resistances are RL = 39.67Ω and R0 = 31.41Ω, the capacitance is C = 9nF while Kleak = −3 Assume that the PMOS transistors are modeled as ideal 1.67·10 , the threshold voltage is Vth =0.4V , and system resistors when they are switched on and, as resistors with frequency is ωn = 500MHz. The sampling frequency has infinite resistance when they are switched off. They are the same value that the clock frequency. Finally, the slope 6 considered to have the same electrical characteristic. of the reference signal, vr, is 1.067 · 10 V/s. The voltage loop equation yields the relationship V − v R A. Control proposed in [7] I (v )= h c , where R , 0 . (8) l c uk The development of the high performance controller for Ruk uk the DVS converter is inspired by the ‘intuitive control’ u is the number of transistors switched on, thus, u ∈U = k k used in [7], under the form: {1, 2, ..N} and it will be the control variable. Likewise, R0 N is the PMOS transistor resistance. uk = sat1 {uk−1 + sign(e)} Combining the specific form of the load, Eqs. (1)–(5), In this law, no more than one transistor switches at each Eq.(6) and Eq. (7) with system (8), the voltage equation sampling time according to the sign of the voltage error. can be expressed as: Therefore, this controller has the limitation that one only v˙c = −βvc + b(Vh − vc)uk − δ, (9) transistor can be switched on or off at every sampling time. Figure 4 shows the implementation of this controller. The control law will be designed using directly the Likewise, Fig. 5 shows a simulation for this controller by nonlinear continuous-time equation (10). This will lead using Matlab. This controller is implemented in fixed- to a continuous-time controller expression that will be point by using 4 bits. Note that although this controller approximately discretized. This approach is very common presents a simple implementation (only one addition), in the field of automatic control [13], [14]. The implemen- the performance presents an oscillatory behavior, with tation of this discrete-time controller is shown by block important current peaks. diagrams. The time evolution for the reference signal employed CONTROL in [7] is maintained in the simulation of the developed controller in this section. However, later, it will be seen vr that, by means of choosing a suitable reference the closed- + e 1 loop system performance can be enhanced. vc − −1 + uk satN u 1 k−1 + B. Controller: Lyapunov-based design
z−1 The controller is designed guarantying closed-loop Lya- punov stability conditions for the equilibrium, e = 0. The design is performed employing the continuous-time error Fig. 4: Intuitive control from [7]. equation (10). Consider the following Lyapunov function candidate e2 Vlyap = . a) 2 Nmax=24 Its time derivative is 20 2 V˙lyap = −βe +(b(vr −Vh)uk −buke+βvr +δ +v ˙r)e. (11) 10 NTrans The negativeness of V˙ can be assured canceling the unde- Nmin=1 0 sired terms. This can be performed by choosing 0 0.2 0.4 0.6 0.8 1 t(s) −6 x 10 βvr +v ˙r + δ b) uk = , (12) b(Vh + e − vr) Vh=1.2 Vch=1.12 then Eq. (11) is 1 ˙ 2 V(V) Vlyap = −βe ≤ 0. Vl=0.8 Therefore, e = 0 is asymptotically stable. 0 0.2 0.4 0.6 0.8 1 t(s) −6 x 10 IV. Lyapunov control implementation c) 0.08 Now, the implementation of the Lyapunov controller is 0.06 dealt with. The approximate discrete-time version of Eq. (12) con-
I(A) 0.04 0.02 sidering the saturation and rounding function for physical 0 implementation purposes is: 0 0.2 0.4 0.6 0.8 1 t(s) −6 βTsvr + vr − vr −1 + δTs x 10 u = satN round k k k k 1 bT (V + e − v ) s h k rk For implementation issues the division is remplaced by a Fig. 5: Intuitive control. Evolution of the: a) number of PMOS multiplication for Φ. transistors switched on, b) vr (green) and vc (blue), c) current. Il. N uk = sat1 round K1vrk + K2(vrk − vrk−1 )+ K3 Φ (13) In what follows, other control alternative is proposed where without the limitation that only one transistor can be βTs • K1 , , switched on or off, as long as the number of transistor R0 • K , 1 , is limited by 1 and N. 2 R0 • K , δTs and Remark 1: The control law is designed in such a way 3 R0 C • Φ ≈ − takes the closest corresponding that the desired output voltage corresponds to one of the Ts(Vh+ek vrk ) saturation bounds 1 or N, since they corresponds to the value to Table I. lower or higher voltage level, respectively. This is the structure for the controller implementation. vck 0.8 0.84 0.88 0.92 0.96 Φ 1.3 1.4 1.6 1.8 2.1 a) vck 1.0 1.04 1.08 1.12 Nmax=24 Φ 2.5 3.1 4.2 6.2 20
C TABLE I: Stored values of − . 10 Ts(Vh+ek vrk ) NTrans Nmin=1 CONTROL 0 0 0.2 0.4 0.6 0.8 1 t(s) −6 x 10 v z−1 rk−1 − b) + K 2 + Vh=1.2 + K3 Vch=1.12 v + r × uk K + round satN + ek 1 × 1 1 v c − V(V)
Vl= 0.8 Φ 0 0.2 0.4 0.6 0.8 1 t(s) −6 x 10 c) Fig. 6: Digital Lyapunov control. 0.08 0.06
I(A) 0.04 Figure 6 shows a block diagram of this approxi- 0.02 mate discrete-time version. Note that it presents 3 addi- 0 tions/sustrations, 3 multiplications and an access table. 0 0.2 0.4 0.6 0.8 1 t(s) −6 The performance of this controller is shown by simula- x 10 tion in Fig. 7. This controller is implemented in fixed-point by using 4 bits. Note that the application of this controller Fig. 7: Lyapunov controller. Evolution of: a) number of PMOS to the DVS converter reduces the current peaks, obtaining transistors switched on, b) the vr (green) and evolution of vc smoother voltage and current evolutions. However, the (blue) and c) the current Il. controller implementation presents some more operations than the ‘intuitive controller’. −80
V. Performance evaluation −90 In this section a performance evaluation is performed for −100 the resulting voltage and current signals in the transient period, after applying the previous controller. The voltage −110 signal performance is evaluated by computing the mean and variance of the voltage error. Likewise, the current −120 signal performance is evaluated by computing the maxi- −130 mum current peaks as well as its Power Spectral Density Power/frequency(dB/Hz) (PSD). This PSD is computed using all the recorded data, −140 since this decompositions is computed after the simulation. −150 These computations have been performed by Matlab. 0 5 10 15 20 25 30 35 Frequency (MHz) Table II presents the mean and variance of the voltage error signal and maximum peak of the current signal. Fig. 8: Power spectral density with ‘intuitive controller’.
Mean Error Var. Error Max. Curr. Peak Intuitive c. 3.32 · 10−3 6.59 · 10−5 4.0 · 10−2 A. Cost performance Lyapunov c. 2.24 · 10−3 3.37 · 10−5 0.5 · 10−2 Concerning to implementation issues, note that the ‘intuitive controller’ presents a simpler implementation TABLE II: Performance evaluation. than the Lyapunov controller. Table V summarizes the numerical operations and the bits needed for the imple- mentation of theses controllers. Note that the new proposed controller improves the Note that the Lyapunov controller generates a better system performance with respect to the solution given performance in spite of introducing more numerical op- in [7]. Observe that Lyapunov controller provides a PSD erations. However, the number of bits are maintained in smaller than the ‘intuitive controller’ (Fig. 9 and 8). fixed-point implementation. −6 x 10 −80 7
−90 6
5 −100 Intuitive controller 4 −110 Lyapunov 3
Energy (J) controller −120 2 Power/frequency(dB/Hz) −130 1
−140 0 0 5 10 15 20 25 30 35 0.5 1 1.5 2 2.5 3 −7 Frequency (MHz) t(s) x 10
Fig. 9: Power spectral density with Lyapunov controller Fig. 10: Energy dissipated during the rising transient period with the ‘intuitive controller’ and the Lyapunov. Addit Multipl. Acc. table bits Intuitive control 1 0 0 4 Lyapunov control 3 3 1 4 substantial peaks, in particular when the total PMOS parallel resistances are larger. This seems to be the main TABLE III: Implementation cost. cause of larger dissipated energy. The highlight of Lyapunov’s controller is its energy con- sumption reduction, which is due to the smoother behavior B. Energy evaluation of the voltage and current time profiles. This involves that In the set of PMOS, the accumulated dissipated en- the controller reduces by 32% the energy consumption ergy in the transient period depends on the control law with respect to the ‘intuitive control’. On the other side, employed, i.e., on the switching sequence. For instance, the number of bits required for fixed-point implementation undesirable oscillatory current profile can be obtained with is maintened. Its higher number of operations is affordable certain controllers. This non-smooth behavior of the tran- in this application. It supposes a minimum cost in com- sient current may result in a higher energy consumption. parison with the favorable performance. The purpose here is to evaluate the energy cost during the The presented advantages became essential in nano- transient periods associated with the controller presented electronic technology. However, other improvements are in previous section. accomplished to obtain an even higher performance. The ideal dissipated energy in the PMOS transistors during the transient period is VI. Advanced Lyapunov’s controller tf The Lyapunov’s controller (Eq. (12)) presents very Ed = (Vh − vc)Ildt suited properties for the DVS converter. However, this t0 Z controller can be improved. where t0 is the initial time and tf is the final time in Firstly, minimum energy consumption and current such transient period. Figure 10 and Table IV show the peaks are desired. This can be achieved finding an ap- dissipated energy during the rising transient period. ∗ propriate evolution for the voltage reference, vc (t), by Note that the energy consumption obtained with the applying optimal control theory [16], [15], [17]. Lyapunov controller is improved with respect to the ‘intu- Secondly, note that the Lyapunov’s controller depends itive controller’. This is due to the smoother behavior of on the resistance load parameter, β. However, this param- voltage and current signals obtained with this controller. eter is, in many occasions, difficult to estimate and may Dissip. Total Energy (µJ) change with time, as mentioned in Section II. Therefore, Intuitive control 7.2 a second objective is to design an adaptation law in order Lyapunov control 4.8 to obtain an estimation βˆ for the unknown parameter. The proposed control architecture including the optimal TABLE IV: Dissipated total energy in rising transient period. reference and the adaptation mechanism is shown in Fig. 11.
C. Summary VII. Optimal voltage reference computation The intuitive control proposed in [7] provides a reason- Assume that the desired voltage is constant. The prob- able tracking at the expense of an oscillatory behavior due lem may be formulated as to find a continuous-time volt- to its own limitation. This involves that the current signal age reference trajectory from a voltage initial value vc(t0) time profile presents a high frequency behavior with some to set-point vr, minimizing current peaks, ∆I, and the 9 ADAPTIVE x 10 LOOP 9 βˆ 8 7 ∗ + vr OPTIMAL vr LYAPUNOV uk vc CONTROLLER SYSTEM REFERENCE - 6 5 4 Fig. 11: DVS converter closed-loop with optimal evolution of the voltage reference and adaptation parameter. 3 Vh−vc R0 u˙ 2 − − v˙c u Vh vc v˙c Current time−derivative terms R0 R0 u˙ − R0 u dissipated energy. This problem will be addressed applying 1 continuous-time optimal control theory [16], [15], [17]. 0 0 1 2 3 4 5 6 In order to optimize the current peaks, time derivative −9 t(s) x 10 of the current I˙l is included in the performance index. In every sampling time, a certain number of transistors will Fig. 12: Current time-derivative terms. be switched on. The total number of PMOS transistors switched on at the previous sampling time is denoted by − uk , and the total number of PMOS transistors switched + The following Lagrangian is chosen on at the current sampling time is denoted by uk . Conse- quently, the number of PMOS transistors switched on or + − 2 2 2 off in every sampling time is given by ∆uk = uk − uk . 2 (Vh − vr + e) Vh − vr + e L = q1e + q2 u + u˙ , The current peaks are due to the sudden change of R0 R0 the PMOS resistance at the sampling times. These peaks (15) + − ∆Il = Il − Il are given by where q1 and q2 are positive weighting constants. The first term of Eq. (15) penalizes the voltage error, the second Vh − vc + − Vh − vc one penalizes the dissipated power and the last one, the ∆Il = (uk − uk )= ∆uk. R0 R0 current peaks. − The same notation given above for u+ and u is used Consider a 2-dimensional optimal control problem x = k k [e,u] withx ˙ = [e, ˙ ν], where ν , u˙. Thus, the Hamiltonian here for variable Il. Therefore, the continuous-time ap- proximation for the current peaks is function is
4 2 2 2 ˙ Vh − vc 2 (Vh − vr + e) u (Vh − vr + e) ν Il ≈ u.˙ H = q1e + q2 2 + 2 + R0 R0 R0 λ [b(−V + v − e)u + β + δ]+ λ ν. (16) Another way to achieve this same expression is taking 1 h r 2 time derivative of Il given by Eq. (8). Rigorously, the time derivative of this current is Solving the algebraic equation V − v v˙ I˙ = h c u˙ − c u. l ∂H(e,ν,λ1, λ2) R0 R0 =0, ∂ν ∗ ν=ν Nevertheless, it can be seen by simulation that during a typical transient period, the last term is very small (see ∗ the optimal ν (x, λ) is Fig. 12). This simulation is performed using the same parameters given in Section III. This graph supports the 2 previous argument. ∗ −λ2 R0 ν = Consider the following performance index 2 Vh − vr + e τ J = L(e,u,t)dt, (14) which gives the optimal Hamiltonian expression Z0 4 2 where the final time τ is free and the Lagrangian L(e,u,t) ∗ 2 (Vh − vr + e) u H (e, λ1, λ2)= q1e + q2 2 − is chosen in order to penalize: R0 2 2 • voltage error e, λ2R0 2 + λ1[b(vr − Vh − e)u + β + δ]. (17) • dissipated power P = (Vh − vc)Il and 2(Vh − vr + e) • current peaks I˙l. . The optimal solution is associated with the set of differ- ential equations: to obtain a solution that fulfills condition (26). The system ∂H∗ parameters given in Section III are reported. Furthermore, = b(vr − Vh − e)u + β + δ =e ˙ (18) ∂λ1 it is only considered the rising transient period, i.e, when ∗ 2 output voltage goes from the low voltage level to the high ∂H −λ2 R0 = =u ˙ = ν (19) voltage level. Therefore, the next boundary conditions are ∂λ2 2 Vh − vr + e ∗ 3 2 selected: ∂H (Vh − vr + e) 2 (λ2R0) q2 u = 4 2 + − 3 + ∂e R0 2(Vh vr + e) e(0) = vr − vc(0) (27) − − − ˙ 2q1e + buλ1 βλ1 = λ1 (20) e(τ)=0 (28) ∗ − 4 ∂H 2q2u(Vh vr + e) − − − ˙ = 2 + bλ1(vr Vh e)= λ2 (21) u(0) = 1 (29) ∂u R0 u(τ)= N (30) with the boundary conditions, The following values for the weighting constants are e(0) = vr − vc(0) (22) chosen3, e(τ)=0 (23) q1 =0.64 (31) u(0) = PMOS transistors switched on in t = 0 (24) q2 =0.32. (32) u(τ) = PMOS transistors switched on in t = τ (25) Using as initial guess and, the transversality condition 8 −10 t ∗ e(t)=0.3e H (τ)=0. (26) − 8 u(t)=24 − 23e 10 t Note that this is a nonlinear Boundary Value Problem 6 5 λ1(t)=10 t + 10 (BVP) with a transversality condition, since the final time 7 2 7 τ is unknown. λ2(t)= −3.2 · 10 t − 3.2 · 10 t + 100, ∗ Solving (18)–(26) yields e , from which, the optimal Note that this initial guess has a complex form and, thus, ∗ ∗ voltage evolution v = vr − e can be derived. This it has been difficult to obtain. As mentioned before, this is evolution can be employed as reference for the controllers a complex problem, and finding a solution has been very developed in Section III. involved. However, with the future numerical methods, it is expected that new tools for this kind of problem will be A. Numerical solution researched and developed. The nonlinear BVP (18)–(21) with the specified bound- The problem raised before: finding a solution for (18)– ary conditions (27)–(30) reaches the numerical solution (26) with (22)–(25) and (26), is a complex problem because shown in Fig. 13. Note that, the boundary conditions in it is a nonlinear BVP with a four dimensional character e∗ and u∗ are satisfied when τ = 23.3·10−9s. From e∗, the and it has a transversality condition. A numerical solution optimal voltage reference v∗ can be obtained. is proposed. Nevertheless, finding this numerical solution Figure 14 shows the evolution of H∗, whose value at is also an involved task. There is not so many tools that τ = 23.3·10−9s is close to zero, fulfilling the transversality cope with this kind of problems. In this case the Matlab condition. function ‘bvp4c’ has been employed. Function bvp4c [9] Observe that, this voltage reference has been computed combines the solution of Initial Value Problem (IVP) for for the rising transient period. For the falling transient Ordinary Differential Equations (ODEs) and the solution period, a similar procedure can be applied. of algebraic equations, being a non-shooting code. The nonlinear algebraic equations are solved iteratively by VIII. Adaptive feedback control design linearization, providing a suited initial guess after some iterations over a mesh and taking into account the bound- The Lyapunov’s controller (Section III) has been de- ary conditions. This is due to the fact that can have more signed under the assumption that the parameter β is than one solution and, thus, a guess for the desired solution known. In this section, an adaptive law is proposed in must be provided by designers, which includes an initial order to cope with the case when the load parameter β mesh for this desired solution. is unknown or/and changes slowly. Function bvp4c controls the error of the numerical Denote βˆ as the estimated value for the load parameter. solution and adapts the mesh in every iteration to obtain This estimated parameter will be used in control law (12) an accurate numerical solution with a modest number of instead of the real value, mesh points. Thus, obtaining a ‘residual’ error is common. βvˆ r +v ˙r + δ If the residual error is small, then the solution provided by uk = , (33) function bvp4c is a suited solution. b(Vh + e − vr) Function bvp4c is not directly applicable for the present 3As usual in optimal control problems, they have been chosen in problem since it cannot handle the transversality condi- a trial-and-error procedure, checking by simulations the solutions tion. Thus, this function has been used iteratively in order obtained. a) b) ˙ 2 0.4 25 This achieves W = −βe .
) Asymptotic stability is established by LaSalle’s invari- 20 0.3 V ˜ ( ance principle [18]. Consider the level set Wc = W (e, β) ≤
∗ 15 ∗ u e 0.2 c0 for sufficiently large c0 > 0, where W˙ ≤ 0. This set is 10
0.1 compact and positively invariant. 5 Note that W˙ =0 on e = 0. Furthermore, note from Eq. 0 0 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5 −8 −8 (34), that t(s) x 10 t(s) x 10
4 x 10 c) d) 8 1000 e(t) ≡ 0 ⇒ e˙(t) ≡ 0 ⇒ β˜(t) ≡ 0.
0 6 Therefore, the maximum invariant set in Wc with W˙ =0 −1000 ˜ 4 corresponds to the single point P1 = (e =0, β = 0), thus, ∗ 1 ∗ 2
λ λ −2000 every solution starting in Wc approaches the desired point 2 −3000 P1 as t → ∞. 0 −4000 0 0.5 1 1.5 2 2.5 0 0.5 1 1.5 2 2.5 −8 −8 t(s) x 10 t(s) x 10 IX. Evaluation of the advanced Lyapunov’s controller Fig. 13: Optimal numerical solution. a) error evolution, b) In this section, an evaluation of the advanced Lyapunov control evolution, c) λ1 evolution and d) λ2 evolution. controller with respect to performance cost and energy
12 saving is performed by doing some simulations. x 10 3.5 The resulting controller (13) after applying the optimal 3 voltage reference and the adaptive law is 2.5 N ¯ ˆ ∗ ∗ ∗ uk = sat1 round K1βvrk + K2(vrk − vrk−1 )+ K3 Φ 2 (37) ∗ n o ∗ ∗
H 1.5 where vrk and vrk−1 comes from the discretization of the optimal voltage reference, which has been previously ob- 1 ∗ tained. For implementation, the values of vrk can be stored 0.5 ¯ , Ts ˆ in a table. In the same way, K1 R0 and β is adapted 0 by the discrete-time approximation of the adaptation law −0.5 (36): 0 0.5 1 1.5 2 2.5 t(s) −8 ∗ x 10 ˜ ˜ − βk = βk 1 − K4vrk ek ∗ Fig. 14: H evolution. where K4 , Tsγ1. Some simulations of this controller in the DVS converter are performed by using the data reported in Section III. In Now, the closed-loop system of (10) with controller (33) order to perform more realistic tests, a more precise model yields for the load is considered in such a way that β depends on ˆ e˙ = −βe + βvr − βvr. (34) rL, i.e., it is time-varying. The bounds on β are: βmin = 1.38 · 107 for v = V and β =5.9 · 107 for v = V . As Assume that β is a constant parameter which involves c l max c h initial estimated values is taken βˆ = 0. β˙ = 0 and define Figure 15 shows the closed-loop performance by em- ˙ ˙ β˜ = β − β,ˆ β˜ = −β.ˆ ploying the optimal voltage reference and the adaptation mechanism. Note that when the adaptation mechanism is For the adaptive control system, the next Lyapunov implemented the system can achieve a similar performance function candidate is proposed to the case of known load. Although, the adaptive control introduces a delay in the system response, small current e2 β˜2 W = + , (35) peaks and faster transient periods are obtained. This 2 2γ simulation were performed in fixed-point by using 4 bits. where γ is a positive design parameter that may define the The adaptation of the load resistive component β is adaptation speed. shown in Fig. 16. Note that β approaches its real value, in Differentiating W with respect to time, yields spite of the fact that β is time-varying. Observe that the time-evolutions of βˆ and β are superimposed. ˜˙ 2 β W˙ = −βe + β˜ vre + . γ ! A. Performance cost Note that β > 0, as has been seen above. The adaptive Note that the adaptive controller increases the number law is designed by canceling the term in brackets, i.e.: of numerical operations. Table V summarizes the numer- ical operations and the bits that need the controllers ˙ ˙ βˆ = −β˜ = γvre. (36) presented in this paper. Addit Multipl. Acc. table bits Intuitive control 1 0 0 4 Lyapunov control 3 3 1 4 Adv. Lyap. control 4 6 1 4
a) 25 TABLE V: Implementation cost. 20 15 Note that this controller needs the same number of bits 10 NTrans for fixed-point implementation. The number of numerical 5 operation is affordable for SoC integration. Although the 0 advanced Lyapunov controller implementation is higher, 0 1 2 3 4 5 6 its performance is optimal: shorter transient period, min- t(s) −7 x 10 imum current peaks and load variability adaptation. b) 1.2
1.1 B. Energy evaluation 1 Another effect of the obtained voltage reference is the V(V) 0.9 reduction of the energy consumption, as is shown in Fig. 17. The accumulated dissipated energy in the rising tran- 0.8 sient period is summarized in Table VI. The energy saving 0 1 2 3 4 5 6 −7 with respect to the ‘intuitive controller’ is 93%. Likewise, t(s) x 10 c) the transient period is reduced to 23.3ns.
0.08 Dissip. Total Energy (µJ) Intuitive control 7.2 0.06 Lyapunov control 4.8 Advanced Lyapunov control 0.5 I(A) 0.04
0.02 TABLE VI: Dissipated total energy in rising transient period. 0 0 1 2 3 4 5 6 −7 t(s) x 10 −6 x 10 7 Fig. 15: DVS converter with the advanced Lyapunov controller and adaptation βˆ. Evolution of a) number of PMOS transistors 6 switched on, b) vr (green) and vc (blue) and c) current Il. 5 Intuitive 4 controller
3 Advanced Energy (J) Lyapunov Controller 2
7 x 10 1 6 0 0.5 1 1.5 2 2.5 3 t(s) −7 4 x 10 ˆ β Fig. 17: Dissipated energy in the rising transition. β, 2 Consequently, the reliability and efficiency of the ad- vanced Lyapunov controller, which uses the optimal volt- 0 0 1 2 3 4 5 6 age reference and the adaptation mechanism, has been −7 t(s) x 10 validated. Besides, the fact, that there exists a time- varying load parameter is not relevant for the right system Fig. 16: Time-evolution of βˆ (blue) and β (green) by using the advanced Lyapunov controller. performance. In addition, this controller has an important energy dissipation reduction as well as small current peaks and fast transient periods. And its implementation cost is affordable. C. Simulations using a more accurate model a) In this paper, some assumptions have been formulated. 20 These assumptions allow to obtain a model that is simple 10
NTrans 0 enough and is not more complicate than necessary for the 0 1 2 3 4 5 6 −7 DVS converter. From this model, a control structure with a t(s) x 10 moderate complexity and dimension should be developed. b) 1.2 However, there obviously are unmodeled components that 1 could make the control methods developed here invalid. V(V) 0.8 For this reason, in this section a robustness analysis is 0 1 2 3 4 5 6 t(s) −7 performed with a more real DVS model. x 10 c) In section II, it was considered that all transistors are modeled as an ideal resistance when they are switched 0.05 on. Now, it is considered that the transistor models are I(A) 0 0 1 2 3 4 5 6 composed by a resistance and a capacitance, in order t(s) −7 to model the dissipative effects as well as the switching x 10 periods of the PMOS transistors. Moreover, the transistors have different electrical characteristics. On the other side, Fig. 19: DVS model (38) with Ri and Ci random values, load it is considered that the sensor that measures the core (1)–(6) and advanced Lyapunov controller. voltage, vc, is modeled as a low-pass filter. These new characteristics are shown in Fig. 18. a) 20 vr DIGITAL 10
NTrans 0 CONTROL 0 1 2 3 4 5 6 t(s) −7 u x 10 k SENSOR b) 1.2 M1 R1 1 C1 M2 R2 V(V) 0.8 vc C2 0 1 2 3 4 5 6 Mn−1 Rn−1 t(s) −7 M R Cn−1 I v x 10 n N l( c) c) CN 0.05 IMPEDANCE I(A) 0 0 1 2 3 4 5 6 Vh Z(vc) −7 t(s) x 10
Fig. 20: DVS model (38) with Ri and Ci random values, load (1)–(6) and advanced Lyapunov controller. Fig. 18: A more real model of the DVS converter.
The system is now modeled as response, as mentioned in Section V. This controller is a very simple controller with a strong limitation: only one uk uk 1 dvc transistor can be switched on or off in every sampling time. Il(vc) = (Vh − vc) + Ci , (38) Ri dt i=1 i=1 The good results obtained with the controller developed in X X −10 this paper comes from applying control theory as well as where Ri ∈ [25, 37]Ω, and Ci ∈ [1, 5] · 10 F. Note the possibility to let such controller to switch more than that, the system response of this more accurate model with one transistor at once. the advanced Lyapunov controller developed in this paper In a performance evaluation presented in Section V to provides a robust behavior. the Lyapunov controller, it has been concluded that this Figure (19)–(20) show some simulations of (1)–(6) and controller offers a suited performance, from of point of view (38) where Ri and Ci ware assigned random values in the −10 −10 of the current peaks and energy consumption. Neverthe- ranges 25 ≤ Ri ≤ 37 and 10 ≤ Ci ≤ 5 · 10 . In less, this controller can be enhanced, if both optimal and these simulations, it is considered that the voltage sensor −8 adaptive control are developed. These control approaches presents a response time of 10 s. allow to diminish energy consumption and current peaks and deal with unknown load resistive parameter, respec- X. Conclusion tively. A robustness analysis shows the controller reliability In this work, a Lyapunov controller has been designed when it is applied to a more accurate model. for a DVS converter. This controller improves the per- The contribution highlights obtained with the advanced formance over the one used in [7] in terms of transient Lyapunov controller developed here are: 1) Energy saving: A method to obtain an optimal [2] D.Ma, Automatic Substrate Switching Circuit for On-Chip Adap- reference has been developed applying optimal control tive Power-Supply System. IEEE Trans.on Circuits and Systems II: Express Briefs, vol 54, no. 7, pages 641–645, 2007. theory [16], [15], [17]. However, the problem stated for [3] T.D. Burd and R.W. Brodersen, Design issues for dynamic this method presents a high complexity, because it is a voltage scaling. In Proc. IEEE International Symposium on Low BVP with transversally condition for a 4th-order optimal Power Electronics and Design (ISLPED),pages 9–14, 2000. [4] V. Kursun and S.G. Narendra and V.K. De and E.G.Friedman, problem. This numerical solution has been obtained by Low-voltage-swing monolithic DC-DC conversion. IEEE employing the Matlab function bvp4c. It has been a Trans.on Circuits and Systems II: Express Briefs, vol 51, no. 5, involved task, and it is expected that new mathematic pages 241–248, 2004. [5] P.Y. Wu and P.K.T. Mok, Comparative Studies of Common Fix- tools will be developed to make easier to compute this volt- Frequency Controls for Reference Tracking and Enhancement by age reference. This result achieves a reduction of current End-Point Prediction. IEEE Trans. on Circuits and Systems I: peaks and 90% energy saving with respect to the previous Regular Papers, vol 57, no. 11, pages 3023–3034, 2010. [6] P. Liu and J. Liu and L. Geng, A dynamic buck converter with Lyapunov controller. This fact makes that the total energy ultra fast response and low voltage ripples designed for DVS saving with respect to the ‘intuitive controller’ used in [7] systems. IEICE Electronics Express, vol 6, no. 21, pages 1490– is 93% reduction. 1496, 2009. [7] S. Miermont and P. Vivet and M. Renaudin, A Power Supply 2) Adaptation to parameter variability: In addition, an Selector for Energy-and Area-Efficient Local Dynamic Voltage adaptive strategy is developed in order to deal with the Scaling. Lectures Notes in Computer Science, vol 4644, 2007. load modeling error. Moreover, in order to prove the relia- [8] C. Albea and C. Canudas-de-Wit and F. Gordillo, Advanced Control Design for Voltage Scaling Converters. In Proc. IEEE bility of this adaptive controller, it has been introduced by Industrial Electronics (IECON), pages 79–84, 2008. simulation that parameter β is time-varying, as is common [9] L.F. Shampine and J. Kierzenka and M.W. Reichelt, Solv- in practice. ing boundary value problems for ordinary differential equa- tions in Matlab with bvp4c. Manuscript available at 3) Affordable performance cost: The suited perfor- http://200.13.98.241/ martin/irq/tareas1, 2000. mance resulting of applying the advanced Lyapunov con- [10] S.M. Kang and Y. Leblebici, CMOS Digital Integrated Circuits troller in the DVS converter has been shown in fixed-point Analysis & Design. CMOS Digital Integrated Circuits Analysis & Design, 2002. simulation by using 4 bits. The implementation and the [11] W.K. Chen, The VLSI Handbook. CRC Press, 2000. performance cost are affordable. [12] S. Miermont, Thesis:Contrˆole distribu´e de la tension d’alimentation dans les architectures GALS et proposition 4) Circuit/control co-design: Control theory can help d’un s´electeur dynamique d’alimentation. Institute National to improve the electronic design of the DVS system, as Polytechnique de Grenoble, 2008. improved, in this paper, the original reference signal im- [13] R.G. Langlois and D.M. Hanna and R.J. Anderson, Implement- ing preview control on an off-road vehicle with active suspension. plemented for the DVS converter in [7]. In addition, in the Symposium on Vehicle System Dynamics, 1992. paper, it is assumed that there exists a known number of [14] M. Johansson and A. Rantzer, Computation of piecewise PMOS transistors with the same electrical characteristic. quadratic Lyapunov functions for hybridsystems. IEEE Trans. on automatic control, vol 43, no. 4, pages 555–559, 1998. By means of using control theory (as a design tool), it is [15] F.L. Lewis and V.L. Syrmos Optimal control. Wiley- possible to design a reduced number of non-homogeneous Interscience, 1995. transistors (i.e. different resistance values) yielding similar [16] H. Kwakernaak and R. Sivan, Linear optimal control systems. Wiley-Interscience New York, 1972. closed-loop performance. The advantage is that the total [17] K. Zhou and J.C. Doyle and K. Glover, Robust and optimal number of PMOS transistors can be reduced. control. Prentice Hall Englewood Cliffs, NJ, 1996. In summary, a high-performance controller which does [18] H.K. Khalil, Nonlinear Systems. Prentice Hall, 2002. not need knowledge of the load resistive parameter has been obtained. This controller reduces energy consump- tion as well as current peaks, and transient periods. Its implementation is affordable and this study can improve the circuit design. These can enhance the future SoC miniaturization processes.
Acknowledgment This research was partially funded by the ARAVIS project, the French ministry of research and scholarship and by the Spanish MICINN-FEDER grant DPI2009- 09961. The authors want to thank Diego Puschini from CEA- LETI Minatec Campus for his valuable comments.
References
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