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Register Allocation II 15-745 Optimizing Compilers Spring 2006 David Koes School of Computer Science Outline • Review • Old Subtleties • New Subtleties School of Computer Science Review Build Simplify Coalesce Potential Spill Select Actual Spill School of Computer Science Build First compute live ranges v <- 1 - use both reaching definitions w <- v + 3 and liveness information x <- w + v v - live range defined by u <- v definition point x t <- u + x - ends when variable dies w <- w t <- t u <- u School of Computer Science Build Construct interference graph: - each node represents a live range v - edges represent live ranges that overlap - put in move edges between move operands move edge x w v <- 1 w <- v + 3 x <- w + v v u <- v w x u t <- u + x t <- w <- t u <- u t School of Computer Science Simplify Reduce the graph: k = 4 - remove non-move related, easy to color, nodes v - easy to color: degree < k - place on stack x w w u x t t School of Computer Science Coalesce Coalesce moves: k = 4 - conservatively combine operands of a move - subtlety: how? v Repeat Simplify -Detail: If both Simplify and Coalesce get uv uv stuck, start simplifying move related nodes w Simplify u x Coalesce t School of Computer Science What if we can’t simplify? Now what? k = 3 Be optimistic: - Put a node with degree ≥ k on stack v - Lose guarantee that anything we put on stack is colorable - If we’re lucky this node will still be x w colorable when popped from stack Be realistic: t - If unlucky, this node will have to be u spilled (allocated to memory) w - Mark as potential spill to avoid recomputation later t v School of Computer Science Select Pop a node from the stack k = 3 Assign it a color that does not v conflict with neighbors in interference graph x This will always be possible, x w unless the node is a potential spill u t If it is not possible spill u variable and rebuild graph w t v School of Computer Science Spilling v <- 1 Allocate w to memory w1 <- v + 3 location Mw Mw[]<- w1 w1 Spilled variables are allocated to w2 <- Mw[] w2 the stack in an area completely x <- w + v controlled by the compiler. 2 These memory locations are u <- v v special in that they can be optimized without concern for t <- u + x x memory aliasing issues. w3 <- Mw[] w <- w3 3 t <- t Now Start Over... <- u u ...compute live ranges... School of Computer Science Spilling to Memory • RISC Architectures – Only load and store can access memory • every use requires load • every def requires store • create new temporary for each location • CISC Architectures – can operate on data in memory directly • makes writing compiler easier(?), but isn’t necessarily faster – pseudo-registers inside memory operands still have to be handled School of Computer Science Rematerialization An alternative to spilling – Recompute value of variable instead of store/load to memory – Example: v <- 1 v <- 1 w <- v + 3 w <- v + 3 x <- w + v x <- w + v u <- v u <- v t <- u + x t <- u + x <- w w <- 4 <- t <- w <- u <- t <- u School of Computer Science Build Take Two v <- 1 w1 <- v + 3 k = 3 v Mw[]<- w1 w2 <- Mw[] x <- w2 + v x w1 w2 w3 u <- v t <- u + x w3 <- Mw[] u <- w3 <- t t <- u Recalculate interference graph School of Computer Science Simplify->Coalesce->Select k = 3 v x uv w1 w2 w3 u t School of Computer Science Review Build Simplify Coalesce Potential Spill Select Actual Spill School of Computer Science Old Subtleties 1. MOVE instructions 2. Merging live ranges 3. Splitting live ranges 4. Choosing potential spills 5. Allocating spill slots 6. Coalescing is bad School of Computer Science #1 MOVE Instructions • During liveness analysis, MOVE instructions should be treated specially t := s … Note that s and t don’t x <- ⊗(…s…) really interfere … y <- ⊗(…t…) Under what conditions can we remove the interference edge between s and t? School of Computer Science #2 Live Ranges & Merged Live Ranges A live range consists of a definition and all the points in a program (e.g. end of an instruction) in which that definition is live. – How to compute a live range? a = … a = … … = a Two overlapping live ranges for the same variable must be merged School of Computer Science Example Live Variables Reaching Definitions {} {} A = ... (A1) {A} {A } IF A goto L1 1 {A} {A1} {A} {A1} B = ... (B ) 1 L1: {A} {A } {A,B} {A1,B1} = A 1 C = ... (C1) {A,C} {A ,C } {B} {A1,B1} D = B (D ) 1 1 2 = A {D} {A ,B ,D } {C} {A1,C1} 1 1 2 D = ... (D ) 1 {D} {A1,C1,D1} {D} {A1,B1,C1,D1,D2} A = 2 (A2) Merge {A,D} {A2,B1,C1,D1,D2} {A,D} {A2,B1,C1,D1,D2} {D} {A ,B ,C ,D ,D } = A 2 1 1 1 2 ret D A live range consists of a definition and all the points in a program in which that definition is live. School of Computer Science Merging Live Ranges • Merging definitions into equivalence classes: – Start by putting each definition in a different equivalence class – For each point in a program • if variable is live, and there are multiple reaching definitions for the variable • merge the equivalence classes of all such definitions into a one equivalence class Merged live ranges are also known as “webs” School of Computer Science Example: Merged Live Ranges {} A = ... (A1) {A } IF A goto L1 1 {A1} {A1} B = ... (B ) 1 L1: {A } {A1,B1} = A 1 C = ... (C1) {A ,C } {B1} D = B (D ) 1 1 2 = A {D } {C1} 1,2 D = ... (D ) 1 {D1,2} {D1,2} A = 2 (A2) {A2,D1,2} {A2,D1,2} = A {D1,2} A has two “webs” ret D makes register allocation easier School of Computer Science Edges of Interference Graph Intuitively: Two live ranges (necessarily of different variables) may interfere if they overlap at some point in the program. Algorithm: At each point in program, enter an edge for every pair of live ranges at that point An optimized definition & algorithm for edges: For each defining inst i Let x be live range of definition at inst i For each live range y present at end of inst i insert an edge between x and y Faster? {D1,2} A = 2 (A2) Edge between A2 and D1,2 Better quality? {A2,D1,2} School of Computer Science Reducing Register Pressure Splitting variables into live ranges creates an interference graph that is easier to color Eliminate interference in a variable’s “dead” zones. Increase flexibility in allocation: can allocate same variable to different registers A = … B = … C = … … = A … = A D = B D = C A = D ret A School of Computer Science Live Range Splitting #3 Split a live range into smaller regions (by paying a small cost) to create an interference graph that is easier to color Eliminate interference in a variable’s nearly dead zones. Cost: Memory loads and stores Load and store at boundaries of regions with no activity # active live ranges at a program point can be > # registers Can allocate same variable to different registers Cost: Register operations a register copy between regions of different assignments # active live ranges cannot be > # registers School of Computer Science Examples Example 1: Example 2: A = …; B = …; FOR i = 0 TO 10 A = … FOR j = 0 TO 10000 A = A + ... (does not use B) B = … C = … FOR j = 0 TO 10000 … = A+B … = A+C B = B + ... C = … B = … (does not use A) … = B+C School of Computer Science One Algorithm • Observation: Spilling is absolutely necessary if not degree in graph – number of live ranges active at a program point > n • Apply live-range splitting before coloring – Identify a point where number of live ranges > n – For each live range active around that point • find the outermost “block construct” that does not access the variable – Choose a live range with the largest inactive region – Split the inactive region from the live range School of Computer Science #4 What to Spill? When choosing potential spill node want: – A node that makes graph easier to color • Fewer spills later – A node that isn’t “expensive” to spill • An expensive node would slow down the program if spilled – We can apply heuristics both when choosing potential spill nodes and when choosing actual spill nodes • not required to spill node that we popped off stack and can’t color School of Computer Science A Spill Heuristic Pick node (live range) n that minimizes: #10depth(def ) + #10depth(use ) def "n use "n degree(n) This heuristic prefers nodes that: – Are used infrequently – Aren’t used inside of loops – Have a large degree ! Could use any one of several other heuristics as well… School of Computer Science #5 Spill coalescing • On machines with few registers (like the Pentium), a lot of temps can get spilled – activation records get big – memory-to-memory moves get generated • For these reasons, it is good to do spill coalescing School of Computer Science Spill coalescing • Spill coalescing should be done right after the Select phase (ie, before generating spill code) – for all instructions of the form • MOVE(t1,t2) – where t1 and t2 are spilled: • if t1 and t2 don’t interfere, then coalesce • then, perform Simplify and Select to color all spilled nodes – the colors are stack slots School of Computer Science #6 Move Coalescing Eliminate moves by assigning the src and dest to the same register movl t1,t2 movl %eax,%eax addl %edx,%eax addl t3,t2 addl %edx,%eax When can we coalesce t1 and t2? How can we modify our interference graph to do this? School of Computer Science Example v <- 1 v w <- v + 3 x <- w + v v u <- v x w x t <- u + x w <- w t u <- t u <- u t First compute live ranges..
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