Application Note 101 July 2005 Minimizing Switching Regulator Residue in Linear Regulator Outputs

Banishing Those Accursed Spikes

Jim Williams

INTRODUCTION include noise reduction and minimization of residual input- Linear regulators are commonly employed to post-regulate derived artifacts appearing at the regulators output. It is switching regulator outputs. Benefi ts include improved this last category–residual input-derived artifacts–that is of stability, accuracy, transient response and lowered output concern. These high frequency components, even though impedance. Ideally, these performance gains would be small amplitude, can cause problems in noise-sensitive accompanied by markedly reduced switching regulator video, communication and other types of circuitry. Large generated ripple and spikes. In practice, all linear regulators numbers of and aspirin have been expended in encounter some diffi culty with ripple and spikes, particu- attempts to eliminate these undesired signals and their re- larly as frequency rises. This effect is magnifi ed at small sultant effects. Although they are stubborn and sometimes seemingly immune to any treatment, understanding their regulator VIN to VOUT differential voltages; unfortunate, because such small differentials are desirable to maintain origin and nature is the key to containing them. effi ciency. Figure 1 shows a conceptual linear regulator Switching Regulator AC Output Content and associated components driven from a switching Figure 2 details switching regulator dynamic (AC) output regulator output. content. It consists of relatively low frequency ripple at the The input fi lter is intended to smooth the ripple and switching regulator’s clock frequency, typically 100kHz to spikes before they reach the regulator. The output capaci- 3MHz, and very high frequency content “spikes” associ- tor maintains low output impedance at higher frequencies, ated with power transition times. The switching improves load transient response and supplies frequency regulator’s pulsed energy delivery creates the ripple. Filter compensation for some regulators. Ancillary purposes capacitors smooth the output, but not completely. The

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INPUT DC + RIPPLE SWITCHING SPIKES: HARMONIC CONTENT AND SPIKES FROM RIPPLE: TYPICALLY 100kHz to 3MHz APPROACHING 100MHz SWITCHING REGULATOR LINEAR PURE DC IN OUT REGULATOR OUTPUT

FILTER GND FILTER CAPACITOR CAPACITOR

AN101 F02 AN101 F01 Figure 2. Switching Regulator Output Contains Relitively Low Figure 1. Conceptual Linear Regulator and Its Filter Capacitors Frequency Ripple and High Frequency “Spikes” Derived From Theoretically Reject Switching Regulator Ripple and Spikes Regulators Pulsed Energy Delivery and Fast Transition Times

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AN101-1 Application Note 101 spikes, which often have harmonic content approaching The fi gure considers the regulation path with emphasis on 100MHz, result from high energy, rapidly switching power high frequency parasitics. It is important to identify these elements within the switching regulator. The fi lter capacitor parasitic terms because they allow ripple and spikes to is intended to reduce these spikes but in practice cannot propagate into the nominally regulated output. Additionally, entirely eliminate them. Slowing the regulator’s repeti- understanding the parasitic elements permits a measure- tion rate and transition times can greatly reduce ripple ment strategy, facilitating reduction of high frequency out- and spike amplitude, but magnetics size increases and put content. The regulator includes high frequency parasitic effi ciency falls1. The same rapid clocking and fast switch- paths, primarily capacitive, across its pass and ing that allows small magnetics size and high effi ciency into its reference and regulation amplifi er. These terms results in high frequency ripple and spikes presented to combine with fi nite regulator gain-bandwidth to limit high the linear regulator. frequency rejection. The input and output fi lter capacitors include parasitic inductance and resistance, degrading their Ripple and Spike Rejection effectiveness as frequency rises. Stray layout capacitance The regulator is better at rejecting the ripple than the very provides additional unwanted feedthrough paths. wideband spikes. Figure 3 shows rejection performance potential differences, promoted by ground path resistance for an LT1763 low dropout linear regulator. There is 40db and inductance, add additional error and also complicate attenuation at 100KHz, rolling off to about 25db at 1MHz. measurement. Some new components, not normally as- The much more wideband spikes pass directly through the sociated with linear regulators, also appear. These additions regulator. The output fi lter capacitor, intended to absorb the include ferrite beads or in the regulator input spikes, also has high frequency performance limitations. and output lines. These components have their own high The regulator and fi lter capacitors imperfect response, frequency parasitic paths but can considerably improve due to high frequency parasitics, reveals Figure 1 to be overall regulator high frequency rejection and will be ad- overly simplistic. Figure 4 restates Figure 1 and includes dressed in following text. the parasitic terms as well as some new components. Note 1: Circuitry employing this approach has achieved signifi cant harmonic content reduction at some sacrifi ce in magnetics size and effi ciency. See Reference 1.

80

70

60

50

40

30 IL = 500mA RIPPLE REJECTION (dB) 20 VIN = VOUT(NOMINAL) + 1V + 50mVRMS RIPPLE 10 COUT = 10µF CBYP = 0.01µF 0 10100 1k 10k100k 1M FREQUENCY (Hz)

AN101 F03

Figure 3. Ripple Rejection Characteristics for an LT1763 Low Dropout Linear Regulator Show 40dB Attenuation at 100kHz, Rolling Off Towards 1MHz. Switching Spike Harmonic Content Approaches 100MHz; Passes Directly From Input to Output

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AN101-2 Application Note 101 AN101 F04 MONITORING OSCILLOSCOPE LOAD * PARASITIC L AND R OUTPUT FILTER CAPACITOR PARASITIC C FERRITE BEAD OR REF PARASITIC LAYOUT PARASITIC C PARASITIC PARASITIC AND PSRR VS FREQUENCY) REGULATOR (FINITE GAIN-BANDWIDTH FILTER CAPACITOR *** = GROUND POTENTIAL DIFFERENCES PROMOTE OUTPUT HIGH FREQUENCY CONTENT AND CORRUPT MEASUREMENT. * L AND R PARASITIC C Figure 4. Conceptual Linear Regulator Showing High Frequency Rejection Parasitics. Finite GBW and PSRR vs Limit Regulator's High Frequency Rejection. Passive Components Attenuate Ripple and Spikes, But Parasitics Degrade Effectiveness. Layout Capacitance and Ground Potential Differences Add Errors, Complicate Measurement PARASITIC FERRITE BEAD OR INDUCTOR AND SPIKES FROM INPUT DC + RIPPLE SWITCHING REGULATOR an101f

AN101-3 Application Note 101 Ω 30 AN101 F05 LOAD + FB OUT C F µ 0.01 OUT LT1763-3 REGULATOR UNDER TEST Ω IN SD GND BYP 100 F + µ 22 IN FB C Q1 2N3866 5V + Ω 1 Ω SPIKE 100 Ω Ω L1 AMPLITUDE 750 750 1k 5V 74AHCO4 SPIKE PATH 15V –15V A1 Ω SPIKE GATING/BUFFER LT1210 + – 750 5V 2k* DC/RIPPLE PATH 2k* 5V –5V C1, 1/2 C2, 1/2 LT1712 LT1712 + + – – SPIKE GENERATOR F + µ SYNC. DIFFERENTIATOR/ 10 RIPPLE FREQUENCY AND AMPLITUDE CONTROL Ω 1k 50 Ω 20pF 50 1.2V –1.2V SYNC. OUTPUT RAMPS OR EQUIVILENT P-P TO 0.1V HP-3310A FUNCTION GENERATOR LOW F P-P µ OUTPUT BIAS INPUT 0.1 AMPLITUDE F 5V –5V µ REGULATOR DC TYP 3.3V to 3.5V A2 TYP 0.01V 100k* LT1006 0.01 + – = SEE TEXT 100k* = SEE TEXT IN OUT * = 1% METAL FILM L1 = 4 TURNS #26, 1/4" DIAMETER FB = FERRITE BEAD. FAIR-RITE 2743002122. INDUCTORS OPTIONAL. SEE TEXT = IN4148 C C Figure 5. Circuit Simulates Switching Regulator Output. DC, Ripple Amplitude, Frequency and Spike Duration/Height are Independantly Settable. Split Path Scheme Sums Wideband Spikes with DC and Ripple, Presenting Linear Regulator Simulated to Both Paths Switching Regulator Output. Function Generator Sources Waveforms 1k SPIKE WIDTH 2.5V LT1460 5V an101f

AN101-4 Application Note 101

Ripple/Spike Simulator paths are combined at the linear regulator input. The func- Gaining understanding of the problem requires observing tion generator’s settable ramp output (trace A, Figure 6) regulator response to ripple and spikes under a variety of feeds the DC/ripple path made up of power amplifi er A1 conditions. It is desirable to be able to independently vary and associated components. A1 receives the ramp input ripple and spike parameters, including frequency, harmonic and DC bias information and drives the regulator under content, amplitude, duration and DC level. This is a very test. L1 and the 1Ω resistor allow A1 to drive the regula- versatile capability, permitting real time optimization and tor at ripple frequencies without instability. The wideband sensitivity analysis to various circuit variations. Although spike path is sourced from the function generator’s there is no substitute for observing linear regulator per- pulsed “sync” output (trace B). This output’s edges are formance under actual switching regulator driven condi- differentiated (trace C) and fed to bipolar comparator C1- tions, a hardware simulator makes surprises less likely. C2. The comparator outputs (traces D and E) are spikes Figure 5 provides this capability. It simulates a switching synchronized to the ramps infl ection points. Spike width regulator’s output with independantly settable DC, ripple is controlled by complementary DC threshold potentials and spike parameters. applied to C1 and C2 with the 1k and A2. gating and the paralleled logic inverters present A commercially available function generator combines with trace F to the spike amplitude control. Follower Q1 sums two parallel signal paths to form the circuit. DC and ripple the spikes with A1’s DC/ripple path, forming the linear are transmitted on a relatively slow path while wideband regulator’s input (trace G). spike information is processed via a fast path. The two

A = 0.01V/DIV

B = 5V/DIV

C = 2V/DIV A = 0.2V/DIV D = 10V/DIV AC COUPLED ON 3.3VDC

E = 10V/DIV B = 0.01V/DIV AC COUPLED ON 3VDC F = 10V/DIV

G = 0.02V/DIV AC COUPLED- ON 3.3VDC 500ns/DIV 500ns/DIV

Figure 6. Switching Regulator Output Simulator Waveforms. Figure 7. Linear Regulator Input (Trace A) and Output (Trace Function Generator Supplies Ripple (Trace A) and Spike (Trace B) Ripple and Switching Spike Content for CIN = 1μF, C OUT = B) Path Information. Differentiated Spike Information's Bipolar 10μF. Output Spikes, Driving 10μF, Have Lower Amplitude, But Excursion (Trace C) is Compared by C1-C2, Resulting in Trace D Risetime Remains Fast and E Synchronized Spikes. Diode Gating/Inverters Present Trace F to Spike Amplitude Control. Q1 Sums Spikes with DC-Ripple Path From Power Amplifi er A1, Forming Linear Regulator Input (Trace G). Spike Width Set Abnormally Wide for Photographic Clarity

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AN101-5 Application Note 101

Linear Regulator High Frequency Rejection Evalua- Figure 9’s time and amplitude expansion of Figure 8’s tion/Optimization trace B permits high resolution study of spike character- The circuit described above facilitates evaluation and istics, allowing the following evaluation and optimization. optimization of linear regulator high frequency rejection. Figure 10 shows dramatic results when a ferrite bead 2. Spike amplitude drops about The following photographs show results for one typical immediately precedes CIN 5 . The bead presents loss at high frequency, severely set of conditions, but DC bias, ripple and spike charac- × limiting spike passage3. DC and low frequency pass unat- teristics may be varied to suit desired test parameters. tenuated to the regulator. Placing a second ferrite bead Figure 7 shows Figure 5’s LT1763 3V regulator response at the regulator output before C produces Figure 11’s to a 3.3V DC input with trace A’s ripple/spike contents, OUT trace. The bead’s high frequency loss characteristic further C = 1μF and C = 10μF. Regulator output (trace B) IN OUT reduces spike amplitude below 1mV without introducing shows ripple attenuated by a factor of ≈ 20. Output spikes 4. see somewhat less reduction and their harmonic content DC resistance into the regulator’s output path remains high. The regulator offers no rejection at the spike Figure 12, a higher gain version of the previous fi gure, rise time. The capacitors must do the job. Unfortunately, measures 900µV spike amplitude – almost 20× lower than the capacitors are limited by inherent high frequency loss without the ferrite beads. The measurement is completed terms from completely fi ltering the wideband spikes; trace by verifying that indicated results are not corrupted by B’s remaining spike shows no risetime reduction. Increas- common mode components or ground loops. This is done ing capacitor value has no benefi t at these rise times. by grounding the oscilloscope input near the measurement Figure 8 (same trace assignments as Figure 7) taken with point. Ideally, no signal should appear. Figure 13 shows COUT = 33μF, shows 5× ripple reduction but little spike this to be nearly so, indicating that Figure 12’s display is amplitude attenuation. realistic5.

A = 0.2V/DIV AC COUPLED ON 3.3V DC 0.005V/DIV AC COUPLED ON 3VDC B = 0.01V/DIV AC COUPLED ON 3VDC

500ns/DIV 200ns/DIV

Figure 8. Same Trace Assignments as Figure 7 with COUT Figure 9. Time and Amplitude Expansion of Figure 8’s Output Increased to 33μF. Output Ripple Decreases By 5×, But Spikes Trace Permits Higher Resolution Study of Spike Characteristics. Remain. Spike Risetime Appears Unchanged Trace Center-Screen Area Intensifi ed for Photographic Clarity in This and Succeeding Figures

Note 2: “Dramatic” is perhaps a theatrical descriptive, but certain types fi nd drama in these things. Note 3: See Appendix A for information on ferrite beads Note 4: Inductors can sometimes be used in place of beads but their limitations should be understood. See Appendix B. Note 5: Faithful wideband measurement at sub-millivolt levels requires special considerations. See Appendix C. an101f

AN101-6 Application Note 101

0.005V/DIV 0.005V/DIV AC COUPLED ON 3VDC AC COUPLED ON 3VDC

200ns/DIV 200ns/DIV

Figure 10. Adding Ferrite Bead to Regulator Input Increases High Figure 11. Ferrite Bead in Regulator Output Further Reduces Frequency Losses, Dramaticlly Attenuating Spikes Spike Amplitude

200 V/DIV μ A = 200μV/DIV AC COUPLED ON 3VDC

200ns/DIV 200ns/DIV

Figure 12. Higher Gain Version of Previous Figure Measures Figure 13. Grounding Oscilloscope Input Near Measurement 900μV Spike Amplitude–Almost 20× Lower Than Without Ferrite Point Verifi es Figure 12’s Results Are Nearly Free of Common Beads. Instrumentation Noise Floor Causes Trace Baseline Mode Corruption Thickening

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AN101-7 Application Note 101

REFERENCES 4. LT1763 Low Dropout Regulator Datasheet, Linear 1. Williams, Jim, “A Monolithic Switching Regulator with Technology Corporation 100µV Output Noise,” Linear Technology Corporation, Ap- 5. Hurlock, Les, “ABCs of Probes,” Tektronix Inc., 1990 plication Note 70, October 1997 (See Appendices B,C,D,H,I 6. McAbel, W.E., “Probe Measurements,” Tektronix Inc., and J) Concept Series, 1971 2. Williams, Jim, “Low Noise Varactor Biasing with Switch- 7. Morrison, Ralph, “Noise and Other Interfering Signals,” ing Regulators,” Linear Technology Corporation, Applica- John Wiley and Sons, 1992 tion Note 85, August 2000 (See pp 4-6 and Appendix C) 8. Morrison, Ralph, “Grounding and Shielding Techniques 3. Williams, Jim, “Component and Measurement Advances in Instrumentation,” Wiley-Interscience, 1986 Ensure 16-Bit Settling Time,” Linear Technology Corpora- tion, Application Note 74, July 1998 (See Appendix G) 9. Fair-Rite Corporation, “ Fair-Rite Soft Ferrites,” Fair-Rite Corporation, 1998

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AN101-8 Application Note 101

APPENDIX A

About Ferrite Beads 60 A ferrite bead enclosed conductor provides the highly desir- 0A 50 0.1A able property of increasing impedance as frequency rises. 0.2A

) 40

This effect is ideally suited to high frequency noise fi lter- Ω ing of DC and low frequency signal carrying conductors. 0.5A 30 The bead is essentially lossless within a linear regulator’s passband. At higher frequencies the bead’s ferrite material IMPEDENCE ( 20 interacts with the conductors magnetic fi eld, creating the loss characteristic. Various ferrite materials and geometries 10 result in different loss factors versus frequency and power 0 1 10 100 1000 level. Figure A1’s plot shows this. Impedance rises from FREQUENCY (MHz) Ω 0.01Ω at DC to 50Ω at 100MHz. As DC current, and hence DC = 0.01 AN101 FA1 constant magnetic fi eld bias, rises, the ferrite becomes less effective in offering loss. Note that beads can be “stacked” Figure A1. Impedance vs. Frequency at Various DC Bias Currents in series along a conductor, proportionally increasing their for a Surface Mounted Ferrite Bead (Fair-Rite 2518065007Y6). loss contribution. A wide variety of bead materials and Impedance is Essentially Zero at DC and Low Frequency, Rising Above 50Ω Depending on Frequency and DC Current. Source: physical confi gurations are available to suit requirements Fair-Rite 2518065007Y6 Datasheet. in standard and custom products.

APPENDIX B unwanted high frequency feedthrough. The inductors circuit board position may allow stray magnetic fi elds to Inductors as High Frequency Filters impinge its winding, effectively turning it into a Inductors can sometimes be used for high frequency fi lter- secondary. The resulting observed spike and ripple related ing instead of beads. Typically, values of 2µH to10µH are artifacts masquerade as conducted components, degrad- appropriate. Advantages include wide availability and better ing performance. effectiveness at lower frequencies, e.g., ≤100kHz. Figure Figure B2 shows a form of inductance based fi lter con- B1 shows disadvantages are increased DC resistance in structed from PC board trace. Such extended length traces, the regulator path due to copper losses, parasitic formed in spiral or serpentine patterns, look inductive at capacitance and potential susceptibility to stray switch- high frequency. They can be surprisingly effective in some ing regulator radiation. The copper loss appears at DC, circumstances, although introducing much less loss per reducing effi ciency; parasitic shunt capacitance allows unit area than ferrite beads. STRAY MAGNETIC TERMINAL ACCESSABLE WITH PC VIA. PARASITIC FIELD CAPACITANCE

USER USER TERMINAL TERMINAL PARASITIC PARASITIC AN101 FB2 RESISTANCE RESISTANCE AN101 FB1 Figure B1. Some Parasitic Terms of an Inductor. Parasitic Figure B2. Spiral and Serpentine PC Patterns are Sometimes Resistance Drops Voltage, Degrading Effi ciency. Unwanted Used as High Frequency Filters, Although Less Effective Than Capacitance Permits High Frequency Feedthrough. Stray Ferrite Beads Magnetic Field Induces Erroneous Inductor Current an101f

AN101-9 Application Note 101

APPENDIX C switching regulator spike measured within a continuous Probing Technique for Sub-Millivolt, Wideband Signal coaxial signal path. The spike’s main body is reasonably Integrity well defi ned and disturbances after it are contained. Fig- ure C2 depicts the same event with a 3 inch ground lead Obtaining reliable, wideband, sub-millivolt measurements connecting the coaxial shield to the circuit board ground requires attention to critical issues before measuring plane. Pronounced signal distortion and ringing occur. anything. A circuit board layout designed for low noise The photographs were taken at 0.01V/division sensitiv- is essential. Consider current fl ow and interactions in ity. More sensitive measurement requires proportionately power distribution, ground lines and planes. Examine the more care. effects of component choice and placement. Plan radiation management and disposition of load return currents. If the Figure C3 details use of a wideband 40dB gain pre-amplifi er circuit is sound, the board layout proper and appropriate permitting text Figure 12’s 200µV/division measurement. components used, then, and only then, may meaningful Note the purely coaxial path, including the AC coupling measurement proceed. capacitor, from the regulator, through the pre-amplifi er and to the oscilloscope. The coaxial coupling capacitor’s The most carefully prepared breadboard cannot fulfi ll its shield is directly connected to the regulator board’s ground mission if signal connections introduce distortion. Con- plane with the capacitor center conductor going to the nections to the circuit are crucial for accurate information regulator output. There are no non-coaxial measurement extraction. Low level, wideband measurements demand connections. Figure C4, repeating text Figure 12, shows care in routing signals to test instrumentation. Issues to a cleanly detailed rendition of the 900µV output spikes. In consider include ground loops between pieces of test Figure C5 two inches of ground lead has been deliberately equipment (including the ) connected to the introduced at the measurement site, violating the coaxial breadboard and noise pickup due to excessive test lead regime. The result is complete corruption of the waveform or trace length. Minimize the number of connections to presentation. As a fi nal test to verify measurement integrity, the circuit board and keep leads short. Wideband signals it is useful to repeat Figure C4’s measurement with the to or from the breadboard must be routed in a coaxial signal path input (e.g., the coaxial coupling capacitor’s environment with attention to where the coaxial shields center conductor) grounded near the measurement point tie into the ground system. A strictly maintained coaxial as in text Figure 13. Ideally, no signal should appear. environment is particularly critical for reliable measure- Practically, some small residue, primarily due to common 1 ments and is treated here . mode effects, is permissible. Figure C1 shows a believable presentation of a typical

0.01V/DIV 0.01V/DIV AC COUPLED ON 3VDC AC COUPLED ON 3VDC

200ns/DIV 200ns/DIV

Figure C1. Spike Measured Within Continuous Coaxial Signal Figure C2. Introducing 3" Non-Coaxial Ground Connection Path Displays Moderate Disturbance and Ringing After Main Causes Pronounced Signal Distortion and Post-Event Ringing Event

Note 1: More extensive treatment of these and related issues appears in the appended sections of References 1 and 2. Board layout considerations for low level, wideband signal integrity appear in Appendix G of Reference 3. an101f

AN101-10 Application Note 101

OSCILLOSCOPE 0.01V/DIV VERTICAL SENSITIVITY 100µV/DIV REFERRED TO INPUT

BNC CABLE HP461A AND COUPLING CAPACITOR AMPLIFIER CONNECTORS VOUT × HP-10240B 40dB

REGULATOR BNC V IN UNDER TEST CABLE

LOAD ZIN = 50Ω (AS DESIRED)

Ω 50 TERMINATOR AN101 FC3 HP-11048C OR EQUIVALENT

Figure C3. Wideband, Low Noise Pre-Amplifi er Permits Sub-Millivolt Spike Observation. Coaxial Connections Must be Maintained to Preserve Measurement Integrity

200μV/DIV 200μV/DIV AC COUPLED ON 3VDC AC COUPLED ON 3VDC

200ns/DIV 200ns/DIV

Figure C4. Low Noise Pre-Amplifi er and Strictly Enforced Coaxial Figure C5. 2 Inch Non-Coaxial Ground Connection at Signal Path Yield Text Figure 12's 900mVP-P Presentation. Trace Measurement Site Completely Corrupts Waveform Presentation Baseline Thickening Represents Pre-Amplifi er Noise Floor

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Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen- tation that the interconnection of its circuits as described herein will not infringe on existing patent rights. AN101-11 Application Note 101

an101f Linear Technology Corporation LT/TP 0705 500 • PRINTED IN USA AN101-12 1630 McCarthy Blvd., Milpitas, CA 95035-7417 (408) 432-1900 ● FAX: (408) 434-0507 ● www.linear.com © LINEAR TECHNOLOGY CORPORATION 2005