12.7 Ghz to 15.4 Ghz, Low Noise Amplifier ADL5724

12.7 GHz to 15.4 GHz, Low Noise Amplifier Data Sheet ADL5724

FEATURES FUNCTIONAL BLOCK DIAGRAM Frequency range: 12.7 GHz to 15.4 GHz ADL5724 Typical gain of >23.7 dB VCC1 VCC2 GND Low noise input 50Ω OUTN 100Ω SINGLE-ENDED DIFFERENTIAL Noise figure INPT OUTP

2.1 dB typical at 12.7 GHz RBIAS DNC 2.4 dB typical at 15.4 GHz High linearity input DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN. 14317-001 ≥2.0 dBm typical input third-order intercept (IIP3) Figure 1. −8 dBm input 1 dB compression point (P1dB) at 15.4 GHz Matched 50 Ω single-ended input Matched 100 Ω differential outputs 8-lead, 2.00 mm × 2.00 mm LFCSP microwave packaging APPLICATIONS Point to point microwave radios Instrumentation

Satellite communications (SATCOM) Phased arrays

GENERAL DESCRIPTION The ADL5724 is a narrow-band, high performance, low noise the past, required more expensive three-five (III-V) compounds amplifier (LNA) targeting microwave radio link receiver designs. process technology to achieve. The monolithic silicon germanium (SiGe) design is optimized for The ADL5721 and ADL5723 to ADL5726 family of narrow- microwave radio link bands ranging from 12.7 GHz to 15.4 GHz. band LNAs are each packaged in a tiny, thermally enhanced, The unique design offers a single-ended 50 Ω input impedance 2.00 mm × 2.00 mm LFCSP package. The ADL5721 and and provides a 100 Ω balanced differential output that is ideal ADL5723 to ADL5726 family operates over the temperature for driving Analog Devices, Inc., differential downconverters range of −40°C to +85°C. and radio frequency (RF) sampling analog-to-digital converters (ADCs). This LNA provides noise figure performance that, in

Rev. 0 Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. Technical Support www.analog.com ADL5724 Data Sheet

TABLE OF CONTENTS Features ...... 1 Typical Performance Characteristics ...... 6 Applications ...... 1 Theory of Operation ...... 8 Functional Block Diagram ...... 1 Applications Information ...... 9 General Description ...... 1 Layout ...... 9 Revision History ...... 2 Differential vs. Single-Ended Output ...... 9 Specifications ...... 3 Evaluation Board ...... 10 AC Specifications ...... 3 Initial Setup ...... 10 DC Specifications ...... 3 Results ...... 10 Absolute Maximum Ratings ...... 4 Basic Connections for Operation ...... 11 Thermal Resistance ...... 4 Outline Dimensions ...... 12 ESD Caution ...... 4 Ordering Guide ...... 12 Pin Configuration and Function Descriptions ...... 5

REVISION HISTORY 4/16—Revision 0: Initial Version

Rev. 0 | Page 2 of 12 Data Sheet ADL5724

SPECIFICATIONS AC SPECIFICATIONS

VCC1 = 1.8 V, VCC2 = 3.3 V, RBIAS = 442 Ω, TA = 25°C, ZSOURCE = 50 Ω, ZLOAD = 100 Ω differential, unless otherwise noted.

Table 1. Parameter Test Conditions/Comments Min Typ Max Unit FREQUENCY RANGE 12.7 15.4 GHz FREQUENCY = 12.7 GHz Gain (S21) 26.4 dB Noise Figure 2.1 dB

Input Third-Order Intercept (IIP3) Δf = 1 MHz, input power (PIN) = −30 dBm per tone 2.0 dBm Input 1 dB Compression Point (P1dB) −11 dBm Input Return Loss (S11) 10 dB Output Return Loss (S22) 10 dB FREQUENCY = 15.4 GHz Gain (S21) 23.7 dB Noise Figure 2.4 dB

Input Third-Order Intercept (IIP3) Δf = 1 MHz, PIN = −30 dBm per tone 4.0 dBm Input 1 dB Compression Point (P1dB) −8 dBm Input Return Loss (S11) 7 dB Output Return Loss (S22) 10 dB

DC SPECIFICATIONS

Table 2. Parameter Test Conditions/Comments Min Typ Max Unit POWER INTERFACE Voltage VCC1 1.65 1.8 1.95 V VCC2 3.1 3.3 3.5 V Quiescent Current vs. Temperature

VCC1 TA = 25°C 19.4 mA

−40°C ≤ TA ≤ +85°C 19.4 mA

VCC2 TA = 25°C 90.0 mA

−40°C ≤ TA ≤ +85°C 90.3 mA

Rev. 0 | Page 3 of 12 ADL5724 Data Sheet

ABSOLUTE MAXIMUM RATINGS THERMAL RESISTANCE Table 3. Parameter Rating θJA is thermal resistance, junction to ambient (°C/W), θJB is Supply Voltages thermal resistance, junction to board (°C/W), and θJC is thermal VCC1 2.25 V resistance, junction to case (°C/W). VCC2 4.1 V Table 4. Thermal Resistance Maximum Junction Temperature 150°C/W 1 1 1 Package Type θJA θJB θJC Unit Operating Temperature Range −40°C to +85°C 8-Lead LFCSP 39.90 23.88 3.71 °C/W Storage Temperature Range −55°C to +125°C 1 Lead Temperature Range (Soldering, 60 sec) −65°C to +150°C See JEDEC standard JESD51-2 for additional information on optimizing the thermal impedance for a printed circuit board (PCB) with 3 × 4 vias. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a ESD CAUTION stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability.

Rev. 0 | Page 4 of 12 Data Sheet ADL5724

PIN CONFIGURATION AND FUNCTION DESCRIPTIONS

VCC1 1 8 VCC2 GND 2 7 OUTN ADL5724 INPT 3 TOP VIEW 6 OUTP (Not to Scale) RBIAS 4 5 DNC

NOTES 1. DNC = DO NOT CONNECT. DO NOT CONNECT TO THIS PIN. 2. THE EXPOSED PAD MUST BE SOLDERED TO A LOW IMPEDANCE GROUND PLANE. 3. THE DEVICE NUMBER ON THE FIGURE DOES NOT INDICATE THE LABEL ON THE PACKAGE. REFER TO THE PIN 1 INDICATOR FOR THE PIN LOCATIONS. 14317-002 Figure 2. Pin Configuration

Table 5. Pin Function Descriptions Pin No. Mnemonic Description 1 VCC1 1.8 V Power Supply. It is recommended to place the decoupling capacitors as close to this pin as possible. 2 GND Ground. 3 INPT RF Input. This is a 50 Ω single-ended input. 4 RBIAS Resistor Bias. For typical operation, connect a 442 Ω resistor from RBIAS to GND. It is recommended to place the RBIAS resistor as close to the pin as possible. 5 DNC Do Not Connect. Do not connect to this pin. 6, 7 OUTP, OUTN RF Outputs. These pins are 100 Ω differential outputs. 8 VCC2 3.3 V Power Supply. It is recommended to place the decoupling capacitors as close to this pin as possible. EPAD (EP) Exposed Pad. The exposed pad must be soldered to a low impedance ground plane.

Rev. 0 | Page 5 of 12 ADL5724 Data Sheet

TYPICAL PERFORMANCE CHARACTERISTICS

35 10 TA = –40°C 3.1V/1.65V TA = +25°C 3.3V/1.8V T = +85°C 9 3.5V/1.95V 30 A 8

25 7

6 20 5

GAIN (dB) 15 4 NOSIE FIGURE (dB) FIGURE NOSIE 10 3

2 5 1

0 0 12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4 12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4 14317-006 FREQUENCY (GHz) 14317-003 FREQUENCY (GHz) Figure 3. Gain vs. Frequency for Various Temperatures Figure 6. Noise Figure vs. Frequency for Various Supply Voltages

35 0 3.1V/1.65V T = –40°C 3.3V/1.8V A TA = +25°C 3.5V/1.95V T = +85°C 30 –5 A

–10 25

–15 20 –20

GAIN (dB) 15 –25 INPUT P1dB (dBm) 10 –30

5 –35

0 –40 12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4 12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4

FREQUENCY (GHz) 14317-004 FREQUENCY (GHz) 14317-007 Figure 4. Gain vs. Frequency for Various Supply Voltages Figure 7. Input P1dB vs. Frequency for Various Temperatures

10 0 TA = –40°C 3.1V/1.65V T = +25°C 3.3V/1.8V 9 A TA = +85°C –5 3.5V/1.95V 8 –10 7 –15 6

5 –20

4 –25 INPUT P1dB (dBm) NOISE FIGURE (dB) FIGURE NOISE 3 –30 2 –35 1

0 –40 12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4 12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4 14317-005 FREQUENCY (GHz) FREQUENCY (GHz) 14317-008 Figure 5. Nosie Figure vs. Frequency for Various Temperatures Figure 8. Input P1dB vs. Frequency for Various Supply Voltages

Rev. 0 | Page 6 of 12 Data Sheet ADL5724

20 0 TA = –40°C TA = –40°C T = +25°C 15 A TA = +25°C TA = +85°C TA = +85°C –5 10

5 –10 0

–5 –15

–10

INPUT IP3 (dBm) –20 –15 INPUT RETURN LOSS (dB) –20 –25 –25

–30 –30 1 1 12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4 12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4 14317-009 FREQUENCY (GHz) FREQUENCY (GHz) 14317-0 Figure 9. Input IP3 vs. Frequency for Various Temperatures Figure 11. Input Return Loss vs. Frequency for Various Temperatures

20 0 3.1V/1.65V TA = –40°C 3.3V/1.8V 15 TA = +25°C 3.5V/1.95V TA = +85°C –5 10

5 –10 0

–5 –15

–10

INPUT IP3 (dBm) –20 –15

–20 OUTPUT RETURN LOSS (dB) –25 –25

–30 –30 12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4 12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4 14317-010 FREQUENCY (GHz) FREQUENCY (GHz) 14317-012 Figure 10. Input IP3 vs. Frequency for Various Supply Voltages Figure 12. Output Return Loss vs. Frequency for Various Temperatures

Rev. 0 | Page 7 of 12 ADL5724 Data Sheet

THEORY OF OPERATION The ADL5724 is a narrow-band, high performance, low noise This LNA is ideal for driving Analog Devices differential amplifier targeting microwave radio link receiver designs. The downconverters and RF sampling ADCs. monolithic SiGe design is optimized for microwave radio link The ADL5724 provides cost-effective noise figure performance bands ranging from 12.7 GHz to 15.4 GHz. without requiring more expensive III-V compounds process The unique design of the ADL5724 offers a single-ended 50 Ω technology. input impedance via the INPT pin, and provides a 100 Ω The ADL5724 is available in a 2.00 mm × 2.00 mm LFCSP package, balanced differential output via the OUTP and OUTN pins. and operates over the temperature range of −40°C to +85°C.

Rev. 0 | Page 8 of 12 Data Sheet ADL5724

APPLICATIONS INFORMATION LAYOUT 10 9 Solder the exposed pad on the underside of the ADL5724 to a low thermal and electrical impedance ground plane. This pad is 8 typically soldered to an exposed opening in the solder mask on 7 the evaluation board. Connect the ground vias to all other 6 ground layers on the evaluation board to maximize heat 5 dissipation from the device package. 4

NOSIE FIGURE (dB) 3

0 12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4

FREQUENCY (GHz) 14317-018 Figure 15. Noise Figure vs. Frequency

14317-016 10

Figure 13. Evaluation Board Layout for the ADL5724 Package 5

DIFFERENTIAL vs. SINGLE-ENDED OUTPUT 0 This section provides the test results that compare the ADL5724 –5 using a differential vs. a single-ended output. When using the –10 INPUT IP3 (dBm) IP3 INPUT device as a single-ended output, use the RFOP output on the –15 evaluation board and terminate RFON to 50 Ω. Note that the –20 converse can be done as well; however, doing so produces slightly different results from the plots shown in this section –25 –30 because there is some amplitude imbalance between the two 12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4 differential ports, RFOP and RFON. The output trace and FREQUENCY (GHz) 14317-021 connector loss were not deembedded for these measurements. Figure 16. Input IP3 vs. Frequency

35 0

30 –5

25 –10

–15 20

–20 15 GAIN (dB) GAIN –25

10 INPUT(dBm) P1dB –30

5 –35

0 –40 12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4 12.7 13.0 13.3 13.6 13.9 14.2 14.5 14.8 15.1 15.4

FREQUENCY (GHz) 14317-017 FREQUENCY (GHz) 14317-020 Figure 14. Gain vs. Frequency Figure 17. Input P1dB vs. Frequency

Rev. 0 | Page 9 of 12 ADL5724 Data Sheet

EVALUATION BOARD The ADL5724-EVALZ comes with an ADL5724 chip. It supports RESULTS a single 5 V supply for ease of use. Note that, for 5 V operation, Figure 18 shows the expected results when testing the the 3.3 V and 1.8 V test loops are for evaluation purposes only. ADL5724-EVALZ using the Rev. A version of the evaluation When using a 3.3 V or 1.8 V supply, remove the R1 and R2 board and its software. Note that future iterations of the software resistors from the evaluation board. Figure 19 shows the may produce different results. See the ADL5724 product page ADL5724-EVALZ lab bench setup. for the most recent software version. INITIAL SETUP Figure 18 shows the results of differential output for an input of To set up the ADL5724-EVALZ, take the following steps: 12.7 GHz at −15 dBm. The hybrid and board loss were not 1. Power up the ADL5724-EVALZ with a 5 V dc supply. The deembedded. 20 supply current of the evaluation board is approximately RESOLUTION BANDWIDTH = 20kHz VIDEO BANDWIDTH = 20kHz 1 114 mA, which is a combination of the VCC1 (1.8 V) and 10 SWEEP = 301ms (1001pts)

the VCC2 (3.3 V) currents. 0

2. Connect the signal generator to the input of theADL5724- –10 EVALZ. –20 3. Connect RFOP and RFON to a 180° hybrid that works within the 12.7 GHz to 15.4 GHz frequency range. –30 4. Connect the difference output of the hybrid to the –40 spectrum analyzer. The sum port of the hybrid must be –50 POWER OUTPUT (dBm)

terminated to 50 Ω. –60

See Figure 19 for the ADL5724-EVALZ lab bench setup. –70

–80 12.6512.66 12.67 12.68 12.6912.70 12.71 12.72 12.73 12.74 12.75 FREQUENCY (GHz) 14317-013 Figure 18. Test Results at 12.7 GHz

+5V DC GND

RFON SPECTRUM ANALYZER INPUT RFOP RF FREQUENCY GENERATOR

180° HYBRID FOR DIFFERENTIAL TO SINGLE ENDED OUTPUT 14317-014 Figure 19. ADL5724-EVALZ Lab Bench Setup

Rev. 0 | Page 10 of 12 Data Sheet ADL5724

BASIC CONNECTIONS FOR OPERATION Figure 20 shows the basic connections for operating the ADL5724 as it is implemented on the evaluation board of the device.

1.8V 3.3V

C5 C1 C2 C3 C4 C6 0.1UF 4.7NF 33PF 33PF 4.7NF 0.1UF

AGND AGND AGND AGND AGND AGND

OUTN 1 572X_RFON DUTA 25-146-1000-92 4 3 2 1 VCC1 VCC2 8 CNSRI2516100092_SW109201A5 2 7 RFIN GND OUTN 1 RFIN 3 6 AGND INPT OUTP 25-146-1000-92 4 RBIAS DNC 5 CNSRI2516100092_SW109201A52 3 4 PAD PAD OUTP 1 AGND ADL5724 572X_RFOP AGND RBIAS 25-146-1000-92 AGND 4 3 2 442 1.8V CNSRI2516100092_SW109201A5 5V 3P3V 1P8V GND AGND AGND R4 1 RED 1 RED 1 RED 1 BLK DNI 10K P1 R3 1 AGND 0 2 5V 3.3V 1.8V 69157-102HLF AGND

U1 U2 ADM7170ACPZ-1.8 ADM7172ACPZ-3.3 1.8V R1 1 8 5V 3.3V R2 1 8 5V VOUT VIN VOUT1 VIN1 2 7 2 7 0 VOUT VIN 0 VOUT2 VIN2 C7 5 C9 C10 5 C12 EN EN 4.7UF 4 4.7UF 4.7UF 4 4.7UF SS SS 3 3 AGND SENSE AGND AGND SENSE AGND

EP GND C8 EP GND C11 PAD 6 1000PF PAD 6 1000PF

AGND AGND AGND AGND 14317-015 Figure 20. Evaluation Board Schematic

Table 6. Evaluation Board Configuration Options Component Function Default Condition 3P3V, 1P8V, GND, 5V Power supplies and ground. Not applicable RFIN, 572X_RFOP, 572x_RFON Input, output, and data. Not applicable RBIAS 442 Ω for RBIAS. R1 = 442 Ω (0402) R1,R2 1.8 V and 3.3 V regulator connections. R2 = 0 Ω (0402) R3 Do not install (DNI). R3 = DNI (0402) R4 Pull-up or pull-down resistor. R4 = 10 kΩ (0402) C1 to C12 The capacitors provide the required decoupling of the supply C1, C4 = 4.7 nF (0402), related pins. C2, C3 = 33 pF (0402), C5, C6 = 0.1 µF (0402), C7, C9, C10, C12 = 4.7 µF (0603), C8,C11 = 1000 pF (0603) P1 Jumper to change bands, 2-pin jumper. Not applicable U1 ADM7170ACPZ-1.8 1.8 V regulator. Not applicable U2 ADM7172ACPZ-3.3 3.3 V regulator. Not applicable DUTA ADL5724 device under test (DUT). Not applicable

Rev. 0 | Page 11 of 12 ADL5724 Data Sheet

OUTLINE DIMENSIONS

1.70 1.60 2.10 1.50 2.00 SQ 1.90 0.50 BSC 5 8 0.15 REF

PIN 1 INDEX EXPOSED 1.10 AREA PAD 1.00 0.425 0.90 0.350 0.275 4 1 PIN 1 TOP VIEW BOTTOM VIEW INDICATOR (R 0.15)

0.60 FOR PROPER CONNECTION OF 0.55 0.05 MAX THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND 0.50 0.02 NOM FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. SEATING 0.30 PLANE 0.25 0.20 REF 0.20

01-14-2013-C Figure 21. 8-Lead Lead Frame Chip Scale Package [LFCSP] 2.00 mm × 2.00 mm Body, and 0.55 mm Package Height (CP-8-10) Dimensions shown in millimeters

ORDERING GUIDE Model1 Temperature Range Package Description Package Option ADL5724ACPZN-R7 −40°C to +85°C 8-Lead Lead Frame Chip Scale Package [LFCSP] CP-8-10 ADL5724-EVALZ Evaluation Board

1 Z = RoHS-Compliant Part.

Rev. 0 | Page 12 of 12