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Intel HLS Compiler Pro Edition Reference Manual Archives Intel® High Level Synthesis Compiler Pro Edition Reference Manual Updated for Intel® Quartus® Prime Design Suite: 20.1 Subscribe MNL-1083 | 2020.05.13 Send Feedback Latest document on the web: PDF | HTML Contents Contents 1. Intel® HLS Compiler Pro Edition Reference Manual......................................................... 5 2. Compiler......................................................................................................................... 6 2.1. Intel HLS Compiler Pro Edition Command Options...................................................... 6 2.2. Using Libraries in Your Component......................................................................... 10 2.3. Compiler Interoperability...................................................................................... 11 2.4. Intel HLS Compiler Hardware Model.......................................................................13 3. C Language and Library Support................................................................................... 15 3.1. Supported C and C++ Subset for Component Synthesis............................................ 15 3.2. C and C++ Libraries.............................................................................................15 3.3. Templated and Overloaded Functions......................................................................17 3.3.1. Templated Functions.................................................................................17 3.3.2. Overloaded Functions............................................................................... 18 3.3.3. Function Name Mapping............................................................................18 3.4. Intel HLS Compiler Pro Edition Compiler-Defined Preprocessor Macros........................ 19 4. Component Interfaces.................................................................................................. 20 4.1. Component Invocation Interface............................................................................ 20 4.1.1. Scalar Parameters....................................................................................21 4.1.2. Pointer and Reference Parameters.............................................................. 21 4.1.3. Interface Definition Example: Component with Both Scalar and Pointer Arguments.............................................................................................. 22 4.2. Avalon Streaming Interfaces..................................................................................23 4.3. Avalon Memory-Mapped Master Interfaces...............................................................25 4.3.1. Memory-Mapped Master Testbench Constructor............................................26 4.3.2. Implicit and Explicit Examples of Describing a Memory Interface.................... 27 4.3.3. Avalon Memory-Mapped Master Interfaces and Load-Store Units.................... 28 4.4. Slave Interfaces...................................................................................................34 4.4.1. Control and Status Register (CSR) Slave..................................................... 35 4.4.2. Slave Memories....................................................................................... 37 4.5. Unstable and Stable Component Parameters............................................................39 4.6. Global Variables...................................................................................................40 4.7. Structs in Component Interfaces............................................................................ 41 4.8. Reset Behavior.................................................................................................... 41 5. Component Memories (Memory Attributes).................................................................. 43 5.1. Static Variables....................................................................................................48 6. Loops in Components.................................................................................................... 51 6.1. Loop Initiation Interval (ii Pragma).......................................................................52 6.2. Loop-Carried Dependencies (ivdep Pragma)...........................................................53 6.3. Loop Coalescing (loop_coalesce Pragma)............................................................ 55 6.4. Loop Unrolling (unroll Pragma)........................................................................... 56 6.5. Loop Concurrency (max_concurrency Pragma)......................................................57 6.6. Loop Iteration Speculation (speculated_iterations Pragma)............................... 57 6.7. Loop Pipelining Control (disable_loop_pipelining Pragma)................................ 59 6.8. Loop Interleaving Control (max_interleaving Pragma)......................................... 60 Intel High Level Synthesis Compiler Pro Edition: Reference Manual Send Feedback 2 Contents 6.9. Loop Fusion........................................................................................................ 60 6.9.1. Loop Fusion Control (loop_fuse Pragma).................................................. 62 6.9.2. Loop Fusion Exemption (nofusion pragma)............................................... 64 7. Component Concurrency............................................................................................... 65 7.1. Serial Equivalence within a Memory Space or I/O..................................................... 65 7.2. Concurrency Control (hls_max_concurrency Attribute)......................................... 65 7.3. Component Pipelining Control (hls_disable_component_pipelining Attribute).....66 8. Arbitrary Precision Math Support.................................................................................. 68 8.1. Declaring ac_int Data Types................................................................................70 8.1.1. Important Usage Information on the ac_int Data Type................................71 8.2. Integer Promotion and ac_int Data Types............................................................. 71 8.3. Debugging Your Use of the ac_int Data Type......................................................... 72 8.4. Declaring ac_fixed Data Types............................................................................ 72 8.5. Declaring ac_complex Data Types........................................................................ 73 8.6. AC Data Types and Native Compilers...................................................................... 74 8.7. Declaring hls_float Data Types.......................................................................... 74 8.7.1. Operators and Return Types Supported by the hls_float Data Type............. 76 9. Component Target Frequency....................................................................................... 82 10. Systems of Tasks........................................................................................................ 83 10.1. Task Functions .................................................................................................. 84 10.2. Internal Streams................................................................................................90 10.3. System of Tasks Simulation................................................................................. 91 11. Libraries..................................................................................................................... 92 11.1. Object Libraries................................................................................................. 93 11.2. Creating an Object Library...................................................................................94 11.3. Creating Objects From HLS Code..........................................................................95 11.3.1. Creating an Object File From HLS Code..................................................... 95 11.3.2. Supported OpenCL Language Constructs................................................... 97 11.4. Creating Objects From RTL Code.......................................................................... 98 11.4.1. RTL Modules and the HLS Pipeline............................................................ 99 11.4.2. Creating an HLS-Library Object File from an RTL Module ........................... 115 11.5. Packaging Object Files Into a Library...................................................................116 12. Pipes......................................................................................................................... 118 12.1. The pipe Class and Its Use............................................................................... 119 13. Advanced Hardware Synthesis Controls.................................................................... 122 13.1. The hls_fpga_reg() Function......................................................................... 122 14. Intel High Level Synthesis Compiler Pro Edition Reference Summary....................... 124 14.1. Intel HLS Compiler Pro Edition i++ Command-Line Arguments............................... 124 14.2. Intel HLS Compiler Pro Edition Header Files......................................................... 126 14.3. Pro Edition Compiler-Defined Preprocessor Macros............................................... 129 14.4. Intel HLS Compiler Pro Edition Keywords............................................................. 130 14.5.
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