Williams CPU Tester Edward Cheung [email protected] rev. date: 8/15/2015 (change history on last page)

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1 Introduction ...... 5 1.1 Parts List ...... 6 2 Initial Checkout and use ...... 7 2.1 Switch Matrix Test Section ...... 7 2.2 Lamp Matrix Display ...... 8 2.3 Special Switches ...... 9 2.4 Solenoid Indicator bank ...... 10 2.5 Score display ...... 10 2.6 DVM and Mini-scope functions ...... 11 2.7 Connectors ...... 12 3 System 3 ...... 14 3.1 Interconnect Harness ...... 14 3.2 Troubleshooting procedure ...... 14 3.2.1 Connection to the Tester ...... 14 3.2.2 General Hookup...... 15 3.2.3 Power Hookup ...... 15 3.2.4 CPU Core...... 15 3.2.5 IO Peripherals ...... 16 4 System 4 ...... 19 4.1 Interconnect Harness ...... 19 4.2 Troubleshooting procedure ...... 19 4.2.1 Connection to the Tester ...... 19 4.2.2 General Hookup...... 19 4.2.3 Power Hookup ...... 19 4.2.4 CPU Core...... 20 4.2.5 IO Peripherals ...... 20 5 System 5 ...... 22 6 System 6 ...... 23 6.1 Interconnect Harness ...... 23 6.2 Troubleshooting procedure ...... 25 6.2.1 Connection to the Tester ...... 25 6.2.2 General Hookup...... 25 6.2.3 Power Hookup ...... 25 6.2.4 CPU Core...... 26 6.2.5 IO Peripherals ...... 26 7 System 7 ...... 29 7.1 Interconnect Harness ...... 29 7.2 Troubleshooting procedure ...... 30 7.2.1 Connection to the Tester ...... 30 7.2.2 General Hookup...... 30 7.2.3 Power Hookup ...... 30 7.2.4 CPU Core and Peripherals ...... 30 8 System 8 ...... 32 8.1 Interconnect harness ...... 32 8.2 Troubleshooting procedure ...... 32 8.2.1 Connection to the Tester ...... 32

Page 3 of 64 8.2.2 General Hookup...... 32 8.2.3 Power Hookup ...... 32 8.2.4 CPU Core...... 32 8.2.5 IO Peripherals ...... 33 9 System 9 ...... 34 9.1 Interconnect Harness ...... 34 9.2 Troubleshooting procedure ...... 36 9.2.1 Connection to the Tester ...... 36 9.2.2 General Hookup...... 36 9.2.3 Power Hookup ...... 36 9.2.4 CPU Core...... 36 9.2.5 IO Peripherals ...... 37 9.3 Testing Tips ...... 40 10 System 10 ...... 42 11 System 11 ...... 43 11.1 Interconnect Harness ...... 44 11.2 Troubleshooting procedure ...... 45 11.2.1 Connection to the Tester ...... 45 11.2.2 General Hookup...... 45 11.2.3 Power and Display Hookup ...... 45 11.2.4 Testing the board ...... 46 12 DataEast/Saga ...... 49 13 Appendix A. Board Schematic...... 50 14 Appendix B. Building the Harnesses...... 53 15 Appendix C. Common Questions ...... 63 16 Appendix D. Change History ...... 64

Copyright 2012 Edward Cheung

All rights reserved.

All materials contained in this document and firmware on the CPU Tester Microprocessor are protected by United States copyright law and may not be reproduced, distributed, transmitted, displayed, published or broadcast without the prior written permission from Edward Cheung. You may not alter or remove any trademark, copyright or other notice from copies of the content.

Page 4 of 64 1 Introduction

Figure 1. Layout of the Pinball CPU Tester. Top layer copper is in green. Silkscreen is in yellow. The tester consists of several independent sections. Each of these tests a different part of a Williams Pinball CPU board. Since other manufacturers share common design approaches, it is also possible that the tester can be used to test CPU boards from other pinball manufacturers. The user of the CPU board is urged to obtain a copy of the schematics of their pinball machine. There are various places, including the Internet Pinball Database ( www.ipdb.org ), where these can be obtained. A copy of the schematic of the CPU Tester can be found in Appendix A.

Page 5 of 64 1.1 Parts List Note that the Digikey part numbers below are given for reference. This vendor offers convenience and selection in return for somewhat higher prices. These are common parts (including the LCD display), and can be found for less from many separate sources. The assembler is urged to shop around if price is an issue. For example, simply Googling “4x20 LCD Display” will find many, and the lowest of which is $10 from www.eio.com (Oct 2010).

Name Ref Des Digikey Part # Price Quantity Subtotal 8x5 Dot Matrix Array D1, D2 160-1014-ND 6.51 2 13.02 Standard silicon diode (1N4001) D3 SW1, SW2, DIP Switch SW4 GH7143-ND 1.46 3 4.38 Tactile Switch SW3, SW7 P10892S-ND 0.38 2 0.76 26 pin Header Connector cables MSC26E-ND 0.58 1 0.58 10 pin Header Connector cables MSC10E-ND 0.4 24 9.6 10 pin Board Header J7, J8 etc A26525-40-ND 2.65 2 5.3 10Mhz Crystal Y15 CTX408-ND 0.75 1 0.75 LED Bar SW5, SW6 160-1066-ND 1.4 2 2.8 0.156" CPU Board Connector (Molex) cables A24119-ND 0.57 22 12.54 20x4 LCD Display Panel L1 73-1249-ND 17.72 1 17.72 LCD panel header WM6414-ND 0.78 1 0.78 CPU 40-pin socket U1 ED2136-ND 2.64 1 2.64 10 Conductor Ribbon Cable (25') cables MC10M-25-ND 11.96 1 11.96 Various Resistors and caps see below 3 1 3 5 Volt regulator U2 296-1365-ND 0.4 1 0.4 Power Supply (5V/+12V/-12V) 15 1 15 CPU Chip (PIC 16F877) U1 PIC16F877-20I/P-ND 75 1 75 Circuit Board 100 1 100 276.23

Values of Capacitors and Resistors (1/4 W unless noted) R1- open R2- open R3- 10k R4- 200 R5- jumper R6- open R7- open R8- 240k R9- 180 (1/2 Watt) R10- 100k R11- 100k R12- 15k

C1- 0.1uF (ceramic) C2- open C3- open C4- 0.1uF (ceramic)

Page 6 of 64 2 Initial Checkout and use It is recommended for the user to set up the CPU and Tester at an ESD-safe work area. At the very least, a wrist strap and ESD map are highly suggested. This will protect the two boards from static discharge. The CPU tester itself requires only +12V. The 5V and –12V outputs from the power are used only for the CPU board under test. For the first second when power is applied to the tester, the LCD display should display an image as shown in Figure 2.

Figure 2. Power-on banner on the LCD display. The score display of the four players is shown in the respective location of the above diagram. In addition, the four digit displays for Credit and Ball are shown in the location with the “cr” and “bl” characters respectively. Once the user has connected the tester to the CPU board using the cabling that is called out in the next few chapters, the user can proceed to checking out the CPU board. In this manual, the individual switch on the CPU Tester is designated by SWx-y, where x is the SW reference designator and “y” is the individually numbered switch within the bank. For example SW1-1 is the top most switch of SW1.

2.1 Switch Matrix Test Section A Pinball Playfield contains many switches to detect the advancement of the game. In order to reduce the number of wires needed, these switches are connected in the form of 8x8 matrix. At the intersection of each row and column line, a switch can be located in series with a diode. The top left section of the CPU Tester tests the switch matrix by allowing the user to activate any of the possible 64 switch combinations. The row and column of the desired switch is selected by turning on the appropriate DIP switch on SW1 and SW2.

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Figure 3. Selecting an entry in the switch matrix. The switch bank SW1 selects the row of the switch matrix closure, and SW2 selects the column. The arrangement matches the switch matrix graphically. For example, in Figure 3, to close the switch corresponding to “Middle Ball Ramp”, we close SW2-3 and SW3-2. Note that orientation of the DIP switches can be either way, as it only affects if UP is ON, or UP is OFF.

2.2 Lamp Matrix Display Similar to the switch matrix, lamps are connected in a row-column matrix format. All possible 64 lamps are shown on the top 8 rows of the 8x10 LED dot matrix display in the top right corner of the tester. A sample of a Lamp Matrix and how it maps to the LED matrix is shown in Figure 4.

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Figure 4. The Lamp Matrix. The top left LED corresponds to Row 1 and Column 1. J1 and J2 on the CPU tester correspond to the row and column lines from the CPU board. The overall brightness of the matrix can be controlled by changing the value of R9 (smaller value => brighter). If a particular row or column of LEDs does not light up, refer to the troubleshooting section of your particular CPU board.

2.3 Special Switches A special class of solenoids are activated directly by a switch on the playfield. Thus instead of the switch being read by the machine’s CPU via the switch matrix, these solenoids are fired directly (via logic circuits) when the switch is closed by contact with the pinball. These switch circuits are tested by the Special Solenoid section in the top middle part of the CPU tester board. The Special Solenoid circuit is selected by the SW4 DIP switch bank. If everything is working correctly, one of the LEDs on the 20-element LED bar will light up. The pushbutton switch SW7, SW4-1, and SW4-2 are used to replace the three switches on the coin door. These are used by the CPU in diagnostic mode.

Switch Function Comment SW7 Advance ON/Closed = Press down SW4-1 Mem Protect ON/Closed = Door Closed SW4-2 Auto/Manual ON/Closed = Auto Table 1. Location of the coin door buttons. The Mem Protect function is implemented as the coin door switch, and its function is enforced in hardware. When the coin door is closed, writing to certain or all parts of memory is inhibited (depends on the board generation). This is meant to prevent a person from breaking into the bottom of the machine to change the settings. Once the door is open writing to these locations (now by the software) is allowed. This feature exists only in System 6 and later. The Auto/Manual switch also functions as a “Mode” switch on the latter generations of CPU boards. For example, on System 9, this switch is used to select either diagnostic or audit functions. More about the diagnostic switches’ wiring can be found here in the cabinet wiring schematic: http://www.firepowerpinball.com/downloads/CabinetWiring.pdf

Page 9 of 64 2.4 Solenoid Indicator bank The 20-LED bank in the bottom right serves to indicate the status of each of the solenoid drivers from the CPU board. The brightness of this bank can be changed by adjusting the value of R4 (smaller value => brighter LEDs). The precise mapping of these 20 LEDs depends on the CPU board being tested. This mapping is explained in the individual chapters of this manual pertaining to the CPU board. September 2010 Addendum: As can be seen in Sheet 3 of the Schematic, there is an unconnected solenoid on Solenoid 3 (J5) and Solenoid 2 (J4). These two are not used on System 9, which is the original system for which this tester was designed. Since the construction, I added two more LEDs in the prototyping area next to the LED banks to be able to display these outputs (as shown below).

Figure Figure 5. Two additional LEDs (green) for the missing solenoid circuits. The LEDs are wired just like the LED bank ones. Their anode goes to the R4 resistor (junction with LED bank), and the cathode goes to the spare solenoid connections. J5 pin 8 in one case, and J4 pin 9 in the other. August 2012 Addendum: Note the location of the pin 1 of the LED bank is in the top left of this image. The pin 1 dot on the board may be on the lower-right, but the part’s pin 1 is in the top left.

2.5 Score display The Microprocessor along with the LCD panel are used to read the numeric/alphanumeric data from the CPU board. This data is used to indicate diagnostic data, player score and identification. With the exception of System 11, this information is encoded into Binary Coded Decimal (BCD). For example, the four-digit BCD code of “0010” is used to signify the “2” digit. By selecting the appropriate strobe line this digit appears in the correct display location. This information is read by the Microprocessor, and then displayed on the LCD panel.

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Figure 6. The LCD panel during normal use. Note the DVM function on the bottom line.

2.6 DVM and Mini-scope functions Another function is the built-in Digital Volt Meter (DVM), which uses the bottom line of the LCD display to show the voltage that is present at the terminal marked “DVM” next to the 8x10 LED dot matrix. When the DVM input terminal is floating, the displayed reading should be around 2.5V. This is because the input is biased to the center of the operating range of the A/D converter, and floats to this value when unconnected. The full input range of the DVM is approximately +17.5V to –12.5V, and the input impedance is approximately 300K Ohms. When SW7 is pressed and held for greater than 2-3 seconds, the Microprocessor enters into Mini- Scope mode. In this mode, a simple oscilloscope is emulated on the LCD panel.

Figure 7. LCD display in Mini-scope mode. The input range of the Mini-scope function is the same as the DVM mode: 17.5V to –12.5V. This voltage range of 30V is distributed among the 32 pixels in the vertical direction. As a result, the vertical resolution is slightly less than 1V/pixel. Thus in the case of Figure 7, the signal that is displayed has a peak-peak amplitude of about 5 Volts. Due to limitations with the display, only 20 samples can be shown in the horizontal direction. One sample is taken every 50 milliseconds, and it thus takes 2 seconds to refresh the screen. It would have been possible to have the processor sample at a much faster rate (as fast as 100,000 samples/second), however, the data is refreshed too fast to be seen by the user.

Page 11 of 64 2.7 Connectors The connectors on the CPU tester board are mainly 2x5 row “header” type connectors. The connectors that plugs into the board are available as IDC (Insulation Displacement Connectors), and mating these to a ribbon cable is quick and easy. Pin 1 on the board is marked by both a yellow dot on the silkscreen layer, and a square pad on the layout.

Pin 10 Pin 9

Pin 8 Pin 7

Pin 6 Pin 5

Pin 4 Pin 3

Pin 2 Pin 1

Figure 8. Pin numbering for the board connector. Pin 1 is a square pad, and marked by a yellow dot. The wiring for the other end of the ribbon cable is given in a table that is specific for each CPU board. An example is shown below in Table 2.

Pin # Function CPU Pin # CPU Tester J1 (Lamp Row) 1 Row 1 1J6 1 2 Row 2 1J6 2 Pin Pin 3 Row 3 1J6 3 Number on Number on 4 N/C 1J6 4 CPU Tester CPU Board 5 Row 4 1J6 5 6 Row 5 1J6 6 7 Row 6 1J6 7 8 Row 7 1J6 8 9 Row 8 1J6 9 10 N/C 1J6 10 Table 2. Example wiring table for one of the harnesses. The name of the harness can be seen at the top of the table. In this case, this is the Lamp Row, which is J1 on the tester. Column 1 of the table (left most) shows the pin number on the Tester, and column 5 (right most) shows the corresponding pin on the CPU board. We see that in this case, all the pins run from J1 (CPU tester) to 1J6 (CPU Board) in a 1-to-1 fashion. The names of each of the pins are shown in the “Function” column. This latter information is provided as a reference only, and is not needed to build the cable.

Page 12 of 64 Note that it is not necessary to connect all 12 cables between the tester and the CPU board. For example, if all you wish to do is checkout only the lamp matrix, you just need to power the CPU board, connect the lamp power and ground connections, and connect the two lamp matrix (row and column) connectors. The interconnect harness for System 3 through 7 are the almost identical. In addition, this set of 12 has four harnesses that can be borrowed from the System 9 set. Furthermore, to handle System 11, only one special cable is needed beyond the System 9 set. So the bottom-line is that the full set of harnesses to test System 3 through 11 consists of 8+12+1 = 21 harnesses. Information regarding which tools and techniques to use in order to build the cables is given in the Appendix. In the next few chapters, specific information will be given for the various CPU boards that can be tested with the CPU tester.

Page 13 of 64 3 System 3 Per the Internet Pinball Database ( www.ipdb.org ), machines that used this System are: • Contact • Disco Fever • Hot Tip • Lucky Seven • World Cup It is presumed that the CPU and Driver boards are tested as one unit. Power is provided to the Driver Board via the interboard connector. Due to the large variety of System 3 machines, the method of navigating the diagnostic menu may be different for your ROM set.

Figure 9. System 4 board under test.

3.1 Interconnect Harness For the interconnect harness, please see Chapter 6.1.

3.2 Troubleshooting procedure

3.2.1 Connection to the Tester Within each connector that interconnects the Tester and the CPU board, all lines have the same type of interface. For this reason, damage is very unlikely to occur if the user makes a mistake when building the harnesses. Also, it is unlikely for damage to occur if the user accidentally swaps two connectors. The one exception is the power interface. For a System 3 CPU board, this is 1P2. The user is urged to check the voltages on this connector prior to mating to the CPU board (as described below).

Page 14 of 64 3.2.2 General Hookup Following the information in Section 6.1, connect all header connectors of the Tester to the CPU board (except for 1P2 – Power). Note that pin 1 on each connector in the Tester is marked with a white dot on the silkscreen.

3.2.3 Power Hookup The power hookup procedure is as follows: • Mate the power harness to the Tester J10. • On the other end, identify pin 1 of the CPU board connector. Do not mate to the CPU board at this time. • Power up the Tester by plugging in the power supply to the AC power source. • Verify that the LCD panel powers up. The bottom left corner of the display will show the System configuration. If it does not read “Sys37”, power cycle the tester while pressing down the “Advance” (SW7) button. Every time you do that it advances to the next system type.

• Using the DVM function, and the pinout of the CPU board from the System 3 manual, test the voltage at EACH pin on the 1P2 plug. Verify that it is the correct voltage and polarity. Note that the –12V power is not used by this CPU board, but is routed to it to maintain commonality with other CPU boards. • Once all is correct, power down the tester. • Plug 1P2 into the CPU and Driver board. • The Tester and CPU board are ready for use.

3.2.4 CPU Core The user must first verify that the CPU core (CPU, RAM, ROM, etc) is functional by using the built-in POST (Power On Self Test) of the CPU board. For “Disco Fever” this starts on page 16 of the manual. Please consult the manual for your particular machine on how to perform this test. If any section fails, the user is recommended to consult the following excellent repair guides that have been developed: • Clay’s site: http://www.marvin3m.com/fix.htm • Leon’s site: http://www.flipper-pinball-fan.be • System 4 schematics: http://www.firepower.2ya.com/0-checklist.html If the board boots correctly into attract mode, the following display is typical of System 3 through 7:

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Figure 10. Attract mode display. Player 1 cycles between high score and 0. The other players stay at zero. Note the 6 digit displays. If a power-on reset is needed, one way is to momentarily short C1 on the CPU board. This is the large capacitor near the crystal in the corner of the board.

Figure 11. Location of the C1 capacitor (red). Short this for a reset.

3.2.5 IO Peripherals After the CPU has passed all its POSTs. The diagnostic should then be run. This includes display, sound, switches, solenoids, etc.

Page 16 of 64 3.2.5.1 Score Displays • All switches of SW4 OFF (SW4-2 in Manual/Down). • Enter diagnostic mode by pressing the Diagnostics Switch on the CPU. • Press SW7 (Advance) once. • All digits should indicate all 0’s. • Press SW7 and verify digits advance to next higher value. o If one digit does not respond, check the corresponding strobe line on 1P7 or 1P6 with the mini-scope mode probe at the CPU board connector (exposed part of the metal clip in the connector that connects to the board). If that is pulsing, you have a poor connection at the CPU board connector. If no pulsing is present, the problem is on the CPU board. o If the numeric series is corrupted, one of the BCD signals on 1P5 is not working correctly. Probe the board connector. If all lines are pulsing, there is a problem with the Tester harness. If one line is not pulsing, there is a CPU board problem. o More will be added when I get a detailed schematic of a System 3 board.

3.2.5.2 Solenoids • All switches of SW4 OFF (SW4-2 in Manual/Down). • Enter diagnostic mode by pressing the Diagnostics Switch on the CPU. • SW4-2 ON (Auto/Up). • Press SW7 until “02” show up on the credit display. • Note that as each solenoid is tested, a different LED in the Solenoid bank will flash. The Ball display should show which solenoid is being pulsed. • Using the table below, verify all the Special Solenoids. SW4 Switch Solenoid LED Comment 3 None None 4 None None 5 16 Left Jet Bumper 6 19 Right Kicker 7 17 Right Jet Bumper 8 18 Left Kicker • The bottom row of the 8x10 LED matrix indicates the Flipper power, they will be ON if flipper power is enabled. • More will be added when I receive a detailed schematic of a System 3 board.

3.2.5.3 Lamp Matrix • All switches of SW4 OFF (SW4-2 in Manual/Down). • Enter diagnostic mode by pressing the Diagnostics Switch on the CPU. • SW4-2 ON (Auto/Up). • Press SW7 until “01” show up on the credit display. • The entire top 8x8 lamp matrix should flash dimly. The bottom row should be bright. o More will be added when I obtain a schematic of the System 3 driver board.

3.2.5.4 Switch Matrix • All switches of SW4 OFF (SW4-2 in Manual/Down).

Page 17 of 64 • Enter diagnostic mode by pressing the Diagnostics Switch on the CPU. • SW4-2 ON (Auto/Up). • Press SW7 until “03” show up on the credit display. • All switches on SW1 and SW2 OFF. • SW1-1 ON • SW2-1 ON • Press SW3. • The credit display should show “1”. • Keeping SW2-1 closed, close each switch on SW1 in turn and press SW3. Verify that the credit display goes up by 8 on each successive column switch. Note that SW2-8 may not be checked by the CPU. • Perform the same test for SW1. Thus, keeping one switch on SW2 closed, and go down SW1 to verify the credit display. • Note that you can simulate multiple switches being closed by closing several column and row switches. All entries in the matrix on the intersection of the closed switches will indicate closed. o If any switch does not work, check other switches in the same column and row as the non-responsive one.

Page 18 of 64 4 System 4 Per the Internet Pinball Database ( www.ipdb.org ), machines that used this System are: • Flash (also used System 6 boards) • Phoenix • Pokerino • Stellar Wars It is presumed that the CPU and Driver boards are tested as one unit. Power is provided to the Driver Board via the interboard connector.

4.1 Interconnect Harness For the interconnect harness, see Chapter 6.1.

4.2 Troubleshooting procedure

4.2.1 Connection to the Tester Within each connector that interconnects the Tester and the CPU board, all lines have the same type of interface. For this reason, damage is very unlikely to occur if the user makes a mistake when building the harnesses. Also, it is unlikely for damage to occur if the user accidentally swaps two connectors. The one exception is the power interface. For a System 4 CPU board, this is 1P2. The user is urged to check the voltages on this connector prior to mating to the CPU board (as described below).

4.2.2 General Hookup Following the information in Section 6.1, connect all header connectors of the Tester to the CPU board (except for 1P2 – Power). Note that pin 1 on each connector in the Tester is marked with a white dot on the silkscreen.

4.2.3 Power Hookup The power hookup procedure is as follows: • Mate the power harness to the Tester J10. • On the other end, identify pin 1 of the CPU board connector. Do not mate to the CPU board at this time. • Power up the Tester by plugging in the power supply to the AC power source. • Verify that the LCD panel powers up. The bottom left corner of the display will show the System configuration. If it does not read “Sys37”, power cycle the tester while pressing down the “Advance” (SW7) button. Every time you do that it advances to the next system type. • Using the DVM function, and the pinout of the CPU board from the System 4 manual, test the voltage at EACH pin on the 1P2 plug. Verify that it is the correct voltage and polarity. Note that the –12V power is not used by this CPU board, but is routed to it to maintain commonality with other CPU boards. • Once all is correct, power down the tester. • Plug 1P2 into the CPU and Driver board. • The Tester and CPU board are ready for use.

Page 19 of 64 4.2.4 CPU Core The user must first verify that the CPU core (CPU, RAM, ROM, etc) is functional by using the built-in POST (Power On Self Test) of the CPU board. For “Flash” this starts on page 22 of the manual. Please consult the manual for your particular machine on how to perform this test. If any section fails, the user is recommended to consult the following excellent repair guides that have been developed: • Clay’s site: http://www.marvin3m.com/fix.htm • Leon’s site: http://www.flipper-pinball-fan.be/ • System 4 schematics: http://www.firepower.2ya.com/0-checklist.html

4.2.5 IO Peripherals After the CPU has passed all its POSTs. The diagnostic should then be run. This includes display, sound, switches, solenoids, etc.

4.2.5.1 Score Displays • All switches of SW4 OFF (SW4-2 in Manual/Down). • Place the CPU into diagnostic mode by pressing the button on the right side of the board. • Press SW7 (Advance) twice. • All digits should indicate all 0’s. • Press SW7 and verify digits advance to next higher value. o If one digit does not respond, check the corresponding strobe line on 1P7 or 1P6 with the mini-scope mode probe at the CPU board connector (exposed part of the metal clip in the connector that connects to the board). If that is pulsing, you have a poor connection at the CPU board connector. o If the numeric series is corrupted, one of the BCD signals on 1P5 is not working correctly. Probe the board connector. If all lines are pulsing, there is a problem with the Tester harness. If one line is not pulsing, there is a CPU board problem.

4.2.5.2 Solenoids • All switches of SW4 OFF (SW4-2 in Manual/Down). • Place the CPU into diagnostic mode by pressing the button on the right side of the board. • Press SW7 (Advance) twice. • SW4-2 ON (Auto/Up). • Press SW7 until “02” show up on the credit display. • Note that as each solenoid is tested, a different LED in the Solenoid bank will flash. The Ball display should show which solenoid is being pulsed. • Using the table below, verify all the Special Solenoids. SW4 Switch Solenoid LED Comment 3 None Not used 4 None Left Kicker Switch 5 16 Left Jet Bumper 6 19 Right Kicker 7 17 Right Jet Bumper 8 18 Lower Jet Bumper

Page 20 of 64 • Note that the Left Kicker Switch is not wired to an LED, but its output is available on the unused pad near J4. The DVM or Mini-Scope function can be used to test it. If desired, the user can hard-wire this to an unused LED in the Tester, such as Solenoid LED 20. • The bottom row of the 8x10 LED matrix indicates the Flipper power, they will be ON if flipper power is enabled. • This completes the section on Solenoid tests.

4.2.5.3 Lamp Matrix • All switches of SW4 OFF (SW4-2 in Manual/Down). • Place the CPU into diagnostic mode by pressing the button on the right side of the board. • Press SW7 (Advance) twice. • SW4-2 ON (Auto/Up). • Press SW7 until 01 is indicated on the credit display. • The entire top 8x8 lamp matrix should flash dimly. The bottom row should be bright. o More will be added when I obtain a schematic of the System 4 driver board.

4.2.5.4 Switch Matrix • All switches of SW4 OFF (SW4-2 in Manual/Down). • Place the CPU into diagnostic mode by pressing the button on the right side of the board. • Press SW7 (Advance) twice. • SW4-2 ON (Auto/Up). • Press SW7 until 03 is indicated in the credit display. • All switches on SW1 and SW2 OFF. • SW1-1 ON • SW2-1 ON • Press SW3. • The credit display should show “1”. • Keeping SW2-1 closed, close each switch on SW1 in turn and press SW3. Verify that the credit display goes up by 8 on each successive column switch. Note that SW2-8 may not be checked by the CPU. • Perform the same test for SW1. Thus, keeping one switch on SW2 closed, and go down SW1 to verify the credit display. • Note that you can simulate multiple switches being closed by closing several column and row switches. All entries in the matrix on the intersection of the closed switches will indicate closed. o If any switch does not work, check other switches in the same column and row as the non-responsive one. o More will be added when I obtain a schematic of the System 4 driver board.

Page 21 of 64 5 System 5 Per the Internet Pinball Database ( www.ipdb.org ), no machines used this System.

Page 22 of 64 6 System 6 Per the Internet Pinball Database ( www.ipdb.org ), machines that used this System are: • Blackout • Firepower • • Lazer Ball • Scorpion • Time Warp • Tri Zone • Alien Poker • Flash (also used System 4) It is presumed that the CPU and Driver boards are tested as one unit. Power is provided to the Driver Board via the interboard connector.

6.1 Interconnect Harness

Pin # Function CPU Pin # Pin # Function CPU Pin # CPU Tester J1 (Lamp Row) CPU Tester J4 (Solenoid 2) 1 Row 1 2P7 1 1 Sol9 2P9 9 2 Row 2 2P7 2 2 Sol10 2P9 7 3 Row 3 2P7 3 3 N/C 4 N/C 4 Sol11 2P9 1 5 Row 4 2P7 4 5 Sol12 2P9 2 6 Row 5 2P7 5 6 Sol13 2P9 3 7 Row 6 2P7 6 7 Sol14 2P9 4 8 Row 7 2P7 9 8 Sol15 2P9 5 9 Row 8 2P7 8 9 Sol16 2P9 6 10 N/C 10 N/C

CPU Tester J2 (Lamp Col) CPU Tester J5 (Special Sol) 1 Col 1 2P5 8 1 N/C 2P12 1 2 Col 2 2P5 9 2 Flipper 2P12 2 3 Col 3 2P5 6 3 Sol 19 2P12 3 4 Col 4 2P5 7 4 Sol 18 2P12 4 5 N/C 5 N/C 6 Col 5 2P5 3 6 Sol 20 2P12 6 7 Col 6 2P5 5 7 Sol 17 2P12 7 8 Col 7 2P5 1 8 Sol 21 2P12 8 9 Col 8 2P5 2 9 Sol 22 2P12 9 10 N/C 10 N/C

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Pin # Function CPU Pin # Pin # Function CPU Pin # CPU Tester J7 (Strobe I) CPU Tester J10 (Power) 1 Strobe 8 1P7 1 1 GND 1P2 1 2 Strobe 7 1P7 2 2 GND 1P2 2 3 Strobe 6 1P7 3 3 GND 1P2 3 4 Strobe 5 1P7 4 4 +V5 1P2 4 5 Strobe 4 1P7 5 5 +V5 1P2 5 6 Strobe 3 1P7 6 6 +V5 1P2 6 7 Strobe 2 1P7 7 7 N/C 1P2 7 8 Strobe 1 1P7 9 8 -12V 1P2 8 9 N/C 9 +12V 1P2 9 10 N/C 10 N/C

CPU Tester J8 (Strobe II) CPU Tester J12 (Special Sw) 1 Strobe 16 1P6 1 1 N/C 2 Strobe 15 1P6 2 2 Switch 3 2P13 2 3 Strobe 14 1P6 3 3 Switch 2 2P13 3 4 Strobe 13 1P6 4 4 Switch 4 2P13 4 5 Strobe 12 1P6 5 5 Switch 1 2P13 5 6 Strobe 11 1P6 6 6 N/C 7 N/C 1P6 7 N/C 8 Strobe 10 1P6 8 8 Switch 5 2P13 8 9 Strobe 9 1P6 9 9 Switch 6 2P13 9 10 N/C 10 N/C

CPU Tester J9 (BCD) CPU Tester J13 (Switch Row) 1 D1 1P5 1 1 Row 8 2P3 1 2 C1 1P5 2 2 Row 7 2P3 3 3 B1 1P5 3 3 Row 6 2P3 4 4 A1 1P5 4 4 N/C 5 D2 1P5 5 5 Row 5 2P3 5 6 N/C 6 Row 4 2P3 6 7 C2 1P5 7 7 Row 3 2P3 7 8 B2 1P5 8 8 Row 2 2P3 8 9 A2 1P5 9 9 Row 1 2P3 9 10 N/C 10 N/C

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Pin # Function CPU Pin # Pin # Function CPU Pin # CPU Tester J3 (Solenoid 1) CPU Tester J6 (Switch Col) 1 Sol1 2P11 4 1 Col 1 2P2 9 2 N/C 2 Col 2 2P2 8 3 Sol2 2P11 5 3 Col 3 2P2 7 4 Sol3 2P11 7 4 Col 4 2P2 6 5 Sol4 2P11 8 5 Col 5 2P2 5 6 Sol5 2P11 9 6 N/C 7 Sol6 2P11 3 7 Col 6 2P2 3 8 Sol7 2P11 2 8 Col 7 2P2 2 9 Sol8 2P11 1 9 Col 8 2P2 1 10 N/C 10 N/C

In addition, make the following connections: CPU Tester Name CPU Board J14 Lamp Pwr 2P4-1 J15 Lamp Gnd 2P6-1 J16 Sol Gnd 2P10-1 J17 Auto/Man 1P4-4 J18 Advance 1P4-3 J19 Mem Protect 1P4-1

See Section 2.3 for more information on the Diagnostic buttons (Mem Protect, etc). Note that the harness for J5, J8, J9, J10, and J12 are 1-to-1, and thus can borrowed from the System 9 set. This means that the minimum set of harnesses is 7 (for System 3 through 7) + 12 (for System 9) + 1 (for System 11) = 20 total.

6.2 Troubleshooting procedure

6.2.1 Connection to the Tester Within each connector that interconnects the Tester and the CPU board, all lines have the same type of interface. For this reason, damage is very unlikely to occur if the user makes a mistake when building the harnesses. Also, it is unlikely for damage to occur if the user accidentally swaps two connectors. The one exception is the power interface. For a System 3-6 CPU board, this is 1P2. The user is urged to check the voltages on this connector prior to mating to the CPU board (as described below).

6.2.2 General Hookup Following the information in Section 6.1, connect all header connectors of the Tester to the CPU board (except for 1P2 – Power). Note that pin 1 on each connector in the Tester is marked with a white dot on the silkscreen.

6.2.3 Power Hookup The power hookup procedure is as follows: • Mate the power harness to the Tester J10.

Page 25 of 64 • On the other end, identify pin 1 of the CPU board connector. Do not mate to the CPU board at this time. • Power up the Tester by plugging in the power supply to the AC power source. • Verify that the LCD panel powers up. The bottom left corner of the display will show the System configuration. If it does not read “Sys37”, power cycle the tester while pressing down the “Advance” (SW7) button. Every time you do that it advances to the next system type. • Using the DVM function, and the pinout of the CPU board from the System 6 manual, test the voltage at EACH pin on the 1P2 plug. Verify that it is the correct voltage and polarity. Note that the –12V power is not used by this CPU board, but is routed to it to maintain commonality with other CPU boards. • Once all is correct, power down the tester. • Plug 1P2 into the CPU and Driver board. • The Tester and CPU board are ready for use.

6.2.4 CPU Core The user must first verify that the CPU core (CPU, RAM, ROM, etc) is functional by using the built-in POST (Power On Self Test) of the CPU board. For “Alien Poker” this starts on page 3 of the manual. Please consult the manual for your particular machine on how to perform this test. If any section fails, the user is recommended to consult the following excellent repair guides that have been developed: • Clay’s site: http://www.marvin3m.com/fix.htm • Leon’s site: http://www.flipper-pinball-fan.be/ • System 6 schematics: http://www.firepower.2ya.com/0-checklist.html

6.2.5 IO Peripherals After the CPU has passed all its POSTs. The diagnostic should then be run. This includes display, sound, switches, solenoids, etc.

6.2.5.1 Score Displays • All switches of SW4 OFF (SW4-2 in Manual/Down). • Reset the CPU by power cycling the board. • Press SW7 (Advance) twice. • All digits should indicate all 0’s. • Press SW7 and verify digits advance to next higher value. o If one digit does not respond, check the corresponding strobe line on 1P7 or 1P6 with the mini-scope mode probe at the CPU board connector (exposed part of the metal clip in the connector that connects to the board). If that is pulsing, you have a poor connection at the CPU board connector. o If the numeric series is corrupted, one of the BCD signals on 1P5 is not working correctly. Probe the board connector. If all lines are pulsing, there is a problem with the Tester harness. If one line is not pulsing, there is a CPU board problem.

6.2.5.2 Solenoids • All switches of SW4 OFF (SW4-2 in Manual/Down). • Reset the CPU by power cycling the board.

Page 26 of 64 • Press SW7 twice. • SW4-2 ON (Auto/Up). • Press SW7. • SW4-2 OFF. • Press SW7 until “02” show up on the credit display (Solenoid test). • Note that as each solenoid is tested, a different LED in the Solenoid bank will flash. The Ball display should show which solenoid is being pulsed. • Using the table below, verify all the Special Solenoids (this table TBD). SW4 Switch Solenoid LED Comment 3 4 5 6 7 8 • The bottom row of the 8x10 LED matrix indicates the Flipper power, they will be ON if flipper power is enabled. • This completes the section on Solenoid tests.

6.2.5.3 Lamp Matrix • All switches of SW4 OFF (SW4-2 in Manual/Down). • Reset the CPU by power cycling the board. • Press SW7 twice. • SW4-2 ON (Auto/Up). • Press SW7 until “01” shows up on the credit display (Lamp test). • The entire top 8x8 lamp matrix should flash dimly. The bottom row should be bright. o More will be added when I obtain a schematic of the System 6 driver board.

6.2.5.4 Switch Matrix • All switches of SW4 OFF (SW4-2 in Manual/Down). • Reset the CPU by power cycling the board. • Press SW7 twice. • SW4-2 ON (Auto/Up). • Press SW7. • SW4-2 OFF (Manual/Down). • Press SW7 twice. • SW4-2 ON (Auto/Up). • Press SW7 (now in Switch test mode). • All switches on SW1 and SW2 OFF. • SW1-1 ON • SW2-1 ON • Press SW3. • The credit display should show “1”.

Page 27 of 64 • Keeping SW2-1 closed, close each switch on SW1 in turn and press SW3. Verify that the credit display goes up by 8 on each successive column switch. Note that SW2-8 may not be checked by the CPU. • Perform the same test for SW1. Thus, keeping one switch on SW2 closed, and go down SW1 to verify the credit display. • Note that you can simulate multiple switches being closed by closing several column and row switches. All entries in the matrix on the intersection of the closed switches will indicate closed. o If any switch does not work, check other switches in the same column and row as the non-responsive one.

Page 28 of 64 7 System 7 Per the Internet Pinball Database ( www.ipdb.org ), machines that used this System are: • Barracora • • Cosmic Gunfight • Defender • Firepower II • Hyperball • Joust • Jungle Lord • Laser Cue • Pharaoh • Solar Fire • Star Light • Time Fantasy • Warlock It is presumed that the CPU and Driver boards are tested as one unit. Power is provided to the Driver Board via the interboard connector.

7.1 Interconnect Harness The interconnect table for a System 7 machine is identical to a System 3-6 except the reference designators on the CPU side have “J” instead of “P”. Thus J1 (Tester) connects to 2J7 (CPU) instead of 2P7.

Figure 12. System 7 board (note 7-segment display) in test.

Page 29 of 64 7.2 Troubleshooting procedure

7.2.1 Connection to the Tester Within each connector that interconnects the Tester and the CPU board, all lines have the same type of interface. For this reason, damage is very unlikely to occur if the user makes a mistake when building the harnesses. Also, it is unlikely for damage to occur if the user accidentally swaps two connectors. The one exception is the power interface. For a System 7 CPU board, this is 1J2. The user is urged to check the voltages on this connector prior to mating to the CPU board (as described below).

7.2.2 General Hookup Following the information in Section 6.1, connect all header connectors of the Tester to the CPU board (except for 1J2 – Power). Note that pin 1 on each connector in the Tester is marked with a white dot on the silkscreen.

7.2.3 Power Hookup The power hookup procedure is as follows: • Mate the power harness to the Tester J10. • On the other end, identify pin 1 of the CPU board connector. Do not mate to the CPU board at this time. • Power up the Tester by plugging in the power supply to the AC power source. • Verify that the LCD panel powers up. The bottom left corner of the display will show the System configuration. If it does not read “Sys37”, power cycle the tester while pressing down the “Advance” (SW7) button. Every time you do that it advances to the next system type. • Using the DVM function, and the pinout of the CPU board from the System 7 manual, test the voltage at EACH pin on the 1J2 plug. Verify that it is the correct voltage and polarity. Note that the –12V power is not used by this CPU board, but is routed to it to maintain commonality with other CPU boards. • Once all is correct, power down the tester. • Plug 1J2 into the CPU and Driver board. • The Tester and CPU board are ready for use.

7.2.4 CPU Core and Peripherals A good online manual to use for troubleshooting System 7 is the one for Firepower II. This describes the sequence of button pushes needed to navigate the test menu. The procedure below was tested on a Firepower II board. For background info, the user is recommended to consult the following excellent repair guides that have been developed: • Clay’s site: http://www.marvin3m.com/fix.htm • Leon’s site: http://www.flipper-pinball-fan.be/ • System 7 schematics: http://www.blackknightpinball.com/ Due to hardware differences in the display board, the tester’s LCD display maps per the photograph below. The top row will show the ‘ball’ display, and the bottom row shows the ‘credits’.

Page 30 of 64 Ball Tens Units

Tens Units Credits

Figure 13. LCD display with System 7 boards.

Page 31 of 64 8 System 8 Per the Internet Pinball Database ( www.ipdb.org ), machines that used this System are: • Pennant Fever (a pitch and bat machine, schematic courtesy of William Courtney )

8.1 Interconnect harness See Section 9.1 to interconnect the CPU tester with the CPU board. Exceptions are the following: • Do not connect 1J20 and 1J2 to the CPU tester. These will have high voltage on them if 1J18 is connected to a power source. • 1J12 is a 6- pin connector on the System 8, but the full 9- pin connector of a System 9 harness set can be used (pin 1 to pin 1).

8.2 Troubleshooting procedure

8.2.1 Connection to the Tester Within each connector that interconnects the Tester and the CPU board, all lines have the same type of interface. For this reason, damage is very unlikely to occur if the user makes a mistake when building the harnesses. Also, it is unlikely for damage to occur if the user accidentally swaps two connectors. The one exception is the power interface. For a System 8 CPU board, this is 1J17. The user is urged to check the voltages on this connector prior to mating to the CPU board (as described below).

8.2.2 General Hookup Following the information in Section 9.1, connect all header connectors of the Tester to the CPU board (except for 1J17 – Power). Note that pin 1 on each connector in the Tester is marked with a white dot on the silkscreen.

8.2.3 Power Hookup The power hookup procedure is as follows: • Mate the power harness to the Tester J10. • On the other end, identify pin 1 of the CPU board connector. Do not mate to the CPU board at this time. • Power up the Tester by plugging in the power supply to the AC power source. • Verify that the LCD panel powers up. • Using the DVM function, and the pinout of the CPU board from the System 8 manual, test the voltage at EACH pin on the 1J17 plug. Verify that it is the correct voltage and polarity. • Once all is correct, power down the tester. • Plug into the CPU 1J17 connector. • The Tester and CPU board are ready for use.

8.2.4 CPU Core The user must first verify that the CPU core (CPU, RAM, ROM, etc) is functional by using the built-in POST (Power On Self Test) of the CPU board. This is run on power up, or can be initiated by pressing SW1 (the one near the CPU chip). IC44, the 7-segment LED display will then show the result in a numeric code. The meaning of this code can be found in the machine’s manual. If any

Page 32 of 64 section fails, the user is recommended to consult the following excellent repair guides that have been developed: • Clay’s site: http://www.marvin3m.com/fix.htm • Leon’s site: http://www.flipper-pinball-fan.be/

8.2.5 IO Peripherals At this point, the diagnostic process requires the use of the numeric display. However, the incompatibility of 1J2 and 1J20 (high voltage) to the CPU tester means that the operator needs to find another way to decode the numeric data display. One option is to simply connect the plasma displays to the CPU board, and then power up 1J18 with a high voltage supply. Unfortunately, as of the writing of this manual, no inexpensive and convenient +/- 90V supply could be identified.

Page 33 of 64 9 System 9 Per the Internet Pinball Database ( www.ipdb.org ), machines that used this System are: • Comet • •

9.1 Interconnect Harness Each of the harnesses between the CPU board and the tester connect one-to-one to each other. In other words, pin 1 connects to pin 1, etc.

Pin # Function CPU Pin # Pin # Function CPU Pin # CPU Tester J1 (Lamp Row) CPU Tester J4 (Solenoid 2) 1 Row 1 1J6 1 1 Sol9 1J12 1 2 Row 2 1J6 2 2 Sol10 1J12 2 3 Row 3 1J6 3 3 N/C 1J12 3 4 N/C 1J6 4 4 Sol11 1J12 4 5 Row 4 1J6 5 5 Sol12 1J12 5 6 Row 5 1J6 6 6 Sol13 1J12 6 7 Row 6 1J6 7 7 Sol14 1J12 7 8 Row 7 1J6 8 8 Sol15 1J12 8 9 Row 8 1J6 9 9 Sol16 1J12 9 10 N/C 1J6 10 10 N/C 1J12 10

CPU Tester J2 (Lamp Col) CPU Tester J5 (Solenoid 3) 1 Col 1 1J7 1 1 Special 1 1J19 1 2 Col 2 1J7 2 2 Special 2 1J19 2 3 Col 3 1J7 3 3 Special 3 1J19 3 4 Col 4 1J7 4 4 Special 4 1J19 4 5 N/C 1J7 5 5 N/C 1J19 5 6 Col 5 1J7 6 6 Special 5 1J19 6 7 Col 6 1J7 7 7 Special 6 1J19 7 8 Col 7 1J7 8 8 Special 7 1J19 8 9 Col 8 1J7 9 9 Special 8 1J19 9 10 N/C 1J7 10 10 N/C 1J19 10

CPU Tester J3 (Solenoid 1) CPU Tester J6 (Switch Col) 1 Sol1 1J11 1 1 Col 1 1J8 1 2 N/C 1J11 2 2 Col 2 1J8 2 3 Sol2 1J11 3 3 Col 3 1J8 3 4 Sol3 1J11 4 4 Col 4 1J8 4 5 Sol4 1J11 5 5 Col 5 1J8 5 6 Sol5 1J11 6 6 N/C 1J8 6 7 Sol6 1J11 7 7 Col 6 1J8 7 8 Sol7 1J11 8 8 Col 7 1J8 8 9 Sol8 1J11 9 9 Col 8 1J8 9 10 N/C 1J11 10 10 N/C 1J8 10

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Pin # Function CPU Pin # Pin # Function CPU Pin # CPU Tester J7 (Strobe A) CPU Tester J10 (Power) 1 Strobe 8 1J1 1 1 GND 1J17 1 2 Strobe 7 1J1 2 2 GND 1J17 2 3 Strobe 6 1J1 3 3 GND 1J17 3 4 Strobe 5 1J1 4 4 +V5 1J17 4 5 Strobe 4 1J1 5 5 +V5 1J17 5 6 Strobe 3 1J1 6 6 +V5 1J17 6 7 Strobe 2 1J1 7 7 N/C 1J17 7 8 N/C 1J1 8 8 -12V 1J17 8 9 Strobe 1 1J1 9 9 +12V 1J17 9 10 N/C 1J1 10 10 N/C 1J17 10

CPU Tester J8 (Strobe B) CPU Tester J12 (Special Sw) 1 Strobe 16 1J2 1 1 N/C 1J18 1 2 Strobe 15 1J2 2 2 Switch 3 1J18 2 3 Strobe 14 1J2 3 3 Switch 2 1J18 3 4 Strobe 13 1J2 4 4 Switch 4 1J18 4 5 Strobe 12 1J2 5 5 Switch 1 1J18 5 6 Strobe 11 1J2 6 6 N/C 1J18 6 7 N/C 1J2 7 7 N/C 1J18 7 8 Strobe 10 1J2 8 8 Switch 5 1J18 8 9 Strobe 9 1J2 9 9 Switch 6 1J18 9 10 N/C 1J2 10 10 N/C 1J18 10

CPU Tester J9 (BCD) CPU Tester J13 (Switch Row) 1 D1 1J3 1 1 Row 8 1J10 1 2 C1 1J3 2 2 Row 7 1J10 2 3 B1 1J3 3 3 Row 6 1J10 3 4 A1 1J3 4 4 N/C 1J10 4 5 D2 1J3 5 5 Row 5 1J10 5 6 N/C 1J3 6 6 Row 4 1J10 6 7 C2 1J3 7 7 Row 3 1J10 7 8 B2 1J3 8 8 Row 2 1J10 8 9 A2 1J3 9 9 Row 1 1J10 9 10 N/C 1J3 10 10 N/C 1J10 10

In addition, make the following connections: CPU Tester Name CPU Board J14 Lamp Pwr 1J4-1 J15 Lamp Gnd 1J5-1 J16 Sol Gnd 1J13-1 J17 Auto/Man 1J14-4 J18 Advance 1J14-3 J19 Mem Protect 1J14-1 See Section 2.3 for more information on the Diagnostic buttons (Mem Protect, etc).

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9.2 Troubleshooting procedure

9.2.1 Connection to the Tester Within each connector that interconnects the Tester and the CPU board, all lines have the same type of interface. For this reason, damage is very unlikely to occur if the user makes a mistake when building the harnesses. Also, it is unlikely for damage to occur if the user accidentally swaps two connectors. The one exception is the power interface. For a System 9 CPU board, this is 1J17. The user is urged to check the voltages on this connector prior to mating to the CPU board (as described below).

9.2.2 General Hookup Following the information in Section 9.1, connect all header connectors of the Tester to the CPU board (except for 1J17 – Power). Note that pin 1 on each connector in the Tester is marked with a white dot on the silkscreen.

9.2.3 Power Hookup The power hookup procedure is as follows: • Mate the power harness to the Tester J10. • On the other end, identify pin 1 of the CPU board connector. Do not mate to the CPU board at this time. • Power up the Tester by plugging in the power supply to the AC power source. • Verify that the LCD panel powers up. The bottom left corner of the display will show the System configuration. If it does not read “Sys9”, power cycle the tester while pressing down the “Advance” (SW7) button. Every time you do that it advances to the next system type. • Using the DVM function, and the pinout of the CPU board from the System 9 manual, test the voltage at EACH pin on the 1J17 plug. Verify that it is the correct voltage and polarity. • Once all is correct, power down the tester. • Plug into the CPU 1J17 connector. • The Tester and CPU board are ready for use.

9.2.4 CPU Core The user must first verify that the CPU core (CPU, RAM, ROM, etc) is functional by using the built-in POST (Power On Self Test) of the CPU board. This is run on power up, or can be initiated by pressing SW1 (the one near the CPU chip). U44, the 7-segment LED display will then show the result in a numeric code. The meaning of this code can be found in the machine’s manual, and has been reproduced here: 0-All tests passed. 1-U18 CPU Board lockup; also check memory protect circuit. 2-U20 Game ROM 1 faulty. 3-U20 Game ROM 1 faulty. 4-U19 Game ROM 2 faulty. 5-Coin door closed, memory protect circuit faulty, or U18 CMOS RAM faulty. Blank-U19 Game ROM 2 faulty.

Page 36 of 64 If any section fails, the user is recommended to consult the following excellent repair guides that have been developed: • Clay’s site: http://www.marvin3m.com/fix.htm • Leon’s site: http://www.flipper-pinball-fan.be/

9.2.5 IO Peripherals After the CPU has passed all its POSTs. The diagnostic should then be run. For the Space Shuttle, this procedure starts on Page 12 of the manual. This includes display, sound, switches, solenoids, etc.

9.2.5.1 Score Displays • All switches of SW4 OFF (SW4-2 in Manual/Down). • Reset the CPU by pressing SW1 on CPU board. • Press SW7 (Advance). • SW4-2 ON (Auto/Up). • Verify all digits on LCD panel are in a rolling display (1-2-3-4, etc). • SW4-2 OFF. • Verify all digits stop rolling. • Press SW7 and verify digits advance to next higher value. o If one digit does not respond, check the corresponding strobe line on 1J1 or 1J2 with the mini-scope mode probe at the CPU board connector (exposed part of the metal clip in the connector that connects to the board). If that is pulsing, you have a poor connection at the CPU board connector. o If the numeric series is corrupted, one of the BCD signals on 1J3 is not working correctly. Probe the board connector to see if all lines are pulsing, there is a problem with the Tester harness. If one line is not pulsing, most likely U5 is bad. o This result can be confirmed by using the diagnostic ROM. All lines should be pulsing on the strobe and BCD lines.

9.2.5.2 Solenoids • All switches of SW4 OFF (SW4-2 in Manual/Down). • Reset the CPU by pressing SW1 on CPU board. • Press SW7 (Advance). • Note that the bottom line of the 8x10 matrix should light indicating that the Flipper power is energized. Also, you should hear a “click” as K1 closes. o If Flipper power does not indicate ON, verify that Solenoid Gnd (1J13-1) is connected to Tester J16. o If this is ok, verify < 0.5V on both ends of R34. If one end shows 5V, verify U7 pin 10 is at 5V. If R34’s voltages check ok, the relay coil (K1) is bad. • The score displays should show all “0”s. • SW4-2 ON (Auto/Up). • Press SW7 three times (enter into solenoid test mode). • Note that as each solenoid is tested, a different LED in the Solenoid bank will flash. The Ball display should show which solenoid is being pulsed. Note that Solenoid 16 is not connected to the LED bank, and will not cause a flash. However, its output is available on the unused hole pad near J4. Note that the bottom solenoid LED is numbered #1, and the top solenoid LED is numbered #20.

Page 37 of 64 o If one Solenoid does not flash, check the TIP122 transistor. For example, for SOL1 (lowest LED), this is Q47. Verify a pulsing signal on the “B” terminal. If there is none, go upstream to the output of the AND gate, which is pin 3 of U57. If pulsing is present, the transistor is probably bad.

Figure 14. Pinout of the TIP122/120.

• Using the table below, verify all the Special Solenoids. SW4 Switch Solenoid LED Comment 3 20 SS6/STS6 4 None SS5/STS5 5 16 SS1/STS1 6 19 SS4/STS4 7 17 SS2/STS2 8 18 SS3/STS3 o If one does not light, check its corresponding TIP122/TIP120 driver transistor. For example, for SS1/STS1, this is Q75. Check the base (B) terminal and look for a pulsing signal. If there is none, go upstream to the output of the OR gate, which is pin 1 of U6. If pulsing is present, the transistor is probably bad. • This completes the section on Solenoid tests.

9.2.5.3 Lamp Matrix • All switches of SW4 OFF (SW4-2 in Manual/Down). • Reset the CPU by pressing SW1 on CPU board. • Press SW7 (Advance). • SW4-2 ON (Auto/Up). • Press SW7 twice (enter into lamp test mode). • The entire top 8x8 lamp matrix should flash dimly. The bottom row should be bright. o If a particular row does not light, check the corresponding Return TIP122 transistor, for example for Row 1, it is Q31. If there is a pulsing signal on the base, then check the input of the corresponding hex inverter (U58 pin 3). o If a particular column does not light, check the strobe transistor. For Column 1, it is Q23. If there is a pulsing signal on the base, then check the input of the corresponding AND gate (U54 pin 8).

Page 38 of 64 9.2.5.4 Switch Matrix • All switches of SW4 OFF (SW4-2 in Manual/Down). • Reset the CPU by pressing SW1 on CPU board. • Press SW7 (Advance). • SW4-2 ON (Auto/Up). • Press SW7 four times (enter into switch test mode). • All switches on SW1 and SW2 OFF. • SW1-1 ON • SW2-1 ON • Press SW3. • The speaker should make a chirping sound once per second and the credit display should show “1”. • Keeping SW2-1 closed, close each switch on SW1 in turn and press SW3. Verify that the credit display goes up by 8 on each successive column switch. Note that SW2-8 may not be checked by the CPU. • Perform the same test for SW1. Thus, keeping one switch on SW2 closed, and go down SW1 to verify the credit display. • Note that you can simulate multiple switches being closed by closing several column and row switches. All entries in the matrix on the intersection of the closed switches will indicate closed. o If any switch does not work, check other switches in the same column and row as the non-responsive one. o If one column of switches is non-responsive, verify the corresponding pin on the 1J8 connector is pulsing. This mapping can be found in the manual in the “Switch Matrix Drives” area, for example column 1 is 1J8-1. If it is not pulsing, check the corresponding transistor, for example for column 1 it is Q7. If there is a pulsing signal on its base (check with the voltage at R122), then the transistor is bad. o If any row of switches is non-responsive, verify the signal on 1J10. If pulsing is seen there, then most likely the corresponding OR gate or U15 is bad. This can be narrowed by checking the output of the OR gate. If it is pulsing, then U15 is bad.

9.2.5.5 Sound section To test the sound section on a System 9 board, three additional items are needed: • Small programming jumper as found on computer peripheral boards. • Speaker soldered to pins 2 and 3 of 1J15 connector. • Resistor (15k Ohm value) soldered to pins 1 and 2 of 1J16 connector. The jumper takes the place of the external speech board. To install the jumper, insert it to short out pins 3 and 4 of 1J20 as shown below. As you can see, the ‘bottom’ two most pins are 1 and 2, so skip one row from the end, and insert the jumper. The connector for 1J16 is meant to replace the sound volume adjustment pot in the cab, and the speaker connects to 1J15. The unit in the photo below is a miniature version from a toy. By using a light and compact unit, I can flip the board back and forth without needing to unplug the speaker. Test the board by navigating the sound menu in the display.

Page 39 of 64

Figure 15. Hooking up for the sound test.

9.3 Testing Tips • If the Blanking line is low, it means that the I/Os are disabled. Check U22 (the 555 timer). To raise the blanking line without the CPU, ground pin 2 of U22 with a jumper. • The sound interface bus is used by the main CPU to send a command to the sound section via U13. During sound test, the sound number displayed on the display and the control bits corresponding to the sound bus are shown below

Num Sound PA0 PA1 PA2 PA3 PA4 PA5 PA6 PA7 N/A Attract 1 1 0 1 0 0 0 0 Mode N/A SW1 1 1 Single 1 Single 0 0 0 pulse pulse 0 Silent 0 0 0 0 0 0 0 0 1 Zoom 1 0 0 0 0 0 0 0 Zoom 2 Low 1 1 0 0 0 0 0 0 Boom 3 Laser 1 1 1 0 0 0 0 0 4 Bing 1 1 1 1 0 0 0 0 5 Bong 1 1 1 1 1 0 0 0 6 High 1 1 1 1 1 1 0 0 Boom 7 Ahhhh 1 1 1 1 1 1 1 0

Page 40 of 64 If a ROM is not inserted, that section’s PIAs will go hi-Z on their IO lines. So if the Sound ROM is removed, you should be able to see the outputs of U4 toggling according to the above. You would think that you could jumper U4’s pins to ground or Vcc to get sounds to occur in the sound section, but I have not been successful in doing so.

Page 41 of 64 10 System 10 Per the Internet Pinball Database ( www.ipdb.org ), no machines used this System.

Page 42 of 64 11 System 11 Per the Internet Pinball Database ( www.ipdb.org ), machines that used this System are: • Gold Mine • Grand Lizard • • Road Kings • F-14 (11a) • Fire! (11a) • Millionaire (11a) • Pinbot (11a) • Bad Cats (11b) * • (11b) • Big Guns (11b) • (11b) * • Cyclone (11b) • Earthshaker (11b) * • Elvira and the Party Monsters (11b) * • Game Show (11b) * • Jokerz! (11b) * • Mousin’ Around (11b) * • Police Force (11b) * • Space Station (11b) • Swords of Fury (11b) • (11b) * • Transporter the Rescue (11b) * • (11b) * • Bugs Bunny (11c) * • (11c) * • Dr. Dude (11c) * • Pool Sharks (11c) * • Radical (11c) * • Riverboat Gambler (11c) * • Rollergames (11c) * • Bride of Pinbot *

There were two types of score/game display boards used on System 11. The first type consisted of four glass modules, each with 7 digits. The two units on the top row were alphanumeric, and the bottom row was numeric. Examples of games of this type are “Big Guns”, “Pinbot” and “F-14”. The second type had two glass modules, and all data displayed alphanumerically (these are designated by the “*” above). Examples of this latter type are “Whirlwind”, and “Earthshaker”. The CPU tester is intended for use with game ROMs of the first type above, thus those that have a numeric display on the bottom. In order to use this tester with the boards of the second type, please use ROMs from the first type of boards.

Page 43 of 64 11.1 Interconnect Harness The wiring that is needed to connect a System 11 CPU board to the tester is the same as the one for a System 9 board with the addition of two harnesses. These are the ones that add the alphanumeric display (1J22) and the strobing (1J8). Unlike the previous generations of CPU boards, instead of transferring the numeric data in BCD format to the master display board, the System 11 board controls the segments of the displays directly. The display interface is tested in two sections due to the limited IO available on the Microprocessor. The strobes are tested in two banks. The harness for 1J22 is shown in the table below. Note that this is shown as a 20-pin connector on the drawing of the board on the manual that I have for Road Kings and Pinbot, but this is actually a 26-pin connector.

1J22 Pin 1J3 Pin Name J7 header J9 header 1 Gnd 2 Blanking 3 1h 4 1j 5 1k 6 1m 7 1n 8 1p 9 1r 10 1dot 11 2h 12 2j 13 2k 14 2m 3 15 2n 2 16 2p 1 17 2r 9 18 2dot 8 19 2a 7 20 2b 6 21 2c 5 22 2d 4 23 2e 3 24 2f 2 25 2g 1 26 comma 9 1a 9 8 1b 8 4 1e 7 key 6 3 1f 5 2 1g 4 Table 3. Harness for 1J22 on a System 11 CPU.

Page 44 of 64 For photos on how to build these harnesses, see Appendix B. Building the Harnesses.

CPU Tester J8 (Strobe II) 1 Strobe 16 1J1 1 2 Strobe 15 1J1 2 3 Strobe 14 1J1 3 4 Strobe 13 1J1 4 5 Strobe 12 1J1 5 6 Strobe 11 1J1 6 7 N/C 1J1 8 Strobe 10 1J1 7 9 Strobe 9 1J1 9 10 N/C Table 4. Harness for J8 on a System 11 CPU. This second harness in the above table is built like all the other System 9 harnesses. The end on the CPU board tester uses a 10-pin IDC connector, and the end on the CPU board uses the 0.156” connector. Note the slight change in pin 7. This is due to a difference in the location of the keying pins between 1J1 and 1J2.

11.2 Troubleshooting procedure

11.2.1 Connection to the Tester Within each connector that interconnects the Tester and the CPU board, all lines have the same type of interface. For this reason, damage is very unlikely to occur if the user makes a mistake when building the harnesses. Also, it is unlikely for damage to occur if the user accidentally swaps two connectors. The one exception is the power interface. For a System 11 CPU board, this is 1J17. The user is urged to check the voltages on this connector prior to mating to the CPU board (as described below).

11.2.2 General Hookup Following the information in Section 9.1, connect all header connectors of the Tester to the CPU board (except for 1J17 – Power). Note that pin 1 on each connector in the Tester is marked with a white dot on the silkscreen.

11.2.3 Power and Display Hookup The power hookup procedure is as follows: • Mate the power harness to the Tester J10. • On the other end, identify pin 1 of the CPU board connector. Do not mate to the CPU board at this time. • Power up the Tester by plugging in the power supply to the AC power source. • Verify that the LCD panel powers up. The bottom left corner of the display will show the System configuration. If it does not read “Sys11”, power cycle the tester while pressing down the “Advance” (SW7) button. Every time you do that it advances to the next system type.

Page 45 of 64 • Using the DVM function, and the pinout of the CPU board from the System 11 manual, test the voltage at EACH pin on the 1J17 plug. Verify that it is the correct voltage and polarity. • Once all is correct, power down the tester. • Plug into the CPU 1J17 connector. • The Tester and CPU board is ready for use.

See Chapter 9 for the general troubleshooting procedure of this CPU board. The remainder of this section will describe the testing of the alphanumeric display interface, which is unique to a System 11 board. In the two phases of the display test, the CPU Tester’s J8 harness should be connected as shown in the table below. In each phase, half of the alphanumeric and numeric display will be shown on the LCD panel. The general hookup is to connect all the harnesses between the CPU tester and the CPU board except for J8 on the tester. This either plugs into CPU 1J1, or CPU 1J2.

Testing phase Tester J8 Phase 1 (left half) 1J1 (Table 4 Harness) Phase 2 (right half) 1J2 (Standard Sys 9 Harness)

Each phase will test 16 digits at a time. This includes two players and one of the Ball/Credit displays.

Figure 16. Example of the 'Left' and 'Right' displays placed side by side.

The above figures show the result when the ‘Left’ and ‘Right’ displays are put together (they are two separate images). In this case, we are testing with a ‘Big Guns’ board running revision 8 code, which uses the System 11b version of the CPU board.

11.2.4 Testing the board The tests of this CPU board are similar to System 9’s. Instead of the 7-segment display, System 11 uses three LEDs to communicate with the user. Similar to the other versions, first troubleshoot the core CPU (Processor, memory, etc), and then move on to the IO and sound section. Refer to the System 9 section and your manual for more information on running the diagnostics.

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Figure 17. Testing with a System 11 board. This is from a Big Guns machine.

A helpful resource is the System 11 diagnostic ROM. That is available for download from Leon’s site: http://home.scarlet.be/~fb054529/will11/ewill11.htm

Connecting the sound board The System 11 sound board interconnects to the CPU board as shown below. Although the D- 11581 is shown below, the D-11298 connects with the same harness. Note that the same ‘speaker’ and ‘volume’ connectors from System 9 are used here.

Figure 18. Interconnection to the System 11 sound board.

To provide power to the sound board, I built a power tap ‘Tee’ as shown in the image below. A black double ended male (board type) connector was used. In the image below, the colored ribbon

Page 47 of 64 goes to the CPU tester, and the grey to the sound board. This whole stack is plugged into the CPU board. The black connector is soldered to the Tee to allow the top connector to mate to the stack.

Figure 19. Close-up of power Tee

Page 48 of 64 12 DataEast/Saga

Boards of this CPU board type come in several versions. These are known as Version 1 (single row alphanumeric display), Version 2 (dual row alphanumeric), Version 3 and Version 3b (DMD). on the Internet Pinball Database (ipdb.org).

Figure 20. Board tester hooked up to a DataEast board.

They cable set and hookup is identical to System 11. ROMs from WMS games cannot be used with DE boards as the memory map is different. The tester is setup in the “System 11” mode to display the information on the LCD display.

The test procedure proceeds analogous to the System 11 machines, and the user is requested to consult the manual of the pinball machine to navigate the diagnostic menu.

Page 49 of 64 13 Appendix A. Board Schematic.

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Page 52 of 64 14 Appendix B. Building the Harnesses. Note that the harness for J5, J8, J9, J10, and J12 on Systems 3 through 7 are 1-to-1, and thus can borrowed from the System 9 set. This means that the minimum set of harnesses is 7 (for System 3 through 7) + 12 (for System 9) + 1 (for System 11). A total of 20.

The procedure to build each cable harness is as follows:

Type I harness. This type of harness is used to interconnect the tester and the CPU board. A total of 19 of these are needed. - With the Tester next to the CPU board, measure the length of ribbon cable needed, and cut a section off from the spool. - Insert one end into the 10-pin ribbon cable connector. Verify that the “teeth” of the connector straddle each of the ribbon wires. Now snug down on the bracket that holds the ribbon cable to temporarily hold the assembly.

Figure 21. Alignment of the bifurcated contacts onto the ribbon cable.

Page 53 of 64 - It is not important which way the keying tab faces as the board does not use them. - Using a pair of pliers (channel-locks are best), crimp down on the ribbon cable connector. If you have a small hand- vise or C-clamp, these can also be used instead of the channel locks.

Figure 22. Crimping the ribbon cable connector. - Prepare the CPU board side next. If the 0.156” connectors are longer than needed, cut them to the 9-pin size by following the next few lines. - First remove the metal clip at the tenth position with a miniature screwdriver. - Cut the plastic shell with a pair of wire snips at the location of the missing metal clip. - Also there may be a little nub sticking out at the end for the keying tab. Clip this off so that the connector will slide onto the CPU board’s connector. See the figure below.

Page 54 of 64 Clip this nub

Figure 23. Removing one metal clip. - To firmly hold the CPU board connector, plug it into a CPU board (see figure below). - Split the 10 conductors apart of the ribbon cable that will be mated to the CPU board connector. - With a miniature screwdriver, force the split wire into the prongs of the CPU board connector. Use enough wire to allow it to be doubled back as shown in the figure below. This causes a total of four crimps per wire. Be sure to push down firmly to seat the wire fully into the metal clip.

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Figure 24. Crimping the ribbon cable wire onto the CPU board connector.

- Note that the pin 1 of the ribbon cable will be shown as the red stripe. Use the Interconnect Harness table of the appropriate CPU section to route the ribbon cable wire to the correct pin on the CPU board. For example, in the above image, wire #1 is going to pin 1 of the CPU board. - Be sure to push the wires down low enough until they bottom out in the metal clip.

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Figure 25.The finished harness ends. - With permanent ink, mark that the P/J number that this harness is used for on the CPU board connector end. - Be sure to plug in the connector on the tester by putting the side with the red stripe closest to the white dot on the Tester board’s silk screen.

Type II harness. This connection is used for the additional single-wire connections such as Lamp Pwr and Solenoid Gnd. - Obtain a section of wire that is about 24” long.

Page 57 of 64 - Cut a single-contact section of the CPU board connector. - Solder the wire to the connection on the Tester, and crimp onto the single connector.

Figure 26. Type II harness connection for single connections.

Type III harness. This harness is used to connect the alphanumeric connector (1J22) on a System 11 CPU board to the Tester. - Refer to Table 3 for a pinout of this cable. - Obtain a section of 20-wire ribbon cable that is about 18” long or longer. - On the right end, split off a section of 13 wires on the bottom end. See the tight shot below of the connector ends.

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Figure 27. Overall image of right end of cable.

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Figure 28. Tight shots of the right connector ends.

Page 60 of 64 - Crimp the bottom 13 wires that were split off onto the 26-pin connector. Bias the bundle towards the bottom of the connector as shown in Figure 28. - For the 0.156” connector on the remaining 7 wires, connect to the IDC pins as shown in Figure 28, or use Table 3. - For the left end of the cable, remove the bottom most wire as shown in the red circle in Figure 29.

Figure 29. Left end of the cable. The bottom most wire (red circle) is not used. - Once the bottom wire has been removed, split off the top most 10 wires. So there should be 9 wires going to the connector marked “J7” in the figure above. - Crimp that section to a 10-pin IDC connector, and label with “J7”. - Crimp the top 10 wires to a 10-pin IDC connector, and label with “J9”.

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Figure 30. Connection of the System 11 harness to the CPU board.

- The above figure shows how the left end connects to the CPU board. - Depending on which phase of testing (left or right half of display), the connection of the grey cable in the image above will be changed from 1J1 to 1J2.

Page 62 of 64 15 Appendix C. Common Questions • How is the 5V regulator installed? o That is U2, and goes into the ‘right most’ three holes in U2 location. Flat side down (point of view is from the same view as in the photo on the first page). The extra hole was to accommodate a different regulator in case it was available. See the photo on the first page of this manual. • I see a picture of your board being used on the website, but it is not complete, how is that possible? o The circuitry is modular. The part that tests the switch matrix does not connect at all to the part that connects the coils etc. So I built the board in stages, checking everything out gradually, and may have shot photos along the way. • How does the power supply connect to the board? o At J21 through J24. Use the silkscreen text to know which supply goes where. Note that photos in this manual will show the W1 revision of the board. This did not have these large and convenient holes for the power supply connector. The revisions are functionally identical. • What is S11 for? o That is for a programmer header for the Microprocessor. Experienced users of the PIC will know what to do with this connector. Normal users will not use this. • What about r1,r2,r6,r7,c2,c3? o Refer to the parts list in this manual. No parts may be needed for these locations. I add them to the schematics or boards that I design to allow flexibility for change in case I or another experienced user wants to modify the function of the circuit. • What about p17,p18,p19,p2,p20,p21,p22 ? o When I design a board, I build into it features to make it flexible for the future. I do not know if this board will need additional circuits in the future. These traces allow the installation of parts and add-ons. They arranged just like these solderless breadboards: http://en.wikipedia.org/wiki/Breadboard

Page 63 of 64 16 Appendix D. Change History

• January 2006 – Initial release of this manual. • February 2006 – Addition of System 8 information to manual. Thanks to William Courtney . • 23 February 2006 – Small changes to pin map for System 3-7. Thanks to Peter Matthews . • 25 March 2006 – Added System 11 compatibility. System 11 board courtesy of Mike Felden . • April 18, 2006 – Corrected some errors in the System 11 section. • March 11, 2009 – Added section on System 11 compatibility. ROMs must be used from games that have four glass displays, and not two alpha displays. • Jan 10, 2010 – Added info on Resistors and Capacitors. Deleted packing list section. • Jan 16, 2010 – Added new photo of completed board and ref.des. column to parts list. Also a ‘questions’ section. • Jan 19, 2010 – Added board header to parts list. • June 2, 2010 - Added System 3-7 functionality. Firmwire rev increased to “1b”. This can be seen in the bottom right corner on power up. • September 24, 2010 – Added ‘Mem Protect’ mapping on System 6. • September 26, 2010 – Added two additional LEDs to solenoid test in section 2.4. • October 4, 2010 – Updated parts list. • October 21, 2010 – Corrected errors as found by (firepowerpinball.com). • November 17, 2010 – LCD panel header and D3 info added. • November 18, 2010 – Sound section test in System 9 added. • July 28, 2012 – Sound section test in System 11 added. • August 2012 – Solenoid bank LED addendum. • October 23 2012 – Added System 7 tests and results. • October 16 2013 – corrected errors in Table in 9.1. • October 1 2014 – Added DataEast in Chapter 12. • August 15 2015 – Added sound section to Chapter 9

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