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Intel® Xeon® E5-2400 Product Family Datasheet

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Intel® Xeon® E5-2400 Product Family Datasheet Intel® Xeon® Processor E5-2400 Product Family Datasheet - Volume One May 2012 Reference Number: 327248-001 INFORMATION IN THIS DOCUMENT IS PROVIDED IN CONNECTION WITH INTEL PRODUCTS. NO LICENSE, EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE, TO ANY INTELLECTUAL PROPERTY RIGHTS IS GRANTED BY THIS DOCUMENT. EXCEPT AS PROVIDED IN INTEL'S TERMS AND CONDITIONS OF SALE FOR SUCH PRODUCTS, INTEL ASSUMES NO LIABILITY WHATSOEVER AND INTEL DISCLAIMS ANY EXPRESS OR IMPLIED WARRANTY, RELATING TO SALE AND/OR USE OF INTEL PRODUCTS INCLUDING LIABILITY OR WARRANTIES RELATING TO FITNESS FOR A PARTICULAR PURPOSE, MERCHANTABILITY, OR INFRINGEMENT OF ANY PATENT, COPYRIGHT OR OTHER INTELLECTUAL PROPERTY RIGHT. UNLESS OTHERWISE AGREED IN WRITING BY INTEL, THE INTEL PRODUCTS ARE NOT DESIGNED NOR INTENDED FOR ANY APPLICATION IN WHICH THE FAILURE OF THE INTEL PRODUCT COULD CREATE A SITUATION WHERE PERSONAL INJURY OR DEATH MAY OCCUR. Intel may make changes to specifications and product descriptions at any time, without notice. Designers must not rely on the absence or characteristics of any features or instructions marked "reserved" or "undefined." Intel reserves these for future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them. The information here is subject to change without notice. Do not finalize a design with this information. The Intel® Xeon® processor E5-2400 product family, Intel® C600 Series Chipset, and the Intel® Xeon® processor E5-2400 product family-based platform described in this document may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order. Copies of documents which have an order number and are referenced in this document, or other Intel literature, may be obtained by calling 1-800-548-4725, or go to: http://www.intel.com/#/en_US_01 Hyper-Threading Technology requires a computer system with a processor supporting HT Technology and an HT Technology enabled chipset, BIOS and operating system. Performance will vary depending on the specific hardware and software you use. For more information including details on which processors support HT Technology, see http://www.intel.com/products/ht/hyperthreading_more.htm. Enabling Execute Disable Bit functionality requires a PC with a processor with Execute Disable Bit capability and a supporting operating system. Check with your PC manufacturer on whether your system delivers Execute Disable Bit functionality. Intel® Virtualization Technology requires a computer system with an enabled Intel® processor, BIOS, virtual machine monitor (VMM) and, for some uses, certain computer system software enabled for it. Functionality, performance or other benefits will vary depending on hardware and software configurations and may require a BIOS update. Software applications may not be compatible with all operating systems. Please check with your application vendor. Intel® Turbo Boost Technology requires a PC with a processor with Intel Turbo Boost Technology capability. Intel Turbo Boost Technology performance varies depending on hardware, software and overall system configuration. Check with your PC manufacturer on whether your system delivers Intel Turbo Boost Technology. For more information, see http://www.intel.com/technology/turboboost. No computer system can provide absolute security under all conditions. Intel® Trusted Execution Technology (Intel® TXT) requires a computer with Intel® Virtualization Technology, an Intel TXT-enabled processor, chipset, BIOS, Authenticated Code Modules and an Intel TXT-compatible measured launched environment (MLE). Intel TXT also requires the system to contain a TPM v1.s. For more information, visit http://www.intel.com/technology/security The Processor Spec Finder at http://ark.intel.com or contact your Intel representative for more information. 64-bit computing on Intel architecture requires a computer system with a processor, chipset, BIOS, operating system, device drivers and applications enabled for Intel® 64 architecture. Performance will vary depending on your hardware and software configurations. Consult with your system vendor for more information. Δ Intel processor numbers are not a measure of performance. Processor numbers differentiate features within each processor family, not across different processor families. See http://www.intel.com/products/processor_number for details. I2C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I2C bus/protocol and was developed by Intel. Implementations of the I2C bus/protocol may require licenses from various entities, including Philips Electronics N.V. and North American Philips Corporation. Intel, Xeon, Enhanced Intel SpeedStep Technology, Core, and the Intel logo are trademarks of Intel Corporation in the U. S. and other countries. *Other names and brands may be claimed as the property of others. Copyright © 2009-2012, Intel Corporation. All rights reserved. 2 Intel® Xeon® Processor E5-2400 Product Family Datasheet Volume One Table of Contents 1Overview................................................................................................................. 13 1.1 Introduction ..................................................................................................... 13 1.1.1 Processor Feature Details ........................................................................ 13 1.1.2 Supported Technologies .......................................................................... 14 1.2 Interfaces ........................................................................................................ 14 1.2.1 System Memory Support ......................................................................... 14 1.2.2 PCI Express* ......................................................................................... 15 1.2.3 Direct Media Interface Gen 2 (DMI2)......................................................... 17 1.2.4 Intel® QuickPath Interconnect (Intel® QPI) .............................................. 17 1.2.5 Platform Environment Control Interface (PECI)........................................... 18 1.3 Power Management Support ............................................................................... 18 1.3.1 Processor Package and Core States........................................................... 18 1.3.2 System States Support ........................................................................... 18 1.3.3 Memory Controller.................................................................................. 18 1.3.4 PCI Express........................................................................................... 19 1.3.5 Intel QuickPath Interconnect.................................................................... 19 1.4 Thermal Management Support ............................................................................ 19 1.5 Package Summary............................................................................................. 19 1.6 Terminology ..................................................................................................... 19 1.7 Related Documents ........................................................................................... 22 1.8 State of Data .................................................................................................... 23 2Interfaces................................................................................................................ 25 2.1 System Memory Interface .................................................................................. 25 2.1.1 System Memory Technology Support ........................................................ 25 2.1.2 System Memory Timing Support............................................................... 25 2.2 PCI Express* Interface....................................................................................... 26 2.2.1 PCI Express* Architecture ....................................................................... 26 2.2.1.1 Transaction Layer ..................................................................... 27 2.2.1.2 Data Link Layer ........................................................................ 27 2.2.1.3 Physical Layer .......................................................................... 27 2.2.2 PCI Express* Configuration Mechanism ..................................................... 27 2.3 DMI2/PCI Express* Interface .............................................................................. 28 2.3.1 DMI2 Error Flow ..................................................................................... 28 2.3.2 Processor/PCH Compatibility Assumptions.................................................. 28 2.3.3 DMI2 Link Down..................................................................................... 28 2.4 Intel QuickPath Interconnect............................................................................... 28 2.5 Platform Environment Control Interface (PECI)...................................................... 31 2.5.1 PECI Client Capabilities ........................................................................... 31 2.5.1.1 Thermal Management................................................................ 32 2.5.1.2 Platform Manageability
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