A Super-Quadratic Lower Bound for Depth Four Arithmetic Circuits Nikhil Gupta Department of Computer Science and Automation, Indian Institute of Science, Bangalore, India
[email protected] Chandan Saha Department of Computer Science and Automation, Indian Institute of Science, Bangalore, India
[email protected] Bhargav Thankey Department of Computer Science and Automation, Indian Institute of Science, Bangalore, India
[email protected] Abstract We show an Ωe(n2.5) lower bound for general depth four arithmetic circuits computing an explicit n-variate degree-Θ(n) multilinear polynomial over any field of characteristic zero. To our knowledge, and as stated in the survey [88], no super-quadratic lower bound was known for depth four circuits over fields of characteristic 6= 2 before this work. The previous best lower bound is Ωe(n1.5) [85], which is a slight quantitative improvement over the roughly Ω(n1.33) bound obtained by invoking the super-linear lower bound for constant depth circuits in [73, 86]. Our lower bound proof follows the approach of the almost cubic lower bound for depth three circuits in [53] by replacing the shifted partials measure with a suitable variant of the projected shifted partials measure, but it differs from [53]’s proof at a crucial step – namely, the way “heavy” product gates are handled. Loosely speaking, a heavy product gate has a relatively high fan-in. Product gates of a depth three circuit compute products of affine forms, and so, it is easy to prune Θ(n) many heavy product gates by projecting the circuit to a low-dimensional affine subspace [53,87].