Isolated Gate Drivers for Power Supply Applications and Topology

Power Hour LIVE Schedule – Presentation Will Begin Shortly

Wednesday, Oct 21st Digital Isolation 101 & Safety Certifications

Wednesday, Nov 4th IsoDriver 101 & Techniques for Driving 4 Different Power Transistors

Wednesday, Nov 18th Protecting 24 V Digital Outputs from the Unknown & Protection Through Clamping

Wednesday, Dec 9th Reducing Cost with Integrated Auxiliary Supplies & Understanding Silicon Labs’ Integrated DC-DC Converters Register Today! Wednesday, Jan 13th Powering the Future with PoE

Wednesday, Jan 27th IsoDrivers in High Power Inverter Systems & Understanding Layout Recommendations for IsoDriver Circuits

Wednesday, Feb 10th Isolated Gate Drivers for Power Supply Applications & IsoDriver Power Supply Topology Overview

Wednesday, Feb 24th Isolated Signaling & Total Gain Error Calculation

Wednesday, March 10th Factories are Dirty – Protecting Industrial PLC Outputs & Creating Industrial Inputs that Don’t Blow Up

Wednesday, March 24th Benefits of Functional Safety in Automotive Applications & FuSa Practical Concerns Switch-Mode Power Supply Topologies Overview Travis Lenz| Applications Engineering

Isolated Gate Drivers for Power Supplies Ashish Gokhale| Sr. Product Marketing Manager

2 Agenda

▪ Introduction to SMPS

▪ Non-Isolated SMPS Topologies

▪ Isolated SMPS Topologies

▪ Active Rectifier

▪ Design Considerations

3 Introduction to Switch-Mode Power Supplies

▪ Power supplies take input voltage waveform and convert to different output voltage waveform (DC-DC, DC-AC, AC-DC, etc.)

▪ Linear regulators are simplest form of step-down DC-DC power supply ▪ Transistor operates in linear region (passive conductor) ▪ Cheap, low complexity, excellent for low-power applications

▪ Defining feature of Switch-Mode Power Supply (SMPS) is switching ▪ MOSFETs (SiC, GaN →proliferating): desire fast switching, low losses, high Linear Regulator standoff voltage ▪ Duty cycle (D) is ratio of time switch is closed (on) over full period

푡푂푁 푡푂푁 퐷 = = = 푡푂푁 ∗ 푓 푡푂푁+푡푂퐹퐹 푇

▪ VOUT becomes a function of VIN and D

푉푂푈푇 = 푓 푉퐼푁, 퐷 ▪ Converter efficiency 푃 휂 = 푂푈푇 푃퐼푁

4 Isolated vs. Non-Isolated Topologies

Non-Isolated Isolated ▪ No transformer → electrical connection between ▪ Transformer → electrical and physical separation of input and output (shared GND) input/output ▪ GND noise feedback, no protection from hazards ▪ Broken GND loops → reduced noise feedback, safety ▪ Multiple/floating outputs, o/p voltage ▪ Require same point of reference (no floating output) resolution/polarity ▪ Lower cost and complexity ▪ High-power applications ▪ Greater efficiency ▪ Increased size, cost, and complexity ▪ Lower efficiency ▪ Higher emissions

5 Non-Isolated Topologies Non-Isolated: Buck Converter

Diagram Function ▪ Low-pass filter applied to switching input voltage produces stepped down output voltage ▪ Transfer function: 푡 푉 = 푂푁 ∗ 푉 = 퐷 ∗ 푉 푂푈푇 푇 퐼푁 퐼푁 ▪ Operates in BCM/CCM, synchronous rectification desirable ▪ Typically used in low-power applications (<100W, control systems, MCU systems)

Advantages Disadvantages ▪ Average load current supplied by primary inductor ▪ Poor performance at light loads ▪ Reduces output ripple → smaller capacitor required ▪ Non-isolated, single-ended output ▪ High converter efficiency (η > 90% at high D) ▪ Output voltage is always ≤ input voltage ▪ Low complexity → small BOM → low cost

7 Non-Isolated: PFC/Boost Converter

Diagram Function ▪ Inductor creates series combination of supplies ▪ Transfer function: 푇 1 푉푂푈푇 = ∗ 푉퐼푁= ∗ 푉퐼푁 푡푂푁 1 − 퐷 ▪ Output capacitance provides PFC → reduce wasted power ▪ Operates in BCM/CCM, most efficient in BCM, low D ▪ Wide range of power applications (10W to 1000W+, battery- powered devices w/actuators)

Advantages Disadvantages ▪ ▪ High PF (adjustable with COUT), low THD High conduction losses

▪ High converter efficiency (η > 95% at low D) ▪ Discontinuous charging current of COUT ▪ Low complexity → small BOM → low cost ▪ High ripple on output → larger LC or higher f ▪ Easily interleaved (more power, less ripple) ▪ Non-isolated, single-ended output ▪ Output voltage is always ≥ input voltage

8 Non-Isolated: Buck-Boost Converter

Diagram Function ▪ Charged inductor becomes inverted supply when switch opens ▪ Input GND becomes output V+ (inverted output) ▪ Transfer function: 푡푂푁 퐷 푉푂푈푇 = − ∗ 푉퐼푁= − ∗ 푉퐼푁 1 − 푡푂푁 1 − 퐷 ▪ Typically used in low-power applications (<100W, battery-powered, PV cells) Advantages Disadvantages ▪ Input voltage can be stepped up or down, large ▪ Inverted output voltage output swing ▪ Complicates sensing and feedback design (inverting) ▪ High converter efficiency (η ~ 90% at D near 50%) ▪ Poor η at high gain ▪ Low complexity → small BOM → low cost ▪ Non-isolated, single-ended output

9 Isolated Topologies Isolated: Half-Bridge

Diagram Function

▪ C1, C2 bias low-side to ½ VIN, switches push-pull high-side between VIN and GND ▪ 2-winding output rectified and filtered to produce DC output ▪ Transfer function: 푁푆 푉푂푈푇 = 푡푂푁 ∗ ∗ 푉퐼푁 = 퐷 ∗ 푁 ∗ 푉퐼푁 푁푃 ▪ Used in medium power applications (100W-500W, battery charging) ▪ Variants: Asymmetrical, LLC Resonant

Advantages Disadvantages

▪ Lower VDS standoff voltage than alternatives ▪ Considerable design challenges: ▪ Full transformer utilization (1st/3rd quadrants used) ▪ Full-wave rectification required on output ▪ Custom, center-tap transformer design (NP, NS1, NS2) ▪ Isolated, double-ended outputs that can be pos/neg ▪ Layout conformity for isolation ▪ Greater output voltage resolution (D, N as knobs) ▪ EMI challenges ▪ Deadtime required to avoid shoot-through ▪ Large BOM → cost and design complexity

11 Isolated: Full-Bridge

Diagram Function ▪ Same as half-bridge, but biasing caps replaced with switches that increase input voltage swing to 2*VIN ▪ Transfer function: 푁푆 푉푂푈푇 = 2 ∗ 푡푂푁 ∗ ∗ 푉퐼푁 = 2 ∗ 퐷 ∗ 푁 ∗ 푉퐼푁 푁푃 ▪ Found in high-power applications (>500W, OBC, Atmv DC Bus) ▪ Variants: Phase-shifted

Advantages Disadvantages ▪ Max input voltage swing for high-power applications ▪ Lossier and noiser than HB (twice the power of half-bridge) ▪ Considerable design challenges: ▪ Outputs are isolated, floating and can be pos/neg ▪ 4 MOSFETs require precise timing control ▪ Custom, center-tap transformer design (NP, NS1, NS2) ▪ Greater output voltage resolution (D, N as knobs) ▪ Layout conformity for isolation ▪ EMI challenges ▪ Deadtime required to avoid shoot-through ▪ Large BOM → cost and design complexity

12 Active Rectifier Active Rectifier

▪ AC-DC conversion requires rectification (conversion of alternating current to direct current, negative to positive) ▪ Output is unregulated DC voltage (fluctuates) ▪ Diode Bridge Rectifier (DBR) is most common circuit for this purpose:

▪ Active rectifier replaces diodes with switching elements that turn on during conduction phase ▪ Faster switching time (no reverse recovery), lower losses, ZVS → achieve better efficiency ▪ Requires high current drive, low prop delay, tight Full Wave Rectification Diode Bridge Rectifier channel-to-channel matching of gate drivers ▪ Bootstrap capabilities are nice to have

14 Design Considerations: SMPS & Active Rectifiers

▪ Operation of SMPS critically depends on switching frequency ▪ Advantages of higher f: ▪ Reduce output ripple in all topologies → allow for smaller L/C ▪ Provide tighter control, increase overall converter efficiency ▪ Requirements of higher f:

▪ Increases switching loss → faster switching transistors with low QG/RON ▪ Gate drivers with high output current and high transient immunity ▪ Diodes replaced by FETs in more advanced power electronics designs

▪ Low RON of FET reduces conduction losses ▪ Fast switching provides smooth state transitions, enables ZVS → better efficiency ▪ Requires gate drivers with low prop delay, tight matching for optimal performance ▪ With a rising demand for ultra efficient, eco-friendly designs, the time is now to upgrade your power electronic designs to stay competitive in industry

15 Isolated Gate Drivers for Power Supplies Ashish Gokhale| Sr. Product Marketing Manager Agenda

▪ Power Supply Applications & Topologies

▪ Isolated Gate Driver Overview

▪ Driver Features for Power Supplies

▪ Silicon Labs’ Drivers for Power Supplies

▪ Design & Evaluation Resources

▪ Wrap-up

17 Power Supply Applications

AUTOMOTIVE INDUSTRIAL POWER SUPPLY

Key Applications Key Applications Key Applications On Board Chargers (OBC) Solar Inverters Server/Telecom Power Supplies dc-dc Converters Motor Control Uninterruptible Power Supplies (UPS) POL

18 Isolated Topologies

BUCK TYPE (FORWARD, HB/FB) BOOST TYPE ( PFC ) BUCK - B O O S T ( FLYBACK )

Low (Forward) to High Power (F.B) Required for high power AC-DC Low power Telecom power supplies OBC, Laptop/PC SLIC/PoE Server power supplies Not strictly isolated, but… POL

19 Power Topology Example Application Example: Battery Charger

Boost PFC Full-Bridge DC-DC switching Full-Bridge Rectifier & Filter Rsense DC Link Rsense Rsense HV Battery

AC MainsPower Factor Correction Rectifier and DC-DC Chopper and Voltage Boost Filter

Isolation Gate Vsense Gate Isolation Isolation Isolation Isolation Isolation Vsense Isense Driver Vsense Isense Drivers Vsense Isense

Communication Communication PFC Controller DC-DC Controller

▪ This example shows the various topologies that are sometimes required in a single application ▪ Rectification may use sync FETs, followed by the PFC stage, which is a boost topology ▪ The dc-dc s power stage shown here is a full bridge topology ▪ The secondary rectifier stages shown here could also be replaced by sync FET’s controlled by isolated drivers

20 Isolated Gate Driver

▪ Driver functions 600 V 30 V ▪ Level shift 3/5 V logic signals to 24 V or 30 V

Driver ▪ Supply switching current for charging/discharging gate

▪ IGBT, MOSFETs, Super junction MOSFETs

▪ GaN FETs, SiC FET’s

600 V 30 V ▪ Integrated galvanic isolation

▪ Used when safety becomes necessary at SELV (50 V) or Driver

greater Galvanic Galvanic Isolation ▪ Input to output isolation for protection of controller

▪ Maintain noise immune operation for best efficiency

21 Driver Configurations

SINGLE DRIVER DUAL DRIVER HIGH SIDE/ LOW SIDE DRIVER

VDDI VDDA VDDI VDDA UVLO UVLO UVLO UVLO

VIA VDDI VDDO UVLO UVLO PWM VIB VOA Input logic & VOA Driver Driver control EN Input logic & control GNDA GNDA VI VOH Input logic & control Driver VOL DT

EN Isolation Galvanic Deadtime, VOB

VOB Enable & Isolation Galvanic Driver Galvanic Isolation Galvanic Driver EN GNDI GNDO Overlap GNDB Control GNDB

UVLO UVLO GNDI VDDB GNDI VDDB

▪ Single driver in compact 8 pin package ▪ Two drivers in 16 pin package ▪ Two drivers in 16 pin package ▪ For IGBT’s/SiC, could be 16 pin package ▪ Independent control with VIA/VIB ▪ Overlap protection integrated for safety ▪ Close placement to power switch ▪ No overlap protection ▪ Inputs could be single PWM or VIA/VIB ▪ Split output useful for tON, tOFF control ▪ Useful for FB, interleaved topologies ▪ Useful for half-bridge, LLC topologies

22 Driver Features: 1 of 3 23 V IORM V : Working voltage (650 ISO Controller : Maxrating (5 Isolation Isolation Barrier I parasitic kVrms = Vrms C ) dV dt Galvanic Isolation ) T T B A Driver A Driver B 30 V Source Sink 600 V Driver BtoIsolation A Transient Signal V pulse ISO Load 0 : 1.5 – = 120 kV/µs 120 = 600 V V ns in 5 600 kVrms ▪ ▪ ▪ ▪ ▪ ▪ ▪ ▪ Common Mode Transient Immunity (CMTI) ▪ ▪ ▪ Latency matching& ▪ ▪ ▪ Driver sink/source current ▪ ▪ ▪ Voltage ratings Needs to be higher than than higher be to Needs Falseturn Falseturn latch or ratesslewglitching causecan High Translatessafetybetterto and efficiency skew T Channel is control loop up Lowerspeeds latency issues EMI causecan needed current than Higher losses faster times/reduced help switchingcan Booster device fast how gateDetermines charges/discharges Isolation Isolation ▪ robustto be needs voltage supply ratings: Driverside VDD Support appropriate UVLO ( Low for highGaN, for - - - - output to output output output to input off is not risky but causes poorer poorer efficiency causes but risky not is off dangerous is on A – T B , lowerskew, 푑푣 푑푡 – of systemof shoot through conditions through shoot - more precise controlmoreprecise - higher system higher efficiency - up SiC ) Driver Features: 2 of 3

VDDA VIA Pulse 1 Pulse 2 Pulse 3

N UVLO O

I VIA

T A

L VOA

O S I OVER- TEMPERATURE PROTECTION DT CONTROL VIB & GNDA DT OVERLAP Overlap protection PROTECTION ensures Pulse 2 is missing (VIB = high) VDDB VOA VDDI

UVLO N UVLO O

I No Deadtime

T Deadtime

A (VIA = low)

L VOB added

O VOB S I OVER- EN TEMPERATURE PROTECTION

GNDB ▪ Safety Features VIB ▪ Enable/Disable: Asynchronous interrupt for emergency shutdown GNDI ▪ Thermal shutdown: protection against thermal event ▪ Deadtime programmability/ Overlap protection

24 Driver Features: 3 of 3

VCE -

overcurrent causes

VCE rise

▪ Safety Features ▪ DESAT ▪ Miller clamp/ Negative gate drive

25 Si827x - GaN Si823Hx/8252x – Si, SiC, GaN Highest CMTI CMTI upto 300 kV/µs, 4.0 A drive/ 30 V driver VDD CMTI upto 125 kV/µs, 4.0 A drive / 30 V driver VDD Small gate drive V UVLO from 3 V, Deadtime & overlap safety Booster device for fast turn-on, Dead-time/Overlap Low latency/skew Single, duals, HS/lS drivers Thermal protection, Single, duals, HS/LS drivers GaN Up to 2.5 kVrms Up to 5 kVrms Highest power/voltage Faster DSAT detection Fast switching – high CMTI Si828x – IGBT, SiC SiC Enhanced safety features CMTI up to 100 kV/µs, 4.0 A drive/ 30 V driver VDD UVLO up to 15 V, DESAT, Miller clamp, Negative gate Higher working voltage Single driver Miller Clamp Up to 5 kVrms DSAT detection IGBT

Legacy power switch Si823x/39x - Si Si823Hx/8252x – Si, SiC, GaN Standard features CMTI = 20 – 35 kV/µs, 4.0 A drive/ 24 V driver VDD CMTI upto 125 kV/µs, 4.0 A drive / 30 V driver VDD Dead-time & overlap safety Booster device for fast turn-on, Dead-time/Overlap MOSFET Duals & HS/LS drivers Thermal protection, Single, duals, HS/LS drivers Up to 5 kVrms Up to 5 kVrms

Power Switch/ Level Low Power Medium Power High Power Topology Flyback/ Forward Half Bridge/ LLC / Active Clamp Full Bridge/ Interleaved

26 Design Support: Tools and Enablement

▪ Samples/datasheets: Gate Driver Products Home Page

▪ Evaluation kits: Evaluation Kits for Gate Drivers

▪ Reference designs: Reference Design Partnerships

▪ Isolation selection: Product Selection Guide

▪ Application notes: App Notes, Design Guides Si82H9 evaluation board ▪ Bootstrap calculator: On-line bootstrap calculator with power switch extension

27 Summary

▪ Silicon Labs Has a History of Innovation ▪ First to address emissions ▪ First to use OOK (On-Off Keying) ▪ First with high CMTI gate driver ▪ Experience with Isolated Gate Drivers ▪ Strong positions in power supply, automotive and solar markets ▪ Continuous enhancement of portfolio – multiple driver families to suit every need ▪ Healthy roadmap & development in progress ▪ Applications Expertise ▪ Quick response to customers ▪ Deep knowledge in driver application challenges ▪ Intuitive web presence for online support

28 Thank You

29 Q&A Power Hour LIVE Schedule – Presentation Will Begin Shortly