DOCSLIB.ORG

CMOS NEMS for Tunable RF Switching

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
CMOS NEMS for Tunable RF Switching www.eenewseurope.com March 2019 electronics europe News News CMOS NEMS for tunable RF switching Special Focus: LEDs & OLEDs Executive Interview: Hassane El-Khoury CEO of Cypress Semiconductor european business press November 2011 Electronic Engineering Times Europe1 190205_8-4Mill_EENE_EU_Snipe.indd 1 2/4/19 11:53 AM 190305_ISOT_EENE_EU.indd 1 3/4/19 1:49 PM An Excellent Duet! © eiSos #INDUCTORDUET Coupled Inductors The WE-MCRI is an innovative molded coupled inductor with fully automated bifi lar winding process. PCIM Europe Hall 7 Booth 229 It offers an almost ideal coupling coeffi cient up to 0.995. The WE-MCRI features a soft saturation behavior with its crystalline core structure and distributed air gap. The coupled inductor range includes Up to 0.995 coupling coefficient high voltage isolation versions up to 2 kV, low profi le types and versions with various turns ratios. Up to 2.0 kV isolation Soft saturation For further information, please visit: www.we-online.com/coupled Up to 120 A ISAT and 48 A IR Large portfolio High High Various Low High High Saturation Coupling Voltage Turns Ratios Profi le Current Current WE-MCRI WE-CPIB HV WE-EHPI WE-TDC WE-CFWI WE-DCT european business press SLETT EW ER N S ake sure up to date you get the inormation News you need Embedded ANALGNews AUTOMOTIVENews LEDN LIGHTNGews POWER NNAEENTews check your magazines and News newsletters subscription here TEST & MEASUREMENT News EUROPE www.eenewseurope.com/renew MW RF - Microwave CONTENTS MARCH 2019 Dear readers, www.eenewseurope.com March 2019 Gearing up for LOPEC (Large-area, Organic & Printed Electronics Convention) to be held in Munich, our main feature this month is LEDs & OLEDs Technologies, cover- electronics europe News News ing novel process and design strategies and promising luminous and conformable user interfaces. This feature expands largely on the design of ultraviolet emitters, addressing high- value applications that have not yet been commoditized as it has been the case with the generic LED lighting market, for which LED manufacturers are struggling to make a profit due to over-supply. Other topics covered in our March edition include Microwave & RF Circuits and CMOS NEMS Automotive Electronics. for tunable RF switching Enjoy this edition of eeNews Europe and don’t hesitate to get in touch to tell us your stories, from starting up a company to developing your first prototypes, achieving your first product design-in, sharing your insight on this fast-paced industry or to contribute your expertise on some of the topics we’ll be cover- Special Focus: LEDs & OLEDs ing along the year. Executive Interview: Hassane El-Khoury CEO of Cypress Semiconductor european Julien Happich business press Editor in Chief oemer ecronc nneern mes urope 1 190205_8-4Mill_EENE_EU_Snipe.indd 1 2/4/19 11:53 AM 4 - 49: OPINION 28 - 35: MICROWAVE & RF CIRCUITS Uncommon Market: Bring the IoT to your devices with LoRaWAN Platform puts data privacy in As a radio protocol that the hands of users needs to coexist with other systems that may Last word: GloFo gets warm use the same unlicensed words, but for how long? radio bands, LoRaWAN uses spread-spectrum 6 - 16: NEWS & TECHNOLOGY technology. However, it does not employ the direct-sequenced spread-spec- Focus will make Cypress win and grow trum (DSSS) modulation found in other protocols. Hassane El-Khoury has been CEO of Cypress Semi- LoRaWAN replaces DSSS with chirp spread-spec- conductor for just over two trum (CSS) technology, which dispenses with the years having taken over from need for an accurate clock. company founder T J Rodgers in 2016. Prior to his appoint- 36 - 41: AUTOMOTIVE ELECTRONICS ment El-Khoury had spent nine years with Cypress rising to be What can GPUs bring to ADAS? the head of its automotive busi- The GPU’s highly parallel, throughput-oriented ness. eeNews Europe caught nature makes it a great up with El-Khoury at Embed- fit for the challenges of ded World in Nuremberg. ADAS. It is essentially a turbo-charged multiply, 18 - 27: LEDS & OLEDS TECHNOLOGIES accumulate engine which is the basis of neural net- Correcting 0-10V LED dimming with digital drivers work-type algorithms. The 0-10V convention for luminaire dimming is widely accepted by the lighting 46: READER OFFER industry. Unfortunately, This month, Nanoport these dimming instruc- Technology is giving tions are unidirectional, away three TacHammer and one-way communica- Developer Kits, worth tions does not offer any 400 Euros each, for indication if the luminaire eeNews Europe’s readers has dimmed or even is dimmed to the appropriate to win. lumen output level. 48: DISTRIBUTION CORNER eeNews Europe www.eenewseurope.com March 2019 News 3 UNCOMMON MARKET DATA PRIVACY Control of Anything, From Platform puts data privacy Anywhere with Peace of Mind in the hands of users Build Smart, Connected and Secure Designs By Jean-Pierre Joosting platform developed by MIT and Harvard University of Harvard. In 2016, the European Union passed the General researchers ensures that web services adhere to users’ Data Protection Regulation (GDPR), which states that users preferences on how their data are stored and shared in must consent to their data being accessed, that they have the Athe cloud. right to request their data be deleted, and that companies must Cloud computing enables users of mobile apps and web implement appropriate security measures. services to store personal data on remote data center servers. For web developers, however, these laws provide little Services often aggregate multiple users’ data across servers technical guidance for writing sophisticated apps that need to to gain insights on, say, consumer shopping patterns to help leverage user data. recommend new items to specific users, or may share data with In the past, computer scientists have designed “information advertisers. Traditionally, however, users haven’t had the power flow control” (IFC) systems that allow programmers to label pro- to restrict how their data are processed and shared. gram variables with data policies. But with so many variables In a paper, researchers from MIT and Harvard University and many possible interactions between variables, these sys- describe a platform, called Riverbed, that forces data center tems are difficult to program. Thus, no large-scale web services servers to only use data in ways that users explicitly approve. In use IFC techniques. Riverbed, a user’s web browser Primarily, Riverbed leverages or smartphone app does not the fact that the server-side code communicate with the cloud of an app can run atop a special directly. Instead, a Riverbed “monitor” program – programs proxy runs on a user’s device to that track, regulate, and verify mediate communication. When how other programs manipu- the service tries to upload user late data. The monitor creates a data to a remote service, the separate copy of the app’s code proxy tags the data with a set of for each unique policy assigned permissible uses for their data, to data. Each copy is called a called a “policy.” “universe.” The monitor ensures Users can select any number that users who share the same of predefined restrictions – such policy have their data uploaded as, “do not store my data on per- to, and manipulated by, the sistent storage” or “my data may same universe. This method only be shared with the external enables the monitor to terminate service x.com.” The proxy tags a universe’s code, if that code all the data with the selected attempts to violate the universe’s policy. data policy. In the datacenter, Riverbed This process incorporates assigns the uploaded data to an isolated cluster of software a custom interpreter, a program that compiles programming components, with each cluster processing only data tagged language into code that’s understood by a computer. Interpret- with the same policies. For example, one cluster may contain ers are also used to help runtime programs implement low-level data that can’t be shared with other services, while another may commands into an original program as it runs. The researchers hold data that can’t be written to disk. Riverbed monitors the modified a traditional interpreter to extract defined policies from server-side code to ensure it adheres to a user’s policies. If it incoming user data and labels certain variables with specific doesn’t, Riverbed terminates the service. policy direction. Labels will, for instance, denote whitelisted Riverbed aims to enforce user data preferences, while main- web services for data sharing or restrict persistent storage – taining advantages of cloud computing, such as performing meaning the data can’t be stored when the user stops using the large-scale computations on outsourced servers. “Users give a web service. lot of data to web apps for services, but lose control of how the “Say I want my data to be aggregated with other users. That data is used or where it’s going,” says first author Frank Wang, data is put into its own universe with other user data with the a recent graduate of the Department of Electrical Engineering same policy,” Wang says. “If a user doesn’t want to share any and Computer Science and the Computer Science and Artificial data with anyone, then that user has their own whole universe. Intelligence Laboratory. “We give users control to tell web apps, This way, you don’t have any cross-pollination of data.” ‘This is exactly how you can use my data.’” For developers, this makes it much easier to comply with www.microchip.com/SmartConnectedSecure On that thread, an additional perk for app developers, Wang GDPR and other privacy laws, Wang says, because users have adds, is establishing more trust with users.
Load more

Recommended publications
  • Storage Administration Guide Storage Administration Guide SUSE Linux Enterprise Server 12 SP4
    SUSE Linux Enterprise Server 12 SP4 Storage Administration Guide Storage Administration Guide SUSE Linux Enterprise Server 12 SP4 Provides information about how to manage storage devices on a SUSE Linux Enterprise Server. Publication Date: September 24, 2021 SUSE LLC 1800 South Novell Place Provo, UT 84606 USA https://documentation.suse.com Copyright © 2006– 2021 SUSE LLC and contributors. All rights reserved. Permission is granted to copy, distribute and/or modify this document under the terms of the GNU Free Documentation License, Version 1.2 or (at your option) version 1.3; with the Invariant Section being this copyright notice and license. A copy of the license version 1.2 is included in the section entitled “GNU Free Documentation License”. For SUSE trademarks, see https://www.suse.com/company/legal/ . All other third-party trademarks are the property of their respective owners. Trademark symbols (®, ™ etc.) denote trademarks of SUSE and its aliates. Asterisks (*) denote third-party trademarks. All information found in this book has been compiled with utmost attention to detail. However, this does not guarantee complete accuracy. Neither SUSE LLC, its aliates, the authors nor the translators shall be held liable for possible errors or the consequences thereof. Contents About This Guide xii 1 Available Documentation xii 2 Giving Feedback xiv 3 Documentation Conventions xiv 4 Product Life Cycle and Support xvi Support Statement for SUSE Linux Enterprise Server xvii • Technology Previews xviii I FILE SYSTEMS AND MOUNTING 1 1 Overview
    [Show full text]
  • For Immediate Release
    an ellisys company FOR IMMEDIATE RELEASE SerialTek Contact: Simon Thomas, Director, Sales and Marketing Phone: +1-720-204-2140 Email: [email protected] SerialTek Debuts PCIe x16 Gen5 Protocol Analysis System and Web Application New Kodiak™ Platform Brings SerialTek Advantages to More Computing and Data Storage Markets Longmont, CO, USA — February 24, 2021 — SerialTek, a leading provider of protocol test solutions for PCI Express®, NVM Express®, Serial Attached SCSI, and Serial ATA, today introduced an advancement in the PCIe® test and analysis market with the release of the Kodiak PCIe x16 Gen5 Analysis System, as well as the industry’s first calibration-free PCIe x16 add-in-card (AIC) interposer and a new web-based BusXpert™ user interface to manage and analyze traces more efficiently than ever. The addition of PCIe x16 Gen5 to the Kodiak analyzer and SI-Fi™ interposer family brings previously unavailable analysis capabilities and efficiencies to computing, datacenter, networking, storage, AI, and other PCIe x16 Gen5 applications. With SerialTek’s proven calibration-free SI-Fi interposer technology, the Kodiak’s innovative state-of-the-art design, and the new BusXpert analyzer software, users can more easily set up the analyzer hardware, more accurately probe PCIe signals, and more efficiently analyze traces. Kodiak PCIe x16 Gen5 Analysis System At the core of the Kodiak PCIe x16 analyzer is an embedded hardware architecture that delivers substantial and unparalleled advancements in capture, search, and processing acceleration. Interface responsiveness is markedly advanced, searches involving massive amounts of data are fast, and hardware filtering is flexible and powerful. “Once installed in a customer test environment the Kodiak’s features and benefits are immediately obvious,” said Paul Mutschler, CEO of SerialTek.
    [Show full text]
  • Simics* Model Library for Eagle Stream Simulation Environment
    Simics* Model Library for Eagle Stream Simulation Environment Release Notes May 2020 Revision V0.6.00 Intel Confidential Notice: This document contains information on products in the design phase of development. The information here is subject to change without notice. Do not finalize a design with this information. Intel technologies’ features and benefits depend on system configuration and may require enabled hardware, software, or service activation. Learn more at intel.com, or from the OEM or retailer. No computer system can be absolutely secure. Intel does not assume any liability for lost or stolen data or systems or any damages resulting from such losses. You may not use or facilitate the use of this document in connection with any infringement or other legal analysis concerning Intel products described herein. You agree to grant Intel a non-exclusive, royalty-free license to any patent claim thereafter drafted which includes subject matter disclosed herein. No license (express or implied, by estoppel or otherwise) to any intellectual property rights is granted by this document. The products described may contain design defects or errors known as errata which may cause the product to deviate from published specifications. Current characterized errata are available on request. This document contains information on products, services and/or processes in development. All information provided here is subject to change without notice. Contact your Intel representative to obtain the latest Intel product specifications and roadmaps. Intel disclaims all express and implied warranties, including without limitation, the implied warranties of merchantability, fitness for a particular purpose, and non-infringement, as well as any warranty arising from course of performance, course of dealing, or usage in trade.
    [Show full text]
  • NVM Express Over Fabrics
    NVM Express Over Fabrics Dave Minturn, Intel Corp. OFADevWorkshop NVMe in Fabric Environments • A primary use case for NVMe PCIe SSDs is in an all flash appliance • Hundreds or more SSDs may be attached – too many for PCIe based attach scale-out • Concern: Today remote SSD scale-out over a fabric attach uses SCSI based protocols: Requiring protocol translation Desire best performance and latency from NVMe SSD investment over fabrics like Ethernet with RDMA (iWARP,RoCE), InfiniBand™, and Intel® Omni-Path Architecture Realizing Benefit of Next Gen NVM over Fabrics • PCIe NVMe SSD latency may be < 10 µs with Next Generation NVM • Using a SCSI-based protocol for remote NVMe access ads over 100 µs* in latency • Usage models require efficient write mirroring of PCIe Next Gen NVMe SSDs over fabrics *Source: Intel measurements. Concern: Low latency of Next Gen NVM lost in (SCSI) translation. Why NVMe over Fabrics? Simplicity, Efficiency and End-to-End NVMe Model • Simplicity of protocol enables hardware automated I/O Queues – NVMe transport bridge • No translation to or from another protocol like SCSI (in firmware/software) • Inherent parallelism of NVMe multiple I/O Queues is exposed to the host • NVMe commands and structures are transferred end-to-end • Maintains the NVMe architecture across a range of fabric types • Maintains architecture and software consistency between fabric types by standardizing a common abstraction and encapsulation definition Performance Goal: Make remote NVMe access over fabrics equivalent to local PCIe attached NVMe,
    [Show full text]
  • Delock External Enclosure for M.2 Nvme Pcie SSD with Superspeed USB 20 Gbps (USB 3.2 Gen 2X2) USB Type-C™ Female
    Delock External Enclosure for M.2 NVMe PCIe SSD with SuperSpeed USB 20 Gbps (USB 3.2 Gen 2x2) USB Type-C™ female Description This enclosure by Delock enables the installation of anM.2 PCIe NVMe SSD in 2280 format, it can be connected via USB to the PC or laptop. Therobust metal housing with cooling fins ensures an optimum temperature of the memory. SuperSpeed USB 20 Gbps The enclosure allows a data transfer rate of 20 Gbps on the USB-C™ port. Specification Item no. 42000 • Connectors: EAN: 4043619420001 external: 1 x SuperSpeed USB 20 Gbps (USB 3.2 Gen 2x2) USB Type-C™ female internal: 1 x 67 pin M.2 key M slot Country of origin: China • Chipset: Asmedia ASM2364 • Supports M.2 modules in format 2280 with key M or key B+M based on PCIe (NVMe) Package: • Retail Box • Maximum height of the components on the module: 1.5 mm, application of double- sided assembled modules supported • Supports NVM Express (NVMe) • Data transfer rate up to 20 Gbps • LED indicator for power and access • Metal housing • Dimensions (LxWxH): ca. 99 x 50 x 18 mm • Hot Plug, Plug & Play System requirements • Android 9.0 or above • Chrome OS 78.0 or above • Linux Kernel 4.6 or above • Mac OS 10.15.3 or above • Windows 8.1/8.1-64/10/10-64 • PC or laptop with a free USB Type-C™ port • PC or laptop with a free Thunderbolt™ 3 port Package content • External enclosure M.2 • Mounting material • 1 x thermal conductive pad • Screwdriver • Cable USB-C™ male to USB-C™ male, length ca.
    [Show full text]
  • Delock External USB Type-C™ Combo Enclosure for M.2 Nvme Pcie Or SATA SSD - Tool Free
    Delock External USB Type-C™ Combo Enclosure for M.2 NVMe PCIe or SATA SSD - tool free Description This enclosure by Delock enables the installation of anM.2 PCIe NVMe SSD or SATA M.2 SSD in 2280, 2260, 2242 and 2230 format. It can be connected directly via USB-C™ plug to the PC or laptop. Combo enclosure The big advantage of this Delock M.2 enclosure is that both SATA and PCIe (NVMe) M.2 SSDs can be inserted into the enclosure. The memory isautomatically recognized by the chipset and can then be used. SSD installation without tools The special feature of this enclosure is that no tools are required to install the M.2 SSD. The lid is pushed backwards and the SSD is plugged into the slot, the SSD will be attached to the PCB with a rubber nipple and then the lid is reattached until it locks. Specification Item no. 42635 • Connectors: EAN: 4043619426355 external: 1 x SuperSpeed USB 10 Gbps (USB 3.2 Gen 2) USB Type-C™ male internal: 1 x 67 pin M.2 key M slot Country of origin: China • Chipset: Realtek RTL9210B • Supports M.2 modules in format 2280, 2260, 2242 and 2230 with key M or key B+M Package: • Retail Box based on SATA or PCIe (NVMe) • Maximum height of the components on the module: 1.5 mm, application of double- sided assembled modules supported • Supports NVM Express (NVMe) • Bootable • Supports UASP • Data transfer rate up to 10 Gbps • LED indicator for power and access • Lanyard strip for cap • Dimensions (LxWxH): ca.
    [Show full text]
  • General Nvme FAQ
    General NVMe FAQ 1. What is NVMe? NVMe, more formally NVM Express, is an interface specification optimized for PCI Express based solid state drives. The interface is defined in a scalable fashion such that it can support the needs of Enterprise and Client in a flexible way. 2. Is NVMe an industry standard? NVM Express has been developed by an industry consortium, the NVM Express Workgroup. Version 1.0 of the interface specification was released on March 1, 2011. Over 80 companies participated in the definition of the interface. 3. What is the legal framework of the NVM Express organization? The legal framework is structured as a Special Interest Group (SIG). To join a company executes a Contributor/Adopter agreement. There are 11 member companies who have board seats and provide overall governance. The Governing board is called the NVM Express Promoters Group. There are seven permanent seats and six seats filled by annual elections. Contributor companies are all free to participate in regularly scheduled workinG sessions that develop the interface. All Contributors have equal input into the development of the specification. 4. Who are the companies that form the NVM Express Promoters Group? The Promoters Group is composed of 13 companies, Cisco, Dell, EMC, IDT, Intel, Marvell, Micron, NetApp, Oracle, Samsung, SanDisk, SandForce (now LSI) and STEC. Two elected seats are currently unfilled. 5. Who are the permanent board members? Cisco, Dell, EMC, IDT, Intel, NetApp, and Oracle hold the seven permanent board seats. 6. How is the specification developed? Can anyone contribute? The specification is developed by the NVM Express Working Group.
    [Show full text]
  • Samsung Portable SSD X5
    Data Sheet SAMSUNG PROPRIETARY jsdp Samsung Portable SSD X5 2018 Data Sheet )Revision 1.0 Add Title (SamsungOne300, 10pt) Revision 1.0 1 Data Sheet SAMSUNG PROPRIETARY DISCLAIMER SAMSUNG ELECTRONICS RESERVES THE RIGHT TO CHANGE PRODUCTS, INFORMATION AND SPECIFICATIONS AT ANY TIME WITHOUT NOTICE. Information in this document is provided in connection with products of Samsung Electronics Co. Ltd. (“Samsung”). Product descriptions and specifications contained in this document are for reference purposes only. All information discussed in this document may change at any time, without notice, and is provided on an “AS IS” basis, without warranties of any kind. This document and all information discussed in this document remain the sole and exclusive property of Samsung. No license of any patent, copyright, mask work, trademark or any other intellectual property right is granted by this document, express or implied, by estoppels or otherwise. Except as provided in Samsung’s terms and conditions of sale for such products, Samsung disclaims any express or implied warranty, relating to sale and/or use of Samsung products, including liability or warranties relating to fitness for a particular purpose, merchantability, or infringement of any patent, copyright or other intellectual property right. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar applications where product failure could result in loss of life or personal or physical harm, or any military or defense application, or any governmental procurement to which special terms or provisions may apply. For updates or additional information about Samsung products, contact your local Samsung store or visit Samsung website (https://www.samsung.com/portable-ssd and https://www.samsung.com/support).
    [Show full text]
  • NVM Express Drives and Digital Forensics
    NVM Express Drives and Digital Forensics by Bruce J. Nikkel [email protected] January 29, 2016 Abstract This paper provides an overview of NVME technology and discusses the relevance to the digital forensics community. The NVM Express stan- dard defines an interface and command set for communication between a host and non-volatile memory devices (SSD's). It allows the direct at- tachment of SSD storage to the PCI Express bus using PCIe slots, M.2, and U.2 interfaces. NVME was developed with a new command set and is not compatible with ATA/ATAPI or SCSI commands. The introduction of NVME to the market creates new challenges when performing digi- tal forensic acquisition and analysis, where legacy drive commands are expected. Keywords:NVME, PCIE, NVMExpress, PCIExpress, SATAExpress, M.2, U.2 1 1 Introduction to NVM Express The fundamental concepts of digital forensics describe the acquiring of storage media for use as evidence. This includes maximizing data completeness and minimizing data modification during the forensic acquisition process. Forensic tools and techniques for storage media interfaces such as IDE, ATA, SATA, SCSI, and SAS, are well known and tested in the forensics community. However, a new storage standard, NVM Express (NVME), is being introduced to the market which is not necessarily compatible with traditional digital forensics. The digital forensics community needs to be aware of this new storage standard, and take measures to ensure tools, techniques, and processes are adequately updated and tested. The NVM Express standard defines an interface and command set for commu- nication between a host and non-volatile memory devices (SSD's), attached to a system by the PCI Express bus.
    [Show full text]
  • Nvme Over Fibre Channel) Qlogic® Enhanced 16GFC / 32GFC Hbas Concurrent FCP (FC-SCSI) and FC-Nvme (Nvme/FC)
    White Paper FC-NVMe (NVMe over Fibre Channel) QLogic® Enhanced 16GFC / 32GFC HBAs Concurrent FCP (FC-SCSI) and FC-NVMe (NVMe/FC) August 2021 Background and Summary Back in 1956, the world’s first hard disk drive (HDD) shipped, setting a path for subsequent generations of drives with faster spinning media and increasing SAS speeds. Then in the early 1990s, various manufacturers introduced storage devices known today as flash- based or dynamic random access memory (DRAM)-based solid state disks (SSDs). The SSDs had no moving (mechanical) components, which allowed them to deliver lower latency and significantly faster access times. HDDs and SSDs have evolved, along with new and faster bus architectures such as PCI Express (PCIe) which have helped to further improve access speeds and reduce latency in conjunc- tion with the Non Volatile Memory Express (NVMe) standard and the ensuing products. Fibre Channel (FC) is a high-speed network technology primarily used to connect enterprise servers to HDD- or SSD-based data storage. 8GFC, 16GFC and 32GFC are the dominant speeds today (with a strong roadmap to 64GFC and beyond). Fibre Channel is standardized in the T11 Technical Committee of the International Committee for Information Technology Standards (INCITS) and has remained the dominant protocol to access shared storage for many decades. Fibre Channel Protocol (FCP) is a transport protocol that predominantly transports SCSI commands over Fibre Channel networks. With the advent of NVMe, FC has transformed to natively transport NVMe and this technological capability is called FC-NVMe. The Evolution of Disk and Fabric 32GFC & FC-NVMe 16GFC & FC-NVMe FC “NVMe” Over Fibre Channel “SCSI” Over Fibre Channel Performance Non-Volatile Memory “Spinning” Drive SAS/SATA “Flash” “Express” (NVMe) Today Time Figure 1: Evolution of Disk and Fibre Channel Fabric SCSI and NVMe Differences While the SCSI/AHCI interface comes with the benefit of wide software compatibility, it cannot deliver optimal performance when used with SSDs connected via the PCIe bus.
    [Show full text]
  • Hardware Mechanisms for Distributed Dynamic Software Analysis
    Hardware Mechanisms for Distributed Dynamic Software Analysis by Joseph Lee Greathouse A dissertation submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy (Computer Science and Engineering) in The University of Michigan 2012 Doctoral Committee: Professor Todd M. Austin, Chair Professor Scott Mahlke Associate Professor Robert Dick Associate Professor Jason Nelson Flinn c Joseph Lee Greathouse All Rights Reserved 2012 To my parents, Gail and Russell Greathouse. Without their support throughout my life, I would never have made it this far. ii Acknowledgments First and foremost, I must thank my advisor, Professor Todd Austin, for his help and guid- ance throughout my graduate career. I started graduate school with the broad desire to “research computer architecture,” but under Professor Austin’s watch, I have been able to hone this into work that interests us both and has real applications. His spot-on advice about choosing topics, performing research, writing papers, and giving talks has been an invaluable introduction to the research world. The members of my committee, Professors Robert Dick, Jason Flinn, and Scott Mahlke, also deserve special gratitude. Their insights, comments, and suggestions have immea- surably improved this dissertation. Together their expertise spans low-level hardware to systems software and beyond. This meant that I needed to ensure that any of my ideas were defensible from all sides. I have been fortunate enough to collaborate with numerous co-authors. I have often published with Professor Valeria Bertacco, who, much like Professor Austin, has given me invaluable advice during my time at Michigan. I am extremely lucky to have had the chance to work closely with Ilya Wagner, David Ramos, and Andrea Pellegrini, all of whom have continued to be good friends even after the high-stress publication process.
    [Show full text]
  • Case Studies: Memory Behavior of Multithreaded Multimedia and AI Applications
    Case Studies: Memory Behavior of Multithreaded Multimedia and AI Applications Lu Peng*, Justin Song, Steven Ge, Yen-Kuang Chen, Victor Lee, Jih-Kwon Peir*, and Bob Liang * Computer Information Science & Engineering Architecture Research Lab University of Florida Intel Corporation {lpeng, peir}@cise.ufl.edu {justin.j.song, steven.ge, yen-kuang.chen, victor.w.lee, bob.liang}@intel.com Abstract processor operated as two logical processors [3]. Active threads on each processor have their own local states, Memory performance becomes a dominant factor for such as Program Counter (PC), register file, and today’s microprocessor applications. In this paper, we completion logic, while sharing other expensive study memory reference behavior of emerging components, such as functional units and caches. On a multimedia and AI applications. We compare memory multithreaded processor, multiple active threads can be performance for sequential and multithreaded versions homogenous (from the same application), or of the applications on multithreaded processors. The heterogeneous (from different independent applications). methodology we used including workload selection and In this paper, we investigate memory-sharing behavior parallelization, benchmarking and measurement, from homogenous threads of emerging multimedia and memory trace collection and verification, and trace- AI workloads. driven memory performance simulations. The results Two applications, AEC (Acoustic Echo Cancellation) from the case studies show that opposite reference and SL (Structure Learning), were examined. AEC is behavior, either constructive or disruptive, could be a widely used in telecommunication and acoustic result for different programs. Care must be taken to processing systems to effectively eliminate echo signals make sure the disruptive memory references will not [4].
    [Show full text]