UPC: A Portable High Performance Dialect of

Kathy Yelick

Christian Bell, Dan Bonachea, Wei Chen, Jason Duell, Paul Hargrove, Parry Husbands, Costin Iancu, Wei Tu, Mike Welcome

Unified Parallel C at LBNL/UCB Parallelism on the Rise

1000000.00001P Aggregate Systems Performance

100000.0000 100T Earth Simulator ASCI Q ASCI White 10000.0000 SXSX---66 10T VPP5000 SXSX---55 SR8000G1 VPP800 ASCI Blue Increasing 1000.00001T ASCI Red VPP700 ASCI Blue Mountain SX-SX-44 T3E SX-4 T3E SR8000 Paragon Parallelism VPP500 SR2201/2K NWT/166 100G100.0000 T3D CMCM---55 SXSX---3R3R T90 SS---38003800 SXSX---33 SR2201 10G10.0000 C90 Single CPU FLOPS FLOPS FLOPS FLOPS VP2600/1 CRAYCRAY---222YYY---MP8MP8 0 Performance SXSX---22 SS---820/80820/80 1.0000 10GHz 1G SS---810/20810/20 VPVP---400400 XX---MPMP VPVP- --200200 100M0.1000 1GHz CPU Frequencies 10M0.0100 100MHz

1M0.0010 10MHz 1980 1985 1990 1995 2000 2005 2010 • 1.8x annual performance increase Year - 1.4x from improved technology and on-chip parallelism - 1.3x in processor count for larger machines Unified Parallel C at LBNL/UCB Parallel Programming Models

• Parallel software is still an unsolved problem !

• Most parallel programs are written using either: - with a SPMD model - for scientific applications; scales easily - with threads in OpenMP, Threads, or Java - non-scientific applications; easier to program • Partitioned Global Address Space (PGAS) Languages - global address space like threads (programmability) - SPMD parallelism like MPI (performance) - local/global distinction, i.e., layout matters (performance)

Unified Parallel C at LBNL/UCB Partitioned Global Address Space Languages • Explicitly-parallel programming model with SPMD parallelism - Fixed at program start-up, typically 1 per processor • Global address space model of memory - Allows to directly represent distributed data structures • Address space is logically partitioned - Local vs. remote memory (two-level hierarchy) • Programmer control over performance critical decisions - Data layout and communication • Performance transparency and tunability are goals - Initial implementation can use fine-grained shared memory • Base languages differ: UPC (C), CAF (Fortran), Titanium (Java)

Unified Parallel C at LBNL/UCB UPC Design Philosophy

• Unified Parallel C (UPC) is: - An explicit parallel extension of ISO C - A partitioned global address space language - Sometimes called a GAS language • Similar to the C language philosophy - Concise and familiar syntax - Orthogonal extensions of semantics - Assume are clever and careful - Given them control; possibly close to hardware - Even though they may get intro trouble • Based on ideas in Split-C, AC, and PCP

Unified Parallel C at LBNL/UCB A Quick UPC Tutorial

Unified Parallel C at LBNL/UCB Virtual Machine Model

Thread0 Thread1 Threadn

X[0] X[1] X[P] Shared

Global Global ptr: ptr: ptr: Private address space

• Global address space abstraction - Shared memory is partitioned over threads - Shared vs. private memory partition within each thread - Remote memory may stay remote: no automatic caching implied - One-sided communication through reads/writes of shared variables • Build data structures using - Distributed arrays - Two kinds of pointers: Local vs. global pointers (“pointers to shared”)

Unified Parallel C at LBNL/UCB UPC

• Threads work independently in a SPMD fashion - Number of threads given by THREADS set as compile time or runtime flag - MYTHREAD specifies thread index (0..THREADS-1) - upc_barrier is a global synchronization: all wait • Any legal C program is also a legal UPC program

#include /* needed for UPC extensions */ #include main() { printf("Thread % of %d: hello UPC world\n", MYTHREAD, THREADS); }

Unified Parallel C at LBNL/UCB Private vs. Shared Variables in UPC • C variables and objects are allocated in the private memory space • Shared variables are allocated only once, in thread 0’s space shared int ours; int mine; • Shared arrays are spread across the threads shared int x[2*THREADS] /* cyclic, 1 element each, wrapped */ shared int [2] y [2*THREADS] /* blocked, with block size 2 */ • Shared variables may not occur in a function definition unless static

Thread0 Thread1 Threadn

ours: x[0,n+1] x[1,n+2] x[n,2n] Shared y[0,1] y[2,3] y[2n-1,2n] space Private mine: Global address Global address mine: mine:

Unified Parallel C at LBNL/UCB Work Sharing with upc_forall()

shared int v1[N], v2[N], sum[N]; void main() { cyclic layout int i; i would for(i=0;upc_forall i

• This owner computes idiom is common, so UPC has upc_forall(init; test; loop; affinity) statement; • Programmer indicates the iterations are independent - Undefined if there are dependencies across threads - Affinity expression indicates which iterations to run - Integer: affinity%THREADS is MYTHREAD - Pointer: upc_threadof(affinity) is MYTHREAD

Unified Parallel C at LBNL/UCB Memory Consistency in UPC

• Shared accesses are strict or relaxed, designed by: - A pragma affects all otherwise unqualified accesses - #pragma upc relaxed - #pragma upc strict - Usually done by including standard .h files with these - A type qualifier in a declaration affects all accesses - int strict shared flag; - A strict or relaxed cast can be used to override the current pragma or declared qualifier. • Informal semantics - Relaxed accesses must obey dependencies, but non-dependent access may appear reordered by other threads - Strict accesses appear in order: sequentially consistent

Unified Parallel C at LBNL/UCB Other Features of UPC

• Synchronization constructs - Global barriers - Variant with labels to document matching of barriers - Split-phase variant (upc_notify and upc_wait) - Locks - upc_lock, upc_lock_attempt, upc_unlock • Collective communication library - Allows for asynchronous entry/exit shared [] int A[10]; shared [10] int B[10*THREADS]; // Initialize A. upc_all_broadcast(B, A, sizeof(int)*NELEMS, UPC_IN_MYSYNC | UPC_OUT_ALLSYNC ); • Parallel I/O library

Unified Parallel C at LBNL/UCB The Berkeley UPC Compiler

Unified Parallel C at LBNL/UCB Goals of the Berkeley UPC Project

• Make UPC Ubiquitous on - Parallel machines - Workstations and PCs for development - A portable compiler: for future machines too

• Components of research agenda: 1. Runtime work for Partitioned Global Address Space (PGAS) languages in general 2. Compiler optimizations for parallel languages 3. Application demonstrations of UPC

Unified Parallel C at LBNL/UCB Berkeley UPC Compiler

• Compiler based on UPC • Multiple front-ends, including gcc • Intermediate form called WHIRL Higher WHIRL • Current focus on C backend • IA64 possible in future Optimizing C + • UPC Runtime transformations Runtime • Pointer representation • Shared/distribute memory Lower WHIRL • Communication in GASNet • Portable Assembly: IA64, • Language-independent MIPS,… + Runtime

Unified Parallel C at LBNL/UCB Optimizations

• In Berkeley UPC compiler - Pointer representation - Generating optimizable single processor code - Message coalescing (aka vectorization) • Opportunities - forall loop optimizations (unnecessary iterations) - Irregular data set communication (Titanium) - Sharing inference - Automatic relaxation analysis and optimizations

Unified Parallel C at LBNL/UCB Pointer-to-Shared Representation

• UPC has three difference kinds of pointers: - Block-cyclic, cyclic, and indefinite (always local) • A pointer needs a “phase” to keep track of where it is in a block - Source of overhead for updating and de-referencing - Consumes space in the pointer Address Thread Phase

• Our runtime has special cases for: - Phaseless (cyclic and indefinite) – skip phase update - Indefinite – skip thread id update - Some machine-specific special cases for some memory layouts • Pointer size/representation easily reconfigured - 64 bits on small machines, 128 on large, word or struct

Unified Parallel C at LBNL/UCB Performance of Pointers to Shared

Pointer-to-shared operations Cost of shared remote access

50 ptr + int -- HP 45 ptr + int -- Berkeley 40 6000 ptr == ptr -- HP 35 5000 30 ptr == ptr-- Berkeley 4000 25 3000 20 2000

15 ns/cycle) 10 1000 # of cycles (1.5 (1.5 cycles # of

# of cycles (1.5 ns/cycle) (1.5 # of cycles 5 0 0 generic cyclic indefinite HP read Berkeley HP write Berkeley type of pointer read write

• Phaseless pointers are an important optimization - Indefinite pointers almost as fast as regular C pointers - General blocked cyclic pointer 7x slower for addition • Competitive with HP compiler, which generates native code - Both compiler have improved since these were measured

Unified Parallel C at LBNL/UCB Generating Optimizable (Vectorizable) Code

Livermore Loops

1.15

1.1

1.05

1

0.95

C time/ UPC time C time/ 0.9

0.85 1 3 5 7 9 11 13 15 17 19 21 23 Kernel • Translator generated C code can be as efficient as original C code • Source-to-source translation a good strategy for portable PGAS language implementations Unified Parallel C at LBNL/UCB NAS CG: OpenMP style vs. MPI style

NAS CG Performance 120 100 UPC (OpenMP style) 80 60 UPC (MPI Style)

second 40 MPI Fortran 20 MFLOPS per thread/ thread/ per MFLOPS 0 24812 Threads (SSP mode, two nodes) • GAS language outperforms MPI+Fortran (flat is good!) • Fine-grained (OpenMP style) version still slower • shared memory programming style leads to more overhead (redundant boundary computation) • GAS languages can support both programming styles Unified Parallel C at LBNL/UCB Message Coalescing

• Implemented in a number of parallel Fortran compilers (e.g., HPF) • Idea: replace individual puts/gets with bulk calls • Targets bulk calls and index/strided calls in UPC runtime (new) • Goal: ease programming by speeding up shared memory style shared [0] int * r; int lr[U-L]; … … for (i = L; i < U; i++) upcr_memget(lr, &r[L], U-L); exp1 = exp2 + r[i]; for (i = L; i < U; i++) exp1 = exp2 + lr[i-L];

Unoptimized loop Optimized Loop

Unified Parallel C at LBNL/UCB Message Coalescing vs. Fine- grained

over fine-grained code

250 elan comp- indefinite 200 elan comp-cyclic 150 100 speedup 50 0 02468 Threads • One thread per node • Vector is 100K elements, number of rows is 100*threads • Message coalesced code more than 100X faster • Fine-grained code also does not scale well - Network overhead

Unified Parallel C at LBNL/UCB Message Coalescing vs. Bulk

comp-indefinite matvec multiply (elan) matvec multiply -- lapi man-indefnite comp-cyclic 0.7 0.5 man-cyclic 0.6 comp-indefinite 0.5 man-indefnite 0.4 0.4 comp-cyclic 0.3 0.3 man-cyclic 0.2 0.2

time (seconds) 0.1

Time (seconds) Time 0.1 0 0 2468 2468 Threads Threads

• Message coalescing and bulk style code have comparable performance - For indefinite array the generated code is identical - For cyclic array, coalescing is faster than manual bulk code on elan - memgets to each thread are overlapped - Points to need for language extension

Unified Parallel C at LBNL/UCB Automatic Relaxtion

• Goal: simplify programming by giving programmers the illusion that the compiler and hardware are not reordering • When compiling sequential programs: x = expr1; y = expr2; y = expr2; x = expr1;

Valid if y not in expr1 and x not in expr2 (roughly) • When compiling parallel code, not sufficient test.

Initially flag = data = 0 Proc A Proc B data = 1; while (flag!=1); flag = 1; ... = ...data...;

Unified Parallel C at LBNL/UCB Cycle Detection: Dependence Analog

• Processors define a “program order” on accesses from the same thread P is the union of these total orders • Memory system define an “access order” on accesses to the same variable A is access order (read/write & write/write pairs)

write data read flag

write flag read data • A violation of sequential consistency is cycle in P U A. • Intuition: time cannot flow backwards.

Unified Parallel C at LBNL/UCB Cycle Detection

• Generalizes to arbitrary numbers of variables and processors

write x write y read y

read y write x

• Cycles may be arbitrarily long, but it is sufficient to consider only cycles with 1 or 2 consecutive stops per processor

Unified Parallel C at LBNL/UCB Static Analysis for Cycle Detection

• Approximate P by the control flow graph • Approximate A by undirected “dependence” edges • Let the “delay set” D be all edges from P that are part of a minimal cycle write z read x write y read x read y write z • The execution order of D edge must be preserved; other P edges may be reordered (modulo usual rules about serial code) • Conclusions: - Cycle detection is possible for small language - Synchronization analysis is critical - Open: is pointer/array analysis accurate enough for this to be practical?

Unified Parallel C at LBNL/UCB GASNet: Communication Layer for PGAS Languages

Unified Parallel C at LBNL/UCB GASNet Design Overview - Goals

• Language-independence: support multiple PGAS languages/compilers - UPC, Titanium, Co-array Fortran, possibly others.. - Hide UPC- or compiler-specific details such as pointer-to-shared representation • Hardware-independence: variety of parallel arch., OS's & networks - SMP's, clusters of uniprocessors or SMPs - Current networks: - Native network conduits: Myrinet GM, Quadrics Elan, Infiniband VAPI, IBM LAPI - Portable network conduits: MPI 1.1, Ethernet UDP - Under development: Cray X-1, SGI/Cray Shmem, Dolphin SCI - Current platforms: - CPU: x86, Itanium, Opteron, Alpha, Power3/4, SPARC, PA-RISC, MIPS - OS: Linux, Solaris, AIX, Tru64, Unicos, FreeBSD, IRIX, HPUX, Cygwin, MacOS • Ease of implementation on new hardware - Allow quick implementations - Allow implementations to leverage performance characteristics of hardware - Allow flexibility in message servicing paradigm (polling, interrupts, hybrids, etc) • Want both portability & performance Unified Parallel C at LBNL/UCB GASNet Design Overview - System Architecture

• 2-Level architecture to ease implementation: Compiler-generated code • Core API Compiler-specific runtime system - Most basic required primitives, as narrow and general as possible GASNet Extended API - Implemented directly on each network - Based heavily on active messages paradigm GASNet Core API

• Extended API Network Hardware – Wider interface that includes more complicated operations – We provide a reference implementation of the extended API in terms of the core API – Implementors can choose to directly implement any subset for performance - leverage hardware support for higher-level operations – Currently includes: – blocking and non-blocking puts/gets (all contiguous), flexible synchronization mechanisms, barriers – Just recently added non-contiguous extensions (coming up later) Unified Parallel C at LBNL/UCB GASNet Performance Summary

GASNet Put/Get Roundtrip Latency (min over msg sz) 65 60 55 put_nb 50 get_nb 45 40 35 30 25 20 15 10 Roundtrip Latency (microseconds) Latency Roundtrip 5 0 mpi elan mpi elan mpi gm mpi gm mpi lapi lapi- mpi gm mpi vapi poll quadrics lemieux quadrics myrinet myrinet myrinet infiniband Colony/GX (Alpha) opus alvarez citris pcp pcp seaborg (IA64) (x86) (IA64) (x86 PCI-X) (x86 PCI-X) (PowerPC)

Unified Parallel C at LBNL/UCB GASNet Performance Summary

750 GASNet Put/Get Bulk Flood Bandwidth (max over msg sz) 700 650 put_nb_bulk 600 get_nb_bulk 550 500 450 400 350 300 250 Bandwidth (MB/sec) Bandwidth 200 150 100 50 0 mpi elan mpi elan mpi gm mpi gm mpi lapi lapi- mpi gm mpi vapi poll quadrics lemieux quadrics myrinet myrinet Colony/GX myrinet infiniband (Alpha) opus alvarez citris seaborg pcp pcp (IA64) (x86) (IA64) (PowerPC) (x86 PCI-X) (x86 PCI-X)

Unified Parallel C at LBNL/UCB GASNet vs. MPI on Infiniband

Roundtrip Latency of GASNet vapi-conduit and MVAPICH 0.9.1 MPI

30 MPI_Send/MPI_Recv ping-pong gasnet_put_nb + sync 25

20

15

10 Roundtrip Latency (us) Latency Roundtrip

5

0 1 2 4 8 16 32 64 128 256 512 1KB 2KB Message Size (bytes) OSU MVAPICH widely regarded as the "best" MPI implementation on Infiniband MVAPICH code based on the FTG project MVICH (MPI over VIA) GASNet wins because fully one-sided, no tag matching or two-sided sync.overheads MPI semantics provide two-sided synchronization, whether you want it or not Unified Parallel C at LBNL/UCB GASNet vs. MPI on Infiniband

Bandwidth of GASNet vapi-conduit and MVAPICH 0.9.1 MPI

800

MVAPICH MPI 700 gasnet_put_nb_bulk (source pre-pinned)

gasnet_put_nb_bulk (source not pinned) 600

500

400

300 Bandwidth (MB/sec) Bandwidth

200

100

0 1 2 4 8 16 32 64 128 256 512 1KB 2KB 4KB 8KB 16KB 32KB 64KB 128KB 256KB 512KB 1MB Message Size (bytes) GASNet significantly outperforms MPI at mid-range sizes - the cost of MPI tag matching Yellow line shows the cost of naïve bounce-buffer pipelining when local side not prepinned - memory registration is an important issue Unified Parallel C at LBNL/UCB Applications in PGAS Languages

Unified Parallel C at LBNL/UCB PGAS Languages Scale

NAS MG in UPC (Berkeley Version)

250,000

200,000

150,000

100,000 MFlops

50,000

0 128 256 512 1024 # Procs • Use of the memory model (relaxed/strict) for synchronization • Medium sized messages done through array copies

Unified Parallel C at LBNL/UCB Performance Results Berkeley UPC FT vs MPI Fortran FT

NAS FT 2.3 Class A - NERSC Alvarez Cluster

2500

UPC (blocking) 2000 UPC (non-blocking) MPI Fortran 1500

MFLOPS 1000

500

0 4 8 16 32 Threads (1 per node) 80 Dual PIII-866MHz Nodes running Berkeley UPC (gm-conduit /Myrinet 2K, 33Mhz-64Bit bus) Unified Parallel C at LBNL/UCB Challenging Applications

• Focus on the problems that are hard for MPI - Naturally fine-grained - Patterns of sharing/communication unknown until runtime • Two examples - Adaptive Mesh Refinement (AMR) - Poisson problem in Titanium (low flops to memory/comm) - Hyperbolic problems in UPC (higher ratio, not adaptive so far) - Task parallel view (first) - Immersed boundary method simulation - Used for simulating the heart, cochlea, bacteria, insect flight,.. - Titanium version is a general framework – Specializations for the heart and cochlea - Particle methods with two structures: regular fluid mesh + list of materials

Unified Parallel C at LBNL/UCB Ghost Region Exchange in AMR

Grid 3 Grid 4 A B

Grid 1 C Grid 2

• Ghost regions exist even in the serial code - Algorithm decomposed as operations on grid patches - Nearest neighbors (7, 9, 27-point stencils, etc.) • Adaptive mesh organized by levels - Nasty meta-data problem to find neighbors - May exists only at a different level

Unified Parallel C at LBNL/UCB Distributed Data Structures for AMR

P1 P2 P1 P2

G1 G3 G4 G2

PROCESSOR 1 PROCESSOR 2

• This shows just one level of the grid hierarchy • Not an distributed array in any of the languages that support them • Note: Titanium uses this structure even for regular arrays

Unified Parallel C at LBNL/UCB Programmability Comparison in Titanium

• Ghost region exchange in AMR - 37 lines of Titanium - 327 lines of C++/MPI, of which 318 are MPI-related • Speed (single processor, full solve) - The same algorithm, Poisson AMR on same mesh - C++/Fortran Chombo: 366 seconds - Titanium by Chombo programmer: 208 seconds - Titanium after expert optimizations: 155 seconds - The biggest optimization was avoiding copies of single element arrays, which required domain/performance expert to find/fix - Titanium is faster on this platform!

Unified Parallel C at LBNL/UCB Heart Simulation in Titanium

• Programming experience - Code existed in Fortran for vector machines - Complete rewrite in Titanium - Except fast FFTs - 3 GSR years + 1.5 postdoc year - # of numerical errors found along the way - About 1 every 2 weeks - Mostly due to missing code - # of race conditions: 1

Unified Parallel C at LBNL/UCB

Actual and Modeled Performance of Immersed Boundary Method 1000 Total time (256 model) Total time (256 actual) 100 Total time (512 model) 10 Total time (512 actual)

time (secs) 1

0.1

2 4 8 6 2 4 8 6 2 4 8 1 3 6 2 5 1 2 4 1 2 5 0 0 1 2 # procs

• 5123 in < 1 second per timestep not possible • 10x increase in bisection bandwidth would fix this

Unified Parallel C at LBNL/UCB Those Finicky Users

• How do we get people to use new languages? - Needs to be incremental - Start at the bottom, not at the top of the software stack • Need to demonstrate advantages - Performance is the easiest: comes from ability to use great hardware - Productivity is harder: - Managers may be convinced by data - Programmers will vote by experience - Wait for programmer turnover • Key: language must run well everywhere - As well as the hardware allows

Unified Parallel C at LBNL/UCB PGAS Languages are Not the End of the Story

• Flat parallelism model - Machines are not flat: vectors,streams,SIMD, VLIW, FPGAs, PIMs, SMP nodes,… • No support for dynamic load balancing - Virtualize memory structure ! moving load is easier - No virtualization of processor space ! taskqueue library • No fault tolerance - SPMD model is not a good fit if nodes fail frequently • Little understanding of scientific problems - CAF and Titanium have multiD arrays - A matrix and grid are both arrays, but they’re different - Next level example: Immersed boundary method language

Unified Parallel C at LBNL/UCB To Virtualize or Not to Virtualize

• PGAS languages virtualize memory structure but not processor number • Can we provide virtualized machine, but still allow for control in mapping (separate code)?

• Why to virtualize •Why to not virtualize - Portability - Deep memory hierarchies - Fault tolerance - Expensive system - Load imbalance overhead If we design for these - Some problems match the problems, need to beat hardware; don’t want to MPI and HPC will always pay overhead be a niche

Unified Parallel C at LBNL/UCB