PIC24FJ128GA Family Data Sheet General Purpose, 16-Bit Flash Microcontrollers
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PIC24FJ128GA Family Data Sheet General Purpose, 16-Bit Flash Microcontrollers © 2006 Microchip Technology Inc. Preliminary DS39747C Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not mean that we are guaranteeing the product as “unbreakable.” Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act. Information contained in this publication regarding device Trademarks applications and the like is provided only for your convenience The Microchip name and logo, the Microchip logo, Accuron, and may be superseded by updates. It is your responsibility to dsPIC, KEELOQ, microID, MPLAB, PIC, PICmicro, PICSTART, ensure that your application meets with your specifications. PRO MATE, PowerSmart, rfPIC and SmartShunt are MICROCHIP MAKES NO REPRESENTATIONS OR registered trademarks of Microchip Technology Incorporated WARRANTIES OF ANY KIND WHETHER EXPRESS OR in the U.S.A. and other countries. IMPLIED, WRITTEN OR ORAL, STATUTORY OR OTHERWISE, RELATED TO THE INFORMATION, AmpLab, FilterLab, Migratable Memory, MXDEV, MXLAB, INCLUDING BUT NOT LIMITED TO ITS CONDITION, SEEVAL, SmartSensor and The Embedded Control Solutions QUALITY, PERFORMANCE, MERCHANTABILITY OR Company are registered trademarks of Microchip Technology FITNESS FOR PURPOSE. Microchip disclaims all liability Incorporated in the U.S.A. arising from this information and its use. Use of Microchip Analog-for-the-Digital Age, Application Maestro, dsPICDEM, devices in life support and/or safety applications is entirely at dsPICDEM.net, dsPICworks, ECAN, ECONOMONITOR, the buyer’s risk, and the buyer agrees to defend, indemnify and FanSense, FlexROM, fuzzyLAB, In-Circuit Serial hold harmless Microchip from any and all damages, claims, Programming, ICSP, ICEPIC, Linear Active Thermistor, Mindi, suits, or expenses resulting from such use. No licenses are MiWi, MPASM, MPLIB, MPLINK, PICkit, PICDEM, conveyed, implicitly or otherwise, under any Microchip PICDEM.net, PICLAB, PICtail, PowerCal, PowerInfo, intellectual property rights. PowerMate, PowerTool, REAL ICE, rfLAB, rfPICDEM, Select Mode, Smart Serial, SmartTel, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2006, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona, Gresham, Oregon and Mountain View, California. The Company’s quality system processes and procedures are for its PICmicro® 8-bit MCUs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. DS39747C-page ii Preliminary © 2006 Microchip Technology Inc. PIC24FJ128GA FAMILY General Purpose, 16-bit Flash Microcontrollers High-Performance CPU: Analog Features: • Modified Harvard Architecture • 10-bit, up to 16-channel Analog-to-Digital Converter • Up to 16 MIPS operation @ 32 MHz (A/D): • 8 MHz internal oscillator: - 500 ksps conversion rate - 4x PLL option - Conversion available during Sleep and Idle - Multiple divide options • Dual Analog Comparators with Programmable • 17-bit x 17-bit Single-Cycle Hardware Input/Output Configuration Fractional/Integer Multiplier • 32-bit by 16-bit Hardware Divider Peripheral Features: • 16 x 16-bit Working Register Array • C compiler Optimized Instruction Set Architecture: • Two 3-wire/4-wire SPI modules, supporting 4 Frame - 76 base instructions modes with 4-level FIFO Buffer 2 - Flexible addressing modes •Two IC™ modules support Multi-Master/Slave • Linear Program Memory Addressing up to 12 Mbytes mode and 7-bit/10-bit Addressing • Linear Data Memory Addressing up to 64 Kbytes • Two UART modules: • Two Address Generation Units for separate Read - Supports RS-232, RS-485 and LIN 1.2 ® and Write Addressing of Data Memory - Supports IrDA with on-chip hardware endec - Auto-Wake-up on Start bit Special Microcontroller Features: - Auto-Baud Detect - 4-level FIFO buffer • Operating Voltage Range of 2.0V to 3.6V • Parallel Master Slave Port (PMP/PSP): • Flash Program Memory: - Supports 8-bit or 16-bit data - 1000 erase/write cycles, typical - Supports 16 address lines - Flash retention 20 years, typical • Hardware Real-Time Clock/Calendar (RTCC): • Self-Reprogrammable under Software Control - Provides clock, calendar and alarm functions • Selectable Power Management modes: • Five 16-bit Timers/Counters with Programmable - Sleep, Idle and Alternate Clock modes prescaler • Fail-Safe Clock Monitor operation: • Five 16-bit Capture Inputs - Detects clock failure and switches to on-chip, • Five 16-bit Compare/PWM Outputs low-power RC oscillator • High-Current Sink/Source on select I/O pins: • On-Chip LDO Regulator 18 mA/18 mA • JTAG Boundary Scan and Programming Support • Configurable Open-Drain Output on Digital I/O pins • Power-on Reset (POR), Power-up Timer (PWRT) • Up to 5 External Interrupt Sources and Oscillator Start-up Timer (OST) • Flexible Watchdog Timer (WDT) with On-Chip, Low-Power RC Oscillator for reliable operation • In-Circuit Serial Programming™ (ICSP™) and In-Circuit Emulation (ICE) via 2 pins Program SRAM Timers 10-bit Device Pins Memory SPI I2C™ (Bytes) 16-bit A/D (ch) Input JTAG (Bytes) UART Capture Compare/ PMP/PSP Comparators PWM Output PIC24FJ64GA006 64 64K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ96GA006 64 96K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ128GA006 64 128K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ64GA008 80 64K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ96GA008 80 96K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ128GA008 80 128K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ64GA010 100 64K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ96GA010 100 96K 8K 5 5 5 2 2 2 16 2 Y Y PIC24FJ128GA010 100 128K 8K 5 5 5 2 2 2 16 2 Y Y © 2006 Microchip Technology Inc. Preliminary DS39747C-page 1 PIC24FJ128GA FAMILY Pin Diagrams 64-Pin TQFP DDCORE /V CAP PMD4/RE4 PMD3/RE3 PMD2/RE2 PMD1/RE1 RF0 ENVREG V CN15/RD6 PMRD/CN14/RD5 PMWR/OC5/IC5/CN13/RD4 PMBE/OC4/RD3 OC3/RD2 OC2/RD1 PMD0/RE0 RF1 CN16/RD7 63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 64 48 PMD5/RE5 1 SOSCO/T1CK/CN0/RC14 47 PMD6/RE6 2 SOSCI/CN1/RC13 46 PMD7/RE7 3 OC1/RD0 PMA5/SCK2/CN8/RG6 4 45 IC4/PMCS1/INT4/RD11 PMA4/SDI2/CN9/RG7 5 44 IC3/PMCS2/INT3/RD10 PMA3/SDO2/CN10/RG8 6 43 IC2/U1CTS//INT2/RD9 MCLR 7 42 IC1/RTCC/INT1/RD8 PMA2/SS2/CN11/RG9 8 PIC24FJXXGA006 41 Vss VSS 9 PIC24FJXXXGA006 40 OSC2/CLKO/RC15 VDD 10 39 OSC1/CLKI/RC12 C1IN+/AN5/CN7/RB5 11 38 VDD C1IN-/AN4/CN6/RB4 12 37 SCL1/RG2 C2IN+/AN3/CN5/RB3 13 36 SDA1/RG3 C2IN-/AN2/SS1/CN4/RB2 14 35 U1RTS/BCLK1/SCK1/INT0/RF6 PGC1/EMUC1/VREF-/AN1/CN3/RB1 15 34 U1RX/SDI1/RF2 PGD1/EMUD1/PMA6/VREF+/AN0/CN2/RB0 16 33 U1TX/SDO1/RF3 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 SS SS DD DD V V AV AV /AN10/RB10 REF /C1OUT/AN8/RB8 /BCLK2/AN14/RB14 TDI/PMA10/AN13/RB13 PMA7/C2OUT/AN9/RB9 PGD2/EMUD2/AN7/RB7 TCK/PMA11/AN12/RB12 TDO/PMA12/AN11/RB11 U2CTS PMA8/U2TX/SCL2/CN18/RF5 PMA9/U2RX/SDA2/CN17/RF4 PGC2/EMUC2/AN6/OCFA/RB6 PMA0/AN15/OCFB/CN12/RB15 TMS/PMA13/CV PMA1/U2RTS DS39747C-page 2 Preliminary © 2006 Microchip Technology Inc. © (Continued) Pin Diagrams 2006 Microchip TechnologyInc. PGD1/EMUD1/AN0/CN2/RB0 PGC1/EMUC1/AN1/CN3/RB1 80-Pin TQFP C2IN-/AN2/SS1 PMA3/SDO2/CN10/RG8 PMA5/SCK2/CN8/RG6 PMA2/SS2 PMA4/SDI2/CN9/RG7 C2IN+/AN3/CN5/RB3 C1IN+/AN5/CN7/RB5 C1IN-/AN4/CN6/RB4 TDO/INT2/RE9 TMS/INT1/RE8 /CN11/RG9 PMD7/RE7 PMD6/RE6 PMD5/RE5 T4CK/RC3 T2CK/RC1 /CN4/RB2 MCLR V V SS DD 19 18 17 16 15 14 13 12 11 10 1 20 9 8 7 6 5 4 3 2 PGC2/EMUC2/AN6/OCFA/RB6 21 80 PMD4/RE4 PGD2/EMUD2/AN7/RB7 22 79 PMD3/RE3 PMA7/VREF-/RA9 23 78 PMD2/RE2 PMA6/VREF+/RA10 24 77 PMD1/RE1 AVDD 25 76 PMD0/RE0 26 PIC24FJXXXGA008 AVSS PIC24FJXXGA008 75 RG0 Preliminary U2CTS/C1OUT/AN8/RB8 27 74 RG1 C2OUT/AN9/RB9 28 73 RF1 PMA13/CVREF/AN10/RB10 29 72 RF0 PIC24FJ128GA FAMILY PMA12/AN11/RB11 30 71 ENVREG VSS 31 70 VCAP/VDDCORE VDD 32 69 CN16/RD7 TCK/PMA11/AN12/RB12 33 68 CN15/RD6 TDI/PMA10/AN13/RB13 34 67 PMRD/CN14/RD5 66 PMWR/OC5/CN13/RD4 PMA1/U2RTS/BCLK2/AN14/RB14 35 65 CN19/RD13 PMA0/AN15/OCFB/CN12/RB15 36 IC5/RD12 CN20/U1CTS/RD14 37 64 63 PMBE/OC4/RD3 CN21/U1RTS/BCLK1/RD15