Software Variability Mechanisms for Improving Run-Time Performance
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SOFTWARE VARIABILITY MECHANISMS FOR IMPROVING RUN-TIME PERFORMANCE by Eric Norman Eide A dissertation submitted to the faculty of The University of Utah in partial fulfillment of the requirements for the degree of Doctor of Philosophy in Computer Science School of Computing The University of Utah December 2012 Copyright c Eric Norman Eide 2012 All Rights Reserved THE UNIVERSITY OF UTAH GRADUATE SCHOOL STATEMENT OF DISSERTATION APPROVAL The dissertation of Eric Norman Eide has been approved by the following supervisory committee members: Matthew Flatt , Chair October 2, 2012 Date Approved Robert R. Kessler , Member October 2, 2012 Date Approved Gary Lindstrom , Member October 2, 2012 Date Approved John Regehr , Member October 2, 2012 Date Approved Shriram Krishnamurthi , Member October 15, 2012 Date Approved and by Alan Davis , Chair of the School of Computing and by Charles A. Wight, Dean of The Graduate School. ABSTRACT A variability mechanism is a software implementation technique that realizes a choice in the features that are incorporated into a software system. Variability mechanisms are essential for the implementation of configurable software, but the nature of mechanisms as structuring abstractions is not well understood. Mechanisms are often equated with their stereotypical realizations. As a consequence, certain variability mechanisms are generally viewed as having limited applicability due to run-time performance overhead. We claim that it is feasible and useful to realize variability mechanisms in novel ways to improve the run-time performance of software systems. This claim is supported by the implementation and evaluation of three examples. The first is the flexible generation of performance-optimized code from high-level specifications. As exemplified by Flick, an interface definition language (IDL) compiler kit, concepts from traditional programming language compilers can be applied to bring both flexibility and optimization to the domain of IDL compilation. The second is a method for realizing design patterns within software that is neither object-oriented nor, for the most part, dynamically configured. By separating static software design from dynamic system behavior, this technique enables more effective and domain-specific detection of design errors, prediction of run-time behavior, and more effective optimization. The method is demonstrated using a suite of operating-system components. The third, middleware-based brokering of resources, can improve the ability of multi-agent, real-time applications to maintain quality of service (QoS) in the face of resource contention. A CPU broker, for instance, may use application feedback and other inputs to adjust CPU allocations at run time. This helps to ensure that applications continue to function, or at least degrade gracefully, under load. CONTENTS ABSTRACT ............................................................. iii LIST OF TABLES ........................................................ vii LIST OF FIGURES ....................................................... viii ACKNOWLEDGMENTS .................................................. ix CHAPTERS 1. INTRODUCTION .................................................... 1 1.1 Software Configuration and Variation . 1 1.2 Variability Mechanisms . 3 1.2.1 Binding Time . 4 1.2.2 Binding Sites . 5 1.3 Selecting a Variability Mechanism . 8 1.4 Novel Realizations of Variability Mechanisms . 9 1.4.1 Flexible and Optimizing IDL Compilation . 10 1.4.2 Static and Dynamic Structure in Design Patterns . 13 1.4.3 Dynamic CPU Management for Real-Time Systems . 14 1.5 References . 16 PART I FLICK: A FLEXIBLE, OPTIMIZING IDL COMPILER ................ 19 2. FLICK: A FLEXIBLE, OPTIMIZING IDL COMPILER ..................... 20 2.1 Introduction . 20 2.2 Flick . 23 2.2.1 Front Ends . 27 2.2.1.1 AOI: The Abstract Object Interface . 27 2.2.2 Presentation Generators . 28 2.2.2.1 MINT: The Message Interface . 30 2.2.2.2 CAST: The C Abstract Syntax Tree . 30 2.2.2.3 PRES: The Message Presentation . 31 2.2.2.4 PRES C: The C Presentation . 32 2.2.3 Back Ends . 32 2.3 Optimization . 33 2.3.1 Efficient Memory Management . 33 2.3.1.1 Marshal Buffer Management . 33 2.3.1.2 Parameter Management . 34 2.3.2 Efficient Copying and Presentation . 35 2.3.2.1 Data Copying . 35 2.3.2.2 Specialized Transports . 36 2.3.3 Efficient Control Flow . 36 2.3.3.1 Inline Code . 36 2.3.3.2 Message Demultiplexing . 37 2.4 Experimental Results . 38 2.4.1 Marshal Throughput . 39 2.4.2 End-to-End Throughput . 41 2.4.3 End-to-End Throughput Compared to MIG . 45 2.5 Related Work . 46 2.6 Conclusion . 48 2.7 Availability . 48 2.8 Acknowledgments . 48 2.9 References . 49 PART II STATIC AND DYNAMIC STRUCTURE IN DESIGN PATTERNS ...... 51 3. STATIC AND DYNAMIC STRUCTURE IN DESIGN PATTERNS ........... 52 3.1 Introduction . 52 3.2 The Unit Model . 55 3.2.1 Atomic and Compound Units . 55 3.2.2 Exploiting Static Configuration . 57 3.2.2.1 Constraint Checking . 57 3.2.2.2 Cross-Component Inlining . 58 3.2.3 Using Units Without Language Support . 58 3.3 Expressing Patterns with Units . 59 3.3.1 A Method for Expressing Patterns with Units . 61 3.3.2 Example: Managing Block Devices . 65 3.3.3 Example: OSKit Filesystems . 69 3.3.3.1 Abstract Factory . 69 3.3.3.2 Adapter . 69 3.3.3.3 Decorator . 71 3.3.3.4 Strategy . 71 3.3.3.5 Command . 72 3.3.3.6 Singleton . 72 3.3.4 Discussion . 72 3.4 Analysis . 77 3.4.1 Benefits of Our Approach . 77 3.4.1.1 Checking Architectural Constraints . 77 3.4.1.2 Performance Optimization . 78 3.4.1.3 Ease of Understanding and Code Reuse . 79 3.4.2 Costs of Our Approach . 80 3.5 Related Work . 81 3.6 Conclusion . 83 3.7 Acknowledgments . 83 3.8 References . 84 v PART III DYNAMIC CPU MANAGEMENT FOR REAL-TIME, MIDDLEWARE- BASED SYSTEMS ............................................... 86 4. DYNAMIC CPU MANAGEMENT FOR REAL-TIME, MIDDLEWARE-BASED SYSTEMS ........................................................... 87 4.1 Introduction . 87 4.2 Related Work . ..