Advanced Imager Technology Development at MIT Lincoln Laboratory

Vyshnavi Suntharalingam [email protected] Barry E. Burke, James Gregory, Robert K. Reich MIT Lincoln Laboratory

Detectors for Astronomy, ESO Garching 12-16 October 2009

MIT Lincoln Laboratory The MIT Lincoln Laboratory portion of this work was performed in part under a Collaboration Agreement between MIT Lincoln Laboratory and University of ESO-DFA-1 Hawaii (Pan-STARRs), sponsored in part by NASA, and the Air Force under the Department of the Air Force contract number FA8721-05-C-0002. Opinions, VS 10/13/09 interpretations, conclusions, and recommendations are those of the authors and are not necessarily endorsed by the United States Government. Outline

•
Overview of MIT-LL X-ray, visible to NIR imaging technology –
Tiled CCD Imagers for astronomy –
Devices for adaptive optics –
Back-illumination processes

•
Next-generation technologies –
Stitched large-format, small-pixel CCDs –
Four-side abuttable CCD and 3-D CMOS image sensors

•
Summary

MIT Lincoln Laboratory ESO-DFA-2 VS 10/13/09 Imaging Devices at MIT Lincoln Laboratory

Program Areas Space- and Ground-based Silicon Photon High-Speed Imaging Surveillance and Scientific Imagers Counting Arrays

•
Curved CCDs •
Orthogonal Transfer Arrays •
High-speed camera electronics •
Large-format, small-pixel •
High-fill-factor APDs •
CMOS x-ray sensor imagers •
CMOS ROIC for photon counting •
Single-electron sensitive readout •
Multi-sample CCD Technology Elements Silicon Detector Detector Design Advanced Packaging Electronics Process Development

MIT Lincoln Laboratory ESO-DFA-3 VS 10/13/09 Microelectronics Facility Upgrade to 200-mm Silicon Wafer Size

• Three-year capability upgrade in progress – First 200-mm device lots beginning Feb. 2011 • Nine CCID-20s on a 200-mm wafer – 15-
m pixel, 2K x 4K, 32mm x 63mm

CCID-20

CCID-20

illustration

100-mm wafer
150-mm wafer
200-mm wafer
Two devices (2K x 4K)
Six devices
Nine devices
MIT Lincoln Laboratory ESO-DFA-4 VS 10/13/09 Tiled CCD Imagers for Astronomy

60 Orthogonal-Transfer CCDs Pan-STARRs (3° WFOV) 1.36 Gpixels 12-CCD UH/CFHT FPA 100Mpix Image from First Light (August 2007)

1.2 mm

200
m

MIT Lincoln Laboratory ESO-DFA-5 VS 10/13/09 Lincoln Laboratory High-Speed CCDs for Adaptive Optics

1985 1990 1995 2000 2005 2010

First AO devices
256
256, 32/64 ports (in design)

64
64, CCD for 160
160, 4 ports 128
128, 16 ports curvature 20 ports; wavefront pJFET sense Polar-coordinate sensing amplifier imager (in design)

Electronic shutter CCD and camera electronics

MIT Lincoln Laboratory ESO-DFA-6 VS 10/13/09 Performance of pJFET-based Output Circuit (rms electrons) (rms electrons) Amplifier read noise Amplifier

Output Data Rate (MHz)

Noise: pJFET vs. nMOSFET

MIT Lincoln Laboratory ESO-DFA-7 VS 10/13/09 Output Circuit Comparison

Sense-node capacitance is lower Noise spectral voltage is lower (
higher responsivity) for JFET for JFET than MOSFET
than MOSFET

MIT Lincoln Laboratory ESO-DFA-8 VS 10/13/09 Back Illumination Processes MBE and Laser Anneal (IILA)

MBE Delivers Reflection-Limited QE Room Temperature (20°C) Result 0.8 60-sec Integration Time 0.7 Reflectance Limit Wafer-level Image 0.6 MBE No ARC 0.5 of Buckman Tavern here 0.4 0.3 External QE External 0.2 Front Illuminated 0.1 200 300 400 500 600 700 800 900 1000 1100 Wavelength (nm)

1.E-08 MBE backside dark current 10x better than IILA Clock dithering can suppress front interface states (IS)

) 2 1.E-09

1.E-10

1.E-11 Dark Current (A/cm Current Dark 1.E-12 Vignetting from test setup IILA-IS IILA- MBE-IS MBE-Bulk Estimated MBE- Back & Back Bulk Back MIT Lincoln Laboratory ESO-DFA-9 VS 10/13/09 Dark Current Sources Outline

•
Overview of MIT-LL X-ray, visible to NIR imaging technology –
Tiled CCD Imagers for astronomy –
Devices for adaptive optics –
Back-illumination processes

•
Next-generation technologies –
Stitched large-format, small-pixel CCDs –
Four-side abuttable, 3-D CMOS image sensors

•
Summary

MIT Lincoln Laboratory ESO-DFA-10 VS 10/13/09 Deeply Scaled CCD Process Technology

•
Small pixels, low-voltage, CMOS- 8-μm Two Poly OTCCD compatible operation pixel •
Demonstrated small-array CCDs –
Simplified single and two poly fabrication 10μm –
Reduced pixel dimension (8-, 5-, 2-μm) –
~150,000 e- well capacity for 8-μm 5-μm Single Poly OTCCD pixel at 3V pixel

•
Current efforts: Apply to large area devices 10μm –
Deep ultraviolet photolithography for submicron features (pixel sizes to 2 2-
m
m) pixel CCD –
Stitching for large format imagers

10μm

MIT Lincoln Laboratory ESO-DFA-11 VS 10/13/09 Large-Format, Modular CCD Imagers

•
Example: 3K x 3K OTCCD image sensor with 8
m x 8
m pixels •
Pixels with submicron dimensions require high-resolution (248-nm) patterning –
Lithography field size is smaller than device size •
Design is fractured into functional blocks onto a multi-field reticle and precisely stitched back together on wafer

Layout Fractured Design Concept Multi-field Reticle Reassembled Design on Wafer Functional Blocks

MIT Lincoln Laboratory ESO-DFA-12 VS 10/13/09 Completed 3K x 3K OTCCD Devices

•
Large-area devices (26 mm x 50 mm) fabricated with low-voltage CCD technology •
Stitching methods achieve 35nm (3
) precision with 8-
m pixel active devices •
Device test results expected in Dec. 2009 •
Process technology will be migrated to 200-mm substrates 150 mm

Stitched Reference Image Boundary (No Stitching Required)

Poly-1 dual poly single poly gate OT Image Array Frame Store channel 300 nm stop

300 nm

8
m 1
m 1
m Stitch boundary MIT Lincoln Laboratory ESO-DFA-13 VS 10/13/09 Four-Side Abuttable 3-D CMOS Image Sensor Development

Conventional Monolithic 3-D Pixel CMOS Image Sensor Light PD pixel 3T PD pixel ROIC Addressing Addressing Processor Addressing A/D, CDS, …

•
Pixel electronics and •
100% fill factor detector detectors share area •
Fabrication optimized by layer •
Fill factor loss function •
Co-optimized fabrication •
Local image processing •
Control and support –
Power and noise management electronics placed outside of •
Scalable to large-area focal imaging area planes

MIT Lincoln Laboratory ESO-DFA-14 VS 10/13/09 Oxide-Bonded 3D-I Technology

•
Smaller pixels than bump bonding •
100% Fill Factor for Back Illumination

Center of Pixel Array

Tier-2 SOI Transistor 3-D Readout Via

Oxide Bond

Tier-1 Single Detector 50
m thick 8-
m 10
m pixelMIT Lincoln Laboratory ESO-DFA-15 VS 10/13/09 Example 3D Imager Demonstrations (1)

Two-Tier, CMOS Image Sensor Three-Tier, GmAPD Laser Radar 1024x1024 Array, 8-μm pixel 64x64 Array, 50-μm pixel

Completed Pixel Cross-Sectional SEM
10μm 3D
Back Illum. Chip Via
Transistors
Photomicrograph Tier-3: 1.5V SOI CMOS Layer

3D
Transistors
Via
8μm Tier-2: 3.5V SOI CMOS Layer

Tier-1: 30V Back Illuminated APD Layer

Target: Captured Range Cone and Support Post In Front of Flat Plate Image

Shadow Tier-3

Wafer-probe-levelWafer-probe-level test test Off-chip A-to-D Off-chip A-to-D -6 +3 Mockup Tile 8 mm 3 feet with ADC Chip IEEE ISSCC 2005 IEEE ISSCC 2006 MIT Lincoln Laboratory ESO-DFA-16 VS 10/13/09 Example 3D Imager Demonstrations (2)

Seven-Tier, Four-side Abuttable CMOS APS Two-Tier, InGaAs Detector 1024x1024 Array, 8-μm pixel 8-μm pixel

Pixel Cross-Sectional SEM
~70 m SOI μ readout Tier-2: 3.5V SOI CMOS Layer
3D via 8μm Tier-1: InGaAs PIN diode (epi)

64-ch ADC InP substrate 10 μm

Photo-response in PIN diode current Captured Image at 10fps Fe55 X-ray histogram (companion two tier sensor) 2 300 1 A)

12.6 electrons μ 0 200 noise Dark 180 eV -1 Counts 100

Current ( -2 Light 0 20 40 60 80 100 -2.0 -1.5 -1.0 -0.5 0 0.5 From temporary support Signal (mV) Bias (V) IEEE IEEE ISSCC 2009 IEEE Trans. Elec. Dev.2009 3DIC 2009 MIT Lincoln Laboratory ESO-DFA-17 VS 10/13/09 Summary

•
Lincoln Laboratory develops tiled CCD imagers with novel architectures for astronomy –
First gigapixel focal plane successfully deployed •
New device and process improvements continue to increase responsivity and reduce dark current

•
Next-generation imagers in development –
Small pixel, large format, four-side abuttable devices –
CCD and CMOS-based detectors –
Back-illuminated, 100% fill factor, 3-D integrated image sensors –
Advanced package development for higher data rate, tiled image sensors

MIT Lincoln Laboratory

ESO-DFA-18 VS 10/13/09 Acknowledgments

Design Microelectronics Lab Microelectronics Lab Brian Aull Doug Young Sal Ieni Bob Berger Andy Loomis John Jarmalowicz Chang-Lee Chen Chenson Chen Scott Ladd Michael Cooper Jeff Knecht Renée Lambert Brad Felton Donna Yost Debbie Landers Kay Johnson Kevin Newcomb Jim Lawless Keith Percival Keith Warner Jamie Mongiello Dennis Rathman Dave Astolfi Chuck Monoxelos Bruce Wheeler Vladimir Bolkhovsky Alan O’Dea Ken Belanger John Pentoliros Desi Biasella Segundo Pichardo Laurie Briere Joe Powers Marc Brunelle Sandra Roy John Burke Angel Reinold Testing Joe Ciampi Dolly Shibles Harry Clark Jeff Decaprio Chris Weinberg David Craig Diane DeCastro Peter O’Brien William McGonagle Charlie Doherty Wendy Ruth Dan O’Mara Pascale Gouker T.J. Wlodarczak Tony Soares Yvette Grinbush C. Keast (Solid State Div.) Paul Healey D. Shaver (Solid State Div.) Bob Healey Denise Holohan

MIT Lincoln Laboratory ESO-DFA-19 VS 10/13/09 Backup

MIT Lincoln Laboratory ESO-DFA-20 VS 10/13/09 Tile Block Diagram

•
Vertically stacked Light •
Pixel readout on Tier-2 •
Timing control in Stack •
64-ch 12-b pipelined ADC •
Digital output

MIT Lincoln Laboratory ESO-DFA-21 VS 10/13/09 Finished Tile Stack Appearance

Back Illuminated Programmable Digital Imaging Tile 3-D CMOS Imager 1024 x 1024 pixels 8.3 x 8.3 μm2 pixel 64 analog outputs ~70μm

5 layer stack 64 A/D converters Timing & Control

1024x1024 pixels >1 Million vias 144 gold stud bumps 2 x 96 side bus lines 88 POGO pins

MIT Lincoln Laboratory ESO-DFA-22 VS 10/13/09