PLANAR GaAs GUNN AND FIELD EFFECT DEVICES

by

TREVOR WILLIAM TUCKER

B.A.Sc. University of British Columbia, 1964 M.A.Sc. University of British Columbia, 1966

A THESIS SUBMITTED IN PARTIAL FULFILMENT OF

THE REQUIREMENTS FOR THE DEGREE OF

DOCTOR OF PHILOSOPHY

in the Department of Electrical Engineering

We accept this thesis as conforming to the required standard.

THE UNIVERSITY OF BRITISH COLUMBIA

July, 1972 In presenting this thesis in partial fulfilment of the requirements for an advanced degree at the University of British Columbia, I agree that the Library shall make it freely available for reference arid study.

I further agree that permission for extensive copying of this thesis for scholarly purposes may be granted by the Head of my Department or by his representatives. It is understood that copying or publication of this thesis for financial gain shall not be allowed without my written permission.

Department of ETi.fe C fe-K< C-

The University of British Columbia Vancouver 8, Canada

Date ( < ^eLPT 7£ ABSTRACT

Two types of devices, planar Gunn and the field effect , have been investigated. Their fabrication, testing and properties are discussed.

For the planar the Gunn domain velocity is predicted analytically and shown experimentally to decrease with, decreasing product of carrier concentration and diode thickness.

A particular structure of GaAs FET which displays a static negative differential resistance (SNDR) characteristic without Gunn instability has been made. The mechanism of the SNDR is discussed and the device's uses in a number of circuits (oscillator, , phase- locked oscillator and bistable logic element) are described.

i TABLE OF CONTENTS

Page ABSTRACT i

TABLE OF CONTENTS ii

LIST OF ILLUSTRATIONS ' v

ACKNOWLEDGEMENT x

I. INTRODUCTION 1

II. PLANAR GUNN DIODES 4

2.1 Introduction 4 2.2 Background 5 2.2.1 Oscillation in Experimental Planar Gunn-Diodes 5 2.2.2 Oscillation Suppression in Bulk Gunn Diodes . . 9 2.2.3 Properties of Subcritically Doped Bulk Diodes . 11 2.2.4 Analyses of Oscillation Suppression in Thin Diodes 12 2.2.5 Planar Diodes with Surface Capacitive Loading . 19 2.2.6 Experimentally Observed Oscillation Suppression in Thin and Dielectrically Loaded Diodes . . 20 2.3 Small Signal Analysis of the Thin Gunn Diode -23 2.3.1 G\mn Domain Velocity in a Thin Gunn Diode ... 28 2.3.2 Condition for Zero Domain Velocity in a Thin Gunn Diode 31 2.3.3 Oscillation Suppression in Thin Gunn Diode . . 33 2.4 Oscillation Suppression in a Capacitively-Loaded Thin

Gunn Diode 36

III. DEVICE FABRICATION 39

3.1 Introduction 39 3.2 Photographic Reduction . 39 3.3 Photoresist and Etching Techniques 40 3.4 Electrical Contacts 43 3.4.1 Influence of Contacts •• . 43 3.4.2 GaAs Cleaning 47 3.4.3 The Alloying Cycle 48 3.4.4 Low Field Contact Resistance 50 3.4.5 Current-Voltage Characteristics 54 3.4.6 The High Resistance Contact Layer. 56 3.4.7 Impact Ionization Noise Spectrum 58 3.4.8 Anode Light Emission 62 3.4.9 Anode Metal Migration and Device Failure ... 66 3.5 Device Mounting 68

ii Page

IV. PLANAR GUNN DIODE EXPERIMENTAL APPARATUS AND RESULTS .... 70

4.1 Introduction 70 4.2 Test Apparatus . . . 70 4.2.1 Diode Coaxial Holder 70 4.2.2 Test Circuit 72 4.2.3 Device Geometries 74 4.3 GaAs Properties . 76

4.4 Domain Velocity in Planar Gunn Diodes . 80 4.4.1 Dependence on the nd Product 80 4.4.2 Bias Tuning of Uniform Gunn Diodes 84 4.4.3 Bias Tuning of Tapered Gunn Diodes 86

V. THE NEGATIVE RESISTANCE FIELD EFFECT (NERFET) . . 89

5.1 Introduction 89 5.2 The Construction and Characteristics of the NERFET . . 89 5.2.1 NERFET Structure and Fabrication 89 5.2.2 NERFET Characteristics 99 5.3 Related Devices 119

5.3.1 Introduction . s ...... 119 5.3.2 Conventional GaAs FETs . 127 5.3.3 GaAs FETs with Negative Resistance Effects . . 128 5.3.4 Gunn Devices with Three Electrodes 132 5.3.5 Other GaAs Devices with SNDR 133 5.4 On the Static Negative Differential Resistance (SNDR) Mechanism ...... 134 5.4.1 Introduction 134 5.4.2 Thermal Effects and the NERFET Switching Speed 135 5.4.3 Travelling Gunn Domain Effects 138 5.4.4 Effect of the p-n Junction . 139 5.4.5 Other Aspects of the SNDR Phenomenon 141 5.4.6 Previous Theories of Bulk SNDR 145 5.5 Circuit Performance of the NERFET 148 5.5.1 Introduction 148 5.5.2 The NERFET Equivalent Circuit . 148 5.5.3 Small Signal Analysis 151 5.5.4 Non-linear Analysis 156 5.5.5 Relaxation Oscillation Analysis 162 5.5.6 The NERFET as a Gate Tunable Oscillator .... 164 5.5.7 The NERFET as a Phase Locked Oscillator and as a Stable Amplifier 168 5.5.8 The NERFET as a Bistable Logic Element .... 169

VI. CONCLUSIONS 173

iii Page

6.1 The Planar Gunn Diode 173 6.2 The NERFET 174

•{ v LIST OF ILLUSTRATIONS

Figure Page

1.1 a) The sandwich, structure and b) the planar struc• ture 1

2.1 The domain velocities observed by previous workers 7

2.2 Current-voltage characteristic of a sub-critically doped

diode 12

2.3 Cross-section of a thin film diode 23

2.4 The sign convention 23 14 2.5 Dispersion curves for (a) n = 2 x 10 and (b) n = 15 -3 2 x 10 cm 29 2.6 Domain velocity (normalized to the carrier drift velocity) as a function of diode thickness and surface loading ... 30 2.7 The growth factor 3"L as a function of a for various £II diode lengths and carrier concentrations . 34

2.8 Cross-section of a th-in film 'diode -with -surface capaci-t-ive

loading 36

3.1 The micropositioner 41

3.2 A typical diode 42

3.3 A typical alloying cycle 49

3.4 Globules of Au-Ge after alloying 50

3.5 Bevel showing filament penetration into GaAs 51

3.6 Contact resistance as a function of alloying temperature . . 52

3.7 Contact resistance as a function of alloying time 53

3.8 I-V characteristic of a coherent diode 55

3.9 I-V characteristic of an incoherent diode ...... 55

3.10 Waveform with both coherent and incoherent components ... 56

3.11 I-V characteristic of a diode whose waveform has both co• herent and incoherent components 57 3.12 Potential distribution along a diode with poor contacts . . 59

v Figure Page

3.13 Electric field distribution along a diode with poor contacts 59

3.14 Noise spectrum of a diode biased slightly above the. threshold voltage 60

3.15 Noise spectrum of a diode biased at twice the threshold

voltage ...... 61

3.16 Diode showing emitted light at the anode 62

3.17 Light spectrum measurement system . 63

3.18 Spectrum of emitted light at the anode of a GaAs diode ... 64

3.19 Radiation intensity dependence on applied voltage 65

3.20 Metal migration and anode light emission from a device

undergoing breakdown 67

3.21 Bevel across a conducting filament after breakdown 68

3.22 A mounted diode 69

.4.1 Diode mount and holder ...... 71

4.2 VSWR measurement circuit 72

4.3 The diode test circuit 73

4.4 Diode geometries studied . . . . 75

4.5 Edge view of the holder used for bevelling 77

4.6 The van der Pauw clover leaf geometry 78

4.7 Carrier concentration profiles 79

4.8 Hall mobility profiles 79

4.9 Gunn mode current waveform 80 4.10 Correlation of current waveform to diode shape 81 4.11 Domain velocity in thin Gunn diodes as a function of

nd product 82

4.12 Bias tuning of a uniform Gunn diode 85

4.13 A tapered diode 86

4.14 Bias tuning of a tapered diode 87

\7T Figure Page

5.1 Types of NERFET geometries in cross-section 91

5.2 Capacitance-voltage measurement circuit 92

5.3 Typical capacitance-voltage characteristic for a reverse biased p-n junction 93

5.4 Electron concentration profiles measured by C-V and

Hall methods 94

5.5 Typical p-n junction current-voltage characteristic .... 96

5.6 A bevelling and stained p-n junction 96

5.7 NERFET structure 98

5.8 NERFET typical I-V characteristics 98 5.9 The current-voltage characteristics of a a) with circuit stability and b) with circuit insta• bility (from Chow 1964) 99

5.10 The current-voltage characteristic of a NERFET in a) stable circuit operation b) and c) unstable circuit operation 100

5.11 ' Current-voltage test circuit 100

5.12 Current-voltage characteristic of a NERFET which apparently

produced coherent GHz oscillation in a resistive circuit. 101

5.13 GHz oscillation from a NERFET in a resistive circuit . . . 101

5.14 Current-voltage characteristic of a NERFET which produced incoherent GHz oscillation in a resistive circuit .... 102 5.15 The current-voltage characteristic of a NERFET a) before and b) after a step was etched into the source end . . 103

5.16 I-V characteristics for three device thicknesses 105

5.17 Normalized I-V characteristic of a junction FET in terms of the parameter I /I describing velocity saturation . . . 110 r op 5.18 Representation of the cross section of a notched NERFET . . 110

5.19 Match of experimental and theoretical I-V characteristics

for a NERFET 114

5.20 Cross-section of a NERFET 114

5.21 Hysteresis growth after illumination ceases 116

vii Figure Page

5.22 Circuit used to measure KTFR properties 117

5.23 Variation of KTFR properties with drying 118

5.24 Hysteresis variation with drying time of a KTFR covered

NERFET 120

5.25 Compilation of related devices 122

5.26 Tuning characteristic as a function of p-region bias (from

Petzinget, Hahn and Matzelle 1967) 130

5.27 NERFET switching speed circuit 136

5.28 NERFET switching'waveforms . . . 137

5.29 Point of the tungsten probe 142

5.30 Voltage profiles in two NERFETs 143

5.31 The NERFET and equivalent circuit . . .' 149

5.32 Approximate NERFET equivalent circuit . 151

5.33 NERFET test circuit 151

5.34 ac equivalent circuit of the NERFET test circuit 152

5.35 Regions of NERFET circuit stability ...... 155

5.36 NERFET waveforms for several points on the stability plot . . 155

5.37 Experimental and fitted I-V characteristics 159

5.38 NERFET oscillation as a function of circuit

inductance ...... 160

5.39 Relaxation switching path 163

5.40 Relaxation oscillation current waveform (for tunnel diode

circuit from Ko 1961) 163

5.41 Test circuit used to show NERFET gate tunability 166

5.42 Current waveforms for a NERFET in a high Q circuit with

various gate voltages 166

5.43 Gate tunability of the NERFET 167

5.44 Current waveforms for a NERFET in a low Q circuit with viii various gate voltages 167 Figure Page

5.45 Test circuit used to show phase-locked oscillation 168

5.46 Test circuit used to show stable amplification 169

5.47 Device characteristics and load line showing stable

operating points 170

5.48 Test circuit for NERFET bistable switching 171

5.49 NERFET bistable waveforms 171

5.50 Switching waveform of the NERFET logic element 172

ix ACKNOWLEDGEMENT

The financial support of this work by the Canadian Defence

Research Board (DRB Grant 5501-67) is most gratefully acknowledged.

I wish to thank my research supervisor, Dr. L. Young, for his encouragement, guidance and support during the course of the work. I would also like to thank Mr. J. Stuber, Mr. H. Black and Miss B. Andersen

for their technical assistance and Miss N. Duggan for typing the manuscript.

Finally, I wish to acknowledge a special debt of gratitude to my wife,

Isabelle, for her unselfish support during these years of study. 1

I. INTRODUCTION

Since J.B. Gunn's 1963 discover}' of ultra-high-frequency cur• rent instabilities in n-type , much research has gone Into understanding and exploiting the phenomenon. The bulk of the work which has been reported in the literature to date deals with devices of the

"sandwich" structure, i.e., plane-parallel contacts on opposite faces of a GaAs crystal (figure 1(a)). However, the sandwich structure may not be the best structure from the standpoint of frequency, heat sinking

and mass production. For example, present planar transistor technology has almost totally replaced the older alloyed and grown junction trans•

istor technologies primarily because of the requirement to mass produce

transistors and still maintain adequate control of device geometries

•and parameters. The .refinement .of . .photolithographic and other tech• niques has enabled such controlled mass production to be realized. The

planar nature of the transistors is a result of successive oxidation,

metallization and diffusion processes on one surface

using photolithographic techniques.

"PI / / / VY//A / /- <> / / / / j _ / (a) (b)

Figure 1.1 a) the sandwich structure and b) the planar structure

The purpose of this thesis is to examine theoretically and

experimentally some of the properties of GaAs devices in the planar 2

structure (figure 1(b)). The term planar as applied to GaAs Gunn effect devices similar to those studied here has previously been used by Clark,

Edridge and Bass 1969; Colliver and Fray 1969; Parkes and Taylor 1971 and several others. The term Gunn effect in this thesis refers to the occurence of ultra-high-frequency current oscillations caused by the formation and movement of charge dipole domains. Such charge domains occur because the GaAs possesses negative differential conductivity due to the inter-valley transfer of electrons. This favors the accumulation of charge rather than the dispersion of charge which occurs in positive conductivity materials.

Some important properties of the planar GaAs devices are as follows:

a) The planar structure permits heat removal in the thin dimen•

sion. The frequency of Gunn oscillation is inversely propor•

tional to the length of the device. Therefore, cooling of

long devices is simplified and planar devices can operate cw

at lower than sandwich type devices.

b) The shape of a Gunn diode determines the shape of the

oscillation waveform. The planar structure, being compatible

with photolithographic techniques, permits easy shaping of

the device. Hence high frequency function generators can be

easily fabricated.

c) The planar structure allows easy access to the active region

of the device and additional electrodes or surface dielectric

loading can be included to modify or control the Gunn instab•

ility.

d) A sufficiently thin device suppresses Gunn instability 3

and allows the device to be used as a stable am•

plifier.

This thesis discusses two distinct types of GaAs device. The

first is the planar Gunn diode which is composed of n-type GaAs epita•

xial layers on semi-insulating GaAs substrates. Chapter Two contains

a small signal analysis of the planar Gunn diode from which conditions

of stability are obtained. This .analysis also .predicts a dependence

of domain velocity on diode thickness. Some properties of these diodes

such as light emission, noise generation and domain velocity which were

experimentally observed are discussed in the latter part of Chapter Three

and in Chapter Four.

The second type of device is the GaAs field effect transistor which displays a negative differential resistance characteristic without

instability. This device is given the name 'Negative Resistance Field

Effect Transistor' or NERFET to distinguish it from the conventional

FET's which display a saturating current characteristic. Chapter Five

contains a discussion of the properties of the NERFET, a discussion of

the mechanism of the negative resistance and a discussion of circuit

applications of the device. The fabrication techniques used in making

both types of device are described in the first part of Chapter Three. 4

II. PLANAR GUNN DIODES

2.1 Introduction

The small lateral dimension of the planar Gunn diode gives rise to different electrical properties of this structure diode as compared to the properties of the conventional sandwich structure Gunn diode.

The most important difference is that Gunn oscillation can be completely suppressed if the planar diode is sufficiently thin. This phenomenon is similar to one observed in conventional structure diodes in which os• cillation is suppressed if the diode is sufficiently short. This chapter contains a review of previous work both analytical and experi• mental on the suppression of oscillation in thin Gunn diodes. Previous analytical work is extended in this chapter by solving numerically the

.equations for small signal space charge .growth. The result of this numerical solution shows that the onset of oscillation as diode thickness is increased is abrupt and is associated with an abrupt increase of space charge growth. This compares to the gradual increase in space charge with diode thickness which has been predicted by previous ap• proximate solutions.

The numerical solution also predicts that the frequency of

Gunn oscillation is lower in a thin diode than in a bulk diode of the same length. This result is consistent with the observations of many other workers as outlined in this chapter and is also consistent with experimental results reported in Chapter Four of this thesis. Also contained in this chapter are the details of a small signal analysis of a planar Gunn diode which has a metal plate close to the surface of the diode. The result of this analysis is similar to the results quoted by other workers. 5

2.2 Background

2.2.1 Oscillation in Experimental Planar Gunn Diodes

The first report of Gunn diodes made in the planar structure was that of Foxell, Summers and Wilson 1965. Their devices were operated in pulse mode, as have the majority of devices reported in the literature.

Satisfactory C.W. operation in the planar structure has been difficult to obtain because this structure is susceptible to low voltage break• down and also coherent oscillation can be difficult to obtain. The practical problems associated with obtaining good performance from a planar Gunn diode and the techniques used to overcome some of the diffi• culties are discussed in Chapter Three.

When a Gunn diode is operated in a resistive circuit the fre• quency of Gunn oscillation is the reciprocal of the time for a charge diode domain to form, transit and extinguish. In the usual case for• mation occurs at the cathode and extinction occurs at the anode hence the frequency is determined by the average domain velocity and the diode length. In bulk diodes the domain velocity is dependent on bias voltage. At bias voltages slightly in excess of the threshold voltage the domain travels at approximately 1.5 x 10^ cm/sec. When the bias is increased to several times threshold the domain velocity is slowed

to approximately 0.85 x 10^ cm/sec and remains at this value for further increases in bias. This dependence of domain velocity on bias has been explained by Butcher's 1965 "equal areas rule", modified for a bias voltage which is changing with time by Kurokawa's 1967 "unequal areas rule"

and made to include the effect of field dependent diffusion by Copeland

1966 and Butche^) Fawcett and Ogg 1967. Since the domain velocity is

a function of bias voltage and since none of the researchers using 6

planar Gunn diodes to date appears to have specified the bias for which oscillation waveforms were obtained it is difficult to compare their results directly to the results for bulk diodes. However, the relatively low breakdown voltage of planar Gunn diodes as discussed in Chapter Three suggests that most results quoted in the literature were obtained for bias voltages not greatly in excess of threshold. The domain velocity in bulk diodes for bias voltages near threshold should be near a value of

1.5 x 10^ cm/sec.

Figure 2.1 shows the domain velocity in planar Gunn diodes as determined from the results of other workers. The results shown are for epitaxial n-GaAs layers on semi-insulating GaAs substrates. The initials in this figure are those of the various authors as given in the reference section at the end of the thesis. The position of the initials on the v^ - nd plane show the value of domain velocity (v^) as determined from the results quoted by those authors. The product nd (n is the electron concentration, d is the diode thickness) is chosen because of the importance it is shown to have in sections 2.2.4 to 2.3.3 of this thesis. Some authors in stating their results quote only a range of elec• tron concentration, thickness or domain velocity and in such cases a bar is shown in figure 2.1 to indicate that range. It is evident in figure

2.1 that many of the measured values of domain velocity are significantly less than the velocity for bulk material of approximately 1.5 x 10^ cm/sec. which is expected with bias voltages just over the threshold.

There have been several reports of domain velocity in planar diodes in the range of 0.5 x 10^ cm/sec. a value which appears to be significantly less than the domain velocity which would occur in bulk diodes. Even when operated at bias voltages many times threshold,bulk diodes usually 1.0 THSn o THSgJMOp P -7 "1? x10 rtln

STHKp .8 FHSC]fo (cm ) sec TMr CEB,'cw .6

BTMp

•BTn

.4

.2

10 11 10 12 nd (cm~2)

Figure 2.1 The domain velocities observed by previous workers. 8

don't display a domain velocity of less than 0.85 x 10 cm/sec.

Of particular interest is the observance by Boccon-Gibod and

Teszner 1971 of the passage of domains in a planar diode using a capaci- tive probe. The domain velocity which Boccon-Gibod and Teszner 1971 observed depended on the type of anode surface capacitive loading.

For the unloaded case the domain velocity was approximately 0.5 x 10^ cm/sec. for a diode approximately 6.5 microns thick with a carrier con- 15 -3 centration of 1.1 x 10 cm . They observed a domain make only one transit after turn-on and after it arrived at the anode no other travelling domains were observed.

Dienst, Dean, Enstrom and Kokkas 1967 and Colliver and Fray

1969 while not reporting device parameters and operating characteristics of specific devices have remarked on having observed lower frequencies

-for.planar diodes -than -would occur for bulk -diodes of the same length.

Dienst et al 1967 report:

"The fundamental transit time frequency for all of the samples

was about 600 - 700 MHz, which is quite a bit lower than the 1000

MHz that was expected on the basis of a gap length of 100 um.

The lower transit-time frequency in low-reactance circuits

suggests that the domains follow a curved path that is longer

than the gap length".

Colliver and Fray 1969 state:

the output frequency is generally somewhat lower than

would be obtained from domain transit directly across the gap.

Typically ~ 8 GHz for a 10y spacing". Colliver et al do not provide an explanation for the lower frequency. 9

When they operated their planar devices in resonant cavities

Parkes, Taylor and Colliver 1971 found that maximum power output occurred when the cavity resonant frequency corresponded to the transit time asso• ciated with a domain velocity of approximately 0.7 x 10^ cm/sec. Parkes et al 1971 comment:

"The low value (of domain velocity) is in part due to the non•

uniform geometry of -the device., .but is probably also due to the

high operating temperatures in these layers and the consequent

reduction in domain velocity".

It is evident from figure 2.1 that there has been relatively little documentation of Gunn oscillation frequency for thin diodes with low electron concentrations. There appear to be two reasons for this.

First, the problems of epitaxial layer defects and contact field inho- mogeneities are accentuated in very thin layers. Second, for sufficiently thin layers, Gunn instabilities will be completely suppressed as discussed in detail in section 2.3.

2.2.2 Oscillation Suppression in Bulk Gunn Diodes

The suppression of instability in a fundamentally unstable system by reducing the dimensions of the system is a well documented phen• omenon. For example, Johnson 1955 has found that oscillation in a backward wave oscillator could be suppressed by making the body of the oscillator sufficiently short. In a conventional or "sandwich" type

Gunn diode, instabilities can be suppressed if the product of electron concentration x device length (nL product) is made sufficiently small. 10 -2

Kroemer 1964 first predicted a critical nL product of nL = 10 cm below which oscillation would not occur. Kroemer2l965 subsequently raised his estimate of this critical product to the range of n = 10^ 10

-2 cm . Similar criteria for oscillation suppression in bulk diodes have 12 -2 been predicted by Ridley 1966 (nL < 10 cm ) and McCumber and Chynoweth 11 -2 1966 (nL < 2.7 x 10 cm ). The critical nL product observed experi- 11 -2 mentally is in the range of nL < 5 x 10 cm (Thim and Barber 1966) 12 -2

to nL < 10 cm (Hakki and Knight 1966).

The existence of a critical nL product below which oscillation

does not occur results from the .amount of growth a space charge wave

incurs in travelling the length of the diode. If this growth is suffi•

ciently large the condition corresponds to the occurrence of Gunn in• stability. The small signal analysis of a bulk diode carried out by

McCumber and Chynoweth 1966 and several others have assumed an electric

E = E field distribution of thq eex formp g": L exp j (tot - B'L) where:

g"L is the wave growth factor in travelling the diode length L

3"L = KnL = en |y | L/e v

n is the electron concentration

v is the electron velocity

• ucz is the negative differential mobility

is the permittivity of the diode

K = 1.1 x 1011 cm2 for GaAs

McCumber and Chynoweth 1966 showed by examining the behaviour of the zeros

of the small signal impedence that instability occurs if B"L £ 2.09.

In actual GaAs devices the critical growth factor necessary to produce

instability was found to be somewhat larger. McCumber and Chynoweth

1966 on the discrepancy between the small signal stability condition

and the experimentally observed condition state: 11

"Numerical calculations incorporating all of the diffusion

and energy-transport corrections give a critical nL pro•

duct which is a factor of 2 or 3 larger than nL $ 2.7 x lO^

-2

cm and which is in somewhat better agreement with experi•

ment ..."

According to Sterzer 1971 the following three reasons account for the discrepancy:

"1) In an actual device, the electric field is generally

above threshold over only part of the device, and the 'active'

device length is therefore usually smaller than the geometric

device length.

2) The electric field in an actual device is always nonuniform,

and the average value of K will therefore always be smaller -11 2

than its maximum value of 1.1 x 10 cm .

3) The value of K decreases rapidly with increasing temperature,

and many practical devices, because of self-heating operate

well above room temperature."

2.2.3 Properties of Subcritically Doped Bulk Diodes

The current-voltage characteristic at the terminals of a stable 11 -2 subcritically doped (i.e. nL 5 x 10 cm ) bulk diode does not show a region of static negative differential resistance in spite of negative differential carrier mobility. This positive conductance theory of uni• form diodes was first presented by Shockley 1954 and later generalized by Kroemer^ 1970 to include non-uniform, inhomogeneous diodes. The ten• dency of the carriers to slow down at large enough fields causes carrier accumulation toward the anode. This accumulation is sufficient to retain continuity of current throughout the diode and negates the external ob- 12

servation of negative conductance. Rather, the current at large applied voltage tends to saturate as shown in figure 2.2. This figure was ob-

2 4 6 8 10 V (volts) Figure 2.2 Current-Voltage Characteristic of a Subcritically Doped Diode (n = 6 x 10 cm , L = 18y) tained by integrating the electric field -versus distance plot -which was derived for sub critical diodes by McCumber and Chynoweth 1966.

The previous discussion applies to the low-frequency (quasi- static) case. If a subcritical diode with a large applied voltage is also pumped with an rf source, ripples of space charge can propagate and grow along the diode. The ripples are self-re-enforcing when the pumping frequency is near harmonics of the transit frequency of the carriers and the device displays a dynamic negative conductance at those frequencies. The diode can therefore be used as an amplifier in these particular frequency bands (for example,Thim and Barber 1966).

2.2.4 Analyses of Oscillation Suppression in Thin Diodes

In the planar structure the finite cross-section of the diode modifies the form of the growth factor 3"L. As will be shown in detail 13

in section 2.3 the parameter 3" in planar Gunn diode is proportional to d/L where d is the diode thickness. Hence the growth factor f3"L neces• sary for oscillation results in a product of electron concentration x diode thickness (rather than diode length) below which the diode will not oscillate.

Physically the modified growth factor B"L in the planar diode arises from electric field lines spreading outside the device from the space charge wave. Hence, the longitudinal field appears to come from a reduced amount of space charge when the planar equation is used.

If the diode is made sufficiently thin the growth factor can be small enough to be associated with the suppression of Gunn instabilities.

The first published statement of a critical product of carrier concentration x diode thickness (nd product) below which Gunn oscillation is suppressed was that of Koyama, Ohara, Kawazura and Kumabe 1968. They state without derivation that a small signal analysis carried out on a

Gunn diode whose thickness is much less than its length produces a sta• bility criterion of:

nd£ 2e I < lVl EII ~ ^cT^l where n is the diode carrier concentration

d is the diode thickness

Ej. is the diode material's permittivity

is the surrounding material's permittivity

v is the carrier velocity

|ycz| is the magnitude of negative differential mobility

^ = 2.09

n, = 7.46 14

Their criterion is equivalent to a growth factor of g"L £ 2.09 for in• stability. The numerical value of critical nd product which they quote is:

E , I . , inll -2 nd = 1.3 x 10 cm £II

2 7 which implies they used a value of u = 270 cm /v-sec (taking v = 10 cz -12 cm/sec and e^. = 10 f/cm for GaAs). The first measurement of negative differential mobility (Gunn and Elliott 1966) yielded a value in this range, however more recent measurements (Ruch and Kino 1967, McWhorter and Foyt 1966, and Acket and de Groot 1967) which agree more closely with theories (Butcher and Fawcett 1965, Conwell and Vassell 1966, and

Boardman, Fawcett and Rees 1968) have resulted in the acceptance of a value of |u ! in the range of 2000 to 2500 cm /v-sec. The criterion cz EI 11 for oscillation suppression of JKoyame et al 1968 (nd $ 1.3 x 10 eII -2 cm ) explicitly states that not only can a sufficiently thin diode cause

Gunn oscillation suppression but also a large permittivity surface di•

£ can electric ( TT) have the same effect.

Kino and Robson 1968 in a detailed small signal analysis in• directly produced a result similar to that of Koyame et al 1968. For

thof:e case of = eTT> Kino and Robson 1968 obtained a stability criterion 11 -2 nd £ 1.6 x 10 cm by equating the small signal growth factor 8"L which they derive for thin diodes to the value of B"L = 17. This latter value of growth factor gives a good match to the experimentally observed oscillation suppression condition in bulk diodes. Kino and Robson 1968, in calculating a value 15

for a critical nd product, used a negative differential mobility of

u = 2000 cm /v-sec. ' cz

Despite the different growth factors assumed necessary for instability by these two sets of authors (Koyame et aL 1968 and Kino et al. 1968) the numerical values of critical nd products which they arrived at were approximately the same because their assumed values of |y I cz compensated for this difference.

By using a simple model, Engelmann 1968 also predicted a re• duced growth rate in thin diodes. In a subsequent paper (Englemam^

1969) he showed his model predicted a critical nd product of:

nde_ 2v £T I o I < EII eUo

f£"I which numerically is nd $ 2 x 10 cm . This is approximately EII the value which Koyame et al. 1968 would have obtained had they used a value of |u . I = 2000cm /v-sec in their calculations. Kuru and

Tajima 1969, to account for electric field leakage outside the diode in• troduced a leakage factor y into Poisson's one dimensional equation and io12 arrived at the simple oscillation suppression criterion of nd £ —— .

They did not determine the dependence of y on device parameters. Hart- nagel 1969 and 1970 by generalizing the Kino and Robson 1968 approach to include magnetic field showed that not only can dielectric surface loading cause oscillation suppression but ferrimagnetic surface loading also can cause oscillation suppression. In a similar approach Masuda, .

Chang and Matsuo 1970 also showed ferrite surface loading can cause oscillation suppression. Gueret^ 1970 derived the conditions for which loading the surface of a thin Gunn diode with another semiconductor also suppresses Gunn instabilities. 16

Heinle 1971 has considered the effect of diffusion on the

growth of space-charge waves in the Kino and Robson 1968 analysis and has concluded that diffusion is the dominating effect at sufficiently high frequency. Therefore, there is a particular frequency at which

the gain is a maximum when the device is used as an amplifier. This result is the same as that arrived at by Dean 1969 who included the effect of diffusion in a less rigorous way. In comparison, the Kino and Robson 1968 result indicates the gain increases monotonically with frequency.

Hofmann^ 1969 showed that for heavy dielectric loading (e^. <<

eTT) one of the Kino and Robson 1968 approximations is not valid and he obtained under this condition a new critical nd product which is 12 -2 independent of numerically equal to nd = 1.5 x 10 cm . The stability criterion which he used was based on the study of instabilities of waves in plasma by Briggs 1964. Based on Hofmann's 1969 treatments

the critical growth factor equivalent to the Brigg's stability criterion is $"L = 15. The stability criterion used by Koyame et al. 1968 and many others was based on the behaviour of the zeros of an equivalent diode im~ pedence in the complex frequency plane. The critical growth factors obtained from the various approaches are similar with the exception of

a usually small factor.

Gueret2 1970 using the Kino and Robson approach obtained a critical thickness to length ratio below which the conventional one dimensional analysis is not valid. Giannini, Ottavi and Salsano 1970 carried out a small signal analysis on a thin Gunn diode in which the rf electron flow was assumed to be in the dc drift direction only (i.e. the one dimensional problem). This one dimensional flow was imposed by 17

a suitable magnetic field but the growth rate obtained was the same as

that obtained by Hartnagel 1969 and different from the Kino and Robson

1968 only by a small factor. They concluded, therefore, that the rf motion is only in the direction of dc drift and the boundary condition

in the lateral direction as used by Hartnagel 1969 and Kino and Robson

1968 and others is not necessary to the solution of the problem. En-

gleman^ 1970, while acknowledging the growth rate is identical using

either boundary condition, disputes Giannini's et al. 1970 conclusion

that rf flow is laminar. Giannini„ , „ et al. 1970 and 1971 and 2 and 3

Englemann^ 1970 in brief comments do not appear to have yet cleared

the point up. The fact that identical growth rates are obtained for

the two types of boundary conditions is however significant because

the boundary condition that Kino and Robson 1968 used was that initially

-used by.Hahn 1939 for .electron .beams ..in..^vacuum. I.t is ..not .obvious .that

this boundary condition when applied to carrier flow in a semiconductor

of limited dimensions is correct, especially since they ignored the ef•

fect of diffusion.

Gueret 1970 found the small signal impedance in thin Gunn

diodes by extending the Kino and Robson analysis and obtained the sta• bility conditions for the diode's equivalent circuit which, again with

the exception of a numerical factor, was the same as that found by Kino

and Robson. Gueret 1970 also quoted conditions for LSA mode operation

in thin diodes.

Hofmann^ 1972 has done a numerical analysis of the general

transcendental dispersion equations first quoted by Kino and Robson

1968. His exact computations show two forms of stability criterion £I £I exist, dependent on the value of . For 2 1 the stability cri- EII £II 18

terion is:

nde 4 v eT o I

which numerically he quotes as:

nde 11 -2 <: 2.1 x 10 cm e II and for the case of — << 1 the stability criterion is: EII 11 -2 nd <: 2.7 x 10 cm which is independent of The former is compatible with the Kino and Robson 1968 analysis while the latter is compatible with the pre• vious Hofmann„ 1969 analysis.

The small signal analysis presented in section 2.3 is based on the Kino and Robson analysis, and the critical growth factor assumed for the onset of instabilities is that used by Kino and Robson (i.e.

3" L 2 17). Note also that the Kino and Robson 1968 value of critical growth factor is close to the value of 3" L = 15 which Hofmann 1969 obtained from the Briggs 1964 stability criterion. The following ex• tensions to the Kino and Robson analysis have been made, and are reported in section 2.3. The Kino and Robson approximate dispersion relation• ship is not used, rather the more exact dispersion relationship is solved numerically. From this numerical solution a pulse propagation velocity is obtained as a function of the diode thickness and is shown to decrease with decreasing thickness. In the Kino and Robson 1968 approximate relationship the pulse propagation velocity is indepen• dent of diode thickness. Also, the growth factor (3" L) is calculated numerically and shown to have an abrupt drop near the nd product which 19

Kino and Robson 1968 and most other workers have taken to be the critical value for oscillation suppression.

2.2.5 Planar Diodes with Surface Capacitive Loading

Kino and Robson without derivation state that conducting sheets close to the surface of the diode modify the stability criterion to: £I 11 -2 ndb3 $ 1.6 x 10 cm . . EII

2 TT Taking the value o.t g = —— as taken by Becker, Bosch and Englemann e Li

1970 the Kino and Robson 1968 condition for instability suppression in a Gunn diode with capacitive surface loading becomes:

EI ndb 10 -2 = 2.5 x 10 cm £II L where b is the distance between the conducting layer and the diode sur•

face L is the diode length. This is similar to the instability cri•

terion obtained from a transmission line analogy by Becker, Bosch and

Englemann 1970:

I ndb o I < which numerically is

E I ndb 9' -2 $ 1.2 x 10 cm £II L

Becke^ and Bosch 1970 in a subsequent paper quote another criterion in which the right hand side is 6 times larger. Although the analysis was the same this factor apparently resulted from taking a growth time

for a domain as one rather than three, growth time constants and from 20

assuming appreciable interaction between electron flow and carrier wave when their velocities were equal rather than when the former was twice the latter. This new stability criterion being numerically —— $ EII L 9 -2

7.2 x 10 cm is closer to the value quoted by Kino and Robson(1968).

Suga 1969 in a computer simulation of a thin diode with a distributed capacitive electrode on one side showed that if the capa• citance exceeds a critical value, Gunn oscillation is inhibited and a static high field domain is formed at the anode. He found for the case —8 3 of C £ 10 f/cm the effect of the capacitance was almost negligible -7 " 3 and Gunn oscillation was obtained, while a capacitance of C = 10 f/cm produced oscillation suppression. His meaning of capacitance per unit volume is obscure but if it is taken to mean capacitance per unit area per unit diode thickness then this corresponds to a suppression criterion of the order of: £ 10 d Ib I > _-7. which (for his values of n = lO1^ cm 3 and L = lOOu)is equivalent to:

£ ndb I , ,nll -2 S 10 cm

L eTI

This result is compatible with the numbers quoted by Kino and Robson

1968, Becker, Bosch and Engelmann 1970 and Becker^ and Bosch 1970. Sec• tion 2.4 contains the details of a small signal analysis which derives a stability criterion which is similar to that reported by these authors,

2.2.6 Experimentally Observed Oscillation Suppression in Thin and Dielectrically Loaded Diodes.

Analyses such as that of Kino and Robson 1968 predict that a diode which supports Gunn oscillation may not support such oscillation 21

if the diode is imbedded in a high permittivity material. Kataoka,

Tateno, Kawashima and Komamiya 1968 had indeed reported having observed

this behaviour one month before Koyama, Ohara, Kawazura and Kumabe 1968

quoted the results of their small signal analysis which predicted the be•

haviour. Kataoka et al. 1968 placed BaTi03 sheets (er ~ 10,000 to 15,000)

along the surface of a diode and found that although the diode produced

Gunn .oscillation-without the BaT-i-0^ such oscillation was suppressed-with

the BaTiO^ in place. Vlaadringerbroek, Acket, Hofmann and Boers 1968

and Kuru and Tajima 1969 have observed that the rate of growth of a Gunn

domain was reduced when a layer of high permittivity material (BaTiO^

for Vlaardingerbroek et al. 1968 and SrTiO^ for Kuru et al. 1969) was

placed on the surface of planar diodes. Such a reduced growth rate was

predicted by the Kino and Robson type of small signal analysis.

By varying the position of high permittivity and semiconductor

slabs on the diodes' surfaces Katoka, Tateno and Kawashima 1969 and Tez- ner 1971 respectively have tuned the frequency of Gunn oscillations over

several octaves. The frequency generated by such devices corresponds

to the length of diode not covered by surface loading.

Kuru and Tajima 1969 observed that if the diodes were not thin

enough, the influence of a high permittivity surface material was weak

and "partially suppressed" domain oscillation was observed. Shoji 1967,

Tataoka, Tateno and Kawashima 1969 and Hofmann^ 1969 have shown that in•

creased efficiency or current wave-shaping can be obtained by the pro•

per choice of dielectric loading or capacitive surface loading.

The first systemmatic experimental examination of the condition

for oscillation suppression in thin Gunn diodes was that Kumabe 1968.

He varied the carrier concentration of specimens of several thicknesses 22

by varying the temperature of operation of the specimens and observed the

fo]lowing: 11 -2 1) For nd > 5 x 10 cm stable oscillation occurred, 11 -2 2) For nd < 1.1 x 10 cm no oscillation occurred at any bias, 11 -2 11 -2

3) For 1.1 x 10 cm < nd < 5 x 10 cm incoherent.oscillation

occurred and the threshold voltage increased as nd approached

1.1 x 10 cm

Kumabe 1968 also found that the threshold voltage increased as the dielec•

tric constant of the surrounding material was increased.

Hofmann 1969 showed that dc field inhomogeneities due to dc

field leakage from or near anode and cathode due to the non-infinite dim•

ensions of these contacts in the transverse direction inhibits the

usual Gunn domain oscillation. This effect is different from the leakage

in the region of a charge dipole which is assumed to be the cause of os•

cillation suppression in thin diodes. Hofmann^ and 't Lam 1972 and Hof•

mann^ 1972 used a specimen holder for experimental thin diodes in which

the contact extended in the transverse direction well outside the diode

thus reducing the dc field inhomogeneity. By surrounding the thin diode

by air or by high permittivity liquids such as de-ionized water (e = 81)

or glycerine (e^ = 41) they observed the following:

1) There was little difference in diode performance with deionized

water as compared to glycerine surface loading and

2) Heavy dielectric loading suppressed oscillation only if the

diode was sufficiently thin.

They concluded that their experimental results were consistent with two eI different stability criteria depending on whether was larger than £II or smaller than unity as discussed in the previous section. The obser- 23

vations of Hofmann^ and 't Lam 1972 and Hofmann^ 1972 also appear to be consistent with the previously mentioned observations of Kuru and Tajima

1969.

2.3 Small Signal Analysis of the Thin Film Gunn Diode

For the device shown in figure 2.3 it is assumed that the elec• tric field can be synthesized by a sum of signals of the form:

j(ut Bz) E = E + E E (yJ ) e " o 1 (2-1) where the subscript o denotes dc components and the subscript 1 denotes small signal ac components throughout.

6/

cathode anode

Figure 2.3 Cross-section of a thin film diode

In this treatment the sign convention shown in figure 2.4 has been used to avoid negative signs throughout which arise from the electronic charge. This is a common convention in the literature on Gunn effect

(Carroll 1970, Butcher 1965, McCumber and Chynoweth 1966) and is used throughout the thesis. ^ T E + v V = lEdz anode cathode -P~ v(E) electron

Figure 2.4 The sign convention 24

The effective carrier mobility in the z direction is (Kino and Robson 196 8) : Sv yz = SE and in the y direction is: v yy = E

The .small signal current components are:

6p 6p.

j • = V P E. - D~ A to eT E. - IK— (2-2) ly y o ly

j. = u p E- + v p - D 7 A to eT E, + v p. - D -7— Jlz z o lz o 1 6z = cz I lz o 1 6z where D is the diffusion coefficient

v is the dc carrier drift velocitJ y o p is the space charge density

Gj. is the permittivity of medium I ^po . Vo' to = and to = cy e.j. cz e

The equation of continuity is:

jl + jwpl = ° (2_3) and Poisson's equation is:

V • E = (2-4) 1 eI.

Taking

E1 = -V^ (2-5)

assuming cj>j = A cos ay exp j (tot - Bz) (2-6) 25

and combining equations 2-1 to 2-6 results in:

/ O O 0 0 Da + a (23 D + a> + j (w - 3v )) + 3 (D3 + w + j (to - 3v )) = 0 cy o cz o

(2-7) where a is the transverse wave number and 3 is the longitudinal wave number

The condition at the diode surface is:

en Eyin " eiE yii = pis (2_8) where p is obtained from the Hahn 1939 boundary condition:

dpls 3pls

= jup = p v V iT ls 0 yl " o ^

= P v + j3 v p o yi O -LS

or P v T ° y1 1s j(oj - Vq3) and is the permittivity of the surrounding material

With the potential continuous across the boundary

*I = *IIa t 7 = ± a (2_9) where a is the diode half thickness.

Since (j)^ simultaneously satisfies Laplace's equation and the boundary conditions it must be of the form:

1II = C exp [j(ut - 3z) - 3y] (2-10)

Substituting (2-10) and (2-6) into (2-9) results in:

A cos aa = C exp (~3a) (2-11) 26

Combining equations ' (2-8), (2-5), (2-6), (2-10) and (2-11) yields:

e 3 (to- 6VQ)

cttancca = ;— : r- (2-12)

But

2 aatanaa =(aa) if |aa| < 0.4

Therefore

c (to-Bv ) Z (aa) = - , p . ° , (2-13)

provided

eil3a 1 < I (2-14)

EII For the case of a GaAs diode surrounded by axr = 12 and EI inequality (2-14) reduces to |ga| <2. Equation (2-7) can be rewritten:

„ 32 (D32 + a) + j(u-Bv )) ^ - cz o ,„ a = - (2-15) D(a +23 ) + to + i(to-3v ) cy o 2 12-1 For GaAs, D ~ 100 cm /sec and to - 2 x 10 sec if an elec- cy 15 -3 tron concentration of n = 2 x 10 cm is used. The non-linearities of D, to and to with electric field are ignored in this small signal cz cy ° 2 15 analysis. The value of to , taking u = -2400 cm /v-sec and n = 2 x 10 J cz' . z o — 3 12 —1 2 5 —1 cm is to = -10 sec . Therefore | DB ]<< | to | if |g| < 10^ cm CZ CZ 2 ,_2, i „ .. ... I„I . ,«5._-l From equation (2-15), |ct| < |B|, hence |D(a +28 ) | .« co if|B| < 10' cm cy -g. 5 -1 ' Therefore, under the condition |B| < 10 cm equation (2-15) can be ap proximated by: 27

2 2 +3("-gvo)) a = "& a, +j(co-3vT" (2_16) cy o

The approximation implies diffusion effects are negligible for lower order solutions of 3 (i.e. the longer wave-length solutions). This is also consistent with the conclusions of Dean 1969 and Heinle 1971 who also considered the effect of diffusion.

Equations (2-13) and (2-16) can be combined under the conditions that|3a| < 2 and |B| < 105 cm 1 to yield:

u (Ba) (3cza) ia = — a - n-~ (2-17) J v eVT + Ba £I where

a) u n q cz z

cz v v eT o o I

Substituting 3=3'+ jB" into equation 2-17, setting the real

and imaginary parts equal to zero and eliminating 3" results in the dis• persion relation (w versus 3')

3 eTI 2 R'eczX 3'2 "cz2 X - (B' + 7^ ) X + ~ f~ = 0 (2-18) T TT TT 1 3' + — 3' + — aEj. ae^

where

X = 23' + — - — . (2-19) aeT v I o 28

Figures 2.3a and 2.3b show the dispersion curves (to versus \l\ — 3 15 ~*3 B') computed for n = 2 x 10 cm and n = 2 x 10 cm respectively for various values of ac^/e^.

2.3.1 Gunn Domain Velocity in a Thin Gunn Diode

With the diode operating under steady state conditions in a resistive circuit, oscillation occurs (Englemann and Quate 1967) if the

phase shift is Bn'L - 2Trn, n = 1, 2 Lower harmonic solutions (i.e.

|(3a| < 2) are written in the form:

w (B ) = + (^) - (B ' -£M n n L op Q, _ ZTT n L

where terms of —ggT2 and higher in the Taylor expansion are neglected.

The velocity of energy propagation of the wave should be (Stratton 1941)

the group velocity (TTT) 0 provided the dispersion is relatively L small. The curvature of the dispersion curves of figures 2.5a and 2.5b is small especially for the small values of B' of interest.

Briggs 1964 derived a pulse propagation velocity equal to

V = \T|3^B'* wnere S'* is the value of B' which corresponds to maximum wave growth. According to Engelmann . and Quate 1967, maximum space charge 2ir growth occurs for B' = — . The domain propagation velocity used here 'vd = NSB"1" g' = ' ls comPatlble with these results. L Shown in figure 2.6 is the domain velocity computed from

(--§T) . _ 2TT (normalized by the carrier drift velocity) as a function ^ ~ IT 14 -3

of n aEj/e^j. This curve is valid for n = 5 x 10 cm and L > 20 microns. Under these conditions the very weak dependence of domain 29

10 10' 10' (b) 14 15 Figure 2.5 Dispersion Curves for (a) n = 2 x 10 (b) n 2 x 10 -3 cm .2

10™ 10" naS o 1 VP (cm-2)

Figure 2.6 Domain Velocity (normalized to the carrier drift velocity) as function of diode thickness and surface loading. 31

velocity on n and L is not sufficiently significant to be shown in figure

2.4. The computed domain velocity as shown in this figure goes to zero 10 -2

z at the thickness corresponding to n a ^J -^_ = 5.66 x 10 cm

The preceeding small signal analysis is strictly valid only for the initial stages of domain formation when the domain is still small.

The actual domain velocity is probably less than that predicted by the small -signal-analysis. The computer simulations of Torrens 1969 indicate that under large bias conditions the domain velocity in bulk diodes is about 1.4 x 10 ^ cm/sec during the initial moments of formation and reduces to a steady state value of about 0.85 x 10^ cm/sec.

2.3.2 Condition for Zero Domain Velocity in a Thin Gunn Diode The mathematical derivation that domain velocity is zero at 10-2 E £ n a T/ -[-j = 5.66 x 10 cm is as follows:

Equation 2-19 yields the condition that — -r^T = 0 (i.e. zero v o 63 domain velocity) for -r-r-f- = 2. Differentiating equation 2-18 with res- op pect to 3' and substituting -rff = 2 into the result yields: op

2 2 2 x + 4(3' + — )x " 4(3' + —) + 3 = 0 (2-20) aEj. ae^. cz

Rearranging,

1

eTT I ~T~~2 X - 2(3' + T^-) [-1 + 2 ^ =• ] (2-21) V 4(3' +-71) aEI

From equations (2-18) and (2-19), x must be real positive since both

3' and co are real positive. In order that x he real positive in equation

(2-21) the condition ; 32

+ 1

4 (3' + ^) aEI must hold. Using the approximation

v^T * | (1 +X ) (2-23)

for

v^X - 1

then equation (2-21) becomes: 2

e 0 aE X » (3' + —} (1 - .'(—r) (2-24) aeI 4 eII Combining relations 2-14, 2-19 and 2-24 yields;

a£I ~ 2 . 1 4£^2 4g' -j (2-25) L C 1 1 eITTI 3cz 2 3 c'z " IT czT '

for zero domain velocity.

But I3 I >> 43' for GaAs devices longer than about 20 microns 1 cz' 14 -3

and n > 5 x 10 cm . The condition for zero domain velocity then

reduces to: aeT o V^ET —- -nr-r " 2 -r-V (2-26)

or

ae 2v e in n- — = I °i 1 = 5.66 x 10iU cm (2-27) £II l^zlq

Equation (2-27) agrees with the condition obtained numerically for zero 10 -2 domain velocity, specifically n ae^/e^ = 5.66 x 10 cm 33

2.3.3 Oscillation Suppression in a Thin Gunn Diode

Since the maximum small signal charge density at the anode

(z = L) of a device in steady state operation is:

P1 = A exp 8" L exp j(tot ~ 8' L) (2-28) large positive valued solutions of 8" 1 correspond to large space charge growth while small values correspond to small growth. Sufficiently small growth is associated with a non-oscillating diode. The value of growth factor 8" L below which no oscillation is obtained is somewhat uncertain because, as explained in the background to this chapter, the experimen• tally observed oscillation suppression criterion has in many cases been somewhat larger than various predicted values- The value of 8" 1 as• sumed here to correspond to oscillation suppression is that used by Kino and Robson 1.968 (8" L = .17) and is close to the value used .by Ho.fmann^

1969 (8" L = 15). This value has been demonstrated to provide a good match to the experimentally observed condition of oscillation suppression.

The growth term (8" L) is obtained by combining equations

2-17, 2-18 and 2-19 yielding:

L 8" L = — (2-29)

aeT v I o

The dependence of to on 8' was previously determined from equations 2-18 and 2-19 and typical plots are shown in figures 2.5a and 2.5b. The de- pendence of the growth term 8" L on thickness parameter as computed • £II from equations 2-19 and 2-29 for various diode lengths and dopant con• centrations is shown by solid lines in figure 2.7. This figure shows an abrupt drop in space charge growth for sufficiently thin diodes in all

35

cases. The diagonal dashed lines are those obtained from the Kino and

Robson 1968 approximate analysis and as predicted by them are shown to give a good match to the more exact computations at small values of ae^ aEj. . At larger values of the computed 3" L curves, being multivalued eII EII a£I functions of , have at least one solution of 3" L which is signifi- £II cantly larger than the approximate Kino and Robson 1968 solution. There• fore, larger space charge growth occurs than they predicted for these

a£I values of . Suppression of Gunn instabilities occurs at values of £II a£I for which solutions for 3" 1 do not exist above the horizontal dotted EII line shown in figure 2.7. This line corresponds to a value of 3" L = 17 which is the Kino and Robson 1968 oscillation suppression criterion.

The computed curves show that no solutions with 3" L ^ 17 naEI 10 -2 exist for— S 5.66 x 10 cm Therefore, the computations indicate eII an oscillation suppression criterion of:

nael _ ^ ,.10 -2 $ 5.66 x 10 cm EII

Sections 2.3.1 and 2.3.2 of this thesis have shown that the Gunn domain na£I 10 -2 velocity was zero also at the value of = 5.66 x 10 cm EII

Therefore, a stationary domain is predicted to occur at the value of naEj which corresponds to suppression of oscillation. This is compatible EII with the stationary high field predicted by McCumber and Chynoweth 1966 for subcritically doped bulk GaAs diodes and observed experimentally in thin and dielectrically loaded diodes by Kataoka, Tateno, Kawashima 36

and Komamiya 1968, Kuru and Tajima 1969, and Hofmann 1969.

2.4 Oscillation Suppression in a Capacitively-Loaded Thin Gunn Diode

If metal plates are placed close to the surfaces of the thin

film Gunn diode as shown in figure 2.8 the field pattern is modified

from the previous case of a non-capacitively loaded diode. Equation

(2-10) becomes

'C exp j(tot - Bz) sinh 3 (b + a - y) (2-30) III where b is the distance between the surface of the diode and the metal plate.

Equation (2-11) is then modified to,

A cos aa = C sinh 8b (2-31)

V

z

cathode anode

figure 2.8 Cross-section of a thin film diode with surface capacitive loading

Equation (2-12) then becomes:

8coth 8b atan aa = (2-32)

If the diode is sufficiently thin and the separation between 37

diqde and metal plate is sufficiently small then b < a << TgJ" * Under these conditions coth ftb = -r^ and equation (2-13) reduces to: pb

2 eII (2-33)

Combining equation 2-15 and 2-33 yields:

gaEj

The limits of validity of equation 2-34 are | 1 << 1 and |gb| << 1. 2 I

Therefore |g 1 << 1 and hence equation 2-34 can be reduced to: £II

8 eTT

(2_35) j R-lf ~- —2 6e 6 ab gj. B2

Substituting 8 = 8' + j8" into equation 2-35 and rearranging yields:

eTT I 28'abE 8 ?

8" - - R [-l+/l+(— ] (2-36)

where

abeI3cz 2 (28' ) « 1. eII

Substituting relation 2-23 into equation 2-36 yields:

0 abs 8 8" = -8' —— (2-37) ell

The growth factor 8" L for waves in a thin diode with capaci- tive surface loading then becomes:

, ,2 ab£ 8" L = - K---f B. (2-38) L eTT cz 38

Substituting for 3 , equation 2-38 becomes: cz 2 (2TT) U q n abe 3" L = ° (2-39) L v eTeTT o I II

Using the Kino and Robson criterion for oscillation suppression,

3" L S 17, then equation 2-39 can be rearranged to:

n abeT . _ v eT

o I $ __1^ _o_I (2_40) L "ll ^ (27T)2 |V-l'q or n dbe . $ 2.5 x 10 cm . (2-41)

EII

This is the condition for oscillation suppression in a thin Gunn diode with capacitive surface loading, and as discussed in section 2.2 is simi• lar to the criteria quoted by Kino and Robson 1968, Becker, Bosch and

Engelmann 1970 and Becke^ and Bosch 1970.

With capacitive surface loading, the condition for oscillation suppression in a thin Gunn diode (as shown by equation 2.41) is depen•

dent on the device length. The form of the relationship is however very similar to the non-capacitively loaded case except a factor of the ratio

of dielectric thickness to device length is introduced into the left hand side of the relationship. 39

III. DEVICE FABRICATION

3.1 Introduction

The diode lengths which are needed to produce Gunn oscillations at 1 Ghz and 10 Ghz are approximately 100 microns and 10 microns respec• tively. To produce thin film devices of these dimensions accurately, high resolution photolithographic techniques were required. The first and second sections of this chapter outline 'the photolithographic methods used. These techniques are treated briefly since detailed reviews such as that of Glang and Gregor 1970 provide a comprehensive discussion of these techniques. The third section describes the techniques used in making electrical contact to the devices and the properties of these contacts. Since the conditions of contact formation had a considerable effect on the devices' performance these are discussed in some detail.

3.2 Photographic Reduction

Photographic masks were produced by reducing artwork by a factor of 40 to 100 times by the use of precision photography. The artwork was produced using Keuffel and Esser "Cut 'n' Strip" mylar-backed art• work sheets. This is a two layer material specifically made for artwork production in micro-circuit fabrication. The ultra-violet opaque layer is stripped off in the desired pattern leaving a sharp, stable artwork original.

The photographic masks were produced in the beginning phases of the study by photographing the artwork with a Voigtlander, Vito C

(Lanthar 2.8/50 Lens) 35 mm camera. The film and exposure used were

Kodak H 135 ("High Contrast, Extreme Resolution") film at f/5.6 for

1/30 seconds. The artwork was illuminated using two Photoflood #2 lamps, 40

3 feet in front of the artwork and at 45° to it. A camera to artwork

distance of 16 feet 8 inches produced a reduction of 100 times. The resul•

ting photomasks had a minimum line width of 10 microns (approximately

1000 lines per inch). The celluloid photomasks were then glued onto 2"

x 2" x 0.04" glass slides for use inthe micropositioner as described

later. During the latter parts of the study, photomasks produced dir-

. .e.c.tly on 2" x. 2" .high resultion glass slides were obtained from Shaw

Photogrammetrie Services Ltd*. These slides had sharper definition

and were much easier to position in the micropositioner than the multi-

layered slides. No attempt was made to determine the minimum line width

possible with these slides but it was likely somewhat less than 10 microns.

3.3 Photoresist and Etching Techniques

The device geometry was def ined"by exposing a "t-hin layer -of

photo-sensitive material which covered the GaAs chip through appropriate

photomasks. Kodak Thin Film Resist (KTFR) diluted in the ratio of 4:5

with KTFR Thinner was the photosensitive material used. It was applied

to the chip by ejecting through a 0.4 micron Metricel filter from a syringe

and then by spinning the flooded chip at approximately 2000 rpm for 15

seconds. The time from rest to full speed for the spinner was approxi•

mately one second. The layer of KTFR was then prebaked for 12 minutes,

6 inches beneath a General Electric infra-red lamp (temperature approxi•

mately 85° C). This layer was approximately 0.9 microns thick as measured

using a Sloan Angstrometer. The first photomask and the resist covered

chip were then placed in the micropositioner which is shown in figure

* Shaw Photogrammetrie Services Ltd, 30 Thorncliffe Place, Ottawa 6, Ontario. 41

3.1. This micropositioner allowed movement of the mask in three dimensions.

Figure 3.1 The micropositioner rotation of the chip about an axis perpendicular to the face of the chip and tilt of the mask with respect to the chip. The mask was positioned in the appropriate place on the chip by simultaneously observing through a Bausch and Lomb binocular microscope at x30 power. The mask was lowered into contact with the resist layer on the chip and the resist was exposed for about 6 minutes and 15 seconds, 6 inches beneath a General Electric ultra-violet lamp (#R-40). The resist was developed by immersing with gentle agitation in KTFR Developer for 1 minute and 30 seconds. This was followed by immersing in KTFR Rinse, again with gently agitation, for

30 seconds. The resist areas which were polymerized during exposure re• mained after developing to protect appropriate portions of the chip. The unexposed resist washed away leaving portions of the chip unprotected.

These unprotected portions of GaAs were etched down to the

substrate using an etch of 3H2SO^ : : H20 (parts by volume).

The etch rate was dependent on age and method of preparation of the etch. 42

The preparation method used which gave an etch rate of approximately

2.5 microns per minute when used after .15 minutes but before 2 hours old was: 10 ml of ^2®2 WaS ac^e^ to x^ m^ °* ^2^' t^^s m:*-xture'was placed in a cold water bath to dissipate the heat of reaction and 30 ml of ll^SO^ were slowly added. After etching down to the substrate a mesa with a photoresist cap remained. The. width of the mesa was to be the device length.

An. alloy of gold-germanium as described in section 3.4.3 was then deposited in vacuum over the entire structure usually in two de• positions, each at 45° to the chip surface. This ensured deposition of

Au-Ge up the mesa walls. The top of the mesa was then cleaned of its resist and alloy layers by gently rubbing with a cotton swab soaked in trichlorethylene. The photoresist procedure was then repeated with a photomask which defined the contact land areas and the device's width.

The unwanted alloy was removed by etching for several seconds in aqua regia (3 HCI : KNO^ by volume). The device edges were then smoothed by etching once again for several minutes in 3H„S0, : H„0„ : H„0. The 2 4 2 2 2

W figure 3.2

• " A typical diode (xlOO) 43

device at this stage then looked like that shown in figure 3.2, where the lighter areas at top and bottom left are the Au-Ge contacts with the center portion being a raised mesa which is the diode itself. The

Au-Ge contacts were then alloyed into the GaAs to form an electrical con• tact as described in the next section.

3.4 Electrical Contacts

3.4.1 Influence of Contacts

The importance of the anode and cathode boundary conditions for bulk diodes in determining whether Gunn instabilities occur has been recognised by computer simulations (Kroemer 1968; Shaw, Solomon and

Grubin 1969; Hasty, Stratton and Jones 1968; and Suga? and Sekido 1970) and field of direction analyses (Conwel^ 1970; and Boer and Dbhler 1969).

A common weakness of all of these studies is that they do not treat the case of imperfect contacts existing simultaneously at both anode and cathode. Irrespective of this omission the following conclusions of these papers should be valid:

1) A partially blocking cathode affects the operation of an

otherwise ideal bulk Gunn diode by:

a) Reducing the domain transit length and thereby in•

creasing the frequency of Gunn oscillations

(Kroemer; Suga et al),

b) Lowering the amplitude of Gunn oscillations

(Kroemer; Suga et al; Hasty et al),

c) Reducing the saturation current (Shaw et al;

Suga et al; Conwell; Hasty et al ),

d) Causing hysteresis inthe current-voltage charac- 44

teristic (Conwell)

e) .. Suppressing Gunn oscillations completely if the

contact is sufficiently blocking (Suga et al;

Hasty et al; Shaw et al; Conwell; Kroemer;

Boer et al ).

2) A partially blocking anode affects the operation of an

otherwise ideal bulk Gunn diode by:

a) Lowering the amplitude of Gunn oscillations

(Suga et al ),

b) Reducing the saturation current (Suga et al),

c) Suppressing Gunn oscillations completely by

formation of a high anode field which may be suffi•

ciently large to cause impact ionization (Hasty

et al; Suga et al).

To ensure that dipole domains form completely and transit the entire length of the device, Boer and Dohler 1969 conclude the cathode

contact conductivity must be less than the GaAs low field conductivity but greater than the conductivity associated with the point at which the minimum sustaining current (as computed from the equal areas rule) crosses

the negative slope portion of the J versus E characteristic. In terms of the cathode electric field, Shaw et al and Conwell conclude that it must exceed the electric field associated with the peak current in the J versus E characteristic but must be less than the electric field associated with the crossover of the minimum sustaining current with the negative

slope portion of the J versus E characteristic. In practice the Bo'er

and Dohler requirement is very similar to that of Conwell and Shaw et al.

In the terminology of Boer and Dohler the cathode contact must be "slightly 45

blocking" in order that dipole domain formation and transit along the entire length of the device can occur.

The properties of the anode contact are assumed by Boer et al. and Conwell to have negligible influence on the over-all device properties.

The computer simulations of Suga et al. and Hasty et al. indicate this is not a valid assumption. They both conclude that an anode contact which has one-half the carrier concentration of the body of the diode will com• pletely suppress oscillation by causing the formation of a stationary high field at the anode. Also, experiments performed by Harris et al. using a vacuum deposited metal anode and an epitaxial n+ cathode appear to support these computer simulations. However, the simulations indicate that a reduction in carrier concentration by ten percent at the anode has relatively little effect on the operation of the device and can be tolerated.

From the preceding discussion it is evident that the influence of contacts on the performance of bulk diodes has been quite thoroughly investigated from a theoretical viewpoint. To date no similar studies have been reported for the planar Gunn diode specifically. It seems probable however that the same basic conclusions discussed above for bulk diodes also apply to planar diodes. The problem of making contacts to planar diodes appears if anything to be more severe. A non-uniform field distribution which can be caused by improper contacts, by the planar nature of the contacts and by surface states and other defects in the planar epitaxial layer appears to cause most of the problems. These ef• fects can combine to cause a high field at the anode which leads to lo•

calized heating and anode contact deterioration.

The most common failure mode in planar Gunn diodes (Colliver and Fray 1969, Jeppsson and Marklund 1967, Dienst, Dean Enstrom and 46

Kokkas 1967, Ullrich. 1971, and Fallman and Hartnagel 1971) has been the migration of anode metal across the diode causing the diode to be short circuited. A number of approaches have been used to overcome the problem of anode metal migration which is associated with the simple alloyed metal contact. Sekido, Takeuchi, Hasegawa and Kikuchi 1969 have used n solution regrown layers covered with evaporated metallization at both anode and cathode to obtain CW operation in the 0.5 to 1 GHz range,

Nakamura, Kurono, Hirao, Toyabe and Kodera 1971 have used vapour phase I [ epitaxy in preparing n contacts. Parkes, Taylor and Colliver 1971 used ++ a vapour phase grown n region at the anode only and an alloyed metal contact at the cathode. Takeuchi, Higashisoka and Sekido 1972 and Fallman,

Hartnagel and Srivastava 1970, have used tapered diodes with larger anode than cathode and,retaining the simple alloyed metal contacts, found that

•anode deterioration was reduced. -Annular .structures (.which ..are in principle the same as tapered structures) having alloyed metal contacts have also been shown by Colliver and Fray 1969, Clarke, Edridge and Bass 1969, and

Jeppsson, Marklund and Olsson 1967 to be less susceptible, to anode migra• tion than uniform devices. These devices are also voltage tunable because of their taper as discussed in section 4.4.3. Voltage tuning over greater

than one octave has been reported by the latter two sets of authors.

Adams 1969 found that CW operation was obtainable with alloyed metal contacts by making a constriction at the cathode to provide a nucleation point for the Gunn domains. Boccon-Gibod, Teszner and Mautre 1972 have demonstrated that the form of Gunn instability in coplanar diodes is in•

fluenced by the depth of the alloyed metal contacts. Adams 1969 and

Takeuchi, Higashisaka and Sekido 1972 have observed that a diode oscillates at a lower frequency when operated with a dc bias as opposed to a pulse bias. 47

Takeuchi et al. 1972 have concluded that the difficulty in ob• taining coherent CW oscillation in planar Gunn diodes is due to field distortion caused by field-enhanced trapping. The effect is greatest near the anode where trapped charge and field build up cummulatively with successive domain passages through the traps. They found that tapering the diode to have a wider anode than cathode tended to compensate for the field-enhanced trapping and CW Gunn oscillation was thereby obtainable fairly reproducibly.

Hartnagel^ 1971 has observed that the surface preparation of the planar diode also affects the coherence of the Gunn oscillations. This is compatible with the introduction of surface states by some surface preparation methods which may be susceptible to field-enhanced trapping effects.

Since "the alloyed metal contacts -are easy'-to-make -and "there is considerable information in the literature on the properties of various alloys this contacting method was chosen for this study.

3.4.2 GaAs Cleaning

Prior to the deposition of contact metal the surface of the

GaAs was cleaned by the following steps:

a) Rinse in trichlorethylene

b) Rinse in electronic grade acetone

c) Rinse in distilled water

d) Etch in 3 H^O^ : : H20

e) Double rinse in distilled deionized water (8 Mft -cm)

f) Rinse in a chelating agent solution of 30 gm ethy-

lenediaminetetracetic acid (EDTA) : 20 ml 50% NaOH :

1000 ml of H20 (distilled and deionized) 48

g) Double rinse in distilled deionized water.

This rinse schedule and particularly the rinse in EDTA solution

to remove any surface metal ions was found to be important in obtaining

reproducible low resistance contacts.

3.4.3 The Alloying Cycle

Contacts to the GaAs were made by vacuum depositing 88% by weight

Au - 12% by weight Ge and alloying as described by Braslau, Gunn and

Staples 1967 and Harris, Nanichi, Pearson and Day 1969. To determine

the optimum time and temperature alloying cycle, a number of square thin

film specimens with coplanar contacts were produced. These were subjected

to a variety of heating schedules in a molybdenum boat in a hydrogen at• mosphere of approximately two torr pressure. The temperature of the

specimen was measured using an iron-constantan thermocouple close to the

.specimen. The thermocouple was calibrated using the melting points of

In, Sn, Pb. Te, and Al. Near 450° C (the approximate temperature at which

Au alloys into GaAs) the thermocouple was calibrated using the melting

point of AgCl (455° C). Recalibration using the melting point of AgCl was done immediately prior to, or during the alloying process for all

devices made. The absolute accuracy of the temperature measurement is

estimated at + 5° C. The temperature as a function of time for each

alloying cycle was recorded onaNesco chart recorder (Model JY1-20A-2).

A typical alloying temperature cycle is shown in figure 3.3.

The color of the Au-Ge contacts before alloying was that of dull

gold plate. Upon heating to 330° C, the melting point of the Au-Ge

mixture, the contacts took on a much shinier gold appearance. Upon

heating to 425° C they changed to a duller silver-gold color. At 455° C

the color became a more shiny gold color and this change was accompanied 49

by a large drop in contact resistance. Further heating to the range of

650° C to 700° C resulted in the contacts assuming a dull brown color which was associated with a much higher resistance. The alloying tem• perature of 455° C + 5° C thus found was in close agreement with the alloying temperature of 450° C quoted by Harris et al.

zl 1= 600 zt=z

500

1400

300

; / 200 ! I. . ! i —

— 100

1 in/min

Figure 3.3 A typical alloying cycle

After alloying, globules of Au-Ge had formed on the surface of the contact and occasionally were square in shape as shown in figure

3.4.

Bevelling at approximately 5° to the surface showed that filaments of Au-Ge extended many microns into the GaAs under the globules.

Figure 3.5, a series of microphotographs at different depths of bevel, shows two filaments of alloy extending more than 5 microns into the GaAs.

To minimize the effects of the non-uniformity of the contacts 50

Figure 3.4 Globules of Au-Ge after alloying. (x400) caused by such globules and filaments, about 20% nickel powder was added to the Au-Ge alloy and coevaporated in a manner similar to that describe by Edwards, Hartman and Torrens 1972. This type of Au-Ge-Ni contact was used on devices made in the latter part of the study with other alloying steps remaining the same.

3.4.4 Low Field Contact Resistance

The low field resistance of each test specimen was measured and the contact resistance was calculated from the known resistivity and thickness of the specimen. The ratio of contact resistance to material resistance as a function of alloying temperature is shown in figure 3.6 and is of the same form as reported by Paola 1970 and Knight and Paola

1968.

The minimum specific contact resistance as determined from -3 -4 2 figure 3.7 is in the range of 10 to 10 fi -cm . This is comparable to the specific contact resistance for alloyed metal contacts to GaAs quoted by Cox and Strack 1967, Schwartz and Sarace 1966,. Knight and Paol Figure 3.5. Bevel showing filament penetration into GaAs (x 1000) D /

contact / / R material /

/

10' /

/ / /

/

0 10 \

600 Temperature (°C)

Figure 3.6 Contact resistance as a function of alloying temperature 53

1968, and more recently by Edwards., Hartman and Torrens 1972. The spe• cific contact resistance theoretically determined by Gupta, Sharma and

Sreedhar 1971 for an n+ -n (n+ = 5 x 10"*"^; n = lO^ cm ^) GaAs junction —6 2 is approximately 10 £2 -cm . Hence the measured value is several orders of magnitude greater than the theoretical value of Gupta et al.

Using a temperature of 465° C several specimens were heated for various lengths of time and their resistances measured. The contact resistance as a function of time at 465° C is shown in figure 3.7

R 10' contact

^material

1.0'

10 0

10 20 30 Time (sec)

Figure 3.7 Contact resistance as a function of alloying time at 465° C.

The minimum contact resistance associated with approximately

10 seconds alloying time is close to the value of 15 seconds quoted by

Harris et al. and the rise in contact resistance upon heating for longer periods has also been noted by them. 54

3.4.5 Current - Voltage Characteristic - Coherent and Incoherent Oscillation

Measuring the diode's low field resistance as mentioned in the previous section provided only a first indication of whether or not the diode would sustain Gunn oscillations. A better indication was obtained by sweeping the device to high fields with a Tektronix Transistor Curve

Tracer (575) and displaying the resulting current-voltage characteristic.

This technique also enabled the observation of approaching failure due to avalanching without actually causing the failure.

Coherent oscillation occurred in devices which had a saturation then a drop in current at sufficiently large voltage as shown in figure

3.8. This behaviour is characteristic of Gunn diodes, except the sat• uration current density observed in all the coherent thin film diodes in this study was appreciably less than that for uniform bulk diodes. Hasty et al., Suga et al., Conwell, and Shaw et al. have predicted that such a reduced saturation current results from resistive contact layers. The observed reduced saturation current is therefore compatible with the non-zero contact resistance evident in figure 3.7.

Incoherent oscillation in the diode of figure 3.9 began at a bias of 43 volts and remained until the bias was decreased below 36 volts.

Coherent waveforms with a superimposed incoherent component as shown in figure 3.10 were also observed. The current voltage charac• teristic resulting in this type of waveform showed both a tendency to saturate and then an abrupt increase as shown in figure 3.11. Figure 3.9 I-V characteristic of an incoherent diode 56

100 ma ^f^A-^^W

7 nsec

Figure 3.10 Waveform with both coherent and incoherent components

3.4.6 The High Resistance Contact Layer - a cause of impact ionization

A thin resistive contact layer has been observed by Harris,

Nannichi, Pearson and Day 1969, Cox and Strack 1967 and has been attri• buted to a high dislocation density formed under the contact during alloy• ing. Relatively thick layers produced in this study by extended alloying cycles were virtually insoluble in dilute aqua regia (3HC1 : HNO^ :

H20) whereas both the Au^-Ge and GaAs individually were soluble. This implies a layer which was probably an intermetallic compound of the Au,

Ge, Ga, and As system also forms upon alloying.

Irrespective of the cause of the high resistance layer Hasty,

Stratton and Jones 1968 and Suga and Sekido 1970 have predicted that its existence at the anode can cause the electric field in this region to be sufficiently large to cause impact ionization of carriers. The in• creased number of carriers produced by such ionization would reduce the resistance at the contact and cause the jump in current shown in figures

3.9 and 3.11. 57

V

20 volts

Figure 3.11 I-V characteristic of a diode whose waveform has both coherent and incoherent components.

The voltage along the specimen was probed to determine if the anode field in a diode with poor contacts was indeed large enough to cause impact ionization. Sze 1969 obtains a theoretical impact ioniza• tion field in a GaAs abrupt junction of approximately 3 x 10"* v/cm.

Other workers(Copeland^ 1966 and Thim and Knight 1967)have used impact

ionization fields in the range of 10^ to 2 x 10^ v/cm. To measure the field along the device a seven micron diameter tungsten was sup• ported in the focal plane of a metallurgical microscope and the device was moved on the microscope stage across this probe wire. The position of the probe relative to the device's cathode was measured using an eyepiece reticle. The voltage across the diode was applied by sweeping with a Tektronix 575 Curve Tracer which allowed simultaneous observation 58

of the current-voltage characteristic. The probe voltage was measured on a Tektronix 515A oscilloscope. The positional:accuracy of the probe was estimated at +3.5 microns which was the radius of the probe wire.

The voltage distributions along one diode (which was 110 microns long) for two values of peak applied voltage are shown in figure 3.12.

The lower curve corresponds to an applied voltage slightly less than that

corresponding to the jump in current and consequent noise generation. The upper curve corresponds to an applied voltage which is considerably larger than that necessary to initiate noise generation. The distribution of electric field for these two cases is shown in figure 3.13. The dashed portions of these curves are a result of being unable to accurately measure

the voltage close to the anode because of the finite thickness of the probe wire. The curve in which the extrapolated portion exceeds 10^ v/cm cor• responds to an applied voltage slightly less than that required to cause noise generation. It appears from this extrapolated curve that the field

at the anode was indeed sufficiently large to cause impact ionization.

The additional carriers generated by this impact ionization caused the sudden jump in current and the fluctuations in the current arose from the

random nature of the generation recombination process.

3.4.7 Impact Ionization Noise Spectrum

The noise spectrum of a diode with poor contacts was found to be a function of the applied voltage. At voltages not much greater than

the threshold voltage the spectrum was usually similar to that shown in

figure 3.14. The spectra shown here were observed on a Hewlett-Packard

855/B Spectrum Analyser which has a flat (+ 2db) response over the 10 MHz to 2 GHz range shown. The particular diode from which figures 3.14 and

3.15 were obtained was approximately 105 microns long and 1.25 microns Figure 3.12. Potential distribution along a diode with poor contacts

Figure 3.13. Electric field distribution along a diode with poor contacts. 60

V (mv)

100 H

0.5 1.0 1.5 frequency (GHz)

Figure 3.14 Noise spectrum of a diode biased slightly above the threshold voltage thick. The frequency generated by a device of these dimensions should have been less than one GHz if the device were operating in the pure

Gunn mode. The peak at approximately 1.8 GHz shown in figure 3.14 moved to the left (i.e. to lower frequency) and diminished in amplitude as the diode bias was increased. At a voltage of about twice the threshold voltage the spectrum was that shown in> figure 3.15. The movement of the peak to the left is compatible with its major frequency component being caused by a dipole domain which transits only part of the device's length.

Such a partial transit according to Kroemer 1968 and Suga and Sekido 1970 can result from a sufficiently resistive cathode contact. Increasing the bias voltage increases the length of the transit region and hence lowers the oscillation frequency as observed.

The noise spectrum due solely to generation and recombination of carriers according to van Vliet 1958 is given by:

(bN+P) (N+P) (l+o) T ) 61

V (mv)

100 i

10

0.5

frequency (GHz)

Figure 3.15 Noise spectrum of a diode biased at twice the threshold voltage

—2 °° where P(w) is defined by I (t) = / P(to) da)

I = the device total current

b = /hole mobility 4

N,P = total number of free electrons and holes in the device

respectively

T = carrier lifetime

Sharma and van Vliet 1970 show that for materials like GaAs for which b >> 1 this can be reduced to an rms noise current expressed by:

2 2I Px (3>2) eq e(N+P) N(l+co2x2)

Under conditions of impact ionization the values for N and P are difficult to determine exactly. Since the fractional increase in current at the onset of noise generation is about 10% it is assumed that

N = 1.1 n x device volume o = 1.1 n ltw o and P = 0.1 x N 62

For a carrier lifetime of 3 x 10 seconds amd the appropriate dimen• sions and electron concentration the noise voltage across the 50 ohm load is calculated to be the value shown by the dashed line in figure

3.15. Within the accuracy of estimating the free electron and hole con• centrations this curve provides a reasonably good match to the observed spectrum.

A carrier lifetime (T) of 3 x 10 seconds is used so that the shoulder in the spectrum occurs at the value of 0.5 GHz as observed. If the carrier lifetime is 3 x 10 ^ seconds and its drift velocity is about

10^ cm/sec then the mean drift distance before recombining is about 30 microns. This is compatible with Ullrich's 1971 observation by covering a portion of his diodes that 80% of the recombination radiation in his planar Gunn-effect devices occured within 40 microns of the anode.

3.4.8 Anode Light Emission

The generation and recombination process also gives rise to the emission of low intensity light at the anode as shown in figure 3.16.

Figure 3.16 Diode showing emitted light at the anode (x400) curve tracer

( Tektronix 575) diode monochromator photomultiplier (Bausch and (Phillips L omb 33 86 03) ACV 150 S1) s

recorder lock-in amplifier (Nesco (PAR HR 8) JY1 20A 2)

Figure 3.17 Light spectrum measurement system 64

The microphotograph in figure 3.16 was taken in two stages: first the plate was exposed at f/8 for 1/30 sec with illumination of the diode from the microscope lamp; second, with the. microscope lamp turned off and the device operating close to breakdown the anode light emission was recorded (without moving the device) by exposing the same plate for about one minute.

The frequency spectrum of this light was measured using the system shown diagramatically in figure 3.17. The resulting emission spectrum is shown in figure 3.18. The peak intensity at 8900 + 200 A0 corresponds to an energy of 1.40 + 0.03 eV.

j......

INTENSE TY

— r> :.l 1 resolution.

,r \:F:\.

_.,.,-0 . ... : . I .

fU„o..^.->_ -'.Hi rrf. :.n.-!r:r.".:.! .1. -.:,!! «i.vi:

* - < * • ._.l...o •ri, vi . i \~ y. a . . r lz 7.7 7.0 .9 .8 .7 WAVELENGTH ( p )

Figure 3.18 Spectrum of emitted light at the anode of a GaAs diode, 65

The band gap in GaAs at 300° C is (Neuberger 1965) in the range from 1.37 eV to 1.435 eV depending on impurity concentration. Therefore, the main recombination process occurs between states very near the conduc• tion and valence bands. The existence of light in the visible range as observed under x400 magnification, though below the sensitivity of the measuring apparatus, implies a carrier transition of several electron volts. Therefore some recombination must also occur between excited states.

Electroluminiscence from GaAs Gunn diodes has also been observed by Acket and Sheer 1969 (8900 A°), Hasty et al. ( 10,000 A°), Heeks 1966

(9000 A°), Chang, Liu and Prager 1966 (9000 A°), Southgate 1967 (8900 A°),

Liu 1966 (9000 A°), Ullrich 1971 (9000 A°) , and Chynoweth, Feldmann and

McCumber 1966 (9000 A°).

The intensity of radiation increased with applied voltage as

•shown in figure 3.20. The form of -this plot -is similar .to .that .of-Ul• lrich 1971.

V

Figure 3.19 Radiation intens.ity dependence on applied voltage.

The emission of light at the anode provided an indication that 66

the applied voltage was close to the breakdown voltage for the devices as discussed in the next section.

3.4.8 Anode Metal Migration and Device Failure

Extended operation at high voltages caused filaments of metal

to grow from the anode toward the cathode as shown in the series of micro- photographs in figure 3.20. This series covered a time span of about 20 minutes. The filaments usually grew at points at which light emission was most intense. The growth of any particular filament of metal occurred

too quickly to see, but was sometimes preceded by several seconds by

darkening or voiding of the anode metal at the point at which growth was about to occur. Both of these points have been noted by Jeppsson

and Marklund 1967. The sudden appearance on the surface of a string of metallic globules each up to 2 microns in diameter then followed. The

anode discoloration and the spherical shape of the globules indicate the metal was molten during its migration. The metal migrated in the same

direction that positive metal ions would move under the influence of the

applied field. Therefore, the mass transport mechanism observed in

single component metal films of electrons transferring momentum to metal

atoms by scattering (Black 1969) was not dominant here. Furthermore,

the movement of metal down a temperature gradient is not appropriate

since anode metal was scavenged from well into the anode area and moved

over a probable temperature peak at the avalanching contact edge. It is

concluded, therefore, metal migration is likely due to electrostatic

attraction of the cathode on positive metal ions which are relatively

mobile by virtue of the metal being molten. Anode melting has also been

observed by Colliver and Fray 1969 and Jeppsson and Marklund 1967. The

local heating which melted the anode metal was likely generated by a Figure 3.20. Metal migration and anode light emission from a device undergoing breakdown ( x 400) 68

combination of resistive heating and impact ionization. During final breakdown the filaments of metal extending from anode to cathode were observed to be molten. Bevelling across such a filament showed penetration beneath the surface of at least 4 microns as shown in figure 3.21

Figure 3.21 Bevel across a conducting filament after breakdown

Anode metal deterioration under large bias conditions has also been observed in coplanar metal contact Gunn diodes by Colliver and Fray

1969; Dienst, Dean, Enstrom and Kokkas 1967; Ullrich 1971; and Jeppsson and Marklund 1967.

3.5 Device Mounting

A series of four devices on one chip were usually fabricated at one time. These devices after fabrication were separated by scrat• ching between them with a hardened steel scribing tool, and breaking by applying light pressure from the back side of the chip with teflon tweezers.

An individual device was put on a brass mount as shown in figure

3.22. 69

• y

•

Figure 3.22 A mounted diode

The mount shown in figure 3.22 was designed to fit into the test holder as discussed in the next chapter. The mount body was elec• trically isolated from the pins protruding from either end of the mount.

The diodes were glued to the. brass body with "Aron Alpha" Methylcyanoa- crylate adhesive.

Wires were then connected between the inside ends of the mount contact pins and the diode's adjacent contact lands using "G.C. Elec• tronics" silver paint. This silver paint was found to tolerate the device's heating during dc operation and produced quite satisfactory contact to the Au-Ge contact lands. 70

IV. PLANAR GUNN DIODE EXPERIMENTAL APPARATUS AND RESULTS

4.1 Introduction

The oscillation frequency of planar Gunn diodes, as discussed

in section 2.2, has often been observed to be less than the frequency

expected for bulk diodes of the same length. Also, the small signal

analysis contained in section 2.3 predicts a decrease in Gunn domain velocity with decreasing nd product. No systematic experimental deter• mination of the dependence of domain velocity on the thickness of planar

diodes has been reported in the literature. The main purpose of the

experimentation described in this chapter was to carry out such a sys•

tematic examination.

Section 4.2 describes the test apparatus used in the experiments.

Section 4.3 contains a discussion of the properties of the GaAs material

from which the diodes were made. The last section contains the results

experimentally obtained for diodes of various geometries, thicknesses

and concentrations.

4.2 Test Apparatus

4.2.1 Diode Coaxial Holder

To ensure that the oscillations which the diodes generated were the result of pure Gunn mode operation (i.e. charge dipole formation

and transit) it was necessary to operate the diodes in a resistive cir•

cuit. A reactive circuit can give rise to delayed or quenched mode os•

cillations which would confuse the effect of diode thickness on the os•

cillation frequency. Since the available test equipment had standard

50 ohm input terminations and since 50 ohm coaxial fittings are readily

available, the test circuit was designed to have a characteristic im- pedence of 50 ohms. 71

The diode mount and coaxial holder used are shown in figure

4.1. The outside diameter of the mount was 0.298 inches and the inside diameter of the holder was 0.696 inches, resulting in a ratio of dia-

Figure 4.1 Diode mount and holder meters of 2.34. Elementary theory (for example Gray 1968) predicts that this ratio of diameters in an air centered coaxial cable will produce a characteristic impedence of 50 ohms. In order that the chip could be mounted, a flat side was made on the diode mount as shown in figure 4.1.

To ensure that neither this flat side nor the gaps between mount and the center conductor of the holder introduced appreciable reactive components, the VSWR of the holder with a diode in place was measured using the circuit of figure 4.2.

The trigger countdown circuit in figure 4.2 is a tunnel diode oscillator which generates steps with a rise time of less than 40 pico• seconds. By observing the generated step and the reflected step from the diode and its holder on the sampling oscilloscope the standing wave ratio for the holder and diode was calculated to be less than 1.18. 72

trigger holder count-down sampling head 50

sampling oscilloscope

Figure 4.2 VSWR measurement circuit

This was only slightly greater than the maximum VSWR of the General

Radio components (according to the GR specification sheets) used in the test circuit. Since the VSWR of the -holder was comparable to that of the other components in the test circuit (low pass filter, and terminations) and less than the VSWR of cavity-type holders usually used to generate other transferred electron modes, it was concluded the test holder and diode assembly was sufficiently non-reactive to generate pure Gunn mode oscillations. This conclusion was verified by the success• ful generation of pure Gunn mode oscillations as discussed in section 4.4.

4.2.2 Test Circuit

The entire test circuit is shown schematically in figure 4.3.

The dc bias to the diode was applied through the coaxial center conductor and was isolated from the measuring equipment by a 0.1 mfd .

Load . R-^ was the dc load for the circuit and was a 50 ohm ter• mination. Matching the diode holder assembly in the forward direction for microwave frequencies was accomplished by inserting a 3 db coupler voltage supply

4=r trigger count-down sampling

head

sampling oscilloscope

Figure 4.3 The diode test circuit 74

(which has a 50 ohm input at one termination if the other terminations are loaded with 50 ohms) which allowed separation of the dc bias component from the microwave component. Matching in the reverse direction was ac• complished by isolating the power supply (which did not have a 50 ohm out• put impedence) with a 0.1 GHz low pass filter. Microwave signals were terminated in the reverse direction through a 0.1 mfd capacitor by a

50 ohm termination (which is labelled in figure 4.3).

The primary measurement instrument was the Hewlett-Packard sampling oscilloscope (model 140A with a 1431A sampler head and a 1411A sampling amplifier). A secondary measurement instrument in place of the

50 ohm termination marked was used in most tests as well. This se• condary instrument was variously a Hewlett-Packard power meter (model

430C) with Bolometer mount, a Beckmann frequency counter (model 6146) with model 607 or model 609 hetrodyne units, or a Hewlett-Packard spec• trum analyser* (model 855/B). Hence, total power, primary frequency component, or frequency spectrum could be measured simultaneously with the observation of current waveform.

The frequencies measured on the frequency counter, the spec• trum analyser and the sampling oscilloscope all agreed with one another within 0.6%, and also agreed, to the same accuracy, with the signal out• put of a Hewlett-Packard sweep generator (model 8690B).

4.2.3 Device Geometries

During the course of this work a number of device geometries as shown in figure 4.4 were used. To reduce the tendency for breakdown to occur at the anode, many devices with enlarged anodes (figure 4.4(c)) and tapered devices with broader anodes than cathodes (figure 4.4(d))

* The spectrum analyser was the property of Lenkurt Electric Co. Ltd. and was used with their consent and assistance. 75

Figure 4.4 Diode geometries studied /b

were made. These latter devices, when they operated coherently, could be voltage tuned as discussed in section 4.4.3. In an effort to promote coherence many devices with constricted cathodes (figure 4.4(b)) also were made.

Most diodes were made in the form of mesas with anode and ca• thode metallization extending up the mesa walls. This was to minimize current crowding and thus avoid local heating.

These steps, however, were less important in obtaining good diodes than was ensuring that the proper cleaning and alloying cycles were used. Of more than 200 diodes made, only about 10% produced co• herent oscillation, about 80% operated incoherently and the remainder did not oscillate. This low yield of coherently operating devices was due at least in part to the low value of nd product used in the GaAs

film. As pointed out in section 2.2, incoherent oscillation from planar diodes with small nd products has been observed by a number of other workers.

Devices which had a slight broadening toward the anode as shown in figure

4.4(d) tended to operate coherently more often than the other geometries.

This is in agreement with the observations of Takeuchi, Higashisaka and

Sekido 1972 as discussed in section 2.2.1.

4.3 GaAs Properties

Since the electron concentration and the n-type epi-layer

thickness are the parameters which determine the domain velocity, ac•

cording to the small signal analysis contained in section 2.3, these parameters were measured on all wafers used.

The thickness was obtained by bevelling across the epi-layer

at 5° and staining the junction between the n-type layer and the semi-

insulating substrate by electrodepositing copper from a cupric fluor- 77

oborate solution (section 4.2.1). The bevelling was carried out by mounting the chip on an aluminum holder which had a section sloped at 5°

from the base plane of the holder as shown in figure 4.5.

holder

Figure 4.5 Edge view of the holder used for bevelling

The protruding edge of GaAs was ground down by gently rubbing in an

emulsion of 0.05 micron alumina powder in water on a glass plate.

The electron concentration -was -measured by -doing-Hail-e-ffe'ct

measurements (Putley 1960) on van der Pauw 1958 clover-leaf geometry

specimens as shown in figure 4.6. The contacts to the specimens were made

using the Au-Ge-Ni, alloy, silver paint schedule described in section

3.4. The completed contacts were covered with KTFR and the center

portion was etched (3H2SO^ : H202 : H20) in stages, with Hall measure•

ments being taken on the progressively thinner devices. In this way

carrier concentration profiles through the epi-layers were obtained. A

cross-check of the thickness measured by bevel and stain was also obtained

from the total time required to etch through the film. The carrier con•

centration profiles obtained for the wafers from which diodes were made

are shown in figure 4.7. The measured Hall mobility profiles are shown

in figure 4.8. The termination point of each line in these figures marks

the thickness of each epi-layer. 78

40

SlSl.I Mil 1 11! 1111H 11II11 .1

Figure 4,6 The van der Pauw elover-Ieaf geometry (x50)

The parameter of particular interest, as discussed previously, was the product of carrier concentration x thickness. The nd product can be exx>ressed directly from the Hall measurements by:

.10 8 BI nd • (4-1)

~ V where n is the electron concentration (cm )

d is the layer thickness (cm)

B is the magnetic field (gauss)

I is the total current (amps)

V, is the Hall voltage (volts)

q is the electronic charge (coul)

Determining the nd product from equation (4-1) eliminated the need to determine an "average" carrier concentration or even to determine the layer thickness, although this was done separately. The measured values of nd product for the various wafers (which are labelled after the Mon- santo*nurnbering seheme) are shown in table 4.1. ^Monsanto, P.O. Box 8, St. Peters Missouri, 63376. 79

16 10 n (cm-3)

170-65 522-46

10 15

83&VI

14 10 j n L 8 16 18 x (]JL)

Figure 4.7. Carrier concentration profiles

Mh 7000 \ (cm^/v-sec)

838-01 6000

5000 +1 522-46 +

4000

-ii—'— 8 16 18 x (ji)

Figure 4.8. Hall mobility profiles 80

wafer // nd (cm 2) 11 838-01 2.1 x 10 11 552-46 4.2 x 10 11 422-42 6.3 x 10 J-2 170-65 2.3 x 10-

Table 4.1 The measured nd product of the GaAs epi-layers

4.4 Domain Velocity in Planar Gunn Diodes

4.4.1 Dependence on the nd Product

Modes of oscillation other than the pure Gunn mode (i.e. dipole domain transit along the entire length of the device) can arise if the de• vice is operated in a reactive circuit or if its cathode contact is suf• ficiently blocking as discussed in section 3.4.1. To ensure that the domain velocity determination was based on pure Gunn mode oscillation, only spiked current waveforms similar to that shown in figure 4.9 were considered reliable. This type of waveform is characteristic of domain formation and transit (for example, Foyt and McWhorter 1966). Further-

0.5 nsec

Figure 4.9 Gunn mode current waveform more, the length of the domain transit was checked by making use of the 81

property that a domain, in sweeping past protrusions in the diode, re•

produces these protrusions in the current waveform (Shoji 1967). By cor•

relating the shape of the current waveform to the shape of the diode, as

shown in figure 4.10, an accurate and reliable measurement of the domain

Figure 4.10 Correlation of current waveform to diode shape velocity was obtainable. The applied bias voltage V is (Shoji 1967) equal to the domain excess voltage plus the voltage drop outside the domain

V = V (x) + . (4-2) ex enydb (x)

where Vgx(x) is the excess domain voltage

b(x) is the width of the diode

Assuming the domain excess voltage does not change appreciably, the per• centage increase in current (in equation 4-2) caused by a domain sweeping past a widened portion of the diode is approximately equal to the per•

centage increase in the diode width. This assumption produces a value of

current increase which is a maximum allowable value because the domain excess voltage is reduced somewhat as the domain sweeps past the widened 1.0 i- - -

Vdx10-7

8 I (cm/sec)

I

.21

12 10 n 10 nd (cm'2)

Figure 4.11 Domain velocity in thin Gunn diodes as a function of nd product 83

portion. The amplitude scale of the waveform shown in figure 4.10 was

100 mv/cm across a 50 fi load which corresponds to 2 ma/cm. Therefore, the magnitude of the secondary peaks on the current waveform (due to the domain passing the irregularities) was about 0.5 ma. This represents a change of about 6% on the dc current level of 8 ma. This 6% change is comparable to the percentage fluctuation evident in the width of the diode shown in figure 4.10.

The domain velocity determined from the coherent waveforms of other diodes, for which the correlation of secondary peaks could be made, is shown in figure 4.11 as a function of the nd product. According to the small signal analysis presented in section 2.3, the domain velocity should approach zero as the parameter na e^/e^j approaches a value of 10 -2 5.66 x 10 cm or taking = z and d = 2a, as nd approaches 1.132 11 -2 x 10 cm . The experimental -results -shown in f i-gure 4 .-11 -indicate that the domain velocity does indeed diminish as nd becomes smaller.

The dashed line in this figure is the domain velocity determined from

the small signal analysis and is based on a velocity in bulk material of

10 cm/sec. The shift of the experimental points away from the theoretical

curve may be at least partly explained by three considerations. The

first is that the small signal analysis should result in a higher domain velocity than actually occurs because it is appliable only during the initial stages of domain formation, which according to Torrens 1969 is

the moment of highest domain velocity in bulk diodes. Secondly, the

analysis is based on a thin film diode symmetrically loaded with materials

of equal permittivity. Allotting a value to the parameter nQa e^/e.^

in the practical case of a diode with air loading on one face, GaAs sub•

strate loading on the other face, and surface states likely existing at 84

each, is therefore somewhat artificial. For simplicity was taken

to be equal to e^.. The third consideration is that the analysis does not

include the electron drift velocity dependence on bias voltage and hence

also ignores the dependence of domain velocity on bias. This dependence was observed experimentally and is reported in the next section. The

results shown in figure 4.11 were all obtained with an applied voltage

only a few percent greater than the threshold voltage and .if the diodes had been of the bulk rather than thin film type, should have exhibited

domain velocities of approximately 1.5 x IO'' cm/sec.

4.4.2 Bias Tuning of Uniform Gunn Diodes

The frequency of oscillation of a diode of uniform cross

section in a resistive circuit can be tuned over a few percent bandwidth

by changing the bias voltage. The explanation for this tuning is provided by Butcher's 1965 "Equal Areas Rule". A discussion of the equal areas

rule is contained in most texts dealing with the Gunn effect (Carroll

1970, Hartnagel 1969, Watson 1969, Sze 1969) and is not repeated here.

In brief, the equal areas rule predicts that an increase in the bias

applied to a bulk diode increases the peak domain field, decreases the

field outside the domain, and decreases the domain velocity. The fractional

change in domain velocity, and hence oscillation frequency, is relatively

small compared with the large change in bias which causes it. Shown

in dashed lines in figure 4.12 is the domain velocity in a uniform bulk

diode as a function of bias voltage. This plot is a result of applying

the equal areas rule, which is modified by a field dependent diffusion

term as discussed by Copeland 1966, to a hypothetical diode which is in•

finite in cross-section, 15 microns long and has an electron concentration

15 -3 of 2 x 10 cm . Also shown in figure 4.12 is the domain velocity 1.1 -7 vdx10

1.0 \ \ (cm/sec) \

.9

8

-x-

10 15 20 V (volts)

Figure 4.12. Bias tuning of a uniform Gunn diode. 86

observed experimentally in a 1.4 micron thick diode which, otherwise had approximately the same length and electron concentration as the hypothetical bulk diode. The reduced domain velocity and increased threshold voltage due to the diode's finite thickness and imperfect contacts respectively are evident. The amount of shift in domain velo• city for a particular change in bias voltage is, however, nearly identi• cal in the two cases. It appears from figure 4.12, therefore, that frequency control over a small range by varying the bias is possible in the thin film diode in a manner very similar to that for the bulk diode.

4.4.3 Bias Tuning of Tapered Gunn Diodes

A much larger range of frequency tuneability is possible if the diode is tapered as shown in figure 4.13. In this configuration,

Figure 4.13 A tapered diode (x400) the fraction of the length of the device which sustains Gunn oscillations is determined by the bias voltage. Since this length determines the oscillation frequency of the diode in a resistive circuit, a fairly large range of voltage tuneability is possible. Jeppsson, Marklund and Olsson

1967, Clarke, Edridge and Bass 1969, Shoji 1966, and Bhattacharya 1970, 87

all report having observed a voltage tuneable bandwidth of approximately one octave in tapered Gunn diodes or in planar diodes with concentric electrodes.

The experimental points in figure 4.14 show the frequency of oscillation as a function of applied voltage obtained for the diode of figure 4.13. This diode was 17.5 microns thick and had an electron

2.0 freq.

(GHz)

15 x x

10 42 U 46 48 50 V (volts)

Figure 4.14 Bias tuning of a tapered diode

concentration of 1.65 x 10 cm . A tuning range of somewhat less than one octave was observed. This diode configuration, however, was not optimized for maximum tuning.

Shown as a solid line in figure 4.14 is the frequency calculated

according to the following model:

Ignoring the current non-linearity as will be discussed, the voltage at any position x along the length of the diode is given by: 88

\V dx V(x) Vapp L.'' dx (4.3) o W(x) where V is the applied voltage app r ° and W(x) is the diode width at point x.

The electric field at this point is:

(4 4) »w • V dx '

The point on the diode at which the electric field equals the minimum field for oscillation determines the length of the region of oscilla• tion. The frequency, determined from the length of the region of oscillation, as a function of applied voltage for the diode of figure

4.13, and assuming a minimum sustaining field of 2.7 Kv/cm and a domain velocity of 10^ cm/sec, is shown by the solid line in figure 4.14.

The tacit assumption involved in ignoring the current non- linearity in equation 4.4 is that the redistribution of electric field within the region of oscillation upon formation of a domain, does not cause an appreciable shift in the point at which the electric field falls below the minimum sustaining field. The reasonable match of the theoretical result to the experimental points appears to add credence to this assumption. 89

V. THE NEGATIVE RESISTANCE FIELD EFFECT TRANSISTOR (NERFET)

5.1 Introduction

The initial object of constructing GaAs FETs was to determine the conditions under which Gunn oscillation would occur in such FETs and to observe the effect of varying the gate potential on such oscil• lation. It was found that only two devices displayed instabilities apparently in the GHz range and these were not proven to necessarily be

Gunn instabilities. All other devices displayed a static negative dif• ferential resistance (SNDR) without instability, at voltages greater than a threshold. (The term static applies to the existence of negative dif• ferential resistance down to very low frequencies, i.e. quasi-dc). The

FETs which displayed a stable SNDR characteristic are called Negative

Resistance Field Effect Transistors (NERFETs) to distinguish them from conventional FETs which display a saturating current characteristic.

This chapter is divided into four parts. The first part describes the devices' construction and current-voltage characteristics.

Section two contains a discussion of related devices as reported by others, and lays the ground work for the discussion in the third section on the mechanisms which likely cause the SNDR. The fourth section contains a discussion of the operation of NERFETs in a number of circuits.

5.2 The Construction and Characteristics of the NERFET

5.2.1 NERFET Structure and Fabrication

The structures of the NERFETs were similar to those of the

diodes described in section 4.2.3. The contacts were coplanar and

the GaAs wafers from which the NERFET's were made were obtained from

Monsanto* as n-type layers epitaxially deposited on p-type substrates.

The p-type substrate of the NERFETs (as opposed to the semi-insulating

*Monsanto, P.O. Box 8, St. Peters, Missouri 63376 90

substrates of the diodes) allowed, however, gate control of the conducting channel in the NERFET by the field-effect phenomenon (Shockley 1952).

In plan view, all of the NERFETs, in the source to drain region, were uniform as opposed to having notched cathodes and enlarged anodes as for the diodes. In cross-section, however, several geometries were used as shown in figure 5.1. The source to drain distances were in the range from 18 to 50 microns and the thicknesses in the source to drain region were in the range from ~ 0.1 to 5 microns.

The carrier concentrations in the n-1ayer were measured by two techniques, specifically, Hall effect and capacitance-voltage measurements.

The Hall effect measurements were the same as described in section

4.3.2 for the n-type films on semi-insulating GaAs.

The existence of a p-n junction, however, permitted the mea• surement of carrier concentration by measuring the ac capacitance as a function of the reverse dc bias to the p-n junction. This is a well established (Meyer and Guldbrandson 1963, Amron 1964, Chang 1966, John• son and Panousis 1971 and Djuric, Smiljanic and Tjapkin 1971) technique for measuring doping profiles. Provided one side of the junction is much more heavily doped than the other, that the metallurgical step between the two sides is abrupt, that all the impurity centers are ionized and that any changes in carrier density are small over a Debye length

then the carrier concentration is given by (Johnson and Panousis 1971):

• CO - - | ff (5-D where x is the distance from the metallurgical junction = e/C

C is the small signal ac capacitance/unit area

V is the reverse dc bias voltage. 91

source drain S S S S S s yy s> S S n-GaAs

gate p-GaAs

(a)

source drain y s / szz. •zzz-zzzzzzzi n-GaAs

gate p- GaAs

(b)

source dra in y y y ~2z y s s s s n-GaAs

gate p-GaAs

( c)

Figure 5.1. Types of NERFET Geometries in Cross-Section 92

The maximum depth into the layer which can be measured using

this technique is determined by the junction reverse breakdown voltage.

The p-n junctions used had breakdown voltages in the -25 to -30 volt range which limited measurement to a maximum of about 1.5 microns into the

film. The remaining thicknesses of the films were measured by progressively

etching Hall specimens as discussed in section 4.3.2.

The capacitance-voltage measurement circuit used was that

shown in figure 5.2. The frequency at which the capacitance was measured was 1 MHz.

dc voltage supply ± t [capacitance meter (Boon ton x-y recorder + 71A)

Figure 5.2 Capacitance-voltage measurement circuit

The capacitance versus voltage plot obtained for wafer 0856-02

from this test circuit is shownin figure 5.3. The doping profiles ob•

tained using equation (5-1) from the C-V measurements for this wafer and

for wafer 0856-01 are shown in figures 5.4(a) and 5.4(b). The carrier

concentrations obtained from the C-V measurements as shown by crosses

in figure 5.4 are compatible with the Hall effect measurements as shown by

circles. The carrier concentration was determined from the Hall effect

data by the relationship (Putley 1960): 93

Capacitance

<00 (pf)

300

200

100

vbi

8 10 12 14 16 IB 20 Reverse Bias (volts)

Figure 5.3 Typical capacitance-voltage ..charac.ter,is.ti.c.-fo.r^.a..reverse biased p-n junction (junction area = 0.0235 cm^)

n = a/qR (5-2) where:

R = the Hall Coefficient

tv.H (5-3) IB

The value of a as measured by previous workers is only slightly larger than unity. Willardson and Duga 1960 measured a value of a = 1.07 at

T = 300° K and B = 1.5 KGauss, and Hamerly. and Heller 1971 measured a value of a = 1.10 under approximately the same conditions. The profiles shown in figure 5.4 indicate that the concentrations determined from the

Hall data may be slightly less than those determined from the C-V data, hence acalculated value of a slightly greater than unity is implied. The scat• ter of experimental points however is sufficiently large to. negate the 94

Figure 5.4 Electron concentration profiles measured by C-V (cross and Hall (circles) methods 95

usefulness of making an adjustment in the value of a. The accuracy of the measurement was therefore in the range of 10 to 20%.

A typical current-voltage characteristic of a p-n junction had a turn-on voltage of about 1.2 volts and a very low leakage current as shown in figure 5.5. (A built-in voltage of about 1.2 volts for a

GaAs p-n junction of the carrier concentrations used here is quoted by Sze 1969).

Surface contamination which could cause appreciable leakage current was the major problem associated with the mesa structure devices made in this study. Such leakage could be minimized for limited periods

(several days) by cleaning the device in the ethylenediaminetetracetic acid solution and double rinsing in distilled, deionized water (~8 M

Q -cm). Surface passivation would appear to be a better long term sol• ution to the problem.

The thickness of the epi-layer was measured by bevelling at

5° as discussed in section 4.3.1, cleaning the bevel with acetone and deionized water and then electrodepositing copper on the p side of the junction from a 45% cupric fluoroborate solution. The electrodepositing 2 current of about 10 ma/cm of exposed p-type surface was applied for about

5 seconds. The resulting junction looked as shown in figure 5.6, with the p-region being the dark area.

The NERFETs were fabricated using the same basic techniques which were used in fabricating the diodes as described in sections 3.2 and 3.3. However, the type of photomasks used and the order in which

they were used was different because the structure of the NERFET was different.

The wafer was scribed,and broken into chips about 2mm x 5 mm 96

Figure 5.6 A bevelled and stained p-n junction 97

which were large enough to allow the fabrication of 4 devices on one

chip. The chip was cleaned using the trichlorethylene, acetone, deionized

water, EDTA, deionized water sequence as discussed in section 3.4.2.

The chip was then placed in the vacuum system and a layer of Au-Ge-Ni

metal was evaporated onto the chip surface. The chip was removed from

the vacuum, coated with KTFR, spun and then prebaked. The first mask

.consisted of a .tungsten wire (in .the .12 to 50 micron diameter range)

stretched on a metal frame. Using this mask the photoresist was exposed

and developed leaving a strip (which was again 12 to 50 microns wide,

depending on the wire diameter) which was free of KTFR protection. (The

width of the strip was in the finished device the source to drain gap).

The Au-Ge-Ni metallization was removed by immersion in Metex* Aurostrip

at 90° C for 5 minutes. The n-type GaAs layer in the strip region was

then thinned to the desired value by immersion in St^SO^ •: "H^C^ : "H^O'').

The remaining n-type layer corresponded to the channel thickness in the

FET. A notch was obtained by repeating the process with a thinner mask

wire.

The KTFR was removed in J-100+ at 60° C which was diluted

1:1 with trichlorethylene. The chip was again coated with KTFR, spun

and prebaked. The second photomask defined the surface geometry of the

devices, including contact lands. The KTFR was exposed and developed

and the Au-Ge-Ni metal in areas outside the devices was removed in Auro•

strip. These same areas were etched (in SH^SO^ : ^2^2 : **2^ completely

through the n-layer into the p-type substrate. The resulting devices were

in the form of mesas as shown in figure 5.7.

_

MacDermid Inc., 526 Huntington Ave., Waterbury, Connecticut, 06720

Indust-Ri-Chem Laboratory, P.O. Box 1178, Richardson Texas, 75080 98

Individual device chips were mounted on the brass holders

(section 3.5) initially by alloying with an In-Zn alloy. Later, silver paint was used to mount the devices because it gave equally good electrical contact, a stronger bond and was easier to apply.

Figure 5.7 NERFET structure

Figure 5.8 NERFET typical I-V characteristics 99

5.2.2 NERFET Characteristics

The current-voltage characteristic of the NERFET is similar

to that of the conventional JFET except instead of the drain current

tending to saturate at high source-drain voltage it attains a maximum

and then decreases with increasing voltage. At sufficiently high vol•

tage the current may again increase and tend toward a saturation value.

A typical current-voltage characteristic for a NERFET is shown in figure

5.8.

A region of negative differential resistance in any device's

current-voltage characteristic can cause circuit oscillation when the

device is operated in a reactive circuit. The conditions for stable

circuit operation of such a negative resistance device are derived in section 5.5.3. These conditions must be met when measuring the current- voltage characteristic of the NERFET in order to -avoid unwanted oscillation effects in the characteristic. For example, the current-voltage charac• teristics of a tunnel diode when measured under the conditions of circuit stability and circuit instability are shown in figure 5.9 (taken from

Chow 1964). Notice the similarity between these tunnel diode character-

-> V -> V (a) (b)

Figure 5.9 The current-voltage characteristics of a tunnel diode

a) with circuit stability and b) with circuit instability istics and the characteristics for the NERFET observed in stable and unstable operation as shown in figures 5.10(a) and (b). To avoid 100

I : — "I i, r\ a) U uh 10 ma 4 > # • • 4 u ib) /OO uh uh

'Ml M 1 1 till \ 1 M Mil 1 1 1 1 i i 1 i 1 1 1 1 ..11 till 1 1 1 1 1 1 1 1 1 1 1 1 III! i i > i ll't V 2v =4- // / i rrr r

J- 0 _L i J- / JL •

Figure 5.10 The current-voltage characteristic of a NERFET in

a) stable circuit operation b) and c) unstable circuit operation. circuit oscillation the devices were operated in the resistive coaxial circuit shown schematically in figure 5.11. The observed current-voltage

curve-tracer

(Tektronix 575)

NERFET - low pass filter 50 si 0.1 mfd

^50 JL

Figure 5.11 Current-voltage test circuit characteristic across the terminals of the.test circuit included the 50 ohm load which had to be subtracted to obtain the characteristic of the

NERFET alone. Neglecting this correction resulted in an error of 25% or less because the smallest low field resistance was about 200 ohms. 1U1

Oscillation in the microwave range which may have been Gunn oscillation was observed in only two NERFETs. Both of these were thick

(4 to 5 microns) and short (18 to 25 microns) with carrier concentrations 15-3 of about 6 x 10 cm . The first had the structure shown in figure

4.4(a), the current-voltage characteristic shown in figure 5.12, and appeared to generate the current waveform shown in figure 5.13 for zero gate bias. If the oscillation-shown in figure 5.13 was due to full Gunn~. I !" Vg= 5 v/step

h- • V

Figure 5.12 Current-voltage characteristic of a NERFET which appar• ently produced coherent GHz oscillation in a resistive circuit.

domain formation and transit, the domain velocity would have been about

0.9 x 10^ cm/sec. This oscillation waveform may however have been the result of the combination of u.h.f. circuit oscillation combined with the tunnel diode triggering oscillation. This device failed before more

complete testing could be undertaken. The second device had the

1 nsec H h- JL ^$*iV'' T

Figure 5.13 GHz oscillation from a NERFET in a resistive circuit, structure shown in figure 5.7 and the current-voltage" characteristic 102

shown in figure 5.14. The incoherent oscillation which occurred was observed

Figure 5.14 Current-voltage characteristic of a NERFET which produced incoherent GHz oscillation in a resistive circuit

on a Singer-Metric Model RF-4a spectrum analyser to have several broad peaks in its noise spectrum in 1 to 4 GHz range. This oscillation, as indicated by the noise evident in the inset of figure 5.14 occurred only for negative gate bias voltages exceeding about -9 volts.

All other devices, which were all less than about 3 microns thick displayed a stable, non-oscillating current-voltage characteristic in the resistive test circuit. If microwave oscillation was present in these thinner devices its magnitude was less than the maximum sensitivity of the Hewlett-Packard 140A Sampling oscilloscope which was about 1 mv across 50 ohms . This implies an rf power of less than about -50 dbm from the NERFET as compared to the observed power from a diode of similar dimensions of about -7 dbm. Therefore, if rf power exists it is at very low power levels. The emphasis in the remainder of the study 103

was on the stable NERFET because:

1. The physical mechanism which gives rise to a static

negative differential resistance (SNDR) which is

externally measurable is unpredicted and,

2. The device has a gate-voltage controllable negative

resistance which permits the device's use in a number

of unique applications.

The static negative differential resistance was observed first in the non-notched structure similar to figure 5.7, and displayed itself in a current-voltage characteristic as shown in figure 5.15, (V =0).

Since the device did not display Gunn oscillation a notch was introduced toward the source (cathode) end of the device in an effort to provide a nucleating site for Gunn domains. The result was a more pronounced negative resistance effect as shown in figure 5.15 but still no measurable Gunn oscillation occurred.

Figure 5.15 The current-voltage characteristic of a NERFET a) before and b) after a step was etched into the source end 104

The static negative differential resistance was observed for all thicknesses of source-to-drain layer from ~0.1 microns to 3 microns as shown in figure 5.16. Notice that the thinnest device (figure 5.16a) at zero gate voltage passed virtually zero drain current, and that a positive gate voltage was required to allow appreciable current flow.

This device, however, still displayed the SNDR characteristic.

A region of negative resistance existed in the notched devices only if the notch was at the source (cathode) end. In the reverse bias, the current saturated like that of a conventional JFET as shown in figure

5.16b (bottom characteristics). This effect was observed in all thick• nesses of source-to-drain layer less than about 3 microns.

Some important NERFET properties and their variation with thickness as shown in figure 5.16 are:

1. The maximum current decreased with decreasing thickness,

2. The saturation or threshold voltage decreased with

thickness and,

3. In a device of a particular thickness the threshold

voltage decreased with increasing negative gate bias.

Each of these properties can be explained by considering

Shockley's 1952 gradual channel analysis. Shockley's analysis was based on two important simplifications: first, the gate-junction space charge layer was presumed to be completely depleted of free carriers and the edge of this depletion layer was abrupt, and secondly, a simple geometry of the device was selected so that the channel potential distribution could be approximated by a one dimensional equation. Using these simplifications,

Shockley reduced the two dimensional boundary value problem into several one dimensional problems which could be solved analytically. These (c)

Figure 5.16. I-V characteristics for three device thicknesses (a) t~0.1 u(b) t~ IV (c) t~ 3y 106

simplifications for many cases have been justified by experimentation

and have provided considerable insight into the operation of the JFET.

The Shockley analysis was however based on a carrier mobility which was

assumed to be independent of electric field. For low voltages and long

channels this assumption is valid but it fails when the electric field

in the channel is sufficiently large for scattering velocity saturation

or intervalley transfer effects to occur.

A carrier velocity which saturates at large electric field

has been included in FET analyses by using piecewise linear (Turner2

and Wilson 1968, Drangeid and Sommerhalder 1970) and empirical matches

(Trofimenkoff 1965, Lehovec and Zuleeg 1970) to the non-linear velocity-

electric field characteristic. The references given above on the

topic of FET properties under conditions of hot-electron effects are

representative only. Since a number of texts (for example Sevin 1965,

Cobbold 1970) and papers (for example Hofstein 1966 and Kennedy and

O'Brien 1970) review many of the FET analyses they are not repeated here.

Furthermore, the topic of hot-electron effects in FET's does not yet

appear to be closed. Experimental GaAs MESFETs (metal-semiconductor

field effect transistors) operating in the 10 to 18 GHz range have

shown gains considerably higher than expected (Drangeid2> Sommerhalder

and Walter 1970, Baechtold 1971, Baechtold3> Walter and Wolf 1972, and

Baechtold,, and Jutzi 1971). It has been suggested(Baechtold 1971) that

the high gain may be due to a phase shift of the transconductance

together with the source-to-drain feedback capacitance causing positive

feedback, or negative impedance amplification due to a stabilized high

field region in the GaAs. It has also been suggested (Ruch21972) that

the transit-time of the carriers is comparable to the relaxation time, 107

thereby allowing the average velocity to overshoot the steady state

. Ruch has concluded on this last possibility that

"transient effects on the drift velocity of GaAs are important but

probably not large enough to explain the remarkable performance of GaAs

FETs". Baechtold simply says "Further investigations have to be made

on this point".

To date no FET analysis has considered a carrier velocity-

electric field characteristic which displays a region of negative differ•

ential mobility like that which GaAs displays. Rather, only saturating velocity-field characteristics like that of silicon have been considered.

That no such analysis has yet been presented is understandable in light

of the difficulty of handling the two-dimensional problem involving a

gross non-linearity which itself could introduce instabilities. Such

instabilities would require the inclusion of time dependence as well

in the equations.

The existence of the non-linear velocity-field characteristic

for GaAs does not leave the problem totally intractable however. At

low fields the carrier mobility is constant and the velocity-field

characteristic is the classical straight line case. The Shockley analysis

is therefore approximately applicable if the field everywhere in the

channel is, less than the threshold field for Gunn oscillations and also

the junction depletion and geometry considerations are met. The latter

restrictions are hopefully met for the devices in this study by using 15 -3

carrier concentrations of about 6 x 10 cm and by using a long gate

on devices which have a length to thickness ratio of greater than two

to one (Kim and Yang 1970).

Following Turner,, and Wilson 1968 the maximum current flows 108

when the electric field at the drain is equal to the threshold and hence the carrier velocity is at its maximum. Neglecting the junction built- in potential the maximum current flowing is given by:

I = I (1-u) (5-6) m o

where I = nqv Za (5-7) o m

(5-8) V o

= drain-source voltage

V = gate-source voltage

Vq = the cut-off voltage (the gate-source voltage

which pinches-off the channel in the absence of

drain current)

V = qnd2/2e (5-9) o

n = electron concentration

q = electronic charge

Z - device width

d = device thickness

v = maximum electron velocity m

As the charge carriers are just entering velocity saturation the current can also be obtained from the Shockley 1952 theory of the unsaturated FET which gives:

I, = I (3u2 - 2u3 - 3t2 + 2t3) (5-10) d p where

I = V nqydZ/3L (5-11) p o fv - v' t - /-v-8 <5-12> v o 109

L = device length

Vg = source voltage (taken to be zero here)

Equating expressions 5-6 and 5-10 yields

12 3 2 3 o _ 3u - 2u - 3t + It I 1 - u 1 j; P where I 6 v L 3E , L o m _ th /c i/N i" T2 " "v— (5"u) p nqyd o

This equation gives the value of u (normalized drain-gate voltage) for

a given t (normalized source-gate voltage) at which the Shockley analysis

is no longer valid. This analysis is no longer valid because the electric

field exceeds threshold and hence the mobility is no longer field in•

dependent.

The point at which the Shockley analysis is no longer valid

is obtained from the intersection of the normalized Shockley FET curves

obtained from equation 5-10 and the curves associated with the onset

of non-linearity obtained from equation 5-13.

These two sets of intersecting curves are shown in figure

5.17. This figure is that provided by Turner^ and Wilson 1968.

Turner and Wilson, by using a piecewise-linear velocity-field

characteristic which has an abrupt velocity saturation at the threshold

field argue that no more current can be drawn than that associated with

the maximum carrier velocity occuring just adjacent to the drain. They

therefore assume that the current characteristic saturates at the inter•

section of those two curves which correspond to the particular geometry

parameters (Iq and I ) and the gate voltage. The saturation of drain

current with drain voltage is shown by Turner and Wilson in figure 5.17 110

0 0-1 0-2 0-3 0-4 0 5 0 6 0-7 0-8 0-9 10

Figure 5.17 Normalized I-V characteristic of a junction F.E.T. terms of the parameter I /I describing velocity saturation. (From Turner- and Wilson 1968)

V >1 *\~ <2 i f d n - GaAs 1 V \> p-GaAs

Figure 5.18 Representation of the cross-section of a notched NERFET Ill

for the two cases of I /I = 2 by crosses and I /I = 1 by circles. o p J op

The results of this simple approach are qualitatively the same as the results of the more complicated curve fitting analysis of Lehovec and Zuleeg 1970 and the detailed computer simulation of Kennedy and

O'Brien 1970. The important modifications to the Shockley current- voltage characteristics introduced by each of these non-linear analyses are as follows:

1) The spacing of the characteristics for various gate voltages

become more uniform (i.e. the saturation transconductance becomes

more uniform and not necessarily a monotonic decreasing function

of gate voltage),

2) The saturation current is reduced,

3) The threshold voltage associated with the onset of saturation

current is reduced and,

4) The threshold voltage decreases with increasing negative gate

bias.

With the exception of the first point all of these properties have been observed as shown in figure 5.16 and remarked on previously.

The first point (more equal spacing of device curves) is also obtainable from figure 5.16 by comparing these experimental characteristics to the theoretical characteristics shown in figure 5.17.

The notched structure shown in figure 5.18 results in a more complicated analysis, the results of which are qualitatively the same as that presented graphically in figure 5.17. The details are somewhat different however because, if the parameters d^, d^, 1^> and 1^ are chosen properly, the electric field will reach threshold fit the edge of the notch first rather than at the drain. Referring to figure 5.18 112

and again omitting the junction built-in potential, the current is given by:

I i I

2 2 — = {d. - L [—] [V , - V ] } E . v (5-15) oco 1 qn ch g ch . ' where a is the GaAs low field conductivity

Is the potential at a point x in the channel

E ^ is the electric field at the point x.

Integrating equation (5-15) in the usual way results in two equations, one for each region of different thickness:

I I 11

2 2 2 - — 1, = d. V . . - | [—]J 11[ [V . . - V ] - [-V ] ] (5-16) au 1 1 chl 3 qn chl g g and ! ill

i h - d2(Vd " W - I ^Vd ~ V/ ~ ^chl" V'] <~5-17> where V is the potential at the step (x = 1^)

The potential at the step (i.e. can in principle be eliminated from equations (5-16) and (5-17). The resulting equation would give the drain current as a function of external bias voltages and device parameters. The solution of equations (5-16) and (5-17) on a Hewlett-Packard computer (which was programmed to simultaneously deter• mine the fields at the step and at the drain) has been carried out for a representative device. The device parameters chosen were as follows: , ,J5 -3 n = 4 x 10 cm

1^ = 1^ = 25 microns

= 3.5 microns

d^ = 3.0 microns

Z = 300 microns 113

The obtained current-voltage characteristics are shown in

figure 5.19 by lines superimposed on the experimentally obtained d

characteristics for a device of similar parameters. The calculated

characteristics are terminated when the field reaches 3.2 Kv/cm at some

point in the channel.

The cross-section of the device whose characteristic is shown

-in-figure 5.i9 was -obtained by bevelling -at 5° and staining as discussed

previously and is shown in figure 5.20. From this figure it is evident 15-3

that 1^ = 12 = 20 microns. Also n = 6 x 10 cm for points farther than

about one micron removed from the substrate as discussed in section

5.2.1. For points closer than one micron the carrier concentration as 15 -3

evident in figure 5.4 was much less than 6 x 10 cm . The majority

of the current is therefore carried outside the one micron thick region

adjacent to the substrate. The effective electrical thickness of the

layer at the source end of the device as obtained from figure 5.20 was

about 2.9 microns while at the drain end it was about 3.65 microns.

Therefore, the parameters of the hypothetical device are close to those

of the experimental device.

The theoretical and experimental characteristics which are

shown in figure 5.19 are similar to one another up to the point at which the Shockley gradual channel analysis is no longer valid. This

point, which is marked with an X, as stated before corresponds to the

electric field reaching the threshold field at either the edge of the step

or at the drain. The greatest difference between the theoretical and

experimental curves is the degree of effect which the gate voltage had.

The theoretical curves predicted a much larger effect than was actually

observed. The largest gate voltage actually applied was -13 volts yet 114

7 v/step

Figure 5.19 Match of experimental and theoretical I-V characteristics for a NERFET

Figure 5.20 Cross-section of a NERFET 115

this did not pinch the current off as much as -8 volts for the theoretical

case. Part of this deviation may have been caused by gate leakage current which would have resulted in a smaller voltage drop across the gate bias

resistor and hence resulted in a smaller negative gate bias than speci•

fied.

One similarity between the experimental and theoretical curves which may not be immediately evident is the variation of the drain thres• hold voltage with the gate voltage (both relative to the source). For

the experimental curves this threshold is taken to be the point at which

the current begins to decrease while for the theoretical curves it cor•

responds to the point at which the Shockley analysis is no longer valid.

For gate voltages near zero volts both thresholds are almost independent

of gate voltage while for larger negative gate bias the thresholds de•

crease wi.th-increasing negative..bias. .This .is also .predicted .for the .non- notched devices as evident from the intersections of the two sets of curves

shown in figure 5.17.

Hysteresis in the current-voltage characteristic was observed

in almost all NERFETs made. This hysteresis was shown to be a property of the device and not of the measurement circuit by illuminating the

device and watching the growth of the hysteresis loop after the illumi• nation was turned off. White light provided by a tungsten filament 2 microscope illuminator with an intensity of approximately 60 mW/cm

(as measured with an Eppley silver-bismuth thermopile) was used to

illuminate the entire device area for about five minutes. Immediately

after the light was shut off the current-voltage characteristic (with

zero gate voltage) as shown in figure 5.21 (a) displayed no appreciable hysteresis. Within the following hour the hysteresis loop had grown 116

I I • i • iii lilt I i a • 1 I i r 1 1 1 1 1 1 1 1 1 1 111 r "i 111 1111 un MM M- 1111 I 1 1 1 * 11 iH i iti tiii 'Mil 11 1 1 rf 1 i

- V V - (a) (b)

Figure 5.21 Hysteresis growth after illumination ceases a) about 2 seconds after, b) 2 minutes after c) 8 minutes after d) 1 hour after 117

to its steady state value as shown by the sequence of photographs shown in figure 5.21. The time constant of this growth was observed to be about 15 minutes. Plotting the hysteresis loop in the current-voltage characteristic point-by-point (i.e. quasi-static characteristic) showed that the current followed the lower path with increasing voltage and returned along the upper path. This behaviour appears to be compatible with carriers being trapped as the field is increased and being released as the field is decreased. Illuminating the device would probably fill the traps and thus negate their effect. As the traps slowly emptied after the illumination was removed their effect would again be evident.

These traps were shown to likely be on the surface by covering the device with Kodak Thin Film Resist (KTFR). As the KTFR dried under normal room conditions the current-voltage characteristic was observed.

The 'variation of the" resistivity and dielectric constant (~at l~MHz) of the KTFR as it dried under normal room conditions were measured using

capacitance electrometer meter Boonton 71A Keithley 600

Figure 5.22 Circuit used to measure KTFR properties the circuit shown in figure 5.22. The resistivity and dielectric constant of the KTFR as a function of drying time are shown in figure 5.23.

The dielectric constant was found to vary by only 20% in drying, however the resistivity increased by three orders of magnitude in the first three hours of drying. 118

I i 1_ 1 1 1 1— 1 2 3 4 5 6 Drying Time (hours)

Figure 5.23 Variation of KTFR properties with drying 119

The variation with time of the current-voltage characteristic

(with zero gate voltage) after the KTFR was applied is shown in the sequence of photographs of figure 5.24. The saturation current was observed to be larger when the KTFR was wet and decreased as it dried.

The resistivity of the KTFR when wet was eight orders of magnitude greater than that of the GaAs, therefore the increased current should not be due to current leakage through the KTFR itself. A positive charge layer at the GaAs-KTFR interface would cause carrier accumulation in the semi• conductor however, which could account for the larger current. The hy• steresis loop was virtually non-existent for drying times of greater than about 10 minutes and less than about 4 hours. Although not shown spe• cifically in figure 5.24 the hysteresis was again beginning to be discer• nible after about 4 hours of drying. This corresponds to the KTFR film nearing complete dryness as inferred from the resistivity shown in figure 5.23.

Since the addition of KTFR was a surface treatment, it appears the hysteresis was primarily due to surface effects. A possible ex• planation is that the conductivity of the KTFR was sufficiently large to conduct away electrons held in surface traps and thereby nullify the effect of the traps.

5.3 Related Devices

5.3.1 Introduction

The wide bandgap and high electron mobility properties of

GaAs have led to considerable interest in using this material to build high frequency, high power, high temperature field effect transistors.

The negative differential electron mobility in GaAs under large field conditions could however lead to Gunn or other negative resistance 120

Figure 5.24 Hysteresis variation with drying time of a KTFR covered NERFET a) 6 minutes after covering b) 10 minutes after c) 1 hour after d) 24 hours after 121

effects in GaAs FETs. Such effects have been observed in practice so it is worthwhile to review the properties and structures of those de• vices which have and those which have not displayed such negative re• sistance effects. It is then possible to relate common features of the various devices to their properties and to place the NERFETs made here in perspective.

The._dis.cus.sion of related devices is divided into the following sections:

1) a discussion of conventional GaAs Field Effect Transistors

which have displayed no negative resistance effects,

2) a discussion of GaAs Field Effect'Transistors which have dis•

played negative resistance effects,

3) a discussion of GaAs Gunn effect devices which have a third

electrode for control'purposes an'd,

4) a discussion of other GaAs devices which have displayed ne•

gative differential resistance without instabilities.

The series of diagrams and remarks shown on the next five pages (figures 5.25(a) to 5.25(ee)) constitute a review of experimental results obtained by other workers. The progression in these diagrams is from conventional GaAs FETs (figures 5.25(a) to 5.25(m)), through

FETs which display some negative resistance effects which are not likely due to Gunn oscillation (figures 5.25(n) to 5.25(q)), through three

terminal devices which apparently do sustain Gunn oscillation (figures

5.25(r) to 5.25(cc)), and ends with several diode structures for which static negative differential resistance has been observed (figures 5.25

(dd) and 5.25(ee)). 122

b) til j..[.:!.;[TO:; Cell 11 •Li l.W.T'\ i I"TS 2 x 10 Turtle^ and Wilson 12 1968 .., . . 1.2 x 10 !!u !!!!i:!!! Schottky gate FET on semi-insulating GaAs

l.iMjlJlrr.9 CoAt

|S7ii.,|5/jin|5/im] 11 c) 5 x 10 Hower, Hooper, Tre- t—S—i__r~i tr^a.. mere,Lehrer and Bit- n-type GoAs film tman 1968 Semi-in iulatincj Schottky gate FET on substrate semi-insulating GaAs.

2-5 50 V = 5v/step

d) 126-7 unspecified 11 4.5 x 10 Shapiro and Giorgio - 1969 Schottky gate FET on "^~\I • i i i i i semi-insulating GaAs vsotvoirs)

12 10 Lehovec and Zuleeg 1970 ILtUXJiLI > p-n junction gate T3 FET on semi-insulating CO substrate B

1 v/div V = 0.5 v/step

f) P§______> 12 as above •H 10 Zuleeg~and Lehovec cd •••• •"'?''.'!ii.."-- • 6 ~:u\ 1970 p-n junction gate FET on semi-insulating substrate 1 v/div V = 00.. 5 v/step g Figure 5.25 Compilation of related devices 123

nt Authors and (cm ) Remarks r "~1 g). . 1 11 3 x 10 Doerbeck 1970 Schottky gate FET on semi-insulating substrate,

lV/div V. = 0.5 v/step

5 x 1011- Driver, Kim and Barrett h) > 13 1971 2 x 10 ro Schottky gate FET e on semi-insulating substrate. lV/div V = 1 v/step g i) 12 10 Pruniaux, North and

CATC , COLO in! COLO - Payer 1972 ro r Semi-insulating gate e FET on semi-insular ting substrate. SEMI-INSULATING SUOSTAATC 2 v/div V : 0.2 v/step t.....jg...... •12 3 x 10 Drangeid2 >Sommer• j) TO" in; rn halder and Walter unspecified 1970 Schottky gate FET •H on semi-insulating substrate. CO e

1-v/div k) Vp = 1 v/step ^f^S*^ fTJ ?*? E*S ??7 fTJs^ J^j j j .. T 11 il : 1.5 x 10 Turner 1966 m 1 p-n junction gate • /• FET on semi-insul• MttllM KIM \ £'=«' '-rf~•-' i-T-iEli ating substrate. T 1 v/di\ a. 1 V = Iv/step t g 1) J"M3 i ' ' 11 ' T 1.5 x 10 Turner 1966 KM I p-n junction gate FET on p-type . IL-y/- —J "TT ——1 \ /..HI substrate.

: Rniia MIM ...T 1 2 v/d i V V =0.5 v/step

Figure 5.25 Continued 124

nt Authors and (cm ) Remarks 12 n>) 2-6x10 Beck, Hall and White 1965 MOSFET with dif• fused n channel on p substrate.

1 v/div V„ = 2v/step n) 12 l-3x 10 Winteler and Stein- mann 1966 p-n junction gate :/:: FET with diffused n channel on p substrate. lv/div V_ " ° o) 12 1-3x10 Winteler and Stein- - •' ' .1 H ' si?-.- mann 1966 ...t., ..; vt. ., p-n junction gate

.... • .-^r .: : i : . : :' FET from n epi- layer on p sub• strate; uhf (30- r.j tn j i: \ 300MHz) oscillation. Li LL* .1 I. '•. •• 2xl013- Petzinger, Hahn and Matzelle 1967 13 5 x 10 p-n junction gate FET 1 from n epi-layer on p substrate. Circuit / dependent oscillation in range 60-2500 MHz. 1 v7 div gate floating Califano 1969 q) Structure as "re• ported first in unspecified Petzinger et al.". Circuit and illumin• ation dependent oscil• lation in 80 MHz to 10.6 GHz range. 11 2x10 Zuleeg 196 8 : /;. ; • :. p-n junction gate FET io12 from n epi-layer on / p substrate. It L Oscillation observed but frequency un• I- i"^....:„ specified 10 v/div V - 0 Figure 5.25 Cont'd 125 nt Authors and Remarks 11 3 x 10 Zuleeg2 1968 Scurct _ 12 p-n junction gate FET Orotn ~ 2.5x10 from n epi-layer on p-type substrate Gate controllable osc. in range 0.6-1.*2GHz. Oscillation quenching with 5 v/div sufficient gate voltage. V = lOv/step 6 13 1-2x10 Doerbeck, Harp and unspecified Strack 1968. Schottky gate FET on semi- ill .insulating substrate.

11 2x10 Clarke, Edridge Griffith and McGeeham 1971. Schottky FET on semi-insulating sub• strate. Gunn osc. freq. increased with increased negative gate bias.

13 10 Nahas 1971. Schottky I *-e

C»cZbUcft r**q<.cncy lAMJ 12 bs*^ 6x10 Hashizume, Kawashima and Kataoka 1971 MISFET from bulk GaAs

with BaTi03 gate. Oscillation frequency unspecified.

12 10 Sugeta, Yanai, Sekido 1971. Schottky gate FET

(I) 250m on semi-insulating sub•

<5ma) strate. Gunn oscillation triggered by gate as shown.

Figure 5.25 Cont'd 126

nt Authors and Remarks 12 Heime 1971. Schottky 1.2x10 - unspecified gate FET on semi-in• 12 sulating substrate. 5 x 10 -4- T Gunn oscillation trig• gered by gate.

12 "richer puis* 2.1x10 Hayashi 1968. Ohmic TUti ttnlnal third terminal Gunn O oscillation triggering by current injection C»\ki C n in third terminal.

8X1011- Shoji 1967. Ohmic third terminal. Shaping 12 -1. 2.1x10 of Gunn osc. waveform with feedback resistor to third terminal. v.

8X1011- Shoji 1-967. "distributed 12 shunt contact". Shaping 2.1x10 of Gunn osc. waveform by 10 20 shunt capacitive current.

10 .0

TIME IN nonoiec

f 1 .... 11 Shoji 1967. "shaped sxio - distributed shunt" on *• 2.1X1012 bulk diode. Gunn waveform similar to that for a TIKE IM

J 0-16A 1 1 <_T 4.7X10 Kataoka, Tateno and Kawashima 1968, surface loaded bulk diode with voltage 332V SNDR.

A C X to 11 melon* Au Ct contact* • / •oyer |» Boccon-Gibod and Teszner 0 1971, n epi-layer diode — -—1 "-vL- -2-2 -SO 11 ; -7.7x10 on semi-insulating sub•

-OC strate with anode ca• pacitive load, shows SNDR. Figure 5.25 Cont'd 127

5.3.2 Conventional GaAs FETs

The three types of field effect transistors, classified ac• cording to the type of gate, are; the metal-oxide-semiconductor (MOS)

FET, the metal-semiconductor (MES) FET (which is also called the Schottky barrier FET), and the p-n junction gate FET (JFET).

There has been relatively little work carried out on the GaAs

MOSFET because early work (Becke, Hall and White 1965, Becke2 and White

1966) indicated that common insulators (Si02 and Si^N^) when used with 12 -2

GaAs resulted in relatively large surface state densities (~ 10 cm ) which degraded device performance. Other insulators could result in better

GaAs MOSFET performance but little effort appears to have been exerted in this direction because GaAs MESFET performances have been far superior with less difficulty in fabrication.

The MESFETs and on semi-insulating GaAs substrates do not appear to be free of trapping effects, if the hysteresis loops in the current-voltage characteristics are an indication (figures 5.25(c),

5.25(g) and 5.25(k)). Such trapping effects near the interface of the n-layer and the semi-insulating substrate could be due to sites caused by the chromium dopant in the semi-insulating GaAs. Chromium in GaAs provides a deep compensating level which removes most free carriers and 4 8 results in the very high resistivity (10 to 10 0 -cm). Turner 1966 found that the hysteresis could be almost eliminated by using a p-type sub• strate (figures 5.25(k) and 5.25 (1)).

A common feature of all those devices which displayed the conventional saturating current-voltage characteristic (i.e. no negative resistance effectswas that the source, drain and gate x^ere all on one face of the n-type layer and separated by at least several microns from one 128

another (figures 5.25(a) to 5.25(k)). A second feature common to almost all of the devices which displayed the conventional FET characteristic was the product of carrier concentration x channel thickness (nd product) 12-2 was 10 cm or smaller. A small nd product is a natural consequence of pursuing a large gate control effect in a conventional FET by using a lightly doped thin channel.

5.3.3 GaAs FETs with Negative Resistance Effects

On the other hand,when a p-type substrate was used,the current- voltage characteristic showed either a very flat saturation (figures

5.25(1) and 5.25(m)) or an actual reduction in current with increasing voltage (figures 5.25(n) to 5.25 (p)). This latter condition of negative differential resistance can lead to circuit oscillations if care is not taken to ensure circuit stability as discussed in section 5.5.3. The relatively low frequency -of oscillation observed -by Winteler and -Stein- mann 1966 (figure 5.25(o)), Petzinger, Hahn and Matzelle 1967 (figure

5.25(p)) and Califano 1969 (figure 5.25(q)) may have been due to such circuit oscillation. In all three of these cases the devices had channel lengths in the 10 to 25 micron range. If the oscillation was due to Gunn do• mains transiting at 10^ cm/sec the frequency would have been greater than

4 GHz. If the oscillation was a circuit oscillation due to static negative differential resistance its frequency would have been determined by the LC product of the circuit. None of these papers reported the details of their circuits, but assuming L ~ 1 uh (which is a reasonable power supply output inductance) and a capacitance which is due to the re• verse biased p-n junction, the following frequencies (calculated from f = 1/2 TT i£c) should have been observed:

1) Winteler and Steinemann 1966 (figure 5.25(o)): Based on a 129

contact land area of 0.015 mm the capacitance of the p-n 16 3 junction for p >> n = 10 cm would be (Sze 1969) about 2 pf. The resulting circuit oscillation frequency would be about

100 MHz, within the vhf range as reported by Winteler and Stein- mann. They apparently thought, however, the oscillation was dir• ectly due to the Gunn effect as indicated by their statement

"The investigation of the vhf oscillations (Gunn Effect) has not yet been concluded

Petzinger, Hahn and Matzelle 1967 (figure 5.25(p)): Based on 2 a contact are of 0.015 mm ("device size typically 125 p by

250 JU" according to Petzinger et al.) the oscillation frequency would again be about 100 MHz. They note a dependence of fre• quency on the contact size and circuit inductance as follows:

"However, the performance of our devices is not

typical of transit-time Gunn diodes.

The distinguishing feature of Gunn diodes is the

inverse dependence of frequency on sample length.

Our frequencies do not appear to be strong functions

of any dimension that might be construed as a transit-

time length. In every case, frequencies have been at

least three and, in some cases, more than 100 times

lower than the Gunn frequency for an assumed transit-time

length approximately equal to the width of the groove.

The junction area determines the total shunt ca•

pacitance between the two n terminals. Large area,

and hence high capacitance units oscillate at con•

siderably lower frequencies than those of smaller 130

area. Series inductance lowers the operating

frequency".

They observed a variation of frequency with gate voltage as shown in figure 5.26. The tuning shown in this figure can be explained

S « J Z I O-l

VB (VOLTS) Figure 5.26 Tuning characteristic as a function of p-region bias (typical) (from Petzinger, Hahn and Matzelle 1967) by the variation of junction capacitance with gate voltage as shown typically in figure 5.3. For increasing positive gate voltage (which

is less than the built-in voltage of about 1.2 volts) the capacitance increases steeply causing the steep decrease in frequency shown in figure 5.26. For increasing negative gate voltage the capacitance de•

creases gradually, causing a gradual increase in frequency also as shown.

3) Califano 1969 (figure 5.25(q)) has apparently observed both

Gunn oscillation and circuit dependent oscillation as indicated

by the following:

"Three-terminal Gunn devices, of the type

first reported in Petzinger et al., have been successfully

operated CW at room temperature between 30 MHz and 10.6

GHz. The highest frequency is observed while the device

is oscillating in the transit-time mode corresponding 131

to the width of the groove (~ 12 microns) between

the two n blocks; the lower frequencies are ob•

tained while the device is operated in the bias-

circuit oscillation mode. While the device is

operated in the transit-time mode, low tunability

is possible as for regular two-terminal Gunn devices.

When bias-circuit oscillations are used, the fre•

quency of operation can be changed over a wide

range by varying both the external circuit and/or

the voltage bias applied to the p terminal".

The remainder of his paper, however, dealt with the in• fluence of illumination on the operation of devices operated in the "bias circuit" mode. No oscillation waveforms or other evidence were presented to indicate that the 10.6 GHz oscillation was actually due to Gunn domain transit.

None of these authors (Winteler et al., Petzinger et al. or

Califano) appears to have recognized that the low frequency oscillations may have been due to a static negative differential resistance across their device's source and drain terminals. All three refer obliquely to Gunn oscillations and make no reference to SNDR circuit oscillations.

The structure and circuit performance of their devices however would indicate that the devices were actually Negative Resistance Field

Effect Transistors (NERFETs) in the terminology used here.

Some common features of the devices of these authors are:

a) a product of carrier concentration x thickness which 12 -2 is greater than about 10 cm and 132

b) a wide p-type gate on the opposite face of the n-type

layer from the source and drain contacts and overlapping

each of these contacts.

5.3.4 Gunn Devices with Three Electrodes

Those three terminal devices which sustain Gunn oscillations

(figures 5.25(r) to 5.25(cc)) can be divided into two categories:

a) GaAs FETs which happen to have nl and nd products in

the right range to allow Gunn oscillation (figures

5.25(r) to 5.25(v)) and

b) GaAs devices which are primarily Gunn oscillators but

which have a third electrode for control or wave-

shaping purposes (figures 5.25(w) to 5.25(cc)).

In the first category both Zuleeg 1968 (figure 5.25(g)) and

Nahas 1971 (figure 5...25(v)) found that the Gunn oscillation .frequency decreased with increasing negative gate bias while Clarke, Edridge,

Griffith and McGeehan 19 71 found that it increased with increasing negative gate bias. The frequencies observed in each case appear to be compatible with the source to drain distances used and domain velocities in the range of 10^ cm/sec. More information appears to be necessary to clear up these conflicting results.

In the second category an insulated gate '(Hashizuma, Kawashima and Kataoka 1971, figure 5.25(w)) and thin Schottky gates (Sugeta, Yanai and Sekido 1971, figure 5.25(x); and Heine 1971 figure 5.25(y)) have been used to allow pinching of the field under the gate in a device which is biased just below Gunn threshold. A Gunn domain is thereby nucleated under the gate \>7hich then transits to the anode. Such devices can be used to perform sub-nanosecond logic operations (Yanai, Sugeta 133

and Sekido 1971). Gunn domains can also be triggered by injecting current

through an ohmic contact near the cathode (Shoji 1967, figure 5.25(aa);

Hayashi 1968, figure 5.25(x). The electric field in the region of the injecting contact is raised sufficiently by the injected current to trigger Gunn oscillation.

Some common features of those devices which support Gunn os• cillation are:

a) a product of carrier concentration x thickness which 12 -2

is greater than about 10 cm and,

b) a narrow gate and a wide uncovered space between the

gate and the anode.

5.3.5 Other GaAs Devices with SNDR

Figures 5.25(dd) and 5.25(ee) depict two GaAs devices which have -displayed current-voltage characteristics with regions of stable static negative differential resistance. The significant point is that these devices, without Gunn oscillation, displayed SNDR which distin• guishes these devices from stable subcritically doped devices (i.e. 11 -2 10 -2 nl < 5 x 10 cm or nd < 5 x 10 cm ) which display a saturating current characteristic.

The first device (figure 5.25(dd)) was a tapered bulk device

(cathode at the narrow end) with BaTiO^ surface loading. Kataoka,

Tateno and Kawashima 1968 found that Gunn oscillation was obtained in this structure if the BaTiO^ was removed,but a non-oscillating negative differential resistance was obtained with the BaTiO^ in place. With this device, negative differential resistance was observed only for the

thin and at the cathode. Kataoka et al. also found that almost all other elements of similar structure showed similar tendencies. 134

The second device (figure 5.25(ee)) comprised an epitaxial n-layer on a semi-insulating substrate with a capacitive surface load at the anode. With the surface load removed Boccon-Gibod and Teszner

1971 observed Gunn instabilities which gave way to a noisy instability after several domain transits. The performance of the device with the anode capacitive load in place depended on what fraction of the length of the device was covered. When a length of 500 microns (about half the length of the device) was left uncovered bistable switching between high and low current was possible with a small increase in voltage. When the surface load was moved along so that only 200 microns of the device was left uncovered a differential negative resistance without instability was observed. With the polarity reversed (i.e. the cathode loaded) the current saturated rather than decreased with increasing voltage.

Some common features of thes.e devices .were:

a) SNDR occurred only with a surface load in place and

b) the devices geometries were unsymmetrical and showed

the SNDR for only one polarity of applied voltage.

The latter two devices (which were two terminal devices) are included in this discussion of primarily three terminal devices because the SNDR characteristic without instability is unusual and a feature held in common with the NERFET.

5.4 On the Static Negative Differential Resistance Mechanism

5.4.1 Introduction

The discussion of possible mechanisms which could give rise to a negative differential resistance characteristic with no instability for the NERFET is divided into five sections. The first and second sections deal with the possibility of the NERFET performance arising 135

from thermal effects or travelling Gunn domain effects respectively.

The third section discusses the effect of the gate p-n junction. The fourth section discusses the field probing technique used to gain insight into the mechanism and the fifth section discusses the probable mechanism in relation to previous SNDR theories.

5.4.2 Thermal Effects and the NERFET Switching Speed

Negative differential resistance has been observed in silicon

FETs (Todd 1965, Todd3 1968) due to heating of the device. For the FET to exhibit a voltage-stable negative resistance its drain current must have a negative temperature coefficient. This coefficient is the result of opposing effects, and may be either positive or negative. One effect is a decrease in current due to a decrease in carrier mobility by in• creased scattering at high temperatures. Opposing effects arise from

"an "increase in carrier concentration and a decrease in built-in junction potential with increasing temperature. If the drain current has a nega• tive temperature coefficient, negative differential resistance is observed only if the device is operated slowly enough to allow appreciable tem• perature swing. Todd 1965 states "The thermal time constant for a typical

FET is 25 seconds" and (Todd^ 1965) "Negative resistance becomes evident only when the drain current in an FET is measured with slow discrete changes in drain-to-source voltage and the data is plotted on a graph".

The possibility of the negative resistance in the NERFET characteristic arising from thermal effects can be eliminated by con• sidering the frequency at which negative resistance effects occur. The

NERFET current-voltage characteristics shown throughout this thesis were observed on a Tektronix 575 Transistor Curve Tracer which sweeps at 120 times per second. The negative differential resistance which was 136

observed at this sweep rate was one thousand times faster than the thermal time constant quoted by Todd for Si FETs. Circuit oscillations which were also consistent with an SNDR characteristic have been observed at 20

MHz. Therefore, the negative resistance apparently exists up to that frequency, which is eight orders of magnitude faster than the expected thermal time constant.

To measure how fast the SNDR mechanism can occur in a NERFET the device whose characteristic is shown in figure 5.16(a) was placed in the circuit shown in figure 5.27. Fifty ohm coax line was used throughout and a steep bias pulse (risetime < one nanosecond) was applied from a Hewlett Packard 140a pulse generator. The current through the

sampling •oscilloscope

h/p HO A dz trigger pulse sampling generator head

h/p 140 A NERFET W\A- h/p 1431A- 20db -A 50 _o-

Figure 5.27 NERFET switching speed circuit device was obtained from the voltage drop across the 50 fi load at the sampling head. The resulting current as a function of time is shown in figure 5.28 for two bias voltages. Figure 5.28(a) was obtained with 137

a bias voltage about 0.1 volt less than threshold, while figure 5.28(b) was obtained with a bias voltage about 1 volt greater than threshold.

% 2 ma

• •

50 nsec (a) C6;

Figure 5.28 NERFET switching waveforms a) 0.1 v less than threshold b) 1 v greater than threshold

The spike of current on the leading edge of the pulse in these figures was probably capacitive in nature and due to the relatively large source- to-drain capacitance of the NERFET. The from high to low current as shown in figure 5.28(b) occurred in about 50 nanoseconds. The amount of current drop (including the 20 db power attenuator associated with the switch from high to low is about 2 ma which is consistent with the drop evident in figure 5.16(a).

The switching time of 50 nanoseconds which was observed for this device was probably not limited by the mechanism of the SNDR but rather by circuit aspects. The switching time for a negative resistance device is the time required to charge the device's capacitance and is determined approximately by the time constant (Chang 1964):

switching = device negative resistance x device capa•

citance where for this device:

r - 300 ohms

C * 100 pf 138

Therefore the switching time constant determined by the charging time of the device is about 30 nanoseconds which is consistent with the observed switching time of 50 nanoseconds. To minimize this switching time and hopefully to approach the limiting switching time which is as• sociated with the mechanism for the SNDR,the capacitance must be reduced. 2 Reducing the contact area size from the value of about 1 mm used here 2 to 0.01 mm would allow a one hundred fold increase in the circuit limited switching time. Such a reduction was hot carried out here be• cause of the complicated fabrication technology involved, however it is well within the state-of-the-art of modern manu• facturers .

5.4.3 Travelling Gunn Domain Effects

Low frequency circuit oscillations have previously been ob• tained in Gunn diode reactive circuits -by using - the Gunn diode rather like a tunnel diode. In the presence of Gunn oscillations the average external current decreases as the bias voltage increases. Hence, circuit instabilities from this "average negative resistance" and Gunn instab• ilities can exist simultaneously. The nature of the circuit determines the.nature of the low frequency oscillations.

Fleming 1966 and 1967 used an in the drive circuit which caused the bias to fluctuate at a low frequency. This resulted in intermittent bursts of many cycles of the usual transit time Gunn oscillations. Fisher 1967 described a which used a resistive load to develop the pulse amplitude and a shunt inductor which determined the relaxation time. Jaskolski and Ishii 1966 reported the simultaneous generation of 12.5 MHz relaxation oscillation and 17.76

GHz Gunn oscillation without specifying the circuit. Lanza and Esposito 139

1969 described a circuit in which the switching time of the relaxation oscillation was determined by the diode capacitance. Thim^ 1967 discussed

a Gunn device which he called a "travelling domain amplifier" which sim•

ultaneously amplifies at frequencies other than the transit time fre•

quency and oscillates in a transit mode.

In the NERFET, oscillation was not usually observed in a fre•

quency -range .compatible -with -Gunn oscillation. It has been concluded

(section 5.2.2) that if Gunn instability existed simultaneously with

the circuit oscillation it was of very small amplitude. The mechanism

for the SNDR must therefore account for the non-existence of Gunn oscillation

as discussed in the next section.

5.4.4 Effect of the p-n Junction

Cawsey 1967 described an oscillator circuit using a bulk Gunn

diode which generated sinusoidal waveforms in the 30 MHz to 250 MHz range which were free of higher frequency Gunn oscillation. In his circuit

Gunn instability was suppressed by a 15 pf capacitor in shunt with the Gunn diode, apparently providing sufficiently low impedance in the microwave range to effectively shunt out such instability. Cawsey found that with

the rf current shorted by.the shunt capacitor the slope of the negative portion of the current-voltage characteristic was steeper than when not shorted. He states "the presence of an rf voltage would affect the mean

current because ofthe non-linear characteristic and would degrade the effective negative resistance". The significant point is that he ob• tained a negative differential resistance without instability by providing a capacitive shunt for any high frequency (Gunn) instabilities.

The NERFETs made in this study, as described previously, had a relatively large source to drain capacitance due to the depletion 140

region between the n and p layers. The tendency of this capacitance, according to Cawsey's findings, should be to short out Gunn instability. *

If a Gunn instability can exist its magnitude would probably be reduced in proportion to the ratio of the shunt and load impedances. In this case the impedence at 1 GHz of the 100 pf source-to-drain capacitance would be

1.6 ohms. This shunt would likely reduce the output amplitude across a 50 Q load by about 30 times which is a reduction of about 30 db in power.

Even though this value is only an estimate it indicates that the output rf power should be greatly reduced by the shunt capacitance. This es• timated reduction in rf power is compatible with the measurements made to determine the presence of Gunn instabilities as reported in section

5.2.2.

Furthermore, the depletion region between the n and p regions, being free to distort to be compatible with the voltage distribution in the channel may allow current continuity to be retained without move• ment of any domain which may have built up. This is discussed further in section 5.4.5.

It is concluded, that the cause of the SNDR without instability in the NERFET characteristic is probably due directly to distortion of

the p-n junction depletion region to allow a stationary domain or indir• ectly to the capacitive shunt effect of the depletion layer or both.

In either case it is concluded the SNDR results from the depletion

region which is associated with the p-n junction along one face of the

conducting channel.

It is worthwhile to consider the validity of this conclusion

from several viewpoints. The conclusion should hold up in light of the properties of devices with similar structures made by others and in

* i.e. r.f. current does not appear in the external circuit. 141

light of other theories dealing with static negative differential re•

sistance.

5.4.5 Other Aspects of the SNDR Phenomenon

Gunn oscillation in a conventional diode occurs most readily

if there is a constriction or high resistivity region near the cathode.

The domain nucleates at such a non-uniformity because the field is highest

there. The domain then travels toward the anode at a velocity which

allows current continuity to be maintained. This velocity is in the

usual case close to the electron drift velocity.

A cathode non-uniformity which favors domain formation was

recognized as being desirable by Gunn very early in the work on the

Gunn Effect and had subsequently been demonstrated theoretically as

discussed in section 3.4.1. Introducing a constriction or high resis•

tivity layer at the anode, however, causes -a large field -at the anode

which is not compatible with travelling domains. A large

anode field tends to remain stationary and leads to a saturating current

characteristic. If it is sufficiently large it can lead to impact ioni•

zation as discussed in section 3.4.1, 3.4.6 and 3.4.'7.

In the NERFET, a notched cathode would tend to favor formation

of a domain at the cathode. The shunting capacitor, however, would tend

to shunt out any rapid changes in any excess domain voltage and the

field within the device should therefore be nearly static. If the excess

voltage across a static cathode domain absorbs more than its share of an

increase in external voltage (as is the case for a travelling domain in

a conventional diode, Copeland 1966) then the device current would de•

crease with increasing applied voltage. To check for the possible occurrence of a stationary domain a voltage profile was obtained for two 142

NERFETs (one notched the other not notched) by moving a probe along

the surface of the NERFETs. The tungsten probe wire was polished to a

point of about one microns radius as shown in figure 5.29 and mounted

in a Kulicke and Soffa micromanipulator. The micromanipulator was

Figure 5.29 Point, of the tungsten probe (x 100)

driven with a Synchron motor and the assembly moved the probe at appro• ximately 10 microns per minute. The dc potential of the probe was measured 14 with a Keithley 602 Electrometer (input impedence > 10 ohms) to minimize

the effect of probe leakage current. The resulting voltage versus

distance plots were recorded on a Mosley 135 x-y recorder and are shown in figure 5.30 for various values of applied voltage. From figure 5.30 it is apparent that there was an abrupt

cathode drop for voltages greater than the threshold voltage in both

cases. This cathode drop was larger in the notched device than in the non-notched device. Such a cathode drop is compatible with the exis•

tence of a stationary dipole domain at the cathode. The larger drop in

the notched device is also compatible with the greater tendency for a Figure 5.30 Voltage profiles in two NERFETs 144

domain to form at a constricted cathode as discussed. It is also com• patible with the accentuated negative resistance of the notched device.

Another propert'y evident from figure 5.30 is a large electric field near the anode when the applied voltage exceeds threshold. This anode field exceeded the threshold field for Gunn oscillation. The anode field was larger in the non-notched device, apparently compensating for the smaller cathode drop. This also is -compatible with a-more pronounced negative resistance for the notched device.

It is concluded from the voltage profile results that the static negative differential resistance probably results from the static cathode domain. The voltage across the cathode domain appears to absorb a disproportionate share of any increase in dc applied voltage in a manner similar to that of a travelling domain in a conventional Gunn diode. This disproportionate increase in domain excess voltage causes a decrease in device current which corresponds to static negative resistance. Further• more, the greater tendency for domain nucleation at a constricted cathode would explain why there is a greater tendency for negative resistance to occur \tfhen the constricted end is made the cathode rather than when it is made the anode.

Devices studied previous by Winteler and Steinemann 1966 (fig• ures 5.25(n) and 5.25(o)); Petzinger, Hahn and Matzelle 1967 (figure 5.25

(p)); and Califano 1969 (figure 5.25(q) which had similar structures to those studied here, appear to also have had surface depletion layers and relatively large source-to-drain capacitances. The circuit perfor• mance of those devices as remarked previously was similar to that observed here. The published reports of these previous devices appears to add little extra information to confirm or deny the SNDR mechanism suggested 145

here of a stationary cathode domain caused by rf shorting or distorting of the p-n junction depletion region.

The SNDR characteristics obtained from other devices as discussed in section 5.3.5 do appear, however, to be consistent with the capacitance shorting and surface depletion distortion ideas. In both devices Gunn oscillation gave way to an SNDR characteristic without instability when surface loading was added and the source-to-drain capacitance was increased.

In the devices of Kataoka, Tateno and Kawashima 1968 (figure 5.25(dd)) 3 the capacitance was increased by a factor of greater than 10 by loading the device's surface with BaTiO^ (e^ > 10 ) which probably also intro• duced a surface depletion region. In the device' of Boccon-Gibod and Tes- zner 1971 the capacitance was increased by a factor of approximately 5 by moving the capacitive plate closer to the cathode while still over• lapping the anode. This plate almost certainly introduced surface de• pletion. Both of these asymmetrical devices showed SNDR in only one polarity and current saturation in the other. The tapered device of Kataoka et al. displayed SNDR when the narrow end was the cathode. This is con• sistent with the characteristics observed on notched NERFETs. The device of Boccon-Gibod et al. displayed SNDR only when the unloaded end was the cathode. Indirectly, this is also consistent with the notched NERFET characteristics because domain formation would occur more readily at an unloaded contact than at a surface capacitively loaded one.

5.4.6 Previous Theories of Bulk SNDR

The possibility of static negative differential resistance existing in devices made of materials possessing negative differential mobility has been the subject of a number of papers. Shockley2 1954 showed the static differential resistance is always positive in a stable 146

uniform semiconductor which has ohmic contacts if diffusion is ignored.

Kroemer^.1970 generalized Shockley's theorem to include arbitrary im• purity distributions and geometries and again ignoring diffusion con•

cluded the static differential resistance must be positive. Kroemer0 , 3,4

1968 and 1970 also concluded that static negative differential resistance may occur if the cathode contact is not "well behaved" as discussed further below.

Hauge 1971 in a computer study and Dohler 1971 in a "field of directions" study concluded that static negative differential resistance may occur if a field dependent diffusion coefficient of the proper form exists in the material. Sterzer 1971 in a more general approach con• cluded static negative differential resistance may occur for any case in which the electric field distribution through the device can be a multi• valued function of current. Sterzer stated that mathematically the necessary condition for the electric field distribution to be a multi-value function of current is that the differential equation relating field and current be of higher order than unity.

The approximate equations relating field and current for the

NERFET are coupled, non-linear equations in two dimensions which would be difficult to solve. Even if they could be solved they would demon• strate only the necessary condition for SNDR and not the sufficient

condition, and so this approach was not pursued further.

For the structure used in this study it seems possible that

the depletion region along one face of the device, being free to distort

to be compatible with the voltage distribution in the conducting channel, may allow more than one stable voltage distribution to exist for a par•

ticular value of device current. Specifically the two types of voltage 147

distributions which were observed and discussed in section 5.4.5, (one with a cathode drop for voltages above threshold and the other with no such drop for voltages below threshold) appear to be allowed. Hence, according to the requirements stated by Sterzer these devices do not appear to be disallowed from showing a static negative differential re• sistance characteristic.

Kroemer^ 1970 states "... . as long .as the cathode boundary

conditions are 'well-behaved', that is > 0 ... static negative 6 j

conductance cannot occur under the assumed conditions irrespective of

N(x)".

Tateno and Kataoka 1971 suggest that one of Kroemer's^ 1970

conditions, that of the colinearity of incremental field and current

density lines, is not met if the semiconductor is surrounded by a dielec•

tric of relatively high permittivity. In this case they state "... a

considerable component of the electric field perpendicular to the boundaries should be produced as a result of accumulation or depletion

of electrons".

Kroemer's^ 1971 reply is very important with regard to pro•

viding a possible explanation for the SNDR phenomenon observed here. He states: "... for an isotropic mobility, the local static current density and the local static electric field must be colinear, except possibly in regions with zero carrier (and current) density. The latter exception could occur inside a sur• face depletion layer, which is presumably the situation Tateno and Kataoka have in mind. If the thickness of such a depletion layer did not vary as the current is increased, the depletion layer could be considered as being outside the conducting medium, and the proof would continue to hold. A changing depletion layer thickness in effect intro• duces a current-dependent boundary shape, and in structures whose transverse dimensions 148

are not large, compared to depletion layer thicknesses, this could conceivably lead to a static negative conductance. Whether this can indeed happen appears to be unknown at this time, but strictly speaking the proof is contingent on the negligibility not only of diffusion effects but also of surface depletion layers with current-dependent thickness".

Kroemer^ 1971 has specifically allowed the existence of SNDR in a device which has a surface depletion layer, the thickness of which is current dependent. His statement describes exactly the situation for the NERFET. Furthermore, it is essentially the same statement as that made above that "the depletion region along one face of the device, being free to distort ... may allow more than one stable voltage dis• tribution in the conducting channel".

5.5 Circuit Performance of the Negative Resistance Field Effect Transistor (NERFET)

5.5.1 In't roduc t ion

The current-voltage characteristic of a NERFET with a set gate voltage is similar to that of a tunnel diode in that both display regions of positive, negative and again positive differential resistance upon increasing the source to drain voltage. The circuit properties and uses of a device with such a characteristic have been quite thoroughly re• viewed in the literature for the tunnel diode (for examples Chow 1964,

Chang 1964, Dunn 1969, Sze 1969). Therefore, circuit performance of such a device is reviewed only in sufficient detail to show that the observed circuit performance of the NERFET is compatible with the devices' para• meters. The emphasis in this section is on the special properties which the NERFET has as a result of the third electrode (i.e. the gate electrode).

5.5.2 The NERFET Equivalent Circuit

Figure 5.31 shows diagramatically the cross-section of a NERFET 149

and an equivalent circuit superimposed on it. Many parasitic elements which may be important at microwave frequencies such as lead resistances

— gate

Figure 5.31 The NERFET and equivalent circuit and inductances and terminal capacitances have been omitted. The notation used in figure 5.31 is as follows:

1) R and R, are the contact resistances of the source and *s d drain respectively. The specific resistivity of these -3 2

contacts is about 10 -cm as discussed in section

3.4. Because of the non-uniformity of the field due

to the planar contacts the value of this resistance is

difficult to establish but is probably less than 100 0.

2) C and C, are the capacitances associated with the gs dg

source and drain respectively. The values of these

capacitances are dependent on the contact areas, carrier

concentration and source to drain and gate to drain 2 voltages. For contact lands of 1 mm area and carrier 15 -3

concentration in the n layer of about 5 x 10 cm

(as appropriate to the devices made here) these

capacitances vary from about 200 pf at zero volts 150

to 85 pf at 25 volts.

3) R and R, are the total resistances of the bulk gs dg

material and gate contact for gate to source and

drain to gate respectively and are probably less

than 100 fi. Because they are in series with capaci•

tors and are small in value they are neglected in

.further consideration.

4) g the trans conductance is a function of the device's. m

dimensions and carrier concentration. Transconduc•

tances for the NERFETs made in this study have been

often in the 6000 umho range with no attempt having

been made to obtain a maximum value. This value is,

however about twice that of many commercially avail•

able Si JFETs.

5) g_ the output conductance is the slope of the drain

current-drain voltage characteristic and is the

feature which distinguishes the NERFET from the or•

dinary JFET. For the NERFET5 g_ can have a negative

value for some voltages, while for an ordinary JFET

it is always positive. Output conductances in the range

from ~5 to -0.01 mmhos have been observed in this

study.

An approximate equivalent circuit for the NERFET is shown in figure 5.3.2. 151

gate drain

source source •0

Figure 5.32 Approximate NERFET equivalent circuit

5.5.3 Small Signal Analysis

When a negative resistance device is used in a circuit it is usually of paramount interest to know if the circuit will be stable or not. If the circuit is to be used as an oscillator, instability is sought, while if it is to be used as an amplifier, a stable situation is desired. It is usual to consider the small signal conditions of the circuit on the grounds that if it is stable to small signal perturbations it will remain stable, while if it is unstable the instabilities will grow into large signal conditions.

The NERFET can be shown to behave predictably by considering its performance in the simple series circuit shown in figure 5.33.

L vW

Figure 5.33 NERFET test circuit 152

The symbol chosen for the NERFET is similar to that for the JFET except and "N", to signify the negative resistance property, is placed adjacent to the drain terminal. The^ac equivalent circuit of figure 5.34 , as• suming dc bias supplies, is shown in figure 5.34.

Figure 5.34 ac equivalent circuit of the NERFET -test circuit where r = 1—1

C = series combination of C. and C dg gs are the external circuit inductance and resistance

R " *E+ RC

The differential equation describing this circuit is:

2

T d i ,L di , R - r n zc ION ~1 rC ~ dt 1 = ° (5"18) dt

The solution of this equation is of the form:

i = exp s^t + exp s^t (5-19)

vs2" -1

The exponential factors s^ and s^ may be real, complex or imaginary de• pending upon the choice of circuit parameters. If either value has a positive real part the circuit will be unstable. If the s's are real, any initial disturbance will either decay or grow exponentially. If the s's are complex, the transient waves will be growing or decaying sinu• soids .

Rearranging equation 5-20 to express the right hand side R 1 in terms of the two parameters — and —r— J yields: r 2„ r C

r--f«t --r? ± h r C v r C r C

The regions of the various forms of solution are separated by the lines:

R L (5-22) .r ..2._ r C and

r C r C

Equation 5-23 can be rewritten:

f = 2(-^-)2 - -4}- (5-24) r r C r C

From equation 5.24 it is apparent that the largest allowable value of

R L R — is unity and occurs for —~- = 1. Larger values of — are physically r C possible however and correspond to operation in one of two stable states as discussed in section 5.5.8. The small signal analysis applies only R to the case — £ 1. r 154

The various areas defined by equations 5-22 and 5-24 correspond to different types of solutions as listed in table 5.1 and shown gra• phically in figure 5.35

condition I condition II solution type Mode of operation 1_ 1 > L ~2~ K } decaying Amplifier r 2 r 2 r C r~C r C sinusoid

1

R > L R L ,2 > 2HH decaying Stable r 2 r 2 ' 2 r C r C r C exponential

L 2 — < - < 2 (—) growing quasi-sinusoidal r 2 2 r C r C r C sinusoid oscillation

L 2 — < - > 2C—) -y- growing relaxation 2 r C r C r C exponential oscillation

Table 5.1 Conditions of stability and instability

The exponentially growing solutions are limited by the non• linear form of the current-voltage characteristic of the diode. Because of this non-linearity, the waveforms are not pure sinusoids in the region designated "growing sinusoids" in figure 5.35. They become more R L sinusoidal as the real part of s goes to zero. At — = —r- , Re(s) = 0 r r C and this corresponds to steady (i.e. not growing or decaying) sinusoidal oscillation. Therefore, the large signal oscillation becomes more sin• R usoidal as the line is approached. r2C

To demonstrate that the operation of an actual device is com• patible with this small signal analysis the device whose characteristic is shown in figure 5.12 was used in the series arrangement shown in fig. 5. Figure 5.36 NERFET waveforms for several points on the stability plot 156

The gate was tied to the source and 11 volts applied from drain to source, resulting in a drain capacitance of C = 85 pf and a negative resistance of -r = -300 Q. The circuit resistance was 50 Q, and by putting various inductances in the circuit the waveforms inset in figure 5.36 were ob• tained. The waveform scales in this figure are 0.5 v/large div. vertically and 0.2 usec/large div. horizontally. The lowest inductance at which oscillation was observed was 2.5 uh; at 1 yh the circuit was stable.

'.('This device was also made to operate in the "decaying sinusoid" region as an amplifier as discussed in section 5.5.7). The waveforms shown in figure 5.36 demonstrate the following points, all of which are predicted by the small signal analysis:

a) For L = 1 uh no oscillation occurred, corresponding to the R L condition — > —— • r C

b) For L = 2.5 uh the oscillation was quasi-sinusoidal, corresponding R L to the condition r r2C

c) As L was increased the waveform became less sinsusoidal until

for large L it was of the relaxation oscillation type, corres- ' . R L , R o/ 1 sl/2 L ponding to the conditions — < —, and — > 2( „ ) ^— . r r C r r C r C

5.5.4 Non-linear Analysis

A common approach (Chang 1964, Chow 1964, Cunningham 1958,

Anner 1967, Schuller and Gartner 1961) for obtaining analytic expressions for the large signal operation of negative resistance devices is to- match the current-voltage characteristic of the device with an expression 3 of the form: i = -av + bv 157

The resulting differential equation which describes the device operation in a series inductive circuit (figure 5.33) is (Cunningham 1958):

2 3 d v a , 3b 2. dv v R ,dv av by. _ ,c ... " c (1 " -_ V > dl + LC + l^-~C + "C"} = ° (5_25) dt which, under the condition of sufficiently small external resistance

R, can be reduced to the well known van der Pol equation:

2 2 2 —£ - a (1 - (Bv ) to ^ + to v = 0 v (5-26) j^2 o dt o dt where a = —— , 8 = — and to = — Cto a o LC o

Since the methods of solving this equation and the results ob• tained under various conditions have been well documented elsewhere these detailed solutions are not included. Only the results which contribute to an understanding of the circuit operation of a NERFET are quoted.

One property of a NERFET operating in an inductive circuit which is of interest is the amplitude of oscillation. Using the pertur• bation method of solving equation 5.26, the peak to peak amplitude can be shown to second order approximation (Cunningham 1958) to be given by: 1 V = 4 (a/3b)2 (5-27)

Fitting the NERFET characteristic with the equation

i = -.0025 v + .0067 v3 as shown in figure 5.37 results in a calculated peak-to-peak amplitude across the NERFET of 4.4 volts. The resulting peak-to-peak amplitude across a series load of 50 Q should be 0.93 volts. This is compared to the observed amplitude across a 50 Q load for this NERFET of approximately 158

Ms

1/

Figure 5.37 Experimental and fitted I-V characteristics

0.5 volts as shown in figure 5.36. The difference between calculated and observedamplitudes may be partly a result of ignoring the contact resistance of the device. Note that the peak-to-peak amplitude given by expression 5-25 is independent of the circuit parameters and is a function of the device characteristic only. This independence is de• monstrated by the waveforms shown in figure 5.36 for the various in• ductances.

A second property of interest is the frequency .of oscillation as a function of circuit inductance. The zeroth order approximation

(which is the linear negative resistance case) predicts (Schuller and

Gartner 1961) a frequency of: 159

1 - — f = — • (5-28)

2ir /L~C

The first order approximation in the limit of small inductance predicts

(Schuller and Gartner 1961 and Cunningham 1958) a frequency of:

2-rr^/LC [1 + ^ -( ~2 - —) ] r and in the large inductance limit predicts (Schuller and Gartner 1961)

f = 1761871: • <5-30>

Shown in figure 5.38 are:

a) the experimental points for a NERFET (C = 85 pf, -r => -300ft) operated in a high Q (~ 200) circuit with various values of inductance

(power supply irapedence: 0.5 ft, 1 uh),

b) the zeroth order approximation assuming R = 0. R

c) the zeroth order approximation assuming — = 0.5 (which may be possible considering the uncertainty in the value of contact resistance, and

d) the first order approximations for both large and small induc• tance assuming R = 0.

Linearity of the experimental points of the ln(f) vs ln(L) plot over 3 decades of inductance is evident in figure 5.38. The slope of these points is approximately -1/2, indicating a dependence of fre- -1/2 quency on inductance of the form f a L .It was observed that with the exception of inductances in the 1000 uh range the waveforms were sinusoidal. This is compatible with operation in a high Q circuit and R L infers operation near the condition — = —as discussed in section 5.5.3. r 2_ r C 160

L (j4h) 1 order approximation (large L)

0th order approximation ( R/r= 0 )

0 order approximation ( R/r =0.5)

1st order approximation (small L)

\

-1 100 10 f (MHz)

Figure 5.38 NERFET oscillation frequency as a function of circuit inductance 161

The frequency under this condition should be given by the zeroth order approximation:

1 - * f = (5-28) 2TT JLC

It is shown in figure 5.38 that choosing a value of R = 0 (i.e. zero contact resistance and zero external resistance) although giving the proper slope is not a very good match to the observed points. Choosing a value of R/r = 0.5 is shown to match the experimental points much better, indicating the contact resistance was about 150 fi. This value as stated previously is quite possible. A reasonable match of experimental points to the first order approximations in the high and low inductance limits is also shown in this figure. The error bars shown in figure 5.38 at high frequency are based on a + 2.5% error. This error may arise from equipment calibration errors and error in measurement of frequency from the oscilloscope photographs. At low frequencies and large inductances the waveforms were appreciably non-sinusoidal and bias dependent, resulting in larger possible errors as shown in figure 5.38.

The waveforms obtained from a non-linear analysis of the Van der Pol equation become less sinusoidal and more of the relaxation type as the circuit inductance is increased. This trend has been observed here as shown in figure 5.36. Rather than carry out this analysis which has been done by many authors (for example; Cunningham 1958 and Schuller and Gartner 1961), greater physical significance can be obtained by con• sidering the relaxation between high and low voltage states of a piece- wise linear current-voltage characteristic as discussed in the next section. 162

5.5.5 Relaxation Oscillation Analysis

The analysis of the negative resistance relaxation oscillator by approximating the non-linear current-voltage characteristic by a piecewise-linear characteristic has been discussed for the tunnel diode by a number of authors (for example; Ko 1961, Chow 1964). The perfor• mance of a NERFET with a grounded gate should be similar to that of a tunnel diode when operated as the negative resistance element in a re• laxation oscillator circuit.

A simple relaxation oscillation circuit is shown in figure

5.33. The basic operation of the circuit is as follows: The circuit current increases exponentially after the power is applied, and when it reaches the peak current of the characteristic (point 1 in figure

5.39) the device to the high voltage state (point 2). Since

.the voltage drop-across the NERFET is larger than the supply voltage, the current begins to decrease exponentially. However, when the current reaches the valley (point 3), the device switches to the low voltage state (point 4). The current again begins to increase and the cycle is repeated. The current and voltage therefore trace the path 1234 as shown in figure 5.39. If the capacitance C is sufficiently small the switching time between states 1 and 2 and also 3 and 4 will be much less than the growth and decay times of the other two sections (4-1 and 2-3). The resulting current waveform is typified by that given by Ko 1961 as shown in figure 5.40.

The time constant for the exponential growth segment of the current waveform is given by:

Vowth = L/RT1 163

80 (ma) 1

70

60

6,4 9.6 12.8 V (volts)

Figure 5.39 Relaxation switching path

Figure 5.40 Relaxation oscillation current waveform (for tunnel diode circuit from Ko 1961). where L is the circuit inductanct

R is the circuit resistance

R^ is shown in figure 5.39.

*T1 = R + Rdl

The time constant for the exponential decay portion of the cycle is given by:

L/RT: decay where R^2 is shown in figure 5.39.

R^ - R + R d2 164

For the device whose characteristic is shown in figure 5.16a

operated in the circuit of figure 5.34 with L = 25 yh and R = 50 the

calculated time constants are:

T = 0.08 usee growth

T, = 0.025 ysec decay

The actual time constants observed for this device in an inductive cir•

cuit as determined from figure 5.36 are:

T _, - 1 ysec growth

x , < 0.02 ysec decay ~

The decay time constant is difficult to measure in figure 5.36 because

the total decay time per cycle appears to be less than one time constant

and is about 0.02 ysec. A comparison of the calculated and obeserved

time constants shows that the two sets of values are compatible.

5.5.6 The NERFET as a Gate Tunable Oscillator

In a high Q(200) circuit a negative resistance element gen•

erates a quasi-sinusoidal waveform at a frequency of approximately

(section 5.5.3 and 5.5.4)

i - *

f = (5-28) 2ir /L~C

For the NERFET, the source to drain capacitance C is due to the depletion

region between the n and p layers and is composed of the series com•

bination of the source to gate and gate to drain capacitances. The width

of the depletion region and therefore the source to drain capacitance

is a function of the reverse bias on the gate (p-region) as described

in section 5.2.2. The frequency of oscillation is therefore a function

of the gate voltage. 165

The circuit shown in figure 5.41 was used to observe the gate

tunability of the NERFET in a high Q circuit. The current waveforms observed for gate voltages in the 0 to -7 volt range are shown in f,igure

5.42. Two distinct waves which existed simultaneously in the -1 to -2 volt range are evident in this figure. Schuller and Gartner 1961 in a large signal analysis of a negative resistance diode have shown that two such waves can exist. They state: •-

"... the reason seems to be that when the device is not

biased at the voltage with the highest slope, there exist

two limit cycles, a smaller and a bigger one. ... Thus,

for the same inductance two oscillations with different

amplitudes may exist".

The frequency tunability of the higher frequency, lower amplitude one is shown -in -figure 5.43. The solid line in this figure was determined from equation 5-28 using R/r = 0 and C obtained from the series combination of the source to gate and gate to drain capacitances. More investi• gation would be necessary before one could take advantage of the larger amplitude mode in a systemmatic way.

When the NERFET was used in a low Q (-10) circuit the waveform was also tunable as evident in figure 5.44, however it was not as simple to analyse. The largest portion of the cycle was that associated with the exponential growth as discussed in section 5.5.5. This growth time is given by (Ko 1961) (also refer to section 5.5.5) .

T = In — 2.

growth RT1 . Ia - Iv where

= V /R \ aPP Tl

I = the peak current 166

voltage supply

oscilloscope]

Tektronix 561A

5jnh

Figure 5.41. Test circuit used to show NERFET gate tunability

Vr

0.5 v

^UiWWWWWW -A h- O.ljusec

Figure 5.42 Current waveforms for a NERFET in a high Q circuit with various gate voltages (L=5uh) 167

19

(MHz) 18

17

16

Vg (volts) 15 -2 -4 -6 -8 Figure 5.43 Gate tunability of the NERFET

V9 -6 V

JL 0.5 v T

Figure 5.44. Current waveforms for a NERFET in a low Q circuit with various gate voltages (L=200yh) 168

I = the valley current.

When I -I =1 -I as is the case for the NERFET used here, the a p a v I - I a p term, In -—^ , is a rapid function of the bias conditions and gives a v

rise to a large tuning effect with small change in bias voltage. Figure

5.44 shows greater than one octave tuning for a change in gate voltage of 7 volts. The pulses near the beginning of the growth portion of each

cycle shown in this figure were observed to correspond to a pulse of

gate current. 5.5.7 The NERFET as a Phase-Locked Oscillator and as a Stable Amplifier The device whose characteristic is shown in figure 5.16(a) was used in the circuit shown in figure 5.45 to demonstrate phase-locking of circuit oscillations to an rf signal on the gate.

rf voltage

supply oscilloscope

Tektronix 561 A dc voltage supply

1 50jxhy

Figure 5.45 Test circuit used to show phase-locked oscillation

Phase-locking to the gate signal was observed over about a

2% variation of gate signal at about 2 MHz, The gate voltage needed

for locking was about 0.2 volts peak to peak while the oscillation output

voltage was about 0.5 volts peak to peak. Hence, a relatively large gate 169

voltage was required because the device was operating near the cut-off

frequency for gate control. This cut-off frequency as obtained from

simple transistor theory (for example, Sze 1969) is given by:

fma ovx = g m/ C = 5 MHz

g = the transconductance where m ~m

= 500 ymhos for this particular device

C = 100 pf for this device

Note that the maximum frequency (1/rC) of circuit oscillation using the

negative resistance property of this device was about 30 MHz (r = 300ft,

C = 100 pf) and was considerably greater than the cut-off frequency

for gate control (5 MHz).

The same NERFET was used in the circuit shown in figure 5.46

and with the gate tied to the drain (i.e. acting as a two terminal ne•

gative resistance amplifier) a voltage gain of about 13 db at 20 MHz was observed. rf voltage supply 0.1 Mf oscfl loscope If—

Tektronix

~. 561 A dc voltage supply

1000 j4h -± 200-n-<

Figure 5.46 Test circuit used to show stable amplification

5.5.8 Tile NERFET as a Bistable Logic Element

If the load resistance and device bias conditions are adjusted

so the load line intersects the device characteristic as shown in figure 170

5.47 the device may operate .s.tably • at the two points labelled A and

B. Switching from A to B can occur by applying a negative pulse to the gate and driving the characteristic down so that only the intersection

i + I

Figure 5.47 Device characteristics and load line showing stable operating points near B occurs. The device is forced to switch to this single intersection point and remains there even though the gate pulse is removed. Switching from B back to A can occur by applying a positive pulse to the gate by similar reasoning.

The circuit shown in figure 5.48 was used to demonstrate swit• ching between these stable states. Figure 5.49 shows typical gate voltage

(top trace) and source to drain voltage (bottom trace) waveforms when operated as a bistable logic element. This figure shows that a negative gate pulse causes switching from a low source-drain voltage (state A) to a high source-drain voltage (state B) as explained. The device remains in stage B until a positive gate pulse drives it into state A.

The switching speed of the device operated in a resistive cir• cuit, as discussed in section 5.4.2 is approximately: 171

delayed trigger

pulse pulse generator generator Tektronix Tektronix 115 115

oscilloscope

dc voltage Tektronix supply . 567 /I AAA JV7_L _J~L

Figure 5.48 Test circuit for NERFET bistable switching

V

1 msec t

Figure 5.49 NERFET bistable waveforms 172

T = X C •

switching For the device used in this experiment (figure 5.47)

r = 105

C * 100 pf

Therefore T . . . =10 usee. As shown in figure 5.50 this is close switching to the value observed experimentally for this device. Note that the

4> .. _L V 0.5 v

T

2 v T

Figure 5.50 Switching waveform of the NERFET logic element magnitude of the negative resistance was very large for this device

(r - lO^ft) and the resulting switching time was relatively long. Ne• gative resistances of r = 300 ohms have been observed in this study in thicker devices, which would improve the switching speed by a factor of about 300. Furthermore, if reduced contact lands had been used as dis• cussed in section 5.4.2 the capacitance could possibly have been reduced to about 3 pf. The switching speed of such a device would then be about one nanosecond which would appear to make it an attractive possibility for high speed logic circuits. 173

VI. CONCLUSIONS

6.1 The Planar Gunn Diode

Gunn diodes in the planar structure have been fabricated and operated cw in resistive circuits. It has been observed that as the product of electron concentration x diode thickness (nd product) was de• creased, the frequency of oscillation decreased for diodes of the same length. To ensure that the oscillation was due to the formation and

transit of charge domains (i.e. pure Gunn mode) the shapes of the wave• forms were correlated to the shapes of the devices. The results indicated that the oscillation was due to domain transit and that the domain velocity decreased with decreasing nd product. This is as compared to the case for bulk diodes (i.e. sandwich structure diodes) in which the domain velocity is independent of geometry and doping.

A small signal analysis was carried out (section 2.3) which predicts that the pulse propagation velocity decreases' as the nd product 11 -2 decreases and at a value of nd = 1.132 x 10 cm the domain velocity 11 -2 is zero. This analysis also predicts that at nd = 1.132 x 10 cm the space charge growth is abruptly reduced and corresponds to an os• cillation suppression condition. Hence, zero domain velocity and os• cillation suppression which are physically identical have been shown analytically to occur at the same value of nd product.

Gunn oscillation has been experimentally observed in devices 11 -2 with nd product as small as 2.1 x 10 cm . At this value the domain velocity was measured to be approximately 0.55 x 10^ cm/sec at a bias just above threshold. This is a factor of 2 or 3 less than the corres• ponding domain velocity for bulk diodes. The uncertainty in this factor is a result of the bias dependence of the domain velocities in each case. 174

The practical problems associated with the tendency for co• herent oscillation from planar Gunn diodes and the tendency for anode deterioration have not yet been overcome. A systematic; approach to minimizing these difficulties would be more naturally carried out by an industrial concern interested in making planar Gunn diodes on a mass pro• duction basis. Basically, however, the problems appear to arise from the materials used and do not appear to be inherent to the structure itself.

The solution to these problems probably lies in using low defect material, I | shaping the diode appropriately and using n regrown GaAs contacts.

6.2 The NERFET

A new device which is given the acronym NERFET (negative re• sistance field effect transistor) has been fabricated. The structure of the device consists of planar source and drain contacts on an n-type

GaAs layer which has been-epitaxially-grown on a >p-type -substrate. -The p region provides gate control of the n-type epi-layer.

The current-voltage characteristic of the NERFET has a region of static negative differential resistance (SNDR) without Gunn instability.

This is compared to the saturating current characteristic of the conven• tional field effect transistor. Such a SNDR characteristic is not gen•

erally observable (Shockley2 1954, Kroemer^ 1970) for bulk devices, even those prepared from materials such as GaAs which have negative dif• ferential conductivity.

The static negative differential resistance without instability is concluded to result either directly or indirectly from the depletion layer associated with the junction which exists between the n-type epi- layer (source to drain channel) and the p-type substrate (gate).

The negative resistance property of the NERFET has been utilized 175

in a number of circuits to demonstrate the device's usefulness in many applications. It has been used as two terminal (by connecting the gate to the source) negative resistance oscillators and . The third terminal (the gate) has allowed the device to be used in unique appli• cations such as; a negative resistance oscillator which can be phase- locked to an rf gate signal, and a bistable element for which switching between the stable states is accomplished by pulsing the gate. In light of much effort to use oscillating (Hartnagel^ 1969, Hartnagel,. 1971,

and Sugeta, Yanai and Sekido 1971) and non-oscillating (Thim^ an<^ ^

1971) GaAs devices as logic elements, this bistable NERFET application is particularly worthy of further investigation. Other applications for the NERFET such as the negative resistance amplifier with gate con• trolled gain also appear to be possible.

The• NE-RFET-s -which were made--here, using simple •contact-materials and process steps, have not been as prone to breakdown as planar

Gunn diodes because the negative resistance property can be obtained at much lower current and voltage levels.

As is the case with the first reporting of almost any new type of device a considerable area remains unexplored. The NERFETs made here were not optimized for any particular application. For example, in making an oscillator or amplifier it may be desirable to use a thick device which operates at high voltage and current levels, while it may be desirable to use a thin device for low power consumption for logic applications.

Optimization of the NERFET to obtain better performance would appear to be a worthwhile step. Varying such parameters as the device's geometry and carrier densities may allow the realization of a character• istic which has a peak to valley current ratio of two to one as observed 176

for related two terminal devices (Boccon-Gibod and Teszner 1971).

Reducing the source-to-drain capacitance may allow switching times of nanosecond or less to be attained. Each of these improvements could be attempted with many possible applications in mind. 177

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