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Learning in Spiking Neural Networks LEARNING IN SPIKING NEURAL NETWORKS A THESIS SUBMITTED TO THE UNIVERSITY OF MANCHESTER FOR THE DEGREE OF DOCTOR OF PHILOSOPHY IN THE FACULTY OF ENGINEERING AND PHYSICAL SCIENCES 2012 By Sergio Davies School of Computer Science Contents Contents List of Tables 6 List of Figures 7 List of Algorithms 11 Abstract 12 Declaration 13 Copyright 14 Acknowledgements 16 The Author 19 1 Introduction to neural networks 20 1.1 Neural networks . 20 1.1.1 Biological neural networks . 21 1.1.2 Artificial neural networks . 23 1.2 Uses of neural networks . 27 1.3 Adaptability (plasticity) in neural networks . 28 1.3.1 Plasticity in biological neural networks . 29 1.3.2 Plasticity in artificial neural networks . 32 1.4 Statement of the problem and objectives . 36 1.5 Contributions . 37 1.6 Publications . 37 1.6.1 Journal articles . 37 1.6.2 Conference papers . 38 SERGIO DAVIES 2 LEARNING IN SPIKING NEURAL NETWORKS Contents 1.7 Workshops, conferences and invited talks . 40 1.8 Structure of the thesis . 42 2 Neural network simulators 44 2.1 Introduction . 44 2.2 Categorization of SNN simulators . 44 2.2.1 Hardware simulators . 45 2.2.2 Software simulators . 47 2.2.3 Learning in modern simulators . 48 2.3 Review of main simulators developed . 48 2.3.1 Hardware . 49 2.3.2 Software . 51 2.3.3 SpiNNaker . 54 2.4 Summary . 54 3 SpiNNaker project overview 56 3.1 Introduction . 56 3.2 Description of the SpiNNaker project . 56 3.3 Hardware . 57 3.3.1 Chip architecture . 57 3.3.2 Chip interconnections . 59 3.3.3 Interconnection router . 61 3.3.4 External connections . 65 3.3.5 Boards . 65 3.4 Software . 68 3.4.1 The neuron simulator . 69 3.4.2 The incoming spike handler . 70 3.4.3 A common point: the circular delay buffer . 71 3.5 Pacman . 72 3.6 Neuron models available . 74 3.6.1 Izhikevich neuron . 74 3.6.2 Leaky Integrate-and-Fire neuron . 75 3.6.3 Poisson spike source generator neuron . 76 3.6.4 Spike source neuron . 76 3.6.5 Spike source live neuron . 76 3.6.6 NEF interface neurons . 77 SERGIO DAVIES 3 LEARNING IN SPIKING NEURAL NETWORKS Contents 3.7 Plasticity models available . 77 3.8 Summary . 77 4 SpikeServer 78 4.1 Introduction . 78 4.2 Real-time systems background and introduction . 79 4.3 Architecture of the SpiNNaker system . 80 4.3.1 Asynchronicity of the system . 81 4.4 Implementation of SpikeServer . 81 4.5 Tests and results . 88 4.6 Discussion . 90 4.7 Summary . 91 5 Population-based routing 92 5.1 Introduction . 92 5.2 Background . 92 5.3 Architecture of the SpiNNaker system . 94 5.3.1 Multicast communications in SpiNNaker . 94 5.4 Population-based routing approach . 95 5.5 Multicast route generation . 99 5.5.1 Implementing LPF for the SpiNNaker system . 101 5.6 Routing tests . 102 5.6.1 One population per core, local projections only . 103 5.6.2 One population per core, system-wide connectivity . 104 5.6.3 The thalamocortical model . 105 5.7 Discussion . 107 5.8 Summary . 110 6 The STDP-TTS learning model 111 6.1 Introduction . 111 6.2 Background . 112 6.2.1 Introduction to synaptic plasticity . 112 6.2.2 Learning in biological neural networks . 113 6.2.3 Algorithmic techniques for synaptic plasticity . 116 6.3 Architecture of the SpiNNaker system . 119 6.4 The STDP TTS learning rule . 120 SERGIO DAVIES 4 LEARNING IN SPIKING NEURAL NETWORKS Contents 6.5 Statistical feature extraction . 121 6.5.1 Post-processing of the statistical function . 122 6.5.2 The STDP-TTS learning algorithm . 125 6.6 Network description and input generation . 125 6.7 Simulation results from SpiNNaker . 128 6.8 Manipulation of the “L” parameter . 131 6.9 Observations on the learning behaviour . 132 6.10 Influence of the parameters . 145 6.10.1 Increasing maximum synaptic weight . 145 6.10.2 Incrementing minimum synaptic weight . 145 6.10.3 Incrementing LTP amplitude parameter . 147 6.11 Multiple input patterns . 147 6.12 Performance evaluation . 150 6.12.1 Computational requirements . 150 6.12.2 Memory occupation . 153 6.13 Discussion . 154 6.14 Summary . 156 7 Conclusion and future work 157 7.1 The SpikeServer evolution: multiple channels . 157 7.2 Self-configuring SpiNNaker . 158 7.3 The STDP TTS learning rule . 159 7.4 Future work . 160 7.4.1 Dynamic adaptation of the learning parameter . 160 7.4.2 The re-fetch model . 160 7.4.3 Sampling the membrane potential after the delivery of the spike 161 7.4.4 Other plasticity models . 161 7.5 Synaptic rewiring and structural plasticity . 162 7.5.1 Synaptogenesis . 162 7.5.2 Synaptic pruning . 163 7.6 Summary . 164 Word Count: 37306 SERGIO DAVIES 5 LEARNING IN SPIKING NEURAL NETWORKS List of Tables List of Tables 1.1 Comparison between spiking neuron models (Izhikevich, 2004). 26 2.1 Comparison between features of spiking neural network simulators. Question marks identify features that were not easily possible to asso- ciate with the particular simulators. 55 3.1 Matching condition on the basis of the fields “Routing entry” and “Mask”, as described in Fig.3.7 . 62 3.2 Table of direction for multicast routing entries. The vectors are OR-ed to multicast the same packet to multiple directions . 63 3.3 Table of directions for Point to Point routing entries . 64 5.1 Set of routing keys used and unused for each size of the neural population. 97 5.2 Example of routing for three neural populations. 98 6.1 Computation requirements for each learning algorithm (values are ap- proximated). 151 6.2 Example of memory requirements for each learning algorithm in the case of 100 neurons each receiving input from other 100 neurons. 154 7.1 Comparison of computational requirements and memory occupation for the three learning algorithms available on SpiNNaker. 159 SERGIO DAVIES 6 LEARNING IN SPIKING NEURAL NETWORKS List of Figures List of Figures 1.1 General structure of a simple feed-forward artificial neural network. Each coloured disc is a neuron, and each arrow is a synapse. 20 1.2 Simplified structure of the nervous system in vertebrate animals. 22 1.3 Classes of artificial neurons. 24 2.1 Difference between abstract-time simulator and discrete-time simulator. 46 2.2 Relation between simulation time and biological time. 47 2.3 Hierarchical representation of hardware neural network simulators . 48 2.4 Hierarchical representation of software neural network simulators . 49 3.1 Block diagram of the full SpiNNaker chip . 58 3.2 Layout of the SpiNNaker chip with labels identifying each functional block. 58 3.3 SpiNNaker chip package: the die of the SDRAM memory chip is mounted on the top of the SpiNNaker chip. 59 3.4 Two-dimensional grid of SpiNNaker chips with the needed connec- tions (in green) to form the toroidal shape. 60 3.5 Appearance of the SpiNNaker chip network . 60 3.6 Hexagonal shaped SpiNNaker chip network . 61 3.7 Circuit used to select a matching routing entry. 62 3.8 First release of the SpiNNaker board. 66 3.9 “BunnyBoard” . 66 3.10 48-chip SpiNNaker board. 67 3.11 Block description of SpiNNaker neuron simulator software . ..
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