DOCSLIB.ORG

Openvms Linker Utility Manual

Total Page：16

File Type：pdf, Size：1020Kb

Download full-text PDF Read full-text
Openvms Linker Utility Manual OpenVMS Linker Utility Manual Order Number: AA–PV6CD–TK April 2001 This manual describes the OpenVMS Linker utility. Revision/Update Information: This manual supersedes the OpenVMS Linker Utility Manual, Version 7.1 Software Version: OpenVMS Alpha Version 7.3 OpenVMS VAX Version 7.3 Compaq Computer Corporation Houston, Texas © 2001 Compaq Computer Corporation Compaq, VAX, VMS, and the Compaq logo Registered in U.S. Patent and Trademark Office. OpenVMS is a trademark of Compaq Information Technologies Group, L.P. in the United States and other countries. UNIX is a trademark of The Open Group. All other product names mentioned herein may be the trademarks or registered trademarks of their respective companies. Confidential computer software. Valid license from Compaq required for possession, use, or copying. Consistent with FAR 12.211 and 12.212, Commercial Computer Software, Computer Software Documentation, and Technical Data for Commercial Items are licensed to the U.S. Government under vendor’s standard commercial license. Compaq shall not be liable for technical or editorial errors or omissions contained herein. The information in this document is provided "as is" without warranty of any kind and is subject to change without notice. The warranties for Compaq products are set forth in the express limited warranty statements accompanying such products. Nothing herein should be construed as constituting an additional warranty. ZK4548 The Compaq OpenVMS documentation set is available on CD–ROM. This document was prepared using VAX DOCUMENT Version 2.1. Contents Preface ............................................................ xi Part I Linker Utility Description 1 Introduction 1.1 Overview . ................................................ 1–1 1.1.1 Linker Functions . ........................................ 1–2 1.1.2 Using the Linker . ........................................ 1–3 1.2 Specifying Input to the Linker . ................................ 1–4 1.2.1 Object Modules as Linker Input Files . ....................... 1–6 1.2.2 Shareable Images as Linker Input Files ....................... 1–6 1.2.2.1 Including a Shareable Image in a Link Operation ............. 1–7 1.2.2.2 Installing a Shareable Image ............................. 1–8 1.2.3 Library Files as Linker Input Files ........................... 1–8 1.2.3.1 Creating a Library File . ................................ 1–8 1.2.3.2 Including a Library File in a Link Operation . ............... 1–9 1.2.4 Symbol Table Files as Linker Input Files ...................... 1–10 1.2.5 Options Files as Linker Input Files ........................... 1–11 1.3 Specifying Linker Output Files . ................................ 1–12 1.3.1 Creating an Executable Image ............................... 1–13 1.3.2 Creating a Shareable Image . ................................ 1–14 1.3.3 Creating a System Image . ................................ 1–14 1.3.4 Creating a Symbol Table File ................................ 1–14 1.3.5 Creating a Map File ....................................... 1–15 1.3.6 Creating a Debug Symbol File (Alpha Images Only) .............. 1–15 1.4 Optimizing the Performance of Alpha Images ...................... 1–15 1.4.1 Linker Default Image Optimizations (Alpha Images Only) . ....... 1–16 1.4.2 Installing Images as Resident Images (Alpha Systems Only) ....... 1–17 1.5 Controlling a Link Operation . ................................ 1–17 1.5.1 Linker Qualifiers . ........................................ 1–17 1.5.2 Link Options ............................................ 1–19 1.6 Linking for Different Architectures .............................. 1–21 2 Understanding Symbol Resolution 2.1 Overview . ................................................ 2–1 2.1.1 Types of Symbols . ........................................ 2–1 2.1.2 Linker Symbol Resolution Processing . ....................... 2–2 2.2 Input File Processing for Symbol Resolution ....................... 2–5 2.2.1 Processing Object Modules . ................................ 2–6 2.2.2 Processing Shareable Images ................................ 2–11 iii 2.2.3 Processing Library Files .................................... 2–12 2.2.3.1 Identifying Library Files Using the /LIBRARY Qualifier ........ 2–13 2.2.3.2 Including Specific Modules from a Library Using the /INCLUDE Qualifier . ............................................ 2–14 2.2.3.3 Processing Default Libraries . ............................ 2–14 2.2.3.4 Open Systems Library Support ........................... 2–15 2.2.4 Processing Input Files Selectively ............................ 2–16 2.3 Ensuring Correct Symbol Resolution . ............................ 2–17 2.3.1 Understanding Cluster Creation . ............................ 2–17 2.3.2 Controlling Cluster Creation ................................ 2–19 2.3.2.1 Using the CLUSTER= Option to Control Clustering ........... 2–19 2.3.2.2 Using the COLLECT= Option to Control Clustering ........... 2–19 2.4 Resolving Symbols Defined in the OpenVMS Executive ............... 2–20 2.5 Defining Weak and Strong Global Symbols ........................ 2–21 3 Understanding Image File Creation 3.1 Overview .................................................. 3–1 3.2 Creating Program Sections .................................... 3–3 3.3 Creating Image Sections . .................................... 3–9 3.3.1 Processing Clusters to Create Image Sections ................... 3–9 3.3.2 Combining Program Sections into Image Sections ................ 3–10 3.3.3 Processing Significant Program Section Attributes ............... 3–11 3.3.4 Allocating Memory for Image Sections ......................... 3–17 3.3.5 Image Section Attributes ................................... 3–18 3.3.6 Controlling Image Section Creation ........................... 3–22 3.3.6.1 Modifying Program Section Attributes . ................... 3–22 3.3.6.2 Manipulating Cluster Creation ........................... 3–23 3.3.6.3 Isolating a Program Section into an Image Section . ........... 3–23 3.4 Initializing an Image ......................................... 3–24 3.4.1 Writing the Binary Contents of Image Sections .................. 3–24 3.4.2 Fixing Up Addresses . .................................... 3–25 3.4.3 Keeping the Size of Image Files Manageable . ................... 3–26 3.4.3.1 Controlling Demand-Zero Image Section Creation . ........... 3–26 4 Creating Shareable Images 4.1 Overview .................................................. 4–1 4.2 Declaring Universal Symbols in VAX Shareable Images . ........... 4–2 4.2.1 Creating Upwardly Compatible Shareable Images (VAX Linking Only) .................................................. 4–4 4.2.1.1 Creating a Transfer Vector (VAX Linking Only) ............... 4–5 4.2.1.2 Fixing the Location of the Transfer Vector in Your Image (VAX Linking Only) ......................................... 4–7 4.2.2 Creating Based Shareable Images (VAX Linking Only) . ........... 4–7 4.3 Declaring Universal Symbols in Alpha Shareable Images . ........... 4–8 4.3.1 Symbol Definitions Point to Shareable Image Psects (Alpha Linking Only) .................................................. 4–9 4.3.2 Creating Upwardly Compatible Shareable Images (Alpha Linking Only) .................................................. 4–10 4.3.3 Deleting Universal Symbols Without Disturbing Upward Compatibility (Alpha Linking Only) ........................... 4–10 4.3.4 Creating Run-Time Kits (Alpha Linking Only) .................. 4–11 iv 4.3.5 Specifying an Alias Name for a Universal Symbol (Alpha Linking Only) . ................................................ 4–11 4.3.6 Improving the Performance of Installed Shareable Images (Alpha Linking Only) ............................................ 4–12 5 Interpreting an Image Map File 5.1 Overview . ................................................ 5–1 5.2 Components of an Image Map File ............................... 5–2 5.2.1 Object Module Synopsis .................................... 5–3 5.2.2 Module Relocatable Reference Synopsis (VAX Linking Only) . ....... 5–3 5.2.3 Image Section Synopsis Section .............................. 5–4 5.2.4 Program Section Synopsis Section ............................ 5–6 5.2.5 Symbols By Name Section . ................................ 5–8 5.2.6 Symbol Cross-Reference Section .............................. 5–8 5.2.7 Symbols By Value Section . ................................ 5–9 5.2.8 Image Synopsis Section .................................... 5–10 5.2.9 Link Run Statistics Section . ................................ 5–11 Part II LINK Command Reference LINK .....................................................LINKER–3 Qualifier Descriptions ...............................................LINKER–4 /ALPHA ................................................LINKER–5 /BPAGE................................................LINKER–6 /BRIEF . ................................................LINKER–8 /CONTIGUOUS . ........................................LINKER–9 /CROSS_REFERENCE .....................................LINKER–10 /DEBUG ................................................LINKER–11 /DEMAND_ZERO (Alpha Only) ..............................LINKER–12 /DSF (Alpha Only) ........................................LINKER–14 /EXECUTABLE . ........................................LINKER–15 /FULL . ................................................LINKER–16 /GST (Alpha Only) ........................................LINKER–17 /HEADER ...............................................LINKER–18 /INCLUDE ..............................................LINKER–19
Load more

Recommended publications
  • Bit Shifts Bit Operations, Logical Shifts, Arithmetic Shifts, Rotate Shifts
    Why bit operations Assembly languages all provide ways to manipulate individual bits in multi-byte values Some of the coolest “tricks” in assembly rely on Bit Shifts bit operations With only a few instructions one can do a lot very quickly using judicious bit operations And you can do them in almost all high-level ICS312 programming languages! Let’s look at some of the common operations, Machine-Level and starting with shifts Systems Programming logical shifts arithmetic shifts Henri Casanova ([email protected]) rotate shifts Shift Operations Logical Shifts The simplest shifts: bits disappear at one end A shift moves the bits around in some data and zeros appear at the other A shift can be toward the left (i.e., toward the most significant bits), or toward the right (i.e., original byte 1 0 1 1 0 1 0 1 toward the least significant bits) left log. shift 0 1 1 0 1 0 1 0 left log. shift 1 1 0 1 0 1 0 0 left log. shift 1 0 1 0 1 0 0 0 There are two kinds of shifts: right log. shift 0 1 0 1 0 1 0 0 Logical Shifts right log. shift 0 0 1 0 1 0 1 0 Arithmetic Shifts right log. shift 0 0 0 1 0 1 0 1 Logical Shift Instructions Shifts and Numbers Two instructions: shl and shr The common use for shifts: quickly multiply and divide by powers of 2 One specifies by how many bits the data is shifted In decimal, for instance: multiplying 0013 by 10 amounts to doing one left shift to obtain 0130 Either by just passing a constant to the instruction multiplying by 100=102 amounts to doing two left shifts to obtain 1300 Or by using whatever
    [Show full text]
  • A Case Against the GOT' O William a . Wulf, Carnegie-Mellon Universit Y
    A Case Against the GOT' O William A . Wulf, Carnegie-Mellon Universit y ABSTRAC T suggestion to ban the goto appears to have been a part of the computing folklore for several years , It has been proposed, by E . W . Dijkstra and others , to this author's knowledge the suggestion wa s that the goto statement in programming language i s first made in print by Professor E . W . Dijkstra i n a principal culprit in programs which are diffi- a letter to the editor of the _Communications o f cult to understand, modify, and debug . More cor- the ACM in 1968 (1) . rectly, the argument is that it is possible t o In this paper we shall examine the rational e use the goto to synthesize program structures wit h for the elimination of the Soto in programin g these undesirable properties . Not all uses of th e languages, and some of the theoretical and practi- goto are to be considered harmful ; however, it i s cal implications of its (total) elimination . further argued that the "good" uses of the got o fall into one of a small number of specific case s RATIONAL E which may be handled by specific language con- structs . This paper summarizes the arguments i n At one level, the rationale for eliminatin g favor of eliminating the goto statement and som e the poto has already been given in the introduc- of the theoretical and practical implications o f tion . Namely, it is possible to use the goto in a the proposal . manner which obscures the logical structure of a program to a point where it becomes virtually im- KEY WORDS AND PHRASES : programming, programmin g possible to understand (1,3,4), It is not claimed languages, goto-less programming, structured pro- that every use of the goto obscures the logica l grammin g structure of a program ; it is only claimed that i t CR CATEGORIES : 4 .2, 4 .22, 5 .2 4 is possible to use the Soto to fabricate a "rat' s nest" of control flow which has the undesirabl e INTRODUCTION properties mentioned above .
    [Show full text]
  • Openvms Record Management Services Reference Manual
    OpenVMS Record Management Services Reference Manual Order Number: AA-PV6RD-TK April 2001 This reference manual contains general information intended for use in any OpenVMS programming language, as well as specific information on writing programs that use OpenVMS Record Management Services (OpenVMS RMS). Revision/Update Information: This manual supersedes the OpenVMS Record Management Services Reference Manual, OpenVMS Alpha Version 7.2 and OpenVMS VAX Version 7.2 Software Version: OpenVMS Alpha Version 7.3 OpenVMS VAX Version 7.3 Compaq Computer Corporation Houston, Texas © 2001 Compaq Computer Corporation Compaq, AlphaServer, VAX, VMS, the Compaq logo Registered in U.S. Patent and Trademark Office. Alpha, PATHWORKS, DECnet, DEC, and OpenVMS are trademarks of Compaq Information Technologies Group, L.P. in the United States and other countries. UNIX and X/Open are trademarks of The Open Group in the United States and other countries. All other product names mentioned herein may be the trademarks of their respective companies. Confidential computer software. Valid license from Compaq required for possession, use, or copying. Consistent with FAR 12.211 and 12.212, Commercial Computer Software, Computer Software Documentation, and Technical Data for Commercial Items are licensed to the U.S. Government under vendor’s standard commercial license. Compaq shall not be liable for technical or editorial errors or omissions contained herein. The information in this document is provided "as is" without warranty of any kind and is subject to change without notice. The warranties for Compaq products are set forth in the express limited warranty statements accompanying such products. Nothing herein should be construed as constituting an additional warranty.
    [Show full text]
  • Overcoming Traditional Problems with OS Huge Page Management
    MEGA: Overcoming Traditional Problems with OS Huge Page Management Theodore Michailidis Alex Delis Mema Roussopoulos University of Athens University of Athens University of Athens Athens, Greece Athens, Greece Athens, Greece [email protected] [email protected] [email protected] ABSTRACT KEYWORDS Modern computer systems now feature memory banks whose Huge pages, Address Translation, Memory Compaction aggregate size ranges from tens to hundreds of GBs. In this context, contemporary workloads can and do often consume ACM Reference Format: Theodore Michailidis, Alex Delis, and Mema Roussopoulos. 2019. vast amounts of main memory. This upsurge in memory con- MEGA: Overcoming Traditional Problems with OS Huge Page Man- sumption routinely results in increased virtual-to-physical agement. In The 12th ACM International Systems and Storage Con- address translations, and consequently and more importantly, ference (SYSTOR ’19), June 3–5, 2019, Haifa, Israel. ACM, New York, more translation misses. Both of these aspects collectively NY, USA, 11 pages. https://doi.org/10.1145/3319647.3325839 do hamper the performance of workload execution. A solu- tion aimed at dramatically reducing the number of address translation misses has been to provide hardware support for 1 INTRODUCTION pages with bigger sizes, termed huge pages. In this paper, we Computer memory capacities have been increasing sig- empirically demonstrate the benefits and drawbacks of using nificantly over the past decades, leading to the development such huge pages. In particular, we show that it is essential of memory hungry workloads that consume vast amounts for modern OS to refine their software mechanisms to more of main memory. This upsurge in memory consumption rou- effectively manage huge pages.
    [Show full text]
  • Operating System Engineering, Lecture 3
    6.828 2012 Lecture 3: O/S Organization plan: O/S organization processes isolation topic: overall o/s design what should the main components be? what should the interfaces look like? why have an o/s at all? why not just a library? then apps are free to use it, or not -- flexible some tiny O/Ss for embedded processors work this way key requirement: support multiple activities multiplexing isolation interaction helpful approach: abstract services rather than raw hardware file system, not raw disk TCP, not raw ethernet processes, not raw CPU/memory abstractions often ease multiplexing and interaction and more convenient and portable note: i'm going to focus on mainstream designs (xv6, Linux, &c) for *every* aspect, someone has done it a different way! example: exokernel and VMM does *not* abstract anything! xv6 has only a few abstractions / services processes (cpu, mem) I/O (file descriptors) file system i'm going to focus on xv6 processes today a process is a running program it has its own memory, share of CPU, FDs, parent, children, &c it uses system calls to interact outside itself to get at kernel services xv6 basic design here very traditional (UNIX/Linux/&c) xv6 user/kernel organization h/w, kernel, user kernel is a big program services: process, FS, net low-level: devices, VM all of kernel runs w/ full hardware privilege (very convenient) system calls switch between user and kernel 1 good: easy for sub-systems to cooperate (e.g. paging and file system) bad: interactions => complex, bugs are easy, no isolation within o/s called "monolithic";
    [Show full text]
  • Oracle Database Installation Guide 10G Release 2 (10.2)
    Oracle®[1] Database Installation Guide 11g Release 2 (11.2) for HP OpenVMS Itanium E56668-01 June 2015 Oracle Database Installation Guide, 11g Release 2 (11.2) for HP OpenVMS Itanium E56668-01 Copyright © 2008, 2015, Oracle and/or its affiliates. All rights reserved. Primary Author: Nisha Sridhar Contributors: Dave Hayter, Gary Huffman, Marc Noel, Chris Schuetz, David Miller, Kevin Duffy, Steve Holck, Grant Hayden, Gary Tate This software and related documentation are provided under a license agreement containing restrictions on use and disclosure and are protected by intellectual property laws. Except as expressly permitted in your license agreement or allowed by law, you may not use, copy, reproduce, translate, broadcast, modify, license, transmit, distribute, exhibit, perform, publish, or display any part, in any form, or by any means. Reverse engineering, disassembly, or decompilation of this software, unless required by law for interoperability, is prohibited. The information contained herein is subject to change without notice and is not warranted to be error-free. If you find any errors, please report them to us in writing. If this is software or related documentation that is delivered to the U.S. Government or anyone licensing it on behalf of the U.S. Government, then the following notice is applicable: U.S. GOVERNMENT END USERS: Oracle programs, including any operating system, integrated software, any programs installed on the hardware, and/or documentation, delivered to U.S. Government end users are "commercial computer software" pursuant to the applicable Federal Acquisition Regulation and agency-specific supplemental regulations. As such, use, duplication, disclosure, modification, and adaptation of the programs, including any operating system, integrated software, any programs installed on the hardware, and/or documentation, shall be subject to license terms and license restrictions applicable to the programs.
    [Show full text]
  • The Design of a Pascal Compiler Mohamed Sharaf, Devaun Mcfarland, Aspen Olmsted Part I
    The Design of A Pascal Compiler Mohamed Sharaf, Devaun McFarland, Aspen Olmsted Part I Mohamed Sharaf Introduction The Compiler is for the programming language PASCAL. The design decisions Concern the layout of program and data, syntax analyzer. The compiler is written in its own language. The compiler is intended for the CDC 6000 computer family. CDC 6000 is a family of mainframe computer manufactured by Control Data Corporation in the 1960s. It consisted of CDC 6400, CDC 6500, CDC 6600 and CDC 6700 computers, which all were extremely rapid and efficient for their time. It had a distributed architecture and was a reduced instruction set (RISC) machine many years before such a term was invented. Pascal Language Imperative Computer Programming Language, developed in 1971 by Niklaus Wirth. The primary unit in Pascal is the procedure. Each procedure is represented by a data segment and the program/code segment. The two segments are disjoint. Compiling Programs: Basic View Machine Pascal languag program Pascal e compile program filename . inpu r gp output a.out p t c Representation of Data Compute all the addresses at compile time to optimize certain index calculation. Entire variables always are assigned at least one full PSU “Physical Storage Unit” i.e CDC6000 has ‘wordlength’ of 60 bits. Scalar types Array types the first term is computed by the compiler w=a+(i-l)*s Record types: reside only within one PSU if it is represented as packed. If it is not packed its size will be the size of the largest possible variant. Data types … Powerset types The set operations of PASCAL are realized by the conventional bit-parallel logical instructions ‘and ‘ for intersection, ‘or’ for union File types The data transfer between the main store buffer and the secondary store is performed by a Peripheral Processor (PP).
    [Show full text]
  • Latest X64dbg Version Supports Non-English Languges Through a Generic Algorithm That May Or May Not Work Well in Your Language
    x64dbg Documentation Release 0.1 x64dbg Jul 05, 2021 Contents 1 Suggested reads 1 1.1 What is x64dbg?.............................................1 1.2 Introduction...............................................1 1.3 GUI manual............................................... 15 1.4 Commands................................................ 31 1.5 Developers................................................ 125 1.6 Licenses................................................. 261 2 Indices and tables 277 i ii CHAPTER 1 Suggested reads If you came here because someone told you to read the manual, start by reading all sections of the introduction. Contents: 1.1 What is x64dbg? This is a x64/x32 debugger that is currently in active development. The debugger (currently) has three parts: • DBG • GUI • Bridge DBG is the debugging part of the debugger. It handles debugging (using TitanEngine) and will provide data for the GUI. GUI is the graphical part of the debugger. It is built on top of Qt and it provides the user interaction. Bridge is the communication library for the DBG and GUI part (and maybe in the future more parts). The bridge can be used to work on new features, without having to update the code of the other parts. 1.2 Introduction This section explains the basics of x64dbg. Make sure to fully read this! Contents: 1 x64dbg Documentation, Release 0.1 1.2.1 Features This program is currently under active development. It supports many basic and advanced features to ease debugging on Windows. Basic features • Full-featured debugging of DLL and EXE files (TitanEngine Community Edition) • 32-bit and 64-bit Windows support from Windows XP to Windows 10 • Built-in assembler (XEDParse/Keystone/asmjit) • Fast disassembler (Zydis) • C-like expression parser • Logging • Notes • Memory map view • Modules and symbols view • Source code view • Thread view • Content-sensitive register view • Call stack view • SEH view • Handles, privileges and TCP connections enumeration.
    [Show full text]
  • Foundation API Client Library PHP – Usage Examples By: Juergen Rolf Revision Version: 1.2
    Foundation API Client Library PHP – Usage Examples By: Juergen Rolf Revision Version: 1.2 Revision Date: 2019-09-17 Company Unrestricted Foundation API Client Library PHP – Installation Guide Document Information Document Details File Name MDG Foundation API Client Library PHP - Usage Examples_v1_2 external.docx Contents Usage Examples and Tutorial introduction for the Foundation API Client Library - PHP Author Juergen Rolf Version 1.2 Date 2019-09-17 Intended Audience This document provides a few examples helping the reader to understand the necessary mechanisms to request data from the Market Data Gateway (MDG). The intended audience are application developers who want to get a feeling for the way they can request and receive data from the MDG. Revision History Revision Date Version Notes Author Status 2017-12-04 1.0 Initial Release J. Rolf Released 2018-03-27 1.1 Adjustments for external J. Rolf Released release 2019-09-17 1.2 Minor bugfixes J. Ockel Released References No. Document Version Date 1. Quick Start Guide - Market Data Gateway (MDG) 1.1 2018-03-27 APIs external 2. MDG Foundation API Client Library PHP – Installation 1.2 2019-09-17 Guide external Company Unrestricted Copyright © 2018 FactSet Digital Solutions GmbH. All rights reserved. Revision Version 1.2, Revision Date 2019-09-17, Author: Juergen Rolf www.factset.com | 2 Foundation API Client Library PHP – Installation Guide Table of Contents Document Information ............................................................................................................................
    [Show full text]
  • Entry Point Specification
    EMV® Contactless Specifications for Payment Systems Book B Entry Point Specification Version 2.6 July 2016 © 2016 EMVCo, LLC. All rights reserved. Reproduction, distribution and other use of this document is permitted only pursuant to the applicable agreement between the user and EMVCo found at www.emvco.com. EMV® is a registered trademark or trademark of EMVCo, LLC in the United States and other countries. EMV Contactless Book B Entry Point Specification version 2.6 Legal Notice The EMV® Specifications are provided “AS IS” without warranties of any kind, and EMVCo neither assumes nor accepts any liability for any errors or omissions contained in these Specifications. EMVCO DISCLAIMS ALL REPRESENTATIONS AND WARRANTIES, EXPRESS OR IMPLIED, INCLUDING WITHOUT LIMITATION IMPLIED WARRANTIES OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE AND NON-INFRINGEMENT, AS TO THESE SPECIFICATIONS. EMVCo makes no representations or warranties with respect to intellectual property rights of any third parties in or in relation to the Specifications. EMVCo undertakes no responsibility to determine whether any implementation of the EMV® Specifications may violate, infringe, or otherwise exercise the patent, copyright, trademark, trade secret, know-how, or other intellectual property rights of third parties, and thus any person who implements any part of the EMV® Specifications should consult an intellectual property attorney before any such implementation. Without limiting the foregoing, the Specifications may provide for the use of public key encryption and other technology, which may be the subject matter of patents in several countries. Any party seeking to implement these Specifications is solely responsible for determining whether its activities require a license to any such technology, including for patents on public key encryption technology.
    [Show full text]
  • Asynchronous Page Faults Aix Did It Red Hat Author Gleb Natapov August 10, 2010
    Asynchronous page faults Aix did it Red Hat Author Gleb Natapov August 10, 2010 Abstract Host memory overcommit may cause guest memory to be swapped. When guest vcpu access memory swapped out by a host its execution is suspended until memory is swapped back. Asynchronous page fault is a way to try and use guest vcpu more efficiently by allowing it to execute other tasks while page is brought back into memory. Part I How KVM Handles Guest Memory and What Inefficiency it Has With Regards to Host Swapping Mapping guest memory into host memory But we do it on demand Page fault happens on first guest access What happens on a page fault? 1 VMEXIT 2 kvm mmu page fault() 3 gfn to pfn() 4 get user pages fast() no previously mapped page and no swap entry found empty page is allocated 5 page is added into shadow/nested page table What happens on a page fault? 1 VMEXIT 2 kvm mmu page fault() 3 gfn to pfn() 4 get user pages fast() no previously mapped page and no swap entry found empty page is allocated 5 page is added into shadow/nested page table What happens on a page fault? 1 VMEXIT 2 kvm mmu page fault() 3 gfn to pfn() 4 get user pages fast() no previously mapped page and no swap entry found empty page is allocated 5 page is added into shadow/nested page table What happens on a page fault? 1 VMEXIT 2 kvm mmu page fault() 3 gfn to pfn() 4 get user pages fast() no previously mapped page and no swap entry found empty page is allocated 5 page is added into shadow/nested page table What happens on a page fault? 1 VMEXIT 2 kvm mmu page fault() 3 gfn to pfn()
    [Show full text]
  • Design and Implementation of Generics for the .NET Common Language Runtime
    Design and Implementation of Generics for the .NET Common Language Runtime Andrew Kennedy Don Syme Microsoft Research, Cambridge, U.K. fakeÒÒ¸d×ÝÑeg@ÑicÖÓ×ÓfغcÓÑ Abstract cally through an interface definition language, or IDL) that is nec- essary for language interoperation. The Microsoft .NET Common Language Runtime provides a This paper describes the design and implementation of support shared type system, intermediate language and dynamic execution for parametric polymorphism in the CLR. In its initial release, the environment for the implementation and inter-operation of multiple CLR has no support for polymorphism, an omission shared by the source languages. In this paper we extend it with direct support for JVM. Of course, it is always possible to “compile away” polymor- parametric polymorphism (also known as generics), describing the phism by translation, as has been demonstrated in a number of ex- design through examples written in an extended version of the C# tensions to Java [14, 4, 6, 13, 2, 16] that require no change to the programming language, and explaining aspects of implementation JVM, and in compilers for polymorphic languages that target the by reference to a prototype extension to the runtime. JVM or CLR (MLj [3], Haskell, Eiffel, Mercury). However, such Our design is very expressive, supporting parameterized types, systems inevitably suffer drawbacks of some kind, whether through polymorphic static, instance and virtual methods, “F-bounded” source language restrictions (disallowing primitive type instanti- type parameters, instantiation at pointer and value types, polymor- ations to enable a simple erasure-based translation, as in GJ and phic recursion, and exact run-time types.
    [Show full text]