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Mimo Detection and Precoding Architectures

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Mimo Detection and Precoding Architectures C708etukansi.kesken.fm Page 1 Tuesday, May 7, 2019 1:30 PM C 708 OULU 2019 C 708 UNIVERSITY OF OULU P.O. Box 8000 FI-90014 UNIVERSITY OF OULU FINLAND ACTA UNIVERSITATISUNIVERSITATIS OULUENSISOULUENSIS ACTA UNIVERSITATIS OULUENSIS ACTAACTA TECHNICATECHNICACC Shahriar Shahabuddin Shahriar Shahabuddin University Lecturer Tuomo Glumoff MIMO DETECTION University Lecturer Santeri Palviainen AND PRECODING Senior research fellow Jari Juuti ARCHITECTURES Professor Olli Vuolteenaho University Lecturer Veli-Matti Ulvinen Planning Director Pertti Tikkanen Professor Jari Juga University Lecturer Anu Soikkeli Professor Olli Vuolteenaho UNIVERSITY OF OULU GRADUATE SCHOOL; UNIVERSITY OF OULU, FACULTY OF INFORMATION TECHNOLOGY AND ELECTRICAL ENGINEERING; Publications Editor Kirsti Nurkkala CENTRE FOR WIRELESS COMMUNICATIONS; INFOTECH OULU ISBN 978-952-62-2282-0 (Paperback) ISBN 978-952-62-2283-7 (PDF) ISSN 0355-3213 (Print) ISSN 1796-2226 (Online) ACTA UNIVERSITATIS OULUENSIS C Technica 708 SHAHRIAR SHAHABUDDIN MIMO DETECTION AND PRECODING ARCHITECTURES Academic dissertation to be presented with the assent of the Doctoral Training Committee of Technology and Natural Sciences of the University of Oulu for public defence in the OP auditorium (L10), Linnanmaa, on 26 June 2019, at 12 noon UNIVERSITY OF OULU, OULU 2019 Copyright © 2019 Acta Univ. Oul. C 708, 2019 Supervised by Professor Markku Juntti Professor Christoph Studer Professor Olli Silvén Reviewed by Professor Gerd Ascheid Professor Guillermo Payá Vayá Opponent Professor Jarmo Takala ISBN 978-952-62-2282-0 (Paperback) ISBN 978-952-62-2283-7 (PDF) ISSN 0355-3213 (Printed) ISSN 1796-2226 (Online) Cover Design Raimo Ahonen JUVENES PRINT TAMPERE 2019 Shahabuddin, Shahriar, MIMO Detection and Precoding Architectures. University of Oulu Graduate School; University of Oulu, Faculty of Information Technology and Electrical Engineering; Centre for Wireless Communications; INFOTECH Oulu Acta Univ. Oul. C 708, 2019 University of Oulu, P.O. Box 8000, FI-90014 University of Oulu, Finland Abstract Multiple-input multiple-output (MIMO) techniques have been adopted since the third generation (3G) wireless communication standard to increase the spectral efficiency, data rate and reliability. The blessings of MIMO technologies for the baseband transceiver comes with the price of added complexity. Therefore, research on VLSI architectures for MIMO signal processing has generated a lot of interest over the past two decades. The advent of massive MIMO as a key technology for the fifth generation (5G) era also increased the interest in VLSI architectures related to MIMO communication research. In this thesis, we explored different VLSI architectures for MIMO detection and precoding algorithms. The detection and precoding are the most complex parts of a MIMO baseband transceiver. We focused on algorithm and architecture optimization and presented several VLSI architectures for MIMO detection and precoding. The thesis proposed an application specific instruction-set processor (ASIP) for a multimode small-scale MIMO detector. In a single design the detector supports minimum mean-square error (MMSE), selective spanning with fast enumeration (SSFE) and list sphere detection (LSD). In addition, a multiprocessor architecture is proposed in this thesis for a lattice reduction (LR) algorithm. A modified Lenstra-Lenstra-Lovasz (LLL) algorithm is proposed for LR to reduce the complexity of the original LLL algorithm. We also propose a massive MIMO detection algorithm based on alternating direction method of multipliers (ADMM). The algorithm is referred to as ADMM based infinity norm (ADMIN) constrained equalization. The ADMIN detection algorithm is implemented as an application-specific integrated circuit (ASIC) and for field programmable gate array (FPGA). A multimode precoder ASIP is also proposed in this thesis. In a single design, the ASIP supports norm-based scheduling, QR-decomposition, MMSE precoding and dirty paper coding (DPC) based precoding. Keywords: ASIP, MIMO, VLSI Shahabuddin, Shahriar, MIMO-signaalien tunnistus- ja esikoodausarkkitehtuurit. Oulun yliopiston tutkijakoulu; Oulun yliopisto, Tieto- ja sähkötekniikan tiedekunta; Centre for Wireless Communications; INFOTECH Oulu Acta Univ. Oul. C 708, 2019 Oulun yliopisto, PL 8000, 90014 Oulun yliopisto Tiivistelmä Moni-tulo moni-lähtö (MIMO) -tekniikoita on sopeutettu kolmannen sukupolven (3G) langatto- masta viestintästandardista alkaen spektritehokkuuden, tiedonsiirtonopeuden ja luotettavuuden parantamiseksi. MIMO-teknologioilla on useita hyviä puolia suhteessa peruskaistan vastaanotti- meen, mutta samalla monimutkaisuus on lisääntynyt. VLSI-arkkitehtuurien tutkimus MIMO- signaalinkäsittelyssä on sen vuoksi herättänyt paljon kiinnostusta viimeisen kahden vuosikym- menen aikana. Myös MIMO:n saavuttama asema viidennen sukupolven (5G) viestintästandar- din pääteknologiana on lisännyt kiinnostusta VLSI-arkkitehtuureihin MIMO-viestinnän tutki- muksessa. Tässä tutkielmassa on tutkittu erilaisia VLSI-arkkitehtuureja MIMO-signaalien tun- nistus- ja esikoodausalgoritmeissa. Signaalien tunnistus ja esikoodaus ovat peruskaistaa käyttä- vän MIMO-vastaanottimen monimutkaisimmat osa-alueet. Tutkielmassa on keskitytty algoritmi- en ja arkkitehtuurien optimointiin ja esitetty useita VLSI-arkkitehtuureja MIMO-signaalien tun- nistusta ja esikoodausta varten. Tutkielmassa on ehdotettu sovelluskohtaisen prosessorin (Application Specific Instruction- set Processor eli ASIP) käyttä pienen mittakaavan monimuotodetektorissa. Detektorin rakenne tukee samanaikaisesti keskineliöpoikkeaman minimointia (MMSE), SSFE (Selective Spanning with Fast Enumeration) -algoritmia ja LSD (List Sphere Detection) -algoritmia. Lisäksi tässä tut- kielmassa ehdotetaan monisuoritinarkkitehtuuria hilan redusointialgoritmille (Lattice Reduction eli LR). LR-algoritmia varten ehdotetaan muokattua Lenstra-Lenstra-Lovasz (LLL) -algoritmia vähentämään alkuperäisen LLL-algoritmin monimutkaisuutta. Lisäksi MIMO-signaalien tunnis- tusalgoritmin perustaksi ehdotetaan vuorottelevaa kertoimien suuntaustapaa Alternating Directi- on Method of Multipliers eli ADMM). ADMM-perustaisesta taajuusvasteen rajoitetusta ääretön- normi-korjauksesta (infinity norm constrained equalization) käytetään nimitystä ADMIN-algo- ritmi. ADMIN-tunnistusalgoritmi toteutetaan sovelluskohtaisena integroituna piirinä (Applicati- on-Specific Integrated Circuit eli ASIC) ohjelmoitavaa porttimatriisia (Field Programmable Gate Array eli FPGA) varten. Lisäksi ehdotetaan ASIP-monimuotoesikooderin käyttöä. ASIP-esikoo- derin rakenne tukee normiperustaista aikataulutusta, QR-hajotelmaa, MMSE-esikoodausta ja likaisen paperin koodaukseen (Dirty Paper Coding eli DPC) perustuvaa esikoodausta. Asiasanat: ASIP, MIMO, VLSI Dedicated to my parents 8 Preface The research for this thesis was conducted at the Centre for Wireless Communications - Radio Technology (CWC-RT) unit, University of Oulu, Finland. I would like to thank Professor Matti Latva-Aho, Professor Ari Pouttu, the directors of CWC during my stay and and Dr. Harri Posti for giving me the opportunity to work in a world class research environment. I would like to express my sincere gratitude to my principal supervisor Professor Markku Juntti for his constant support and guidance throughout my postgraduate research. I have been working in Professor Juntti’s group since the beginning of my masters studies and his support and encouragement has a significant influence in my achievements. I would also like to thank Professor Christoph Studer from Cornell University, USA, for his patient guidance and supervision for this thesis. I am grateful to Professor Studer for providing me the opportunity to work in his group at Cornell University. I would also like to thank Professor Olli Silvén for his supervision and technical guidance throughout this long journey. I would like to thank the reviewers of this thesis, Professor Gard Ascheid from RWTH Aachen University, Germany and Professor Guillermo Payá Vayá from University of Hannovar, Germany. Their insightful comments helped me to improve this thesis. I would also like to thank Dr. Pekka Pirinen and Dr. Markus Myllylä for acting as members of my follow-up group. The work of this thesis was carried out in Baseband and System Technologies for Wireless Evolution (BaSE), Sensing, Compression, Communications and Data Fusion in Wireless Sensor Networks (SeCoFu), 5G Communication with a Heterogeneous, Agile Mobile network in the Pyeongchang wInter Olympic competitioN (5G Champion) and Academy of Finland 6Genesis Flagship projects. The funding for the projects was provided by Academy of Finland, Finnish Funding Agency for Technology and Innovation - Tekes (currently known as Business Finland), Nokia, Renesas Mobile Europe, Broadcom, Elektrobit/Bittium and Xilinx. I was privileged to receive personal grants from Nokia Foundation, Oulu University Scholarship Foundation and Tauno Tönningin säätiö. I am also grateful to University of Oulu Graduate School (UNIOGS) for providing me a travel grant. I would like to thank the project managers Visa Tapio and Dr. Janne Janhunen. I am very grateful to my colleagues in those projects, Dr. Essi Suikkanen, Dr. Johanna 9 Ketonen, Dr. Jarkko Huusko, Dr. Ganesh Venkatraman, Dr. Fatih Bayramoglu. I am also thankful for the administrative support from Jari Sillanpää and Kirsi Outikangas. In addition, I would like to thank Dr. Jani Boutellier and Ilkka Hautala for their help in this thesis. I would like to mention Dr. Zaheer Khan, Amanullah
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