Power Management Circuits
Jeongjin Roh, Ph.D. [email protected] Hanyang University
1 Outline and References
• Introduction • Linear Voltage Regulators • Charge Pumps • Inductor-type Switching Converters
References 1. Power Management Techniques for Integrated Circuit Design, K.-H. Chen. 2. CMOS VLSI Design, fourth edition, Weste & Harris. 3. Fundamentals of Power Electronics, second edition, Erickson & Maksimovic.
2 Introduction
3 PMIC (Power Management IC)
LCD Bias Smart Phone PMIC PMIC
LED Battery PMIC PMIC
Provide stable output voltage for electronic equipment with high power efficiency
Great increase in market
4 General Structure of Power Management ICs
5 PMIC – Display Applications
LED backlight driver
- Thin and light - Simple circuit - Mercury free - Low voltage driving - Low power consumption - Low temperature operation - Fast response: wide dimming range - Easy channel balancing
[ LED backlight driver ]
6 Electric Vehicles
Vehicle is not mechanical product anymore - It is becoming electric/electronic product
[ LED backlight driver ]
7 PMIC – Mobile Applications
Mobile system includes various functions even if its battery-based power system.
Multi-output voltages are necessary for various function blocks.
[ Mobile system block diagram ] [ Smart PMIC block diagram ]
8 PMIC– Mobile Applications, cont’d
“A highly integrated power management IC for advanced mobile applications”, IEEE JSSC 2007. by Qualcomm
9 Power Management Units
Linear Voltage Regulators
• Typical Linear Voltage Regulators
• Low Drop-Out Regulators
Switching Power Converters
• Switched-Capacitor (or Charge Pump) Converters
• Inductor-Type Switching Converters
10 Linear Voltage Regulators
11 Linear Regulators
VIN _ VG VREF M0 + A0 VOUT
C IBIAS ILOAD
VSS
(a) Regulator with source follower output stage (c) Common-source output stage
12 Linear Regulators
Output capacitor with equivalent series resistance (ESR)
13 Linear Regulators
Pass transistor types. (a) NPN Darlington, (b) NPN, (c) PNP, (d) NMOS, (e) PMOS, (f) NMOS with charge pump
14 Linear Regulators
각 pass transistor type 별 장단점
15 Linear Regulators
(a) 기본적인 LDO regulator 의 회로도
(b) pole-splitting with Miller capacitance CGD. (no output capacitor)
16 Linear Regulators
(a) Large output capacitor for sudden load current variation (b) Root locus of poles due to the output capacitor
17 Linear Regulators
주파수 특성을 좋게 하기 위한 buffer stage 추가 (Buffer 추가로 pass transistor 의 gate 단에서의 저항성분 감소 목적)
18 Linear Regulators
Buffer stage 의구현예(기본적인 source follower 회로)
19 Linear Regulators
향상된 buffer 회로 예 (feedback 을통한buffer 의 output resistance 감소)
20 Charge Pumps
21 Charge Pump 응용 예 – Flash Memory 1
NAND Flash Memory (Toshiba 1989) 64Gb NAND Flash Memory (Toshiba 2009)
22 Charge Pump 응용 예 – Flash Memory 2
Floating gate NMOS transistor, NAND Flash string. & Erase and Program operations (ssl: string select line, gsl: ground select line) • word 신호들은 active low 신호임. • 총 16개 word 신호들 중 선택된 한 개만 low, 나머지는 모두 high. • 각 bit line 들은 pull-up 되어 있음.
23 Charge Pump 회로 예
Diode 를 사용한 회로 예 CMOS 회로 구현 예
24 Charge Pump 설계 예
(잘못된 설계 예 임. 수업시간 토론 목적.)
25 Inductor-Type Switching Converters
26 Inductor and Capacitor
Current: 1 dt i iL v L L L Energy: 1 v W Li 2 (J) 2 L Current: iC 1 v i dt C C v C Energy: 1 W C v 2 (J) 2
27 Converter
V SPDT switch and a load
+ + g(t)
vs(t) R v(t)
- - Vs(t)
DutyVg Cycle Ton On Off Duty Cycle Ton Toff T 1 s 1 v s Ts v s (t)dt (DT sV g ) DV g Ts 0 Ts DTs Ts t
28 Buck Converter
V L Buck Converter
1 L(t) + 2 i g CRv(t)
-
L Switch1 Switch2L V V
+ iL(t) +
g iL(t) CRV(t) g CRV(t)
- -
29 Buck Converter analysis Switch1
Inductor voltage and Capacitor current v v v(t) L g ic iL v(t)/ R
Small ripple approximation :
vL Vg V ic I V / R
Switch2 Inductor voltage and Capacitor current v v(t) L ic iL v(t)/ R Small ripple approximation :
vL V ic I V / R
30 Buck Converter analysis
Inductor volt-second balance: applied to inductor over one switching period Ts vL (t)dt (Vg V )DTs (V )D'Ts 0 Equation to zero and collect terms
VggD V (D D') 0 V DV
The voltage conversion ratio is therefore V M (D) D Vg
31 Small Ripple Approximation
Voltage ripple V Actual waveform v(t)=V+Vripple(t) Actual output voltage DC component V Waveform
v(t) V vripple (t) t vripple V , v(t)V
In a well-designed converter, the output voltage ripple is small. Hence the waveform can be easily approximated by ignoring ripple -> Small ripple approximation
32 Boost Converter
Boost Converter
L L
V Switch1 Switch2 V i (t) + + L iL (t)
g CRV(t) g CRV
- -
33 V Boost Converter analysis
L(t)
Vg s D`Ts DT t Vg-V
Net volt-seconds applied to inductor over one switching period Ts vL (t)dt (Vg )DTs (Vg V )D'Ts 0 Equation to zero and collect terms Vg V (D D') VD' 0 V g D' V 1 1 The voltage conversion ratio is therefore M (D) Vg D' 1 D
34 Boost Converter analysis
Switch1
Inductor voltage and Capacitor current
vL vg ic v / R
Small ripple approximation :
vL Vg ic V / R
Switch2 Inductor voltage and Capacitor current
vL vg v ic iL v / R
Small ripple approximation :
vL Vg v ic I v / R
35 i Boost Converter analysis
C(t) I - V/R
s D`Ts DT t
Capacitor charge balance -V/R Ts V V ic(t)dt ( )DTs (I )D'Ts 0 R R Collect terms and equate to zero V V (D D') ID' 0 I D'R R V Eliminate V to express in terms of Vg I g D'2 R
36 Basic Buck Converter • Basic DC-DC converter without protection circuits
Vg
clock clock S generator Q buffer L Vout S-R and latch deadtime sawtooth reset controller R1 wave R C R generator load R2 comparator
error amp VFB Vc compensator Vref
37 Sawtooth Waveform
• Sawtooth waveform and clock generator
VCC
Vsawtooth Ib Comparator
clock Vb
C M1
38 Buffer and Non-Overlapping Circuit
• Large power transistor requires buffer block • Non-overlapping to reduce shoot-through current in power transistor
VCC
Pdr_b
VSS VCC
Ndr
VSS
39 PI Compensator
• OTA and external R-C components
OTA Vc
R1 C2
C1
40 OTA Error Amplifier
• Conventional Mirror OTA – Load cap=10pF – Tail current=200uA, quiescent output current=400uA • Cascoded output may be used for higher gain – Drawback: limited output swing
M8 M7 It
Vb M0 Vo
Vn M1 M2 Vp
M3 M4 M6 M5
411 4 Vss
41 High-Performance Error Amp.
• Gain Boosting Technique • Load cap=10pF • Tail current=200uA, quiescent output current=40uA
Vcc
M7 It M8 Vb M0
Vn M11 M12 Vp Vo M1 M2
M9 M10
M5 M3 M13 M14 M4 M6
4 18 1 1 8 1 4 Vss
42 Current Sense Schemes
• Current sense resistor in series with power transistor • Most accurate technique • Additional resistance causes higher power loss • Use turn-on resistance of power transistor for current sense • Turn-on resistance varies too much for process, temperature, etc. • Current sense circuits • accurate • Circuit design is complicated • Extra quiescent current loss
43 Current Sense Circuit
• Current sense circuit for Buck converter
VIN
IP2 IP1 MP2 MS2
MP1 VQ
VA VB L1 + _ MS1
Isen VIN VO MR VQ I1 VC I1 Vadd CO IO R 2M1M2 MN1
44 Thank you.
45