UPTEC E16 005 Examensarbete 30 hp Oktober 2016

Development of a Digital Universal Filter Bank

Mats Larsson Abstract Development of a Digital Universal Filter Bank

Mats Larsson

Teknisk- naturvetenskaplig fakultet UTH-enheten This is a master's thesis project, which is a part of the Master Programme in Electrical Engineering at Uppsala university. Besöksadress: Ångströmlaboratoriet Lägerhyddsvägen 1 When developing a product or performing measurements, it is Hus 4, Plan 0 sometimes necessary to remove some content of a signal. This might be due to an interfering source that has to be filtered out, or Postadress: that only a specific frequency interval is of interest. In such a Box 536 751 21 Uppsala case, it would be practical if a universal frequency selective filter was available and easy to use. Telefon: 018 – 471 30 03 In this thesis, a platform for implementing different frequency

Telefax: selective digital filters is developed. Through a user interface, 018 – 471 30 00 parameters such as sampling frequency, filter order, type of filter and cutoff frequencies are set by the user. This provides a Hemsida: platform which is easy to configure in order to run one or http://www.teknat.uu.se/student multiple IIR or FIR filters in various constellations. By combining different filters, a wide variety of frequency responses can be obtained. A prototype is constructed, which allows the user to connect up to two input signals and retrieve up to two output signals. The filter bank is programmed in C and implemented in a 32-bit microcontroller, base on the ARM architecture. To get a reliable prototype, a printed circuit board is designed and manufactured. To protect the electronics from external stress, a cover is designed and 3D-printed. The filter design algorithms and the algorithm used when running the filter bank gives satisfying results. The capacity of the filter bank can be increased by refining the filtering algorithm. By improving the hardware, noise generated by the electronics can be decreased. The filter bank has a really good potential to become a very useful tool.

Handledare: Ping Wu Ämnesgranskare: Tomas Olofsson Examinator: Mikael Bergkvist ISSN: 1654-7616, UPTEC E16 005 Sammanfattning

Denna rapport ¨arett resultat fr˚anett examensarbete inom civilingenj¨orsprogrammet i elektroteknik vid Uppsala Universitet.

Vid t.ex. utveckling av produkter eller inom m¨atteknikskulle det underl¨attaom det fanns m¨ojlighetatt p˚aett enkelt s¨attfiltrera bort delar av inneh˚alleti en signal. Detta d˚at.ex. en st¨orningfortplantat sig i ett m¨atsystem. De befintliga systemen som finns tillg¨angligap˚amarknaden kr¨aver oftast programmering i specifik mjukvara, via t.ex. en PC, och tar d¨arf¨ortid att implementera. Mjukvaran f¨ordessa system medf¨ordessutom oftast kostnader, d˚alicenser kr¨avs.

I detta examensarbete utvecklas en plattform som erbjuder ett snabbt och enkelt s¨attatt implementera och kombinera olika digitala frekvensselektiva filter. Den universala digitala filterbanken kan hantera upp till tv˚ain- och utsignaler. Genom ett anv¨andargr¨anssnitt best˚aendeav en display och en knappsats, kan ett eller flera filter konfigueras f¨oratt sedan kopplas samman i filterbanken. P˚adetta s¨attkan anv¨andarenforma frekvenssvaret efter det behov som finns. Filterbanken ¨arprogrammerad i C och implementerad i en 32-bitars mikrokontroller.

Den slutliga prototypen fungerar som ¨onskat och l˚ateranv¨andarenp˚aett mycket enkelt s¨attimplementera ett stort antal olika typer av frekvensselektiva filter. Anv¨andaren best¨ammer sj¨alvparrametrar s˚asomfiltrets ordningstal och brytfrekvenser. Olika filter kan dessutom kombineras genom att kopplas i serie eller parralellt, efter det behov som finns. Genom vidareutveckling av h˚ardvaran har filterbanken stor potential f¨oratt bli ett mycket anv¨andbartverktyg.

Jag skulle vilja rikta ett tack till Ping Wu p˚aavdelningen f¨orsignaler och system vid Uppsala universitet som varit min handledare genom projektet samt Etteplan i V¨aster˚as som bist˚attmed tid f¨orkonsultation g¨allandeprogrammering. Jag skulle ocks˚avilja tacka Robin Hindgren f¨ordiskussioner och f¨orslag till f¨orb¨attringarav kretskortkonstruktionen samt Fredrik Evestedt p˚aavdelningen f¨orelectricitetsl¨aravid Uppsala universitet f¨or hj¨alpen med att skriva ut h¨oljettill prototypen.

II Contents

1 Introduction 1 1.1 Background ...... 1 1.2 Aim of the project ...... 1 1.3 Project description ...... 1 1.4 Outline of the report ...... 4

2 Theory 5 2.1 Linear phase delay ...... 5 2.2 Sallen-Key topology ...... 6 2.3 Differential amplifier ...... 7 2.4 Analog to digital conversion ...... 8 2.5 Anti-aliasing filter ...... 9 2.6 Digital filter ...... 10 2.6.1 Finite impulse response filter ...... 11 2.6.2 Infinite impulse response filters ...... 19 2.7 Digital to analog conversion ...... 26 2.8 Reconstruction filter ...... 26

3 Hardware implementation 27 3.1 Design of analog signal chain ...... 27 3.1.1 DC-blocker ...... 27 3.1.2 DC-adaption ...... 28 3.1.3 Anti-aliasing and reconstruction filter ...... 28 3.1.4 Buffer ...... 28 3.1.5 Current limiter ...... 29 3.2 Microcontroller ...... 29 3.3 User interface ...... 30 3.4 Printed circuit board ...... 31 3.5 3D-printed cover ...... 32

4 Software implementation 34 4.1 Filter design algorithms ...... 35 4.2 Filter structure ...... 35 4.3 Output structure ...... 36 4.4 Filter bank algorithm ...... 37 4.5 User interface menu system ...... 38

5 Results 43 5.1 Hardware ...... 43 5.1.1 DC-blocker ...... 43 5.1.2 Anti-aliasing filter and reconstruction filters ...... 44 5.1.3 Prototype ...... 48 5.2 Software ...... 50 5.2.1 Filter validation ...... 50

III 5.2.2 User interface ...... 59

6 Discussion 64

7 Further development 66

Appendix A IIR filter coefficients 68

Appendix B Derivation of Sallen-Key topology 73

Appendix C Derivation of differential amplifier circuit 75

IV Glossary

AAF Anti-Aliasing Filter. ADC Analog to Digital Converter. ARM Advanced RISC Machine.

BP Band Pass. BS Band Stop.

CPU Central Processing Unit. CT Continuous Time.

DAC Digital to Analog Converter. DMA Direct Memory Access. DSP Digital Signal Processing. DT Discrete Time.

FFT Fast Fourier Transform. FIR Finite Impulse Response.

GPIO General-Purpose Input/Output.

HP High Pass.

IIR Infinite Impulse Response.

KCL Kirchhoff’s Current Law.

LCD Liquid-Crystal Display. LP Low Pass. LTI Linear Time Invariant.

MCU Microcontroller Unit. MIMO Multiple Input Multiple Output. MISO Multiple Input Single Output.

PCB Printed Circuit Board.

V RECF Reconstruction Filter.

SIMO Single Input Multiple Output. SISO Single Input Single Output.

VI 1 Introduction

1.1 Background

Frequency selective filtering is a very important topic within the field of signal processing. By designing a filter it is possible to remove unwanted frequency components such as band-limited noise or an interfering signal. Digital filtering is a widely used method for filtering almost any signal, such as sensor signals and audio signals. In comparison to an analog filter, a digital filter is implemented in software, and therefore often no extra components need to be added. Also analog components characteristics tend to drift due to change of the ambient temperature, which is not the case for digital filters. Currently, there is no universal digital filter on the market, which allows the user to easily implement almost any filter without a sophisticated user interface, which is based on an additional system, such as a PC.

1.2 Aim of the project

When developing a product, performing measurements on a system or any other situation requiring setting up a test rig, it would sometimes simplify the procedure if a specific filter was available and easy to implement. The aim of this project is to design such a universal filter bank where various filters can be designed and implemented to a system where one or multiple analog signals are available and have to be filtered. In this way, it is no longer necessary to bother about tedious and time-consuming calculations, it will also be easier to tune the filter for the specific application.

1.3 Project description

In this thesis, a digital universal filter bank is designed and implemented in a Micro- controller Unit (MCU) based on the Advanced RISC Machine (ARM) architecture. The design allows the user to connect up to two input signals and achieve up to two output signals, where the maximum amplitude of the input signal is limited to 3.3 V peak-to- peak. Through a user interface, the user selects an appropriate filter for the given application and enter all the design parameters for the filter to be designed. When all design pa- rameters are selected, the filter bank automatically generates the filter. The filter bank is capable of running multiple filters simultaneously. In this way it is possible to connect different filters in series or in parallel to achieve the frequency response required for the given application. Since the MCU has a multiple channel Analog to Digital Converter (ADC) and Digital to Analog Converter (DAC), it is possible to configure the filter bank into a Single Input Single Output (SISO), Single Input Multiple Output (SIMO), Multiple Input Single Output (MISO) or a Multiple Input Multiple Output (MIMO) system.

1 The user interface allows the user to perform the following actions: • Select sampling frequency, either one of the three predefined sampling frequencies (16kHz, 48kHz or 96kHz), which are using an Anti-Aliasing Filter (AAF) and a Reconstruction Filter (RECF), or select a custom sampling frequency. • Add a new filter to the system. • Select Finite Impulse Response (FIR) or Infinite Impulse Response (IIR) filter. • Select an analog reference filter such as Butterworth or Chebyshev I if an IIR filter is designed, see section 2.6.2.1. • Select window function if a FIR filter is designed, see section 2.6.1.2. • Select filter order. • Select Low Pass (LP), High Pass (HP), Band Pass (BP) or Band Stop (BS) filter. • Add an input signal to a filter. • Add an output signal to any of the DAC’s.

A block scheme describing the system is shown in Figure 1.1. The input signal is first passed through a signal conditioner circuit. The signal conditioner circuit adapts the input signal to the dynamical range of the ADC. After the signal conditioner, the signal may be filtered through an AAF in order to attenuate frequencies which violates the Nyquist’s sampling theorem, explained in section 2.5. After the signal is sampled by the ADC, the signal is filtered though the digital filters which are configured by the user. After the signal has been filtered by the digital filters and sampled by the DAC, the signal may be filtered through a RECF. The RECF removes distortion, which is introduced when the signal is sampled from a Continuous Time (CT) signal to a Discrete Time (DT) signal. The last block in the signal chain is the circuit protection block, which prevents the circuit from being damaged if a short circuit occurs at the output of the filter bank.

2 MPU

Signal Anti-aliasing x1(t) ADC conditioner filter

Signal Anti-aliasing x2(t) ADC conditioner filter CPU Circuit Reconstruction y1(t) DAC protection filter

Circuit Reconstruction y2(t) DAC protection filter

GPIO

User interface Keypad

Display

Figure 1.1: Block scheme describing the universal filter bank.

A more detailed block scheme of the analog signal chain is shown in Figure 1.2. The input signal is first passed though a DC-blocker circuit, explained in section 3.1.1 This is to remove any DC-component from the input signal. To adapt the signal to the dynamic range of the ADC, a DC-adaption circuit is used to add an offset to the signal, explained in section 3.1.2. In order to attenuate frequency components which are violating the Nyquist theorem, the signal can be filtered through one of the AAF channels, with a cutoff frequency depending on the sampling frequency setting. When a custom sampling frequency is used, the signal is bypassed i.e. none of the AAFs are used. After the signal has been filtered though the digital filters and sampled by the DAC, the signal may be filtered by using one of the RECFs, depending on the sampling frequency settings. This is to remove the distortion introduced since the signal has to be converted into a DT signal and back to a CT once again. The second DC-blocker circuit removes the DC-component added by the DC-adaption circuit in order to obtain an output signal which does not contain any DC-component. The buffer is used to increase the maximum output current of the channel, explained in section 3.1.4. To protect the channel if a short circuit would occur, a current limiter is used, explained in section 3.1.5. All analog filters implemented are Bessel filters, i.e. the phase shift is linear within the passband. This is to preserve the possibility to achieve a linear phase delay system.

3 Signal conditioner AAF1 D M M AAF2 vin DC-blocker DC-adaption U ADC U AAF3 X X

Circuit protection RECF1 D M Current RECF2 M vout Buffer DC-blocker U DAC limiter U X RECF3 X

Figure 1.2: Block diagram describing the connection of hardware for each channel of the system.

A prototype of the digital universal filter bank is built, for which a Printed Circuit Board (PCB) is designed.

1.4 Outline of the report

The report starts by covering the necessary theory in order to design different digital filters and a proper signal chain in section 2. In section 3, the selection of hardware is presented. The software building blocks which is used to implement the filter bank is presented in section 4. In section 5, the results of the evaluation of the prototype are presented, also an example of how to configure the filter bank using the user interface. Issues regarding the prototype is discussed and suggestions for further improvements are presented in section 6.

4 2 Theory

This section starts by briefly presenting the concept of linear phase delay in section 2.1 to easier understand and motivate the choice of using Bessel filters for all analog filters within the project. The theory of the analog electronics circuits used in the project is presented in section 2.2 and 2.3. The rest of this section contains the theory necessary for designing the signal chain in Figure 2.1. The implementation of a digital filter in a real world application can be divided into several blocks, illustrated in Figure 2.1. To apply Digital Signal Processing (DSP) to any CT signal, the signal has to be converted into a DT signal. This is done by using an ADC which maps the analog value into a digital representation, explained in section 2.4. Before the CT signal is converted to the DT domain, the signal may be filtered through an AAF in order to avoid violating the Nyquist theorem, explained in section 2.5. Once the DT signal is available, the microprocessor accesses the data and start to calculate a new output of the digital filter, explained in section 2.6. When the output of the filter is computed, the DT signal has to be converted to a CT signal, this is done by using a DAC, explained in section 2.7. Since the analog signal is sampled into a DT signal, distortion of the signal is introduced. To remove the distortion a RECF is used, explained section 2.8.

Anti-aliasing Reconstruction x(t) ADC Digital filter DAC y(t) filter filter

Figure 2.1: Block diagram of a general digital filter system.

2.1 Linear phase delay

A property which is essential in applications such as hifi, measurement systems, commu- nication and radar is the ability to maintain a linear phase response. This is a property that is achievable for the digital FIR filter, but also the analog Bessel filter has an ap- proximately linear phase response. A linear phase shift corresponds to a constant delay for all frequencies within the pass- band hence, a signal filtered through a filter with this property will not suffer from distortion due to different delay for different frequencies. The phase delay is defined as the phase divided by the frequency as in eq. (2.1)

φ(Ω) d = − . (2.1) p Ω

When selecting filter for a system, the purpose of the filter should be taken into account since there is a trade-off between rejection of unwanted frequencies and the ability to maintain linear phase shift.

5 2.2 Sallen-Key topology

The Sallen-Key topology [1] is a commonly used filter configuration where a high Q- factor is attainable, by using positive feedback coupling of an OP-amplifier, which is not possible by using an ordinary RC-filter [2]. In Figure 2.2 the general Sallen-Key topology is illustrated by using impedance’s, which are replaced by passive components to attain the different filter types, such as LP and HP filters.

Z3

v− − Z1 Z2 vout v+ vin + v1

Z4

Figure 2.2: The general Sallen-Key filter topology.

In appendix B it is shown that the transfer function of the filter is given by v Z Z out = 3 4 . (2.2) vin Z1Z2 + Z3(Z1 + Z2) + Z3Z4 When a LP filter is designed the impedance’s are replaced such as 1 1 Z1 = R1,Z2 = R2,Z3 = ,Z4 = . sC1 sC2 The transfer function then becomes 1 H(s) = 2 . (2.3) s R1R2C1C2 + s(R1C2 + R2C2) + 1 By substituting s = j2πf, the cutoff frequency is calculated according to eq. (2.4) [2]. 1 fc = √ (2.4) 2π R1R2C1C2

6 2.3 Differential amplifier

Before the CT signal can be sampled into a DT signal, it is necessary to adapt the DC voltage level of the signal to the ADC. The DC level of the signal should correspond to the center of the dynamic range of the ADC. This can be done by using a differential amplifier circuit, which is shown in Figure 2.3. The differential amplifier is a well known and commonly used circuit. In the configuration illustrated, it is used for adding an offset voltage to the signal vin.

R3 R4 vin

v− − R1 vout v+ vref +

R2

Figure 2.3: The differential amplifier circuit.

In appendix C it is shown that the output voltage of the circuit can be expressed in terms of vin, vref and the resistors within the circuit according to

vref R2(R3 + R4) R4 R4 R2 R4 vout = − vin = vref (1 + ) − vin , (2.5) R3(R1 + R2) R3 R3 R1 + R2 R3

where vref is the maximum voltage level that can be converted without saturation of the ADC occurs. By selecting component values according to R 3R R = ,R = ,R = R , (2.6) 2 4 1 4 3 4 the output becomes

R v v = v (1 + 1) 4 − v = ref − v . (2.7) out ref R 3R in 2 in 4 + 4

The output signal is inverted and has an offset of vref /2, compared to the input signal vin.

7 2.4 Analog to digital conversion

In order to apply DSP to a CT signal, it has to be converted into the digital time domain. The conversion is mathematically described by X xd(t) = xc(t) δ(t − n∆t), (2.8) n where xc(t) is the CT signal and xd(t) is the DT representation of the signal [3]. The CT signal is multiplied by impulses separated by time ∆t, which is determined by the sampling frequency fs in eq. (2.9).

1 ∆t = (2.9) fs When specifying sampling frequency for a system, the bandwidth of the signal to be sampled must be taken into consideration. The sampling frequency has to be chosen according to Nyquist’s theorem fs > 2fmax. (2.10) In eq. (2.8) the sampling process is described as a multiplication in the time domain, thus according to the convolution theorem [3], the process can be treated as a convolution in the frequency domain

X Xd(ω) = Xc(ω) ∗ F{ δ(t − n∆t)}. (2.11)

In Figure 2.4a the Fourier Transform of a signal containing frequencies 0 ≤ f ≤ fs/2 is illustrated. Figure 2.4b illustrates the Fourier transform of the impulse train. The P resulting Fourier transform after convolving Xc(ω) and F{ δ(t − n∆t)} is illustrated in Figure 2.5.

Xc(ω) F{P δ(t − n∆t)}

ω ω fs 0 fs − 2 2 −fs 0 fs 2fs (a) (b)

Figure 2.4: The figures illustrates the spectrum of the two signals that are being convolved.

8 Xd(ω)

ω fs 0 fs 3fs 5fs − 2 2 2 2

Figure 2.5: Fourier transform of sampled signal.

2.5 Anti-aliasing filter

If a sampling frequency that does not fulfill Nyquist’s theorem in eq. (2.10) is chosen, the signal components that are greater than fs/2 will appear in the DT signal as signals with frequency according to fDT = |fCT − mfs|, (2.12) where m is a positive integer fulfilling

|fCT − mfs| ≤ fs/2. (2.13)

This phenomenon is called aliasing [4].

If the frequency content of Xc(ω) is changed in the way that Nyquist’s theorem is violated, an overlapping of the replications occurs, illustrated in Figure 2.6a. The overlapping parts adding up since convolution is a linear operation and the Fourier transform then becomes as illustrated in Figure 2.6b.

Xd(ω) Xd(ω)

ω ω fs 0 fs 3fs 5fs fs 0 fs 3fs 5fs − 2 2 2 2 − 2 2 2 2 (a) (b)

Figure 2.6: The overlapping due to violation of Nyquist’s theorem is illustrated in Figure 2.6a. The replications of the spectra add up, thus the sampled signal will not correspond to the original signal, illustrated in Figure 2.6b.

To prevent aliasing during the ADC process, an AAF may be used. The AAF is an analog LP filter, which purpose is to remove frequency components greater than fs/2. By filtering Xc(ω) using an ideal filter with the frequency response illustrated in Figure 2.7a, the frequency components greater than fs/2 are removed, the Fourier transform of the sampled signal then becomes as illustrated in Figure 2.7b. In practice, it is not

9 possible to design ideal filters, thus frequencies greater than fs/s will not be completely removed, but attenuated according to the characteristics of the AAF.

H(ω) Xd(ω)

ω ω fs 0 fs fs 0 fs 3fs 5fs − 2 2 − 2 2 2 2 (a) (b)

Figure 2.7: The frequency response of an ideal LP filter is illustrated in Figure 2.7a. Figures 2.7b illustrates the spectrum of the sampled signal when the Nyquist theorem is violated but the filter in Figure 2.7a is used as an AAF.

The AAF can be any analog filter, such as Butterworth, Chebyshev or Bessel filter. The choice of filter is based on the application requirements. In some applications it is desirable to achieve a narrow transition band, then the Chebyshev filter might be suitable if ripple in the passband or stopband is not critical. In some applications a linear phase shift is required, then the Bessel filter is of interest, even though it has poor attenuation in the stop band.

2.6 Digital filter

There are two types of digital frequency selective filters, FIR and IIR filters. In this section, the theory necessary for designing and implementing FIR filters using the win- dowing method is explained. The necessary theory for implementing IIR filters of various order by using second order sections is also explained. A linear ordinary differential equation can be used to describe an analog filter in the continuous time domain as in eq. (2.14) [3]. The characteristics of the output of the system, such as cutoff frequency, stop band rejection and transition bandwidth are highly dependent on the coefficients f0, f1, ..., fN and g0, g1, ..., gM .

dy dN y dx dM x f y + f + ··· + f = g x + g + ··· + g (2.14) 0 1 dt N dtN 0 1 dt M dtM The difference equation of the sampled version of the system can be expressed as

a0y[n] + a1y[n − 1] + ··· + aN y[n − N] = b0x[n] + b1x[n − 1] + ··· + bM x[n − M]. (2.15)

It is common practice to normalize all coefficients by a0, hence, a0 = 1 from now on in the project. It is important to stress that fn 6= an and gn 6= bn , but the coefficients are still connected to each other, which is utilized when designing IIR filters in section 2.6.2.

10 By rearranging the difference equation the output of a digital filter is given by

y[n] = b0x[n] + b1x[n − 1] + ··· + bM x[n − M] − a1y[n − 1] − · · · − aN y[n − N]. (2.16)

By applying z-transform to eq. (2.15), it is converted into the frequency domain and becomes

−1 −N −1 −M Y (z) + a1z Y (z) + ··· + aN z Y (z) = b0X(z) + b1z X(z) + ··· + bM z X(z). (2.17)

By rearranging the equation, the transfer function is obtained in eq. (2.18).

PM b z−k H(z) = k=0 k (2.18) PN −k 1 + k=1 akz

There are two types of digital frequency selective filters, the FIR filter and the IIR filter, which are explained more thoroughly in Section 2.6.1 and 2.6.2.

2.6.1 Finite impulse response filter

The filter requirements in applications such as radar, communication and measurement devices are typically very challenging. The filters not only need a sufficiently good fre- quency response, they also need to fulfill very strict phase response requirements. In such cases, the FIR filter is often used. This is because of the advantage that it is possible to design a FIR filter with an arbitrary phase response, thus, as a special case, a linear phase response is achievable. As the consequence of that a FIR filter is a non-recursive filter, it is computationally demanding in comparison to an IIR filter with similar frequency response as explained in Section 2.6.2. Since it is a non-recursive filter, the an coefficients that are associated with the recursive part in the transfer function in eq. (2.18) are zero, which yields eq. (2.19), where M is the filter order. Thus, FIR filters are unconditionally stable, due to the pole location at the origin of the unit circle in the z-plane [3].

M X −k H(z) = bkz (2.19) k=0

There are several methods that can be used to design a FIR filter and most of them are based on an ideal filter approximation. A simple and straight forward approach when designing FIR filters is to use the windowing design approach [5]. Due to its simplicity, it is very appropriate for implementation in an MCU which is supposed to calculate filter coefficients in real time, depending on user input. The windowing approach algorithm starts by assuming an ideal filter frequency response described in section 2.6.1.1. Since it is not possible to use an infinite number of coeffi- cients, an ideal filter is not achievable. An effect of using a limited number of coefficients is that some frequency components in the stopband become poorly attenuated. This effect appears as frequency lobes within the stopband and are called side lobes. These

11 side lobes can be partly suppressed by using a window function at the cost of increased transition bandwidth to improve the frequency response, described in section 2.6.1.2. The last step when designing a unity gain FIR filter using the windowing approach is to scale the coefficients to guarantee unity gain within the passband, this is described in section 2.6.1.3. When implementing a FIR filter, different realizations can be used. Some commonly used realizations are explained in section 2.6.1.4.

2.6.1.1 Ideal filter

Many designing methods of FIR filters are based upon an ideal brick-wall filter which has an amplitude response according to Figure 2.8. The filter has unity gain in the passband, zero gain in the stop band and no transition band.

H(ω)

1

ω 0 ωc ωs 2

Figure 2.8: Frequency response of the ideal low pass brick-wall filter.

When filtering a signal, the input signal is convolved by the impulse response of the filter. By performing inverse Fourier transform of the frequency response H(ω) of the ideal filter, it can be shown that the impulse response is infinite, thus it does not reach zero in finite time. An infinite impulse response is not realizable by using a FIR filter in any practical ap- plication, thus it would require an infinite number of coefficients. In order to implement a FIR filter, truncation of the impulse response is necessary. By truncating the impulse response of a filter, the filter order is set. A filter of order M has M + 1 coefficients, thus number of coefficients becomes finite. If a higher filter order is chosen, the better approximation of an ideal filter it will become [3]. When calculating the inverse Fourier transform of the frequency response of an M th order filter, the obtained impulse response is noncausal, i.e it is associated with negative time. To obtain a causal system, the im- pulse response is shifted M indexes. The impulse response is now causal and span indexes from zero to M, the filter is called to be an M + 1 tap filter [3].

12 When determining the impulse response for a filter, the cutoff frequency has to be nor- malized to the sampling frequency according to

2πfc Ωc = . (2.20) fs The truncated impulse response for a LP filter can now be determined by using ( Ωc , n = M h [n] = π 2 (2.21) lp sin(Ωc(n−M)) M π(n−M) , n 6= 2 , and the impulse response for a truncated HP filter is given by ( 1 − Ωc , n = M h [n] = π 2 (2.22) hp sin(Ωc(n−M)) M − π(n−M) , n 6= 2 .

The truncated impulse response for a BP and BS filter with corner frequencies Ωc1 and Ωc2 are given by eq. (2.23) and (2.24) respectively.

( Ωc2−Ωc1 , n = M h [n] = π 2 (2.23) bp sin(Ωc2(n−M)) sin(Ωc1(n−M)) M π(n−M) − π(n−M) , n 6= 2 ( 1 − Ωc2−Ωc1 , n = M h [n] = π 2 (2.24) bs sin(Ωc1(n−M)) sin(Ωc2(n−M)) M π(n−M) − π(n−M) , n 6= 2 To illustrate the effect of using a finite number of samples, the sine wave signal in Figure 2.9 is used. The figure illustrates a CT sine wave signal and the resulting discrete-time Fourier transform.

x(t)

A

X(jΩ)

t A 2

Ω −Ωx 0 Ωx (a) (b)

Figure 2.9: A CT sine wave signal is illustrated in Figure 2.9a, the corresponding discrete- time Fourier transform is shown in Figure 2.9b.

13 The operation of using a finite number of samples is equivalent by multiplying the CT signal by a rectangular window, illustrated in Figure 2.10. Since a multiplication in the time domain can be described as a convolution in the frequency domain, the result of the operation is illustrated by Figure 2.11.

W (jΩ)

T0

w(t)

Ω t 0 T0 0 T0 − 2 2 (a) (b)

Figure 2.10: The rectangular window that is multiplied by x(t) is shown in Figure 2.10a, and the corresponding frequency spectrum in Figure 2.10b.

xˆ(t) = x(t)w(t) Xˆ(jΩ)

A

t T0 T0 − 2 2

Ω 0

(a) (b)

Figure 2.11: The resulting CT signal after x(t) has been multiplied by w(t) is shown in Figure 2.11a, where the frequency spectrum is illustrated by 2.11b.

14 By comparing the spectral content of X and Xˆ, it is clear that the two spectral lines in X have been smeared out in Xˆ, due to the truncation. The amount of smearing is depending on the width of the mainlobe in W , which is depending on the length of the rectangular window. Apart from the smearing, Xˆ is none zero outside the mainlobe. This phenomenon is called leakage and results in that power from one band leaks into other bands, where it affects the ability to analyze the spectral content [5]. This said, it is not possible to achieve the ideal filter in Figure 2.8 since only a finite number of samples can be used. Therefore, due to the crude method of truncating the impulse response, the ripple in passband and side lobes in the stop band appears, as illustrated in figure 2.12. The figure illustrates the amplitude response of a 32nd order LP filter where truncation of the impulse response is performed.

0

-20

-40

-60

-80 0 0.2 0.4 0.6 0.8 1

Figure 2.12: The amplitude response of a 32nd order FIR filter using only truncation of the impulse response.

By using a window function it is possible to improve the frequency response, this is explained in section 2.6.1.2.

2.6.1.2 Window functions

Due to the truncation of the coefficients above, the filter impulse response becomes dis- continuous. An effect of the discontinuity of the impulse response is that ripple in the passband and sidelobes within the stopband appears. A technique to reduce the ripple and sidelobes and thereby improve the frequency response is to multiply the coefficients by a tapered window function. The window function is smoothing out the impulse response which reduces the sidelobes but will instead increase the transition band. Properties such as the main sidelobe level and transition bandwidth of some of the most common window functions are presented in Table 1. The filter coefficients are obtained by multiplying each element of the truncated and

15 time-shifted impulse response hd[n] by the tapered window function in eq. (2.25), where w[n] is one of the window functions given in Equations (2.27)-(2.30) [5].

h[n] = hd[n]w[n] (2.25)

Table 1: Window characteristics [5]

Window Sidelobe level [dB] Transition band [Hz] Stopband rejection [dB] Rectangular -13 4π/(M + 1) 21 Bartlett -25 8π/(M + 1) 26 Hann -31 8π/(M + 1) 44 Hamming -41 8π/(M + 1) 53 Blackman -57 12π/(M + 1) 74

The rectangular window function is given by ( 1, 0 ≤ n ≤ M w[n] = (2.26) 0, otherwise.

The Bartlett window can be implemented by using  2n/M, 0 ≤ n ≤ M/2,M even  w[n] = 2 − 2n/M, M/2 < n ≤ M (2.27) 0, otherwise.

The Hann window is defined as ( 0.5 − 0.5cos(2πn/M), 0 ≤ n ≤ M w[n] = (2.28) 0, otherwise.

The Hamming window function is given by ( 0.54 − 0.46cos(2πn/M), 0 ≤ n ≤ M w[n] = (2.29) 0, otherwise.

The Blackman window can be implemented by using ( 0.42 − 0.5cos(2πn/M) + 0.08cos(4πn/M), 0 ≤ n ≤ M w[n] = (2.30) 0, otherwise.

If the impulse response of the filter which amplitude response is illustrated in figure 2.12 is multiplied by a Hamming window, the corresponding amplitude response becomes as illustrated in figure 2.13. The transition bandwidth is wider than before, but the attenua- tion of frequency components within the entire stopband has been improved significantly. The choice of window function should be based on the application requirements, since the

16 stopband attenuation is critical for some applications, while a narrow transition band- width is more important in others.

20

0

-20

-40

-60

-80

-100

-120 0 0.2 0.4 0.6 0.8 1

Figure 2.13: The amplitude response of a 32nd order FIR filter when the truncated impulse response is multiplied by a Hamming window.

The last procedure when designing a FIR filter with unity passband gain is to scale the co- efficients, in order to adjust the gain. This procedure is explained in section 2.6.1.3

2.6.1.3 Passband unity gain

To guarantee unity gain in the passband, a normalization gain [4] is calculated according to N−1 X G = h[n]e−jωn. (2.31) n=0 Where ω is  0, for LP and BS filter  ω = 1, for HP filter (2.32)  π(fcl + fcu)/fs, for BP filter. The filter coefficients are then normalized by the gain using

h[n] h[n] = . (2.33) norm G

17 2.6.1.4 Realizations

The simplest approach when implementing a FIR filter is to use the difference Equa- tion (2.19). This realization applies for all types of FIR filters and is called the direct form. In Figure 2.14 it is clear that M addition operations and delay elements are used to calculate the output based on a new input of a filter of order M, also M + 1 multipliers are used.

x[n − 1] x[n − 2] x[n − (M − 1)] x[n − M] x[n] z−1 z−1 ··· z−1

h[0] h[1] h[2] h[M − 1] h[M]

y[n] + + ··· + +

Figure 2.14: FIR filter realization in direct form.

Since the window method is used to design the filters, all filters will have a linear phase response due to the symmetric filter coefficients that are obtained. In general, a linear phase shift is obtained when the impulse response of the filter is symmetric or antisym- metric according to

h[n] = ±h[M − n], 0 ≤ n ≤ M. (2.34) In such cases, the direct form realization can be considerably improved [5]. A filter where M is even and the impulse response is symmetric, is called a type-I system. The output can be calculated by

M −1 X2 M M y[n] = h[k](x[n − k] + x[n − M + k]) + h[ ]x[n − ]. (2.35) 2 2 k=0 If M is odd and the impulse response is symmetric the system is called a type-II system instead. The efficiency of the algorithm for determine the output can be considerably improved by using

M−1 X2 y[n] = h[k](x[n − k] + x[n − M + k]) . (2.36) k=0 A system is called a type-III if M is even and the impulse response is antisymmetric, the output can be calculated by

M −1 X2 y[n] = h[k](x[n − k] − x[n − M + k]) . (2.37) k=0

18 A filter where M is odd and the impulse response is antisymmetric, is called a type-IV system, the output can be determined by using

M−1 X2 y[n] = h[k](x[n − k] − x[n − M + k]) . (2.38) k=0

M By using the realizations above, a reduction of multiplications from M + 1 to 2 + 1 for M+1 filters where M is even and from M +1 to 2 for filters where M is odd, can be achieved [5].

2.6.2 Infinite impulse response filters

Unlike the design of FIR filter using the window method, the design of an IIR filter is not based on an ideal filter approximation. Instead an analog filter is considered as a template. The requirement of the filter to be designed should be considered when the filter template is chosen. The frequency response differs a lot between the template filters. The frequency responses of two common template filters are shown in Figure 2.15. The maximum flat frequency response is achieved when using the Butterworth filter at the expense of the width of the transition band. If ripple in the passband is not critical, a Chebyshev I filter, which has a more narrow transition band, might be a good choice. The transfer function of an IIR filter is given by eq. (2.18), where N is the filter order.

10 Butterworth 0 Chebyshev I

-10

-20

-30

-40

-50 Attenuation [dB] -60

-70

-80

-90 0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 Normalized Frequency [ rad/sample]

Figure 2.15: Frequency response of a 6th order Butterworth filter and Chebyshev I filter.

19 2.6.2.1 Analog prototype filters

Butterworth filter

The Butterworth filter has a maximum flat amplitude response in the passband, but the transition band is relatively wide compared to other analog filters at the same order. The cutoff frequency of the filter is defined as the frequency where the attenuation is -3 dB. The amplitude response of the 6th order Butterworth filter is illustrated in Figure 2.15, where the cutoff frequency is set to 0.3fs/2. The analog Butterworth filter is an all-pole filter, thus it does not have any zeros in the s-domain. The general transfer function is expressed as

N ωc H(s) = G N , (2.39) Πk=1(s − pk)

where G is the passband gain, N is the filter order and ωc is the cutoff frequency. The pole location in the s-domain is determined by

pk = σk + jΩk, (2.40)

where σk is given by σk = ωc · cos(θk) (2.41) and Ωk are given by Ωk = ωc · sin(θk). (2.42)

To achieve the maximal flat passband property, it can be shown that θk for a stable Butterworth filter, i.e. all poles are located in left half s-plane, is given by eq. (2.43) [5]. π 2k − 1 θ + π , k = 1, 2,...,N (2.43) k , 2 2N

Chebyshev I filter

Unlike the Butterworth filter, the Chebyshev I filter has ripple in the passband, but a narrower transition band. The Chebyshev I filter cutoff frequency is defined as the frequency where |H(jω)| is equal to the passband ripple before being attenuated even more. This corresponds to 1 |H(jω)| = , (2.44) 1 − 2 where ε is given by p ε = 100.1Ap − 1 (2.45) th and Ap is the passband ripple in dB. The amplitude response of the 6 order Chebyshev I filter with the passband ripple factor set to 3 dB and cutoff frequency 0.3fs/2 is illustrated in Figure 2.15.

20 Like the Butterworth filter, the analog Chebyshev I filter is an all-pole filter, thus it does not have any zeros in the s-domain. The general transfer function is expressed as 1 H(jω) = G N , (2.46) Πk=1(s − pk) where N is the filter order, G is the passband gain and is determined by eq. (2.47). √ ( 2 N 1/ 1 + ε , N even G = Π (−pk) × (2.47) k=1 1, N odd

The pole location in the s-domain is determined by

pk = σk + jΩk, (2.48)

where σk is given by σk = ωc · sinh(φ)cos(θk), (2.49)

Ωk is given by Ωk = ωc · cosh(φ)sin(θk) (2.50) and 1 1 φ sinh−1 . (2.51) , N ε

To achieve the limited ripple property, it can be shown that θk for a stable Chebyshev filter is given by π 2k − 1 θ = + π , k = 1, 2,...,N. (2.52) k 2 2N

2.6.2.2 Second order sections

A commonly used method when designing filters of various order is to cascade 1st and 2nd order filters. By using this method it is possible to obtain for example a 7th order filter by combining three 2nd order filters and one 1st order filter. The output of one filter serves as the input of the next one, illustrated in Figure 2.16. This method significantly simplifies the complexity of designing higher orders filters.

x(t) = x1(t) x2(t) xk(t) y(t) H1(s) H2(s) ··· Hk(s) y1(t) y2(t)

Figure 2.16: Filter cascaded for realization of an N th order filter.

When designing a filter using second-order sections, the poles of the sub-filters must be located at the same location as for the equivalent reference filter to achieve the same characteristics. In Figure 2.17 the pole locations of a normalized 7th order low pass Butterworth filter are shown. To get the equivalent filter by using second-order sections,

21 one section has to have complex conjugated poles located as P1 and P7, another section has to contribute with poles located as P2 and P6, the last second-order section must have poles located as P3 and P5. Since the filter is an odd order filter, a first-order section is used with one pole located as P4.

Pole-Zero Map

1 P1 0.8 P2 ) 0.6 -1 0.4 P3 0.2

0 P4

-0.2

-0.4 P5

Imaginary Axis (seconds -0.6 P6 -0.8 P7 -1

-1 -0.5 0 0.5 1 Real Axis (seconds-1) Figure 2.17: Pole locations of a 7th order normalized low pass butterworth filter.

2.6.2.3 Mapping s-plane to z-plane

When using analog reference filters it is necessary to map H(s) to H(z), since a digital filter is to be designed. There are different methods for converting the system, such as the impulse invariant design, the matched z-transform and the bilinear transformation. The impulse invariant design is the simplest approach, but only works well for LP and BP where H(ω) approaches zero for large values of ω [3]. The matched z-transform is a special case of the impulse invariant design, and is not very commonly used since it has no specific advantages. The most frequently used method is the bilinear transform, which wraps the entire left half of the s-plane into the unit circle on the z-plane.

Before performing the bilinear transform, the requested cutoff frequency, ωd, of the digital filter has to be selected. To get the corresponding analog reference filter, the cutoff frequency of the digital filter is mapped to a corresponding analog cutoff frequency ωa. The mapping is done by using

2 ω ∆t ω ∆t ω = tan d = 2f tan d , (2.53) a ∆t 2 s 2 where ∆t is the sampling interval. The bilinear transformation can then be performed by substituting s in the analog filter transfer function by

22 2(1 − z−1) (1 − z−1) s = = 2f . (2.54) ∆t(1 + z−1) s (1 + z−1) In this way, the transfer function of a digital filter is obtained by using an analog reference filter.

2.6.2.4 Filter type transformation

A commonly used method when designing an IIR filter of type HP, BP or BS is to use an analog LP reference filter. The reference filter if first transform it into the z-domain and than transform it into an HP, BP or a BS filter. To convert the LP filter into an HP filter, the transfer function is changed according to

HHP (z) = HLP (−z). (2.55)

The cutoff frequency of the HP filter, ωcHP , is given by ω ω = s − ω , (2.56) cHP 2 cLP where ωs = 2πfs and ωcLP is the cutoff frequency. To convert the LP filter into a BP filter, z−1 in the LP reference filter design is substituted by

−z−1(z−1 − α) z−1 = . (2.57) LP 1 − αz−1 Where α is given by h i cos π(ωcu+ωcl) ωs α = h i, (2.58) cos π(ωcu−ωcl) ωs

where ωcl and ωcu are the corner frequencies. The cutoff frequency of the LP reference filter is determined by

ωcLP = ωcu − ωcl. (2.59) To convert the LP filter into a BS filter, z−1 in the LP reference filter design is substituted by z−1(z−1 − α) z−1 = , (2.60) LP 1 − αz−1 where α is given by eq. (2.58). The cutoff frequency of the LP reference filter is deter- mined by ω ω = s − (ω − ω ). (2.61) cLP 2 cu cl

23 2.6.2.5 Calculation of IIR filter coefficients

In this section, the derivation of the second order section filter coefficients for a LP filter is performed, using the theory from section 2.6.2.1-2.6.2.3. During the derivation, the analog Butterworth filter is used as a reference filter. The algebraic expressions for the LP, HP, BP and the BS second order section filter coefficients can be found in appendix A. The expressions are available for both the Butterworth and the Chebyshev I reference filter. By using eq. (2.39) the transfer function of a 2nd order Butterworth filter is determined to

ω2 H(s) = a , (s − p1)(s − p2)

where ωa is given by eq. (2.53). The poles located in the s-plane is expressed as p1 = (σ1 + jΩ1) and p2 = (σ2 − jΩ2) , where the substitution σ1 = σ2 = σ and Ω1 = −Ω2 = Ω is done. The imaginary part of the transfer function is canceled and be- comes

ω2 H(s) = a (s − (σ + jΩ))(s − (σ − jΩ)) ω2 = a 2 2 2 2 s + 2σs + ωa · (σ + Ω ) | {z } 2 2 cos (θk)+sin (θk)=1 2 ωa = 2 2 , s + 2σs + ωa thus the transfer function of the general 2nd order analog filter is achieved. The bilinear transformation presented in Section 2.6.2.3 is now used to map the transfer function H(s) → H(z) by using the substitution in eq. (2.54). This results in

2 2 −1 2 −2 ωa + 2ωaz + ωaz H(z) = 2 2 2 −1 2 −1 2 −2 2 −2 −2 , (2.62) ωa + 4fs + 4fsσ + 2ωaz − 8fs z + ωaz + 4fs z − 4fsσz from where the filter coefficients can be determined to

24 2 2 2ωa − 8fs a1 = 2 2 , ωa + 4fsσ + 4fs 2 2 ωa − 4fsσ + 4fs a2 = 2 2 , ωa + 4fsσ + 4fs 2 ωa b0 = 2 2 , ωa + 4fsσ + 4fs 2 2ωa b1 = 2 2 , ωa + 4fsσ + 4fs 2 ωa b2 = 2 2 . ωa + 4fsσ + 4fs

−1 To obtain an HP,BP or BS filter the substitution of zLP in eq. (2.62) is done according to section 2.6.2.4.

2.6.2.6 Realizations

When implementing a filter using second-order sections, different realizations can be used. The most straightforward implementation is using the difference equation in eq. (2.16) to calculate the output of each section, this algorithm is called direct form I. By using the properties that Linear Time Invariant (LTI) filters commute, it is possible to rearrange the filters in a way that the number of delay blocks is reduced to half and therefore reduce the memory needed when performing the filtering algorithm. This realization is called direct form II and is commonly used because of the efficient memory usage. The output of each filter section is calculated by using eq. (2.63) and (2.64).

b0 w[n] b0 x[n] + y[n] x[n] + + y[n] z−1 z−1 −a1 b b1 −a1 1 + + z−1 + z−1 z−1 −a2 b b2 −a2 2 + z−1 (a) (b)

Figure 2.18: Two common IIR filter realizations are the direct form I realization, illus- trated in Figure 2.18a and the direct form II realization illustrated in Figure 2.18b.

w[n] = x[n] − a1w[n − 1] − a2w[n − 2] (2.63)

y[n] = b0w[n] + b1w[n − 1] + b2w[n − 2] (2.64)

25 2.7 Digital to analog conversion

To convert a signal from the DT domain to the CT domain, a DAC can be used. The DAC is a unit which can output a constant voltage within a certain voltage interval, and update the output voltage by the selected sampling frequency. Data in the DAC output register is quantized to specific voltage levels which are dependent on the resolution of the DAC. For example, a 12-bit linear DAC working within the voltage range 0-3.3 V can output 212 = 4096 different voltage levels within the interval 0-3.3 V that are uni- formly distributed. The output is updated at the configured sampling frequency, and will therefore act as an ac-signal.

2.8 Reconstruction filter

If the spectral content of the output signal from the DAC is analyzed, the result will show that there are frequency components at the sampling frequency and its harmonics. This is because the analog signal is sampled into a DT signal, which is sampled by a constant time interval. To remove the distortion introduced by the sampling, a RECF can be used. The RECF is a LP filter, typically with the same cutoff frequency as the AAF.

26 3 Hardware implementation

In this section, the selection of components and dimensioning of circuits is described. Also, a platform for assembling a robust and reliable prototype is designed.

3.1 Design of analog signal chain

In this section the different blocks in the analog signal chain are illustrated in figure 3.1. Since the goal is to achieve a filter bank that is universal, the user should not only be able to select some of the predefined sampling frequencies presented in Table 2, but also be able to set a custom sampling frequency. For rerouting the signal depending on the user settings, multiplexers and demultiplexers are used.

Signal conditioner AAF1 D M M AAF2 vin DC-blocker DC-adaption U ADC U AAF3 X X

Circuit protection RECF1 D M Current RECF2 M vout Buffer DC-blocker U DAC limiter U X RECF3 X

Figure 3.1: Block diagram describing the connection of hardware for each channel of the system.

3.1.1 DC-blocker

To avoid saturation of the ADC when converting the input signal into a DT signal, the input signal has to be restricted to 0 ≤ vin ≤ 3.3V. In order to avoid saturation due to an offset of the input signal, an HP filter is designed to remove the any DC-component. A Bessel filter is designed using the filter wizard [6]. A Bessel filter is used to preserve the ability to obtain a linear phase shift through the system. The -3 dB cutoff frequency is set to 1 Hz, which is considered low enough to not affect any signal likely in the system. The simulation of the filter frequency and phase response is done using LTspice[7] and the result is presented in section 5.1.1.

27 3.1.2 DC-adaption

In order to exploit the entire dynamic range of the ADC, an offset is added to the input signal after the DC-block circuit. The offset is added using a differential amplifier, explained in section 2.3. By selecting resistor values according to eq. (2.6), the following values are selected

R1 = 61.9 kΩ,R2 = 20.5 kΩ,R3 = R4 = 10 kΩ (3.1)

By selecting these values, the offset becomes approximately 3.3/2=1.65 volts.

3.1.3 Anti-aliasing and reconstruction filter

The configuration of which AAF and RECF that is used is based on the choice of sampling frequency. When one of the predefined sampling frequencies is selected, the corresponding filters are connected to the channel. Each filter has a cutoff frequency corresponding to fs/2 , presented in Table 2. If the selected sampling frequency is none of the predefined frequencies, the signal is bypassed.

Table 2: The three predefined sampling frequencies and the corresponding cutoff frequen- cies of the anti-aliasing filter which is selected.

Filter ID Sampling frequency [kHz] Cutoff frequency [kHz] AAF1, RECF1 16 8 AAF2, RECF2 48 24 AAF3, RECF3 96 48

An advantage of FIR filters are that it is possible to achieve a linear phase shift, thus this is also a criterion of the AAF and RECF design in order to preserve this property. Because of this criteria, Bessel filters are used as AAFs. The filters are designed using the filter wizard [6]. The designed filters are 4th order Bessel filters with cutoff frequency according to fs/2 . The filters are implemented using the Sallen-Key architecture described in section 2.2. The filters designed using the filter wizard is somewhat modified since not all the com- ponent values are available. After the filters are modified, a simulation of the filters is performed using the new component values to ensure that the cutoff frequency is not changed too much and that the linear phase shift is maintained according to eq. (2.1). The simulations are done using the electronics simulation program LTspice [7] and the results are presented in section 5.1.2.

3.1.4 Buffer

Since the maximum output current of the DAC is 25 mA [8], a buffer circuit is used to increase the maximum current at the output of the channel. An OP-amplifier is used as

28 a buffer, where the high impedance at the + and - terminals are used together with the low impedance at the output. By using the voltage follower in Figure 3.2, the maximum output current of the circuit is 250 mA [9].

v− − vout v vin + +

Figure 3.2: An OP-amplifier used as a voltage follower to increase the maximum output current of the circuit.

3.1.5 Current limiter

To reduce the risk of breaking the circuit in case of a short circuit at the output, a current limiter circuit is used. The maximum output current of the circuit is 250 mA [9], therefore a resettable fuse [10] is used to prevent the output current to exceed 200 mA. The reset- table fuse is a passive component, which has an initially low resistance, typically a couple of ohm’s. If the current exceeds a certain level, the resistance increasing dramatically due to a positive temperature coefficient, thus the current will decrease.

3.2 Microcontroller

The MCU used in this project is the STM32f407 [8], which is a 32-bit high-performance MCU with a maximum clock frequency at 168 MHz. It has a Direct Memory Access (DMA) unit which makes it possible to transfer data between different register, from register to peripherals and vice versa without using the Central Processing Unit (CPU). The MCU is equipped with a two-channel, 12-bit DAC with a maximum sampling rate at 1 MSPS. It also has three 16-channel, 12-bit ADCs , each with a maximum sampling rate of 2.4 MSPS. The STM32F407 is chosen because it appears to suit the project with all the peripherals available, but also because of experience and knowledge of this MCU already exists. During the development of the filter bank, the STM32F4-Discovery board is used [11], shown in Figure 3.3. The STM32F4-Discovery board is an evaluation board that allows easy connection to an extensive number of General-Purpose Input/Output (GPIO) pins, many of these pins can be configured and connected to other peripherals, such as ADC and DAC. Since the STM32F4-Discovery board already is equipped with a programming circuit, there is no need of an external programmer.

29 Figure 3.3: The STM32F4-Discovery board [11].

3.3 User interface

To make it possible to design filter without the need of reprogramming the filter bank each time, a user interface is designed. A 4x4 matrix keypad is used to let the user interact with the filter bank. By using such a keypad, 16 different buttons are implemented by using 8 GPIO pins. The particular keypad used in this project is shown in Figure 3.4a. Figure 3.4b shows the schematics of the keypad, where each node represents a button.

Four GPIO pins are connected to vin1 − vin4 , where each pin is set to a digital high state one at a time, while all the others are set to low. If a button is pressed the corresponding

node appears as a short circuit, thus one of vvout1 −vvout4 is set to high. By knowing which of the input signals that is set to high, while reading the output signals, it is possible to determine which button that is being pressed. While the filter bank is waiting for the

user to press a button, it keeps polling the GPIO pins that are connected to vvout1 −vvout4

at high speed while toggling the vin1 − vin4 pins to be sure not to miss any button pressed by the user.

30 vin4

vin3

vin2

vin1

vout4 vout3 vout2 vout1 (a) (b)

Figure 3.4: The 4x4 matrix keypad in Figure 3.4a [12], and the corresponding schematics in Figure 3.4b.

To present a menu system to the user, the filter bank is using the 2x16 matrix Liquid- Crystal Display (LCD) [13], shown in Figure 3.5. The MCU is using four GPIO pins to communicate with the LCD. Except for the GPIO pins at the LCD, there are additional pins being used for enabling background light, adjusting the contrast and power supply connection. When implementing the LCD, an already available library is used [14].

Figure 3.5: The HD44780 LCD, used in the project [15].

3.4 Printed circuit board

A 110x125 mm, two layer PCB is designed by using Altium Designer 16, to get a proper and reliable prototype. The distances between components are generously proportioned to ease the soldering process, which is done by hand.

31 3.5 3D-printed cover

To protect the electronics from external stress and to provide a solid impression, a cover is designed using SolidWorks, which is a solid modeling computer-aided design program. Four BNC-connectors are attached to the cover to provide an easy and robust connection. The cover is printed by using a 3D-printer. In Figure 3.6, the front of the cover model is shown. The input signals can be connected to one of the leftmost BNC-connectors, and the output signal is available at any the rightmost BNC-connectors which is configured to give an output.

Figure 3.6: A front view of the 3D-model.

In Figure 3.7 a side view of the filter bank cover model is shown.

32 Figure 3.7: A side view of the 3D-model.

33 4 Software implementation

This section explains how the filter bank is implemented in software and the different building blocks that the filter bank is based upon. The programming language that is used to implement the filter bank is C, which is a low-level language that is commonly used for programming embedded systems. The filter bank is based on two types of structures, the filter structure explained in section 4.2 and the output structure explained in section 4.3. A structure is a complex data type declaration used in C to define a variable type which consists of other variables of any type such as integers, floating, characters, etc. To clarify how a structure variable works, an example of how to declare a new structure variable named ”car” and how to access the variables within the structure is shown in Listing 1.

1 typedef struct{//Declaring the car structure uint32_t weight; 3 char *color; char *brand; 5 float length; } car ; 7 car first_car;//Creating the variable first_car of type car 9 first_car.length = 5.1;// Set variables within the car structure 11 first_car.brand ="Mercedes"; first_car.color ="Blue"; 13 first_car.weight = 1520; Listing 1: Declaration and initialization of a car structure.

C also provides a variable type called pointer, which instead of storing a variable value, stores the register location to the variable. Pointers are sometimes necessary to use when a global variable changes value inside a function. If a pointer is not used, the global variable will not change value outside the scope of the function. In this project, the structures are connected to each other by using pointers. An overview of the connections in an example system is illustrated in figure 4.1. Each filter structure represents a filter, and the output structures connects the output of the filters to the DACs.

34 Data transfer Pointer

ADC1 data DMA Filter Filter Output1 DAC1 output register structure structure structure register

ADC2 data DMA Filter Output2 DAC2 output register structure structure register

Figure 4.1: The connections and data transfer in the filter bank.

4.1 Filter design algorithms

The windowing approach from section 2.6.1 is implemented in the filter bank to design FIR filters based on user input. The window functions available are specified in Table 1. Since the windowing approach is used, all FIR filters will be of type-I and type-II. Hence, the filters are implemented using the realizations described by eq. (2.35) and (2.36) in section 2.6.1.4. If an IIR filter is selected by the user, the second order sections method in section 2.6.2.2 is used. By using this method it is possible to design a wide variety of filters by using a very general implementation. Because the amount of memory in the MCU is not an issue and because performance is the main priority, the direct form I realization is used for IIR filters. As illustrated in Figure 2.18b, direct form II are using less memory, but one more addition in each section is needed in comparison to direct form I illustrated in Figure 2.18a.

4.2 Filter structure

To implement the different filters in the MCU, a filter structure is used. The structure is illustrated in Figure 4.2 and is showing the key variables of the filter. The filter retrieves the input signal by using an array containing pointers to sources. A source is either a filter output or an ADC data register. The input signal is stored in a circular buffer called input[ ], this is because both the FIR and the IIR filter algorithm need access to previous input values.

35 Filter structure

input[ ] output

∗ptr input[ ] second order sections output[ ][ ] filter order filter ID filter type filter model reference filter window function a IIR[ ][ ] b IIR[ ][ ] b FIR[ ]

Figure 4.2: The filter structure used for implementing filters in filter bank.

During the initialization process at the start-up of the filter bank, an array of filter structures is declared, where all filters get the status ”unused”. Each filter structure in the array can then be configured by the user. Once a filter is configured, the filter status is set to ”used”. In case the filter is an IIR filter, the coefficients for each second order section is stored in matrices a IIR[ ][ ] and b IIR[ ][ ], where the coefficients for the nth section is stored in the nth row. Since the output of one section serves as input to the next section, and the output of a section is dependent on previous outputs, a matrix containing the outputs from all sections is used. In this way, all sections except the first also have access to its previous inputs. In case the filter is a FIR filter, the coefficients is stored in a vector b FIR[ ]. The filter type variable is used by the filtering function for determining whether the filter is a FIR or IIR filter, i.e determine which filtering algorithm to perform.

4.3 Output structure

To generate an analog CT signal at the output of the filter bank, at least one filter structure has to be connected to an ADC. This is done by introducing a channel output structure illustrated in Figure 4.3. The structure containing an array of pointers, which are pointing to the output of one or multiple filter structures explained in Section 4.2. The nr outputs variable is used to keep track of how many filters that are connected to the output structure.

36 Channel output structure

∗ptr output source[ ] nr outputs

Figure 4.3: The channel output structure used for connecting filter structures to a DAC.

A function with a channel output structure as input parameter is then returning the output value of the channel, which is written to the DAC data register.

4.4 Filter bank algorithm

In Figure 4.4, the connections and data transfer in a MIMO system are illustrated. DMA is used to transfer data from the ADC data register to an array containing the latest conversions. A filter is connected to each of the ADC’s by using pointers to the corresponding element in the array. In this example two filters are cascaded, where the second filter using a pointer to the output of the first filter to get its input. In the same way, the output structures are using pointers to the filter outputs. The output structure is then connected to the DAC output register.

Data transfer Pointer

ADC1 data DMA Filter Filter Output1 DAC1 output register structure structure structure register

ADC2 data DMA Filter Output2 DAC2 output register structure structure register

Figure 4.4: The connections and data transfer in the filter bank.

A timer is used to trigger the ADC when it reaches a certain value corresponding to the sampling frequency. When the conversion is done, an interrupt is triggered and the program enters an interrupt service routine. The data is now transferred to the array, to which the filters are connected. The filters summing the input signals if multiple inputs are connected, then calculating the new output. The filters are executed in the same order as they are initialized. When all filters are executed, the output structure summing the signals connected to the corresponding output and writes the value to the DAC output register. When the new output is written to the DAC output register, the program exit the interrupt service routine.

37 To ensure that the filter bank has time to compute the output before a new analog to digital conversion is performed, one of the timers in the MCU is used. The timer is used to measure the number of clock cycles passing from when a new output is computed until when a new data from an analog to digital conversion is available. If no time passes, an overload has been detected and the filter bank sets all DAC output registers to zero and the LCD displays ”Overload”. By using this solution, no specific maximum sampling frequency can be specified. The maximum sampling frequency is depending on the number of filters and the corresponding filter orders. This said, there is a trade-off between filter order and sampling frequency. If a low filter order is used, a high sampling frequency can be attained since a low order filter does not need as many CPU clock cycles to be computed as a higher order filter.

4.5 User interface menu system

To make it possible to configure the filter bank without reprogramming the unit, a user interface is designed to allow interaction between the user and the filter bank. The user interface needs to provide a possibility to select a sampling frequency, add new filters to the system, make connections between different filters or between a filter and an ADC, it also has to be possible to connect filters to any of the DAC’s. In Figure 4.5 the flowchart of the start-up sequence in illustrated. When the filter bank unit is powered up, the sampling frequency is selected by the user. Once the sampling frequency is selected the user interface enters the main menu.

38 Figure 4.5: Flowchart describing the start up sequence and the main menu of the filter bank unit.

At start-up there are no filters initialized, thus the user has to add a new filter in order to get an output signal. When the user is selecting ”Add new filter” in the main menu, the user interface enters the add new filter menu illustrated by the flowchart in Figure 4.6, where all the design properties of the filter are selected.

39 Figure 4.6: Flowchart describing the algorithm for adding a new filter.

After a new filter is initialized, it does not have any input signal, thus an signal has to

40 be connected to the input of the filter. The flowchart of the add filter input menu is illustrated in Figure 4.7. Through the user interface, the user decides to which filter an input signal should be added, also whether to connect the filter to an ADC or to an output of an already existing filter.

Figure 4.7: Flowchart describing the algorithm for adding a new filter.

When selecting ”Add output” in the main menu, the add output menu is entered. Through the user interface, the user decides which signal to be added to an output channel and also which output channel to add the signal to. This is illustrated in Figure 4.8.

41 Figure 4.8: Flowchart describing the algorithm for connecting a filter to an output.

When all configurations are done and ”Run” is selected in the main menu, the filter bank algorithm starts to be executed.

42 5 Results

The results from the hardware simulation performed in section 3.1.1 and the results of the implementation of the AAFs and the RECFs in section 3.1.3 are presented together with the PCB and the final prototype in section 5.1. The results from validating the filter design algorithms and the filter bank algorithm in section 4.4 are presented in section 5.2 together with an example of how to configure the filter bank using the user interface from section 4.5.

5.1 Hardware

5.1.1 DC-blocker

The amplitude response obtained by simulation of the DC-blocker, which is a 1st order Bessel filter, using LTspice is presented in Figure 5.1. The filter has a cutoff frequency at 1Hz, and a flat amplitude response for frequencies 10 Hz ≤ f ≤ 200 kHz. The same filter design is used for both DC-blockers in figure 1.2.

10

5

0

-5

-10

-15

-20

-25

-30 10-1 100 101 102 103 104 105

Figure 5.1: The amplitude response of the HP filter that is used to remove any offset from the input signal and from the output signal from the DAC.

The phase response obtained by simulation of the DC-blocker using LTspice is presented in Figure 5.2. The simulation confirms that the requirements of a filter with flat amplitude and linear phase response within the passband is obtained with the selected component values.

43 5

0

-5

-10

-15

-20 0 0.2 0.4 0.6 0.8 1 1.2 1.4 1.6 1.8 2 105

Figure 5.2: The linear phase response of the HP filter that is used to remove any offset from the input signal or from the output signal from the DAC.

5.1.2 Anti-aliasing filter and reconstruction filters

In this section, the results of the simulation and implementation of the AAFs and the RECFs are presented. In Figure 5.3 the results of the simulation of AAF1 is presented. The -3 dB cutoff frequency appears to be located at approximately 7 kHz instead of 8 kHz corresponding to fs/2. This is due to lack of components values, which resulted in that some components had to be replaced. However the phase response of the filter still appears to be linear within the passband 0 < f < 7 kHz.

44 5 300 Attenuation 0 Phase 200 -5 100 -10 0 -15 -100 -20

-25 -200

-30 -300 0 5 10 15 20

Figure 5.3: The resulting amplitude response and phase response of the AAF and RECF that is used when the sampling frequency is set to 16 kHz.

In figure 5.4 the amplitude and phase response of the implemented filter is compared to the theoretical expectation.

10 200 Implementation Implementation Theoretical Theoretical 0 100

-10 0

-20 -100

-30 -200 0 5 10 15 20 0 5 10 15 20

(a) (b)

Figure 5.4: The amplitude response of the AAF1 and RECF1 is compared to the theoret- ical amplitude response in Figure 5.4a. The phase response of the implemented filters are compared to the theoretical expectation in Figure 5.4b.

In Figure 5.5 the results of the simulation of AAF2 is presented. The -3 dB cutoff frequency is located at approximately 24 kHz which corresponds to fs/2. The phase response of the filters still appears to be linear within the passband 0 < f < 24 kHz.

45 5 300 Attenuation 0 Phase 200 -5 100 -10 0 -15 -100 -20

-25 -200

-30 -300 0 5 10 15 20 25 30 35 40 45

Figure 5.5: The resulting amplitude response and phase response of the AAF and RECF that is used when the sampling frequency is set to 48 kHz.

In figure 5.6 the amplitude response of the implemented filter is compared to the theo- retical filter.

10 200 Implementation Implementation Theoretical Theoretical 0 100

-10 0

-20 -100

-30 -200 0 10 20 30 40 0 10 20 30 40

(a) (b)

Figure 5.6: The amplitude response of the AAF2 and RECF2 is compared to the the- oretical amplitude response in Figure 5.6a. In Figure 5.6b the phase response of the implemented filters are compared to the theoretical expectation.

In Figure 5.7 the results of the simulation of AAF3 is presented. The -3 dB cutoff frequency appears to be located at approximately 48 kHz which corresponds to fs/2. The phase response of the filters still appears to be linear within the passband 0 < f < 48 kHz.

46 5 300 Attenuation 0 Phase 200 -5 100 -10 0 -15 -100 -20

-25 -200

-30 -300 0 10 20 30 40 50 60 70 80 90

Figure 5.7: The resulting amplitude response and phase response of the AAF and RECF that is used when the sampling frequency is set to 96 kHz.

In figure 5.8 the amplitude response of the implemented filter is compared to the theo- retical filter.

10 200 Implementation Implementation Theoretical Theoretical 0 100

-10 0

-20 -100

-30 -200 0 20 40 60 80 0 20 40 60 80

(a) (b)

Figure 5.8: The amplitude response of the AAF3 and RECF3 is compared to the theoret- ical amplitude response in Figure 5.8a. The phase response of the implemented filters are compared to the theoretical expectation in Figure 5.8b.

47 5.1.3 Prototype

The result of the PCB design in section 3.4 after all components have been soldered on to it, is shown in figure 5.9. The turquoise rectangle encloses the connectors for the input signal of both channels. The yellow rectangle marks the DC-blocker and the DC-adaption circuits. The red rectangles marks the AAFs and the blue rectangles encloses the RECFs of both channels. The buffers and current limiters are marked by the purple rectangle. The output signal connectors are enclosed by the green rectangle. Connectors are used for easily connecting the LCD, keypad and a programmer to program the MCU. Because of displacement of the capacitors in the oscillator circuit and that a resistor was forgotten, it is not possible to use the crystal to generate a clock signal for the CPU.

Figure 5.9: The filterbank PCB.

The resulting prototype after the PCB, the electronics for controlling the user interface in section 3.3 and the 3D-printed cover from section 3.5 have been put together is shown in figure 5.10 and 5.11.

48 Figure 5.10: A front view of the finished prototype.

Figure 5.11: A side view of the finished prototype.

49 5.2 Software

5.2.1 Filter validation

5.2.1.1 Validation of FIR filter design algorithm

All FIR filter design algorithms are validated by using the signal processing toolbox in MATLAB R2015b. The different filter models such as LP, HP, BP and BS are validated but not all the results for the different filter models are presented. The function fir1 in the signal processing toolbox in MATLAB is used to generate a refer- ence filter, to which the FIR filter design algorithm in section 2.6.1, which is implemented in the filter bank is compared. The Hanning window is used to design all filters in this section. To get a graphical representation of the amplitude and phase response which is easy to evaluate, the function freqz is used, which is included signal processing toolbox.

In Figure 5.12 the amplitude and phase response of a 32th order BP filter are pre- sented,using both designing methods. By comparing Figure 5.12a to Figure 5.12b, it is clear that the amplitude and phase response of the two filters are very similar.

50 20 20

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-1400 -1400

-1600 -1600 0 0.2 0.4 0.6 0.8 1 0 0.2 0.4 0.6 0.8 1

(a) (b)

Figure 5.12: The obtained theoretical amplitude and phase response when designing a 32nd order BP filter using the MATLAB signal processing toolbox is illustrated in Figure 5.12a. Figure 5.12b illustrates the corresponding amplitude and phase response when using the filter bank script. The x-axis is normalized to half sampling frequency and the cutoff frequencies are set to 0.1fs/2 and 0.4fs/2.

5.2.1.2 Validation of IIR filter design algorithm

All IIR filter design algorithms are validated by using the signal processing toolbox in MATLAB R2015b. The second order sections coefficients are generated by the IIR filter design algorithm in section 2.6.2, which is implemented in the filter bank. The filters are then cascaded by using the MATLAB functions dfilt.df1t and dfilt.cascade. The fre- quency response and phase response of a filter generated by the filter bank script can

51 then be compared to an equivalent filter generated by the built-in MATLAB functions. To get a graphical representation of the amplitude and phase response that is easy to evaluate, the function freqz is used, which is included signal processing toolbox.

In Figure 5.13 the amplitude and phase response of a 5th order BP filter are presented, using both designing methods. By comparing Figure 5.13a to Figure 5.13b, it is clear that the amplitude and phase response of the two filters are very similar.

0 0

-100 -100

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-600 -600

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-900 -900 0 0.2 0.4 0.6 0.8 1 0 0.2 0.4 0.6 0.8 1

(a) (b)

Figure 5.13: The obtained theoretical amplitude and phase response is illustrated when designing a 5th order BP butterworth filter using the MATLAB signal processing toolbox is illustrated in Figure 5.13a. Figure 5.13b illustrates the corresponding amplitude and phase response when using the filter bank script. The x-axis is normalized to half sampling frequency, the lower and upper cutoff frequency are set to 0.1fs/2 respectively 0.2fs/2.

52 The function cheb1 in the signal processing toolbox in MATLAB is used to generate a ref- erence filter, to which the Chebyshev filter generated by the filter bank script is compared. In Figure 5.14 the amplitude and phase response of a 7th order LP filter are presented,using both designing methods. By comparing Figure 5.14a to Figure 5.14b, it is clear that the amplitude and phase response of the two filters are close to identical.

MATLAB Chebyshev coefficients Filter bank Chebyshev coefficients

0 0

-100 -100

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-300 -300

-400 -400 Magnutide [dB] Magnutide [dB]

-500 -500

-600 -600 0 0.2 0.4 0.6 0.8 1 0 0.2 0.4 0.6 0.8 1 Normalized frequency [×π rad/sample] Normalized frequency [×π rad/sample]

0 0

-100 -100

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-500 -500 Phase [Degrees] Phase [Degrees]

-600 -600

-700 -700 0 0.2 0.4 0.6 0.8 1 0 0.2 0.4 0.6 0.8 1 Normalized frequency [×π rad/sample] Normalized frequency [×π rad/sample]

(a) (b)

Figure 5.14: The obtained theoretical amplitude and phase response is illustrated when designing a 7th order LP chebyshev filter with 0.5dB passband ripple using the MATLAB signal processing toolbox is illustrated in Figure 5.14a. Figure 5.14b illustrates the corre- sponding amplitude and phase response when using the filter bank script. The x-axis is normalized to half sampling frequency and the cutoff frequency set to 0.1fs/2.

53 5.2.1.3 Validation of filter bank implementation

When the design algorithms are confirmed, a validation of the filter bank implementation is performed. This is done by passing a sinusoidal signal trough the filter while performing a frequency sweep to verify the frequency and phase response of the different filters. This is to confirm that the implementation of the filters in the MCU is correct. A PicoScope 2205A [16] that is equipped with an arbitrary waveform generator, is used for performing the frequency sweep, where the step size is set to 10 Hz. The PicoScope is simultaneously performing an Fast Fourier Transform (FFT), which is configured to hold on to the maximum amplitude of each evaluated frequency component. By holding on to the maximum value, it possible to get the amplitude response of the implemented filter, without the need of passing white noise through the filter. During the validation, none of the AAFs are used. In Figure 5.15 the amplitude and phase response of the filter bank implementation of the 32nd order LP FIR filter in section 5.2.1.1 is plotted.

0 Implementation Implementation 0 Theoretical -100 Theoretical

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-300 -40 -400

-60 -500 0 0.2 0.4 0.6 0.8 1 0 0.05 0.1 0.15

(a) (b)

Figure 5.15: The amplitude response of the implemented 32nd order LP filter is compared to the theoretical amplitude response in Figure 5.15a. In Figure 5.15b the phase response of the implemented filter is compared to the theoretical phase response.

In Figure 5.16 the amplitude and phase response of the filter bank implementation of the 32nd order BP FIR filter in section 5.2.1.1 is plotted.

54 0 Implementation Implementation 0 Theoretical Theoretical

-500 -20

-1000 -40

-60 -1500 0 0.2 0.4 0.6 0.8 1 0 0.1 0.2 0.3 0.4 0.5

(a) (b)

Figure 5.16: The amplitude response of the implemented 32nd order BP filter is compared to the theoretical amplitude response in Figure 5.16a. In Figure 5.16b the phase response of the implemented filter is compared to the theoretical phase response.

In Figure 5.17 the amplitude and phase response of the filter bank implementation of the 8th order LP butterworth filter in section 5.2.1.2 is presented.

-100 Implementation Implementation 0 Theoretical -200 Theoretical

-20 -300

-400 -40 -500

-60 -600 0 0.2 0.4 0.6 0.8 1 0.05 0.1 0.15 0.2

(a) (b)

Figure 5.17: The amplitude response of the implemented 8th order butterworth filter is compared to the theoretical amplitude response in Figure 5.17a . In Figure 5.17b the phase response of the filter is compared to the theoretical phase response.

In Figure 5.18 the amplitude and phase response of the filter bank implementation of the 5th order BP butterworth filter in section 5.2.1.2 is presented.

55 200 Implementation Implementation 0 Theoretical 0 Theoretical

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-400 -40 -600

-60 -800 0 0.2 0.4 0.6 0.8 1 0.05 0.1 0.15 0.2 0.25

(a) (b)

Figure 5.18: The amplitude response of the implemented 5th order butterworth filter is compared to the theoretical amplitude response in Figure 5.18a . In Figure 5.18b the phase response of the filter is compared to the theoretical phase response.

In Figure 5.19 the amplitude and phase response of the filter bank implementation of the 7th order LP chebyshev filter in section 5.2.1.2 is plotted.

0 Implementation Implementation 0 Theoretical Theoretical

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-60 -600 0 0.2 0.4 0.6 0.8 1 0 0.05 0.1 0.15

(a) (b)

Figure 5.19: The amplitude response of the implemented 7th order chebyshev filter is compared to the theoretical amplitude response in Figure 5.19a . In Figure 5.19b the phase response of the filter is compared to the theoretical phase response.

56 200 Implementation Implementation 0 Theoretical 0 Theoretical

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-400 -40 -600

-60 -800 0 0.2 0.4 0.6 0.8 1 0.1 0.15 0.2 0.25

(a) (b)

Figure 5.20: The amplitude response of the implemented 5th order chebyshev filter is compared to the theoretical amplitude response in Figure 5.20a. In Figure 5.20b the phase response of the filter is compared to the theoretical phase response.

The most obvious difference when comparing the amplitude response of the theoretical filters and filter bank implementation is that the theoretical amplitude response does not take the noise floor or any other interference into account. Since a PicoScope is used as signal generator, which outputs a signal with amplitude 0.5 V, it is difficult to estimate the phase shift when the signal is strongly attenuated and additional interference from the surroundings is affecting the measurements. This is probably the reason why the measured phase response does not match the theoreti- cal phase response as well for highly attenuated frequencies as for frequencies with low attenuation. Even though the results from the evaluation of the different filters seem to correspond to the theory, the filter bank generates noise within the passband. The output frequency spectra of a LP filter with cutoff frequency set to 0.625fs/2, when no input signal is connected, is shown in Figure 5.21. The noise appears as evenly spread components of various amplitudes within the passband. The noise is probably an effect of that the internal oscillator is used to generate the CPU clock signal, which is not accurate enough. By calibrating the internal oscillator, it is possible to reduce the noise. This is not a solution to get rid of the problem permanently, since the oscillator frequency tends to drift due to ambient temperature.

57 0

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-80

0 0.2 0.4 0.6 0.8 1

Figure 5.21: The output frequency spectra of a LP filter with cutoff frequency set to 0.625fs/2, when no input signal is connected.

Figure 5.22 illustrates a SIMO configuration of the filter bank that is used to evaluate the filter bank while running multiple filters simultaneously. The LP filter designed is a 7th order Chebyshev filter, where the cutoff frequency is set to fc = 0.246fs/2. The BS filter th is a 4 order Butterworth filter, the corner frequencies are set to fc1 = 0.082fs/2 and th fc2 = 0.094fs/2. The BP filter is a 4 order Butterworth filter, the corner frequencies are set to fc1 = 0.328fs/2 and fc2 = 0.348fs/2. In Figure 5.23 the frequency spectra of the two output signals are presented.

BP

x1[n] + y1[n] x1(t) ADC1 LP BS + DAC1 y1(t)

y2[n] x2(t) ADC2 DAC2 y2(t)

Figure 5.22: Graphical representation of the filter bank SIMO configuration.

58 20 20

0 0

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-60 -60 0 0.2 0.4 0.6 0.8 1 0 0.2 0.4 0.6 0.8 1

(a) (b)

Figure 5.23: The amplitude responses of the two filter configurations resulting in the output signals y1(t) and y2(t) are shown in Figure 5.23a respectively 5.23b.

5.2.2 User interface

In this section, the resulting user interface will be presented by showing an example of how to setup an IIR BS filter. The sampling frequency used is 48 kHz, the lower cutoff frequency set to 2.2 kHz and the upper cutoff frequency set to 2.4 kHz. The up and down arrows at the keypad are used to toggle between the different alterna- tives in the multiple choice menus. To selected an alternative, the X-button is pressed. The -button can be pressed to erase typed in values if mistyping would occur. At start up, the user has to select a sampling frequency. The available sampling frequen- cies is 16 kHz, 48 kHz, 96 kHz or custom. In this example, 48 kHz is chosen as illustrated in figure 5.24.

Figure 5.24: 48kHz is selected as sampling frequency.

When a sampling frequency is defined, the user has to initiate a filter in order to pass a signal trough the filter bank. This is done by selecting ”Add new filter” in the main menu, as shown in figure 5.25.

59 Figure 5.25: In the main menu, the user can select to initiate a new filter by selecting ”Add new filter”.

The user is now given the choice whether to design a FIR or IIR filter. In this example, IIR is selected, shown in figure 5.26.

Figure 5.26: In the select type menu, IIR is selected.

The user can now select either to use the analog Butterworth filter as a reference or the Chebyshev filter. In this example the Butterworth filter is chosen as illustrated in 5.27.

Figure 5.27: In the select reference menu, the Butterworth reference filter is selected.

After selecting which reference filter to use, the user has to chose whether to design a LP, HP, BP or BS filter. In this example the BS filter is selected, shown in figure 5.28.

Figure 5.28: A band stop filter is selected.

When the model of filter is chosen, the user get to chose the filter order. In this example a 5th order BS filter is selected, illustrated in figure 5.29.

60 Figure 5.29: The 5th order filter is selected.

The user now get to select upper and lower cutoff frequencies, illustrated in figure 5.30 and 5.31.

Figure 5.30: The lower cutoff frequency specified by entering 2.2 kHz.

Figure 5.31: The upper cutoff frequency specified by entering 2.4 kHz.

Now a 5th order BS filter is initiated by using the analog Butterworth filter as a reference. However, the filter does not have any input signal. A signal can be connected to the filter by selecting ”Add filt input” in the main menu, as illustrated in figure 5.32.

Figure 5.32: An input signal is added to the filter by selecting ”Add filt input”.

The user selects whether to connect the filter input to an another filter output or to one of the ADC’s, as in figure 5.33.

Figure 5.33: The filter is connected to any of the ADC’s by selecting ADC in the select source menu.

61 In figure 5.34, the user selecting which input channel to connect the filter to.

Figure 5.34: In the select source menu, the input channel is selected, i.e. to which ADC to connect the filter.

In figure 5.35 the filter ID which should be connected to the ADC at channel 1 is se- lected.

Figure 5.35: The filter ID of the filter to connect to the input channel 1 is selected.

At this point, the filter is initiated and has an input signal, still the output of the filter is not connected to any other filter or any of the DAC’s. In order to get an output signal at one of the BNC-connectors the filter has to be connected to one of the DAC’s. The filter can be connected to any of the DAC’s by selecting ”Add to output” in the main menu, illustrated in figure 5.36.

Figure 5.36: An output signal is added to any of the output channels by selecting ”Add to output”.

In figure 5.37 the output channel to connect a signal to is selected.

Figure 5.37: The output channel 1 is selected.

In figure 5.38 the filter ID of the filter that should be connected to the DAC is se- lected.

62 Figure 5.38: The filter ID of the filter to connect to the output channel 1 is selected.

A filter that is connected to input channel 1 and output channel 1 is now initiated. The filter bank starts to execute the filtering when ”Run” is selected in the main menu, shown if figure 5.39.

Figure 5.39: The filter bank starts the filtering when ”Run” is selected in the main menu.

While the filter bank is preforming the filtering algorithm, the LCD looks as in figure 5.40.

Figure 5.40: ”Filtering...” is displayed while the filter bank is running the filtering algo- rithm.

In case the filter bank is not capable of computing the output due to too high filter order at that specific sampling frequency, the LCD displays ”Overload” as in figure 5.41.

Figure 5.41: ”Overload” is displayed if the filter bank is not capable to calculate the output until the next ADC sample is available.

63 6 Discussion

The filter bank is limited to two input signals and output signals, where the amplitude is limited to 3.3 V peak-to-peak since the reference voltage of the ADC is set to 3.3 V. Because a timer is used to detect overload, no specific maximum sampling frequency can be specified. The maximum sampling frequency is depending on the number of filters and the corresponding filter orders. This said, there is a trade-off between filter order and sampling frequency. If a filter of low order is used, a high sampling frequency can be attained since a filter of low order does not need as many CPU clock cycles to be computed as a higher order filter. The results from the simulations of the AAFs and the RECFs show that AAF2 and AAF3 matching the required filter characteristics. Due to lack of available components, AAF1 does not have the frequency characteristics that was originally requested but is considered good enough. The over all performance of the AAF filters are not sufficient for a commercial product, and should therefore be redesign if a new version is made. The filter order could be increased and the cutoff frequency should be lowered in order to prevent aliasing distortion from occur. In section 5.2.1.1 and 5.2.1.2 the theoretical amplitude and phase response using the coefficients are presented. As shown in the plots, the coefficients calculated by the filter bank script are almost identical to the coefficients calculated by MATLAB. The tiny differences are most likely due to that different number of decimals are used, which would give small difference in the results. All the FIR and Butterworth filters are implemented in the filter bank and are working properly. The cutoff frequency of the FIR filter corresponds to an attenuation of -6 dB. All the Chebyshev I filters are also implemented, however, the gain of the even order Chebyshev filters do not seem to be correct. The reason is probably because a mistake has been done when implementing eq. (2.47). All filters generates noise within the passband, as shown in Figure 5.21. This is most likely because the internal oscillator within the MCU is used to generate the CPU clock signal. The internal oscillator is not very accurate, and tends to vary depending on the ambient temperature. By redesigning the PCB, an external crystal can be used instead. This gives a more accurate clock frequency, and will likely decrease the noise level significantly. In section 5.2.1.3 the amplitude and phase response of different LP and BP filters config- ured in the filter bank are compared to the theoretical responses. By studying the result, the amplitude response in the passband seems noisy. This is probably because of the frequency step size that is used to evaluate the filter bank. The step size that is used is ∆f = 10 Hz. An FFT of the input signal is performed, the results shows that the input signal has the same behavior over the entire frequency spectra as the passband after the filter bank. If the amplitude of the filtered signal is evaluated in time-domain for some different frequencies, the result is very close to the theoretical amplitude. Currently, it is not possible to use the entire capacity of the filter bank. This is because

64 the capacity increases significantly when the optimizer in the compiler is enabled. But when optimization in enabled, the strings that should be printed on the LCD is somehow optimized so they are no longer recognizable. This makes it hard to use the filter bank. Without optimization it is possible to run the filter configuration in Figure 5.22 with the sampling frequency set to 23 kHz. If optimization is enabled, the sampling frequency can be increased to 44 kHz. At the moment there are no rules implemented to ensure that only valid filter connections are made. Since the filter bank algorithm computes the outputs of the filters in the same order as they are initialized, the connection in Figure 6.1 should be considered invalid.

Input Filter2 Filter1 Output

Figure 6.1: An example of an invalid filter connect, where Filter1 is first initialized.

The output of Filter2 is based on old data, which is now treated as new data since Filter1 is the first filter to be computed in the filter bank algorithm. In some connections, it only result in a linear phase shift, but in others where parallel filters are used, it might result in an unexpected behavior.

65 7 Further development

The filter bank developed in this project has a lot of potential, but there are still much that could be done to make it an, even more, powerful and user-friendly product. • Currently, the filter bank memory is erased when the unit is turned off, i.e. the filter bank has to be reconfigured each time it is started. The filter bank would be more user-friendly if it remembered the filter configuration that was used when it was switched off. • Currently, the only way to change the filter bank configuration is to turn it off. It would be a lot better if it was possible to stop the filter bank to add, remove or reconfigure filters and connections between the different structures. • Currently, the sampling frequency is selected during the start-up of the filter bank. To change the sampling frequency the filter bank has to be restarted, i.e. the filter configuration has to be reconfigured. It would be better if the sampling frequency could be changed without restarting the filter bank. • A more advanced user interface based on a touchscreen could be implemented. By using an additional MCU managing the user interface, it would probably be possible to present a real-time FFT of the input or output of any filter. • The capacity of the filter bank will increase if the MCU is replaced by an STM32F746, which is more powerful and has roughly 30 % higher CPU clock frequency. • Adding rules of how filters can be connected. • Add the possibility to enter filter coefficients manually.

66 References

[1] “Sallen-key topology.” https://en.wikipedia.org/wiki/Sallen%E2%80%93Key_topology. Accessed: 2016-10-13. [2] J. Karki, “Analysis of the sallen-key architecture.” http://www.ti.com.cn/cn/lit/an/sloa024b/sloa024b.pdf, 2002. Texas Instruments. [3] B. Mulgrew, P. M. Grant, and J. Thompson, Digital signal processing : concepts and applications. Basingstoke: Palgrave Macmillan, 2 ed., 2003. [4] M. K. Mandal and A. Asif, Continuous and discrete time signals and systems. Cambridge, UK: Cambridge University Press, 2007. [5] D. G. Manolakis and V. K. Ingle, Applied Digital Signal Processing : Theory and Practice. Cambridge: Cambridge University Press, 2011. [6] “Filter wizard.” http://www.analog.com/designtools/en/filterwizard/. Accessed: 2016-09-02. [7] “LTspice.” http://www.linear.com/designtools/software/#LTspice. Accessed: 2016-09-02. [8] STMicroelectronics, STM32F407xx, 2016. Rev. 7. [9] Analog Devices, AD8531/AD8532/AD8534, 2008. Rev. F. [10] Littlefuse, 60R Series, 2010. [11] STMicroelectronics, UM1472 User manual, 2016. Rev. 5. [12] “Keypad image.” http://eleczone.blogspot.se/p/blog-page_91.html. Accessed: 2016-09-02. [13] Hitachi, HD44780U (LCD-II), 1998. Rev. 0.0. [14] “HD44780 library.” http://stm32f4-discovery.net/2014/06/ library-16-interfacing-hd44780-lcd-controller-with-stm32f4/. Accessed: 2016-09-02. [15] “HD44780 image.” http://www.explorelabs.com/lcd-display-16x2-hd44780-blue-white. Accessed: 2016-09-02. [16] “Picoscope 2000 series.” https://www.picotech.com/oscilloscope/2000/picoscope-2000-overview. Accessed: 2016-10-11.

67 Appendix A IIR filter coefficients

In this appendix, the results of the determination of the algebraic IIR filter coefficients in section 2.6.2.2 are presented.

The Butterworth filter coefficients are calculated by using fs, which is the sampling frequency. It is also depending on ωa which is the analog reference filter cutoff frequency. ωa is determined by using eq. (2.53). The coefficients are also depending on the pole location of the reference filter which is calculated by using eq. (2.41). Apart from these variables the BP and BS Butterworth filters are dependent of the corner frequencies which are embedded in the variable α according to eq. (2.58).

Table 3: General filter coefficients for 1st and 2nd order Butterworth LP and HP filter. The coefficients are dependent of sampling frequency, cutoff frequency and pole location.

Coefficient 1st order LP 2nd order LP 1st order HP 2nd order HP

2 2 2 2 ωa − 2fs 2ωa − 8fs 2fs − ωa 8fs − 2ωa a1 2 2 2 2 2fs + ωa ωa + 4fsσ + 4fs 2fs + ωa ωa + 4fsσ + 4fs 2 2 2 2 ωa − 4fsσ + 4fs ωa − 4fsσ + 4fs a2 - 2 2 - 2 2 ωa + 4fsσ + 4fs ωa + 4fsσ + 4fs 2 2 ωa ωa ωa ωa b0 2 2 2 2 2fs + ωa ωa + 4fsσ + 4fs 2fs + ωa ωa + 4fsσ + 4fs 2 2 ωa 2ωa −ωa −2ωa b1 2 2 2 2 2fs + ωa ωa + 4fsσ + 4fs 2fs + ωa ωa + 4fsσ + 4fs 2 2 ωa ωa b2 - 2 2 - 2 2 ωa + 4fsσ + 4fs ωa + 4fsσ + 4fs

68 Table 4: General filter coefficients for 1st and 2nd order Butterworth BP and BS filter. The coefficients are dependent of sampling frequency, cutoff frequency and pole location.

Coefficient 1st order BP 2nd order BP 1st order BS 2nd order BS

2 2 4fsα −8αfsσ − 16αfs −2αωa −4αωa − 8αfsσ a1 2 2 2 2 −2fs − ωa ωa + 4fsσ + 4fs 2fs + ωa ωa + 4fsσ + 4fs 2 2 2 2 2 2 2 2 ωa − 2fs 16α fs − 2ωa + 8fs ωa − 2fs 4α ωa + 2ωa − 8fs a2 2 2 2 2 −2fs − ωa ωa + 4fsσ + 4fs 2fs + ωa ωa + 4fsσ + 4fs 2 2 8αfsσ − 16αfs 8αfsσ − 4αωa a3 - 2 2 - 2 2 ωa + 4fsσ + 4fs ωa + 4fsσ + 4fs 2 2 2 2 ωa − 4fsα + 4fs ωa − 4fsσ + 4fs a4 - 2 2 - 2 2 ωa + 4fsσ + 4fs ωa + 4fsσ + 4fs 2 2 −ωa ωa ωa ωa b0 2 2 2 2 −2fs − ωa ωa + 4fsσ + 4fs 2fs + ωa ωa + 4fsσ + 4fs 2 −2ωaα −4αωa b1 0 0 2 2 2fs + ωa ωa + 4fsσ + 4fs 2 2 2 2 ωa −2ωa ωa 4α ωa + 2ωa b2 2 2 2 2 −2fs − ωa ωa + 4fsσ + 4fs 2fs + ωa ωa + 4fsσ + 4fs 2 −4αωa b3 - 0 - 2 2 ωa + 4fsσ + 4fs 2 2 ωa ωa b4 - 2 2 - 2 2 ωa + 4fsσ + 4fs ωa + 4fsσ + 4fs

The same variables applies for the Chebyshev I filter except from the location of the poles of the reference filter. Now σ is determined by eq. (2.49) instead, and Ω is calculated by using eq. (2.50). G is the gain of the filter and is calculated according to eq. (2.47). The general Chebyshev I filter coefficients are presented in Table 5-7.

69 Table 5: General filter coefficients for 1st and 2nd order Chebychev I LP and HP filter. The coefficients are dependent of sampling frequency, cutoff frequency, pole location and pass band ripple.

Coefficient 1st order LP 2nd order LP 1st order HP 2nd order HP

2 2 2 2 2 2 −2fs − σ 2σ + 2Ω − 8fs 2fs + σ 8fs − 2σ − 2Ω a1 2 2 2 2 2 2 2fs − σ 4fs − 4fsσ + σ + Ω 2fs − σ 4fs − 4fsσ + σ + Ω 2 2 2 2 2 2 4fs + 4fsσ + σ + Ω 4fs + 4fsσ + σ + Ω a2 - 2 2 2 - 2 2 2 4fs − 4fsσ + σ + Ω 4fs − 4fsσ + σ + Ω −σ G −σ G b0 2 2 2 2 2 2 2fs − σ 4fs − 4fsσ + σ + Ω 2fs − σ 4fs − 4fsσ + σ + Ω −σ 2G σ −2G b1 2 2 2 2 2 2 2fs − σ 4fs − 4fsσ + σ + Ω 2fs − σ 4fs − 4fsσ + σ + Ω G G b2 - 2 2 2 - 2 2 2 4fs − 4fsσ + σ + Ω 4fs − 4fsσ + σ + Ω

70 Table 6: General filter coefficients for 1st and 2nd order Chebyshev BP filter. The coeffi- cients are dependent of sampling frequency, cutoff frequency and pole location.

Coefficient 1st order BP 2nd order BP

2 −4αfs 8αfsσ − 16αfs a1 2 2 2 2fs − σ σ − 4fsσ + Ω + 4fs 2 2 2 2 2 σ + 2fs 8fs − 2σ − 2Ω + 16α fs a2 2 2 2 2fs − σ σ − 4fsσ + Ω + 4fs 2 −8αfsσ − 16αfs a3 - 2 2 2 σ − 4fsσ + Ω + 4fs 2 2 2 σ + 4fsσ + Ω + 4fs a4 - 2 2 2 σ − 4fsσ + Ω + 4fs G 1 b0 2 2 2 2fs − σ σ − 4fsσ + Ω + 4fs

b1 0 0

−G −2 b2 2 2 2 2fs − σ σ − 4fsσ + Ω + 4fs

b3 - 0

1 b4 - 2 2 2 σ − 4fsσ + Ω + 4fs

71 Table 7: General filter coefficients for 1st and 2nd order Chebyshev BS filter. The coeffi- cients are dependent of sampling frequency, cutoff frequency and pole location.

Coefficient 1st order BS 2nd order BS

2 2 −2ασ 8αfsσ − 4ασ − 4αΩ a1 2 2 2 σ − 2fs σ + Ω + 4fs − 4fsσ 2 2 2 2 2 2 2 σ + 2fs 4α σ + 2σ + 4α Ω + 2Ω − 8fs a2 2 2 2 σ − 2fs σ + Ω + 4fs − 4fsσ 2 2 −4ασ − 8αfsσ − 4αΩ a3 - 2 2 2 σ + Ω + 4fs − 4fsσ 2 2 2 σ + 4fsσ + Ω + 4fs a4 - 2 2 2 σ + Ω + 4fs − 4fsσ −G 1 b0 2 2 2 σ − 2fs σ + Ω + 4fs − 4fsσ 2Gα −4α b1 2 2 2 σ − 2fs σ + Ω + 4fs − 4fsσ −G 4α2 + 2 b2 2 2 2 σ − 2fs σ + Ω + 4fs − 4fsσ −4α b3 - 2 2 2 σ + Ω + 4fs − 4fsσ 1 b4 - 2 2 2 σ + Ω + 4fs − 4fsσ

72 Appendix B Derivation of Sallen-Key topology

Z3

v− − Z1 Z2 vout v+ vin + v1

Z4

Figure B.1: The general Sallen-Key filter topology.

When considering the circuit in Figure B.1 ideal, the voltage at the terminals of the OP-amplifier is given by v+ = v− = vout. (B.1)

The currents in node v1 can be expressed by using Kirchhoff’s Current Law (KCL) v − v v − v v − v in 1 = 1 out + 1 + . (B.2) Z1 Z3 Z2 By using Equation B.1 it can be rewritten as v − v v − v v − v in 1 = 1 out + 1 out . (B.3) Z1 Z3 Z2

Since vout = v+ and the impedance at the input terminals of the OP-amplifier is considered infinite, the current through Z2 and Z4 depending on vout, is expressed by v − v v 1 out = out . (B.4) Z2 Z4 v can now be expressed by 1   Z2 v1 = vout + 1 . (B.5) Z4

By substituting v1 in eq. (B.3) by eq. (B.5), the Equation (B.6) is obtained, which is only dependent on vin and vout and the impedance’s of the components.       Z2 Z2 Z2 vin − vout Z + 1 vout Z + 1 − vout vout Z + 1 − vout 4 = 4 + 4 (B.6) Z1 Z3 Z2 The transfer function of the filter is given by v Z Z out = 3 4 . (B.7) vin Z1Z2 + Z3(Z1 + Z2) + Z3Z4

73 The LP filter implementation of the Sallen-Key topology is obtained when replacing the impedance’s by 1 1 Z1 = R1,Z2 = R2,Z3 = ,Z4 = . sC1 sC2 The transfer function then becomes 1 H(s) = 2 . (B.8) s R1R2C1C2 + s(R1C2 + R2C2) + 1

74 Appendix C Derivation of differential amplifier cir- cuit

R3 R4 vin

v− − R1 vout v+ vref +

R2

Figure C.1: The differential amplifier circuit.

When considering the circuit ideal, the voltage at the terminal of the OP-amplifier are given by v− = v+. (C.1)

The voltage in node v+ is expressed as

R2 v+ = vref . (C.2) R1 + R2 By using KCL and that the impedance at the + and - terminals of an ideal OP-amplifier are infinite, the current trough R3 and R4 is expressed by v − v v − v in − = − out . (C.3) R3 R4 The equation is rewritten as

R2 R2 vin − vref vref − vout R1+R2 = R1+R2 , (C.4) R3 R4 by using eq. (C.1) and C.2. Now it is possible to express vout in terms of vin, vref and the resistances as

vref R2(R3 + R4) R4 R4 R2 R4 vout = − vin = vref (1 + ) − vin . (C.5) R3(R1 + R2) R3 R3 R1 + R2 R3 By selecting component values according to R 3R R = ,R = ,R = R , (C.6) 2 4 1 4 3 4 75 the output is determined by

R v v = v (1 + 1) 4 − v = ref − v . (C.7) out ref R 3R in 2 in 4 + 4 Now it is clear that the circuit has unity gain, the output signal is inverted and has an offset vref /2 added to it, compared to the input signal vin.

76