The 1802 Membership Card
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Periodical Guide for Computerists 1977
PERIODICAL GUIDE FOR COMPUTERISTS An Index of Magazine Articles for Computer Hobbyists January - December 1977 PERIODICAL GUIDE FOR COMPUTERISTS 1977 TABLE OF CONTENTS AMATEUR RADIO---------------------- 3 MICROCOMPUTERS ANALOG HARDWARE AND CIRCUITS------- 3 GENERAL------------------------- 36 APPLICATIONS, GENERAL-------------- 4 FUNDAMENTALS AND DESIGN--------- 37 ART--------------------------------5 SELECTION GUIDE----------------- 38 ASTRONOMY--------------------------6 AL TAI R 8800 & 680--------------- 38 BAR CODES--------------------------6 APPLE---------------------------39 BIORYTHMS--------------------------6 DI GIT AL GROUP------------------- 39 BIO FEEDBACK------------------------ 6 ELF & VIP ( COSMAC)-------------- 39 BOOKS AND PUBLICATIONS-------------6 HEATHKIT------------------------ 39 BUSINESS AND ACCOUNTING------------ 7 IMSAI--------------------------- 39 CALCULATORS------------------------ 8 INTERCEPT IM6100---------------- 39 CLUBS AND ORGANIZATIONS------------ 9 KIM----------------------------- 39 CLOCKS-----------------------------·9 PET----------------------------- 40 COMMUNICATION---------------------- 10 RADIO SHACK--------------------- 40 CONSTRUCTION----------------------- 10 SOL----------------------------- 40 CONTROL---------------------------- 11 SPHERE-------------------------- 40 CON VE RS ION, CODE------------------- 11 SWTPC--------------------------- 40 CONVERSION, NUMBER BASE------------ 11 WAVE MATE----------------------- 40 DEBUG------------------------------ 12 OTHER MICROCOMPUTERS------------ 41 -
PROGRAMS for the COSMAC ELF INTERPRETERS Paul C. Moews
PROGRAMS FOR THE COSMAC ELF INTERPRETERS PAUL C. MOEWS - 1 - PROGRAMS FOR THE COSMAC ELF INTERPRETERS Paul C. Moews List of Sections 1. Introduction ………………………………………………………………………………………….... 3 2. A Demonstration Interpreter …………………………………………………………………………... 4 3. The CHIP-8 Language …………………………………………………………………………….…... 9 4. Hardware Differences between 1802 Computers ……………………………………………………... 13 5. A Complete ELF CHIP-8 Interpreter ……………………………………………………………….… 13 6. Extending the CHIP-8 Instruction Set ………………………………………………………………… 22 7. Appendix ……………………………………………………………………………………………… 28 List of Programs Machine Code 1. Demonstration Interpreter …………………………………………………………………………….. 8 2. Complete CHIP-8 Interpreter …………………………………………………………………………. 14 3. Additional Skip Instructions …………………………………………………………………………... 22 4. Multiply, Divide and 16 Bit Display Instructions …………………………………………………….. 23 5. Six Bit ASCII Symbols ……………………………………………………………………………….. 25 Interpretive Code 1. Addition (Demonstration Interpreter) …………………………………………………………………. 5 2. Subroutine Use (Demonstration Interpreter) ………………………………………………………….. 5 3. Addition Problems (Demonstration Interpreter) ……………………………………………………… 6 4. Addition Problems (Full Interpreter) ………………………………………………………………….. 10 5. Display ASCII Character (Full Interpreter) …………………………………………………………… 26 Copyright © 1979 by Paul C. Moews All rights reserved Published March, 1979 by Paul C. Moews Printed by Parousia Press, Storrs, Connecticut - 2 - Introduction This booklet’s purpose is to explain the construction and operation of an interpreter -
Cdp1802a, Cdp1802ac, Cdp1802bc
TM CDP1802A, CDP1802AC, CDP1802BC March 1997 CMOS 8-Bit Microprocessors Features Description • Maximum Input Clock Maximum Frequency Options The CDP1802 family of CMOS microprocessors are 8-bit At VDD = 5V register oriented central processing units (CPUs) designed - CDP1802A, AC . 3.2MHz for use as general purpose computing or control elements in - CDP1802BC . 5.0MHz a wide range of stored program systems or products. • Maximum Input Clock Maximum Frequency Options The CDP1802 types include all of the circuits required for At VDD = 10V fetching, interpreting, and executing instructions which have - CDP1802A, AC . 6.4MHz been stored in standard types of memories. Extensive • Minimum Instruction Fetch-Execute Times input/output (I/O) control features are also provided to facili- tate system design. At VDD = 5V - CDP1802A, AC . 5.0µs The 1800 series architecture is designed with emphasis on - CDP1802BC . 3.2µs the total microcomputer system as an integral entity so that systems having maximum flexibility and minimum cost can • Any Combination of Standard RAM and ROM Up to be realized. The 1800 series CPU also provides a synchro- 65,536 Bytes nous interface to memories and external controllers for I/O •8-Bit Parallel Organization With Bidirectional Data Bus devices, and minimizes the cost of interface controllers. Fur- and Multiplexed Address Bus ther, the I/O interface is capable of supporting devices oper- ating in polled, interrupt driven, or direct memory access • 16 x 16 Matrix of Registers for Use as Multiple modes. Program Counters, Data Pointers, or Data Registers The CDP1802A and CDP1802AC have a maximum input •On-Chip DMA, Interrupt, and Flag Inputs clock frequency of 3.2MHz at VDD = 5V.