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Title A novel parallel algorithm for surface editing and its fpga implementation Name Yukun Liu This is a digitised version of a dissertation submitted to the University of Bedfordshire. It is available to view only. This item is subject to copyright. A NOVEL PARALLEL ALGORITHM FOR SURFACE EDITING AND ITS FPGA IMPLEMENTATION YUKUN LIU Ph.D. September 2013 UNIVERSITY OF BEDFORDSHIRE A NOVEL PARALLEL ALGORITHM FOR SURFACE EDITING AND ITS FPGA IMPLEMENTATION by YUKUN LIU Ph.D. Institute for Research in Applicable Computing A thesis submitted to the University of Bedfordshire in partial fulfilment of the requirements for the degree of Doctor of Philosophy September 2013 A Novel Parallel Algorithm for Surface Editing and its FPGA Implementation I ABSTRACT Surface modelling and editing is one of important subjects in computer graphics. Decades of research in computer graphics has been carried out on both low-level, hardware-related algorithms and high-level, abstract software. Success of computer graphics has been seen in many application areas, such as multimedia, visualisation, virtual reality and the Internet. However, the hardware realisation of OpenGL architecture based on FPGA (field programmable gate array) is beyond the scope of most of computer graphics researches. It is an uncultivated research area where the OpenGL pipeline, from hardware through the whole embedded system (ES) up to applications, is implemented in an FPGA chip. This research proposes a hybrid approach to investigating both software and hardware methods. It aims at bridging the gap between methods of software and hardware, and enhancing the overall performance for computer graphics. It consists of four parts, the construction of an FPGA-based ES, Mesa-OpenGL implementation for FPGA-based ESs, parallel processing, and a novel algorithm for surface modelling and editing. The FPGA-based ES is built up. In addition to the Nios II soft processor and DDR SDRAM memory, it consists of the LCD display device, frame buffers, video pipeline, and algorithm-specified module to support the graphics processing. Since there is no implementation of OpenGL ES available for FPGA-based ESs, a specific OpenGL implementation based on Mesa is carried out. Because of the limited FPGA resources, the implementation adopts the fixed-point arithmetic, which can offer faster computing and lower storage than the floating point arithmetic, and the accuracy satisfying the needs of 3D rendering. Moreover, the implementation includes Bézier-spline curve and surface algorithms to support surface modelling and editing. The pipelined parallelism and co-processors are used to accelerate graphics processing in this research. These two parallelism methods extend the traditional computation parallelism in fine-grained parallel tasks in the FPGA-base ESs. The novel algorithm for surface modelling and editing, called Progressive and Mixing Algorithm (PAMA), is proposed and implemented on FPGA-based ES’s. Compared with two main surface editing methods, subdivision and deformation, the PAMA can eliminate the large storage requirement and computing cost of intermediated processes. With four independent shape parameters, the PAMA can be used to model and edit freely the shape of an open or closed surface that keeps globally the zero-order geometric continuity. The PAMA can be applied independently not only FPGA-based ESs but also other platforms. With the parallel processing, small size, and low costs of computing, storage and power, the FPGA-based ES provides an effective hybrid solution to surface modelling and editing. A Novel Parallel Algorithm for Surface Editing and its FPGA Implementation II DECLARATION I declare that this thesis is my own unaided work. It is being submitted for the degree of Doctor of Philosophy at the University of Bedfordshire. It has not been submitted before for any degree or examination in any other university. Name of candidate: Signature: Date: A Novel Parallel Algorithm for Surface Editing and its FPGA Implementation III DEDICATION To my parents To my husband, Jie Geng To my son, Hao Geng To all who gave me a hand to reach this achievement, I will always say: Thank you. A Novel Parallel Algorithm for Surface Editing and its FPGA Implementation IV ACKNOWLEDGEMENTS Issac Newton said, “If you say that I see far, it is because I am standing on the shoulders of giants”. This PhD research would have been a huge, unachievable piece of work if there had not been the facilities available in the surroundings, which come from different companies and organisations, and, of course, without the Internet. Thanks for all the open or commercial resources. With them, the research has been accomplished at the foundation built from the facilities and sources. Most of them have been quoted as references at the end of the thesis. It is just like “standing on the shoulders of giants”. It is a trial-and-error process. It is a dark tunnel always with a definite light in front of me, far or near. It is a lonely journey full of joys and sadness. It is my PhD journey. It is just a scientific exploration, I think. Thanks for all the help from different places and my deep heart to support me. I would like to express my thanks to my team of supervisors, Prof. Yong Yue, Prof. Carsten Maple, and Prof. Jiaomin Liu, for their encouragement, criticism, guidance, suggestions, and support during the research. I would like to thank Mrs. Carol Connett and her family for their help and good time along with them during my stay in the UK. I would like to thank Qixiang Wang for his suggestions and advice in my research. I would like to thank my colleagues in my working university, Hebei University of Science and Technology, Prof. Liwei Guo, Chunru Huang, Guojiang Gao, and Shiquan Qiao, for their help in my work during my PhD research. Thanks to Prof. M. James C. Crabbe, Dr. Dayou Li, Dr. Jon Hitchcock, Dr. Herbert Daly, Dr. Xiaohua Feng, Shijuan Pan, Hui Wei, Shuang Gu, Beisheng Liu, Tao Cao, and others, for providing help when I needed. Finally, my very special thanks are due to my beloved family, parents, husband and son, whose encouragement has been invaluable. A Novel Parallel Algorithm for Surface Editing and its FPGA Implementation V TABLE OF CONTENTS ABSTRACT ·································································································· I DECLARATION ···························································································· II DEDICATION ······························································································ III ACKNOWLEDGEMENTS ················································································ IV TABLE OF CONTENTS ················································································· V LIST OF TABLES ·························································································· XI LIST OF FIGURES ······················································································· XII LIST OF ABBREVIATIONS·········································································· XVIII LIST OF NOTATIONS ·················································································· XXI Chapter 1: Introduction ·················································································· 1 1.1 Background ··················································································· 1 1.1.1 Software and Hardware in Computer Graphics ···························· 1 1.1.2 Hardware Solution in Computer Graphics ·································· 2 1.1.3 Parallelism in Computer Graphics ············································ 4 1.2 Research Motivation ········································································ 4 1.3 Research Aims and Objectives ··························································· 5 1.4 Research Methodology····································································· 6 1.5 Thesis Organisation ········································································· 7 Chapter 2: Literature Reviews ········································································· 9 2.1 Relative Studies of ESs ···································································· 9 2.2 Investigation of Hardware Graphics Applications ·································· 11 2.2.1 GPU Applications ······························································· 11 2.2.2 FPGA Applications ····························································· 12 2.2.3 FPGAs vs. GPUs ······························································· 13 2.2.4 FPGAs vs. CPUs ······························································· 14 2.3 Introduction of OpenGL, OpenGL ES and their Implementations ·············· 15 2.4 Investigation of Traditional Computation Parallelism ······························ 16 2.4.1 Data Parallelism: SIMD and MIMD ········································· 17 2.4.2 Operator Parallelism ··························································· 18 2.4.3 Pipelined Processors ·························································· 19 2.4.4 Cache·············································································· 19 A Novel Parallel Algorithm for Surface Editing and its FPGA Implementation VI 2.4.5 Promotion for New Concept Introduction to Parallelism ··············· 20 2.5 Related Studies in Surface Modelling and Editing ································· 20 2.6 Chapter Summary ·········································································